drivers/kvm/paging_tmpl.h

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * MMU support
   8  *
   9  * Copyright (C) 2006 Qumranet, Inc.
  10  *
  11  * Authors:
  12  *   Yaniv Kamay  <yaniv@qumranet.com>
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *
  15  * This work is licensed under the terms of the GNU GPL, version 2.  See
  16  * the COPYING file in the top-level directory.
  17  *
  18  */
  19
  20 /*
  21  * We need the mmu code to access both 32-bit and 64-bit guest ptes,
  22  * so the code in this file is compiled twice, once per pte size.
  23  */
  24
  25 #if PTTYPE == 64
  26         #define pt_element_t u64
  27         #define guest_walker guest_walker64
  28         #define FNAME(name) paging##64_##name
  29         #define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK
  30         #define PT_DIR_BASE_ADDR_MASK PT64_DIR_BASE_ADDR_MASK
  31         #define PT_INDEX(addr, level) PT64_INDEX(addr, level)
  32         #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  33         #define PT_LEVEL_MASK(level) PT64_LEVEL_MASK(level)
  34         #ifdef CONFIG_X86_64
  35         #define PT_MAX_FULL_LEVELS 4
  36         #else
  37         #define PT_MAX_FULL_LEVELS 2
  38         #endif
  39 #elif PTTYPE == 32
  40         #define pt_element_t u32
  41         #define guest_walker guest_walker32
  42         #define FNAME(name) paging##32_##name
  43         #define PT_BASE_ADDR_MASK PT32_BASE_ADDR_MASK
  44         #define PT_DIR_BASE_ADDR_MASK PT32_DIR_BASE_ADDR_MASK
  45         #define PT_INDEX(addr, level) PT32_INDEX(addr, level)
  46         #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  47         #define PT_LEVEL_MASK(level) PT32_LEVEL_MASK(level)
  48         #define PT_MAX_FULL_LEVELS 2
  49 #else
  50         #error Invalid PTTYPE value
  51 #endif
  52
  53 /*
  54  * The guest_walker structure emulates the behavior of the hardware page
  55  * table walker.
  56  */
  57 struct guest_walker {
  58         int level;
  59         gfn_t table_gfn[PT_MAX_FULL_LEVELS];
  60         pt_element_t *table;
  61         pt_element_t *ptep;
  62         pt_element_t inherited_ar;
  63         gfn_t gfn;
  64         u32 error_code;
  65 };
  66
  67 /*
  68  * Fetch a guest pte for a guest virtual address
  69  */
  70 static int FNAME(walk_addr)(struct guest_walker *walker,
  71                             struct kvm_vcpu *vcpu, gva_t addr,
  72                             int write_fault, int user_fault, int fetch_fault)
  73 {
  74         hpa_t hpa;
  75         struct kvm_memory_slot *slot;
  76         pt_element_t *ptep;
  77         pt_element_t root;
  78         gfn_t table_gfn;
  79
  80         pgprintk("%s: addr %lx\n", __FUNCTION__, addr);
  81         walker->level = vcpu->mmu.root_level;
  82         walker->table = NULL;
  83         root = vcpu->cr3;
  84 #if PTTYPE == 64
  85         if (!is_long_mode(vcpu)) {
  86                 walker->ptep = &vcpu->pdptrs[(addr >> 30) & 3];
  87                 root = *walker->ptep;
  88                 if (!(root & PT_PRESENT_MASK))
  89                         goto not_present;
  90                 --walker->level;
  91         }
  92 #endif
  93         table_gfn = (root & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  94         walker->table_gfn[walker->level - 1] = table_gfn;
  95         pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
  96                  walker->level - 1, table_gfn);
  97         slot = gfn_to_memslot(vcpu->kvm, table_gfn);
  98         hpa = safe_gpa_to_hpa(vcpu, root & PT64_BASE_ADDR_MASK);
  99         walker->table = kmap_atomic(pfn_to_page(hpa >> PAGE_SHIFT), KM_USER0);
 100
 101         ASSERT((!is_long_mode(vcpu) && is_pae(vcpu)) ||
 102                (vcpu->cr3 & CR3_NONPAE_RESERVED_BITS) == 0);
 103
 104         walker->inherited_ar = PT_USER_MASK | PT_WRITABLE_MASK;
 105
 106         for (;;) {
 107                 int index = PT_INDEX(addr, walker->level);
 108                 hpa_t paddr;
 109
 110                 ptep = &walker->table[index];
 111                 ASSERT(((unsigned long)walker->table & PAGE_MASK) ==
 112                        ((unsigned long)ptep & PAGE_MASK));
 113
 114                 if (!is_present_pte(*ptep))
 115                         goto not_present;
 116
 117                 if (write_fault && !is_writeble_pte(*ptep))
 118                         if (user_fault || is_write_protection(vcpu))
 119                                 goto access_error;
 120
 121                 if (user_fault && !(*ptep & PT_USER_MASK))
 122                         goto access_error;
 123
 124 #if PTTYPE == 64
 125                 if (fetch_fault && is_nx(vcpu) && (*ptep & PT64_NX_MASK))
 126                         goto access_error;
 127 #endif
 128
 129                 if (!(*ptep & PT_ACCESSED_MASK)) {
 130                         mark_page_dirty(vcpu->kvm, table_gfn);
 131                         *ptep |= PT_ACCESSED_MASK;
 132                 }
 133
 134                 if (walker->level == PT_PAGE_TABLE_LEVEL) {
 135                         walker->gfn = (*ptep & PT_BASE_ADDR_MASK)
 136                                 >> PAGE_SHIFT;
 137                         break;
 138                 }
 139
 140                 if (walker->level == PT_DIRECTORY_LEVEL
 141                     && (*ptep & PT_PAGE_SIZE_MASK)
 142                     && (PTTYPE == 64 || is_pse(vcpu))) {
 143                         walker->gfn = (*ptep & PT_DIR_BASE_ADDR_MASK)
 144                                 >> PAGE_SHIFT;
 145                         walker->gfn += PT_INDEX(addr, PT_PAGE_TABLE_LEVEL);
 146                         break;
 147                 }
 148
 149                 walker->inherited_ar &= walker->table[index];
 150                 table_gfn = (*ptep & PT_BASE_ADDR_MASK) >> PAGE_SHIFT;
 151                 paddr = safe_gpa_to_hpa(vcpu, *ptep & PT_BASE_ADDR_MASK);
 152                 kunmap_atomic(walker->table, KM_USER0);
 153                 walker->table = kmap_atomic(pfn_to_page(paddr >> PAGE_SHIFT),
 154                                             KM_USER0);
 155                 --walker->level;
 156                 walker->table_gfn[walker->level - 1 ] = table_gfn;
 157                 pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
 158                          walker->level - 1, table_gfn);
 159         }
 160         walker->ptep = ptep;
 161         pgprintk("%s: pte %llx\n", __FUNCTION__, (u64)*ptep);
 162         return 1;
 163
 164 not_present:
 165         walker->error_code = 0;
 166         goto err;
 167
 168 access_error:
 169         walker->error_code = PFERR_PRESENT_MASK;
 170
 171 err:
 172         if (write_fault)
 173                 walker->error_code |= PFERR_WRITE_MASK;
 174         if (user_fault)
 175                 walker->error_code |= PFERR_USER_MASK;
 176         if (fetch_fault)
 177                 walker->error_code |= PFERR_FETCH_MASK;
 178         return 0;
 179 }
 180
 181 static void FNAME(release_walker)(struct guest_walker *walker)
 182 {
 183         if (walker->table)
 184                 kunmap_atomic(walker->table, KM_USER0);
 185 }
 186
 187 static void FNAME(mark_pagetable_dirty)(struct kvm *kvm,
 188                                         struct guest_walker *walker)
 189 {
 190         mark_page_dirty(kvm, walker->table_gfn[walker->level - 1]);
 191 }
 192
 193 static void FNAME(set_pte_common)(struct kvm_vcpu *vcpu,
 194                                   u64 *shadow_pte,
 195                                   gpa_t gaddr,
 196                                   pt_element_t *gpte,
 197                                   u64 access_bits,
 198                                   int user_fault,
 199                                   int write_fault,
 200                                   int *ptwrite,
 201                                   struct guest_walker *walker,
 202                                   gfn_t gfn)
 203 {
 204         hpa_t paddr;
 205         int dirty = *gpte & PT_DIRTY_MASK;
 206         u64 spte = *shadow_pte;
 207         int was_rmapped = is_rmap_pte(spte);
 208
 209         pgprintk("%s: spte %llx gpte %llx access %llx write_fault %d"
 210                  " user_fault %d gfn %lx\n",
 211                  __FUNCTION__, spte, (u64)*gpte, access_bits,
 212                  write_fault, user_fault, gfn);
 213
 214         if (write_fault && !dirty) {
 215                 *gpte |= PT_DIRTY_MASK;
 216                 dirty = 1;
 217                 FNAME(mark_pagetable_dirty)(vcpu->kvm, walker);
 218         }
 219
 220         spte |= PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK;
 221         spte |= *gpte & PT64_NX_MASK;
 222         if (!dirty)
 223                 access_bits &= ~PT_WRITABLE_MASK;
 224
 225         paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
 226
 227         spte |= PT_PRESENT_MASK;
 228         if (access_bits & PT_USER_MASK)
 229                 spte |= PT_USER_MASK;
 230
 231         if (is_error_hpa(paddr)) {
 232                 spte |= gaddr;
 233                 spte |= PT_SHADOW_IO_MARK;
 234                 spte &= ~PT_PRESENT_MASK;
 235                 set_shadow_pte(shadow_pte, spte);
 236                 return;
 237         }
 238
 239         spte |= paddr;
 240
 241         if ((access_bits & PT_WRITABLE_MASK)
 242             || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
 243                 struct kvm_mmu_page *shadow;
 244
 245                 spte |= PT_WRITABLE_MASK;
 246                 if (user_fault) {
 247                         mmu_unshadow(vcpu, gfn);
 248                         goto unshadowed;
 249                 }
 250
 251                 shadow = kvm_mmu_lookup_page(vcpu, gfn);
 252                 if (shadow) {
 253                         pgprintk("%s: found shadow page for %lx, marking ro\n",
 254                                  __FUNCTION__, gfn);
 255                         access_bits &= ~PT_WRITABLE_MASK;
 256                         if (is_writeble_pte(spte)) {
 257                                 spte &= ~PT_WRITABLE_MASK;
 258                                 kvm_arch_ops->tlb_flush(vcpu);
 259                         }
 260                         if (write_fault)
 261                                 *ptwrite = 1;
 262                 }
 263         }
 264
 265 unshadowed:
 266
 267         if (access_bits & PT_WRITABLE_MASK)
 268                 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
 269
 270         set_shadow_pte(shadow_pte, spte);
 271         page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
 272         if (!was_rmapped)
 273                 rmap_add(vcpu, shadow_pte);
 274 }
 275
 276 static void FNAME(set_pte)(struct kvm_vcpu *vcpu, pt_element_t *gpte,
 277                            u64 *shadow_pte, u64 access_bits,
 278                            int user_fault, int write_fault, int *ptwrite,
 279                            struct guest_walker *walker, gfn_t gfn)
 280 {
 281         access_bits &= *gpte;
 282         FNAME(set_pte_common)(vcpu, shadow_pte, *gpte & PT_BASE_ADDR_MASK,
 283                               gpte, access_bits, user_fault, write_fault,
 284                               ptwrite, walker, gfn);
 285 }
 286
 287 static void FNAME(update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *page,
 288                               u64 *spte, const void *pte, int bytes)
 289 {
 290         pt_element_t gpte;
 291
 292         if (bytes < sizeof(pt_element_t))
 293                 return;
 294         gpte = *(const pt_element_t *)pte;
 295         if (~gpte & (PT_PRESENT_MASK | PT_ACCESSED_MASK))
 296                 return;
 297         pgprintk("%s: gpte %llx spte %p\n", __FUNCTION__, (u64)gpte, spte);
 298         FNAME(set_pte)(vcpu, &gpte, spte, PT_USER_MASK | PT_WRITABLE_MASK, 0,
 299                        0, NULL, NULL,
 300                        (gpte & PT_BASE_ADDR_MASK) >> PAGE_SHIFT);
 301 }
 302
 303 static void FNAME(set_pde)(struct kvm_vcpu *vcpu, pt_element_t *gpde,
 304                            u64 *shadow_pte, u64 access_bits,
 305                            int user_fault, int write_fault, int *ptwrite,
 306                            struct guest_walker *walker, gfn_t gfn)
 307 {
 308         gpa_t gaddr;
 309
 310         access_bits &= *gpde;
 311         gaddr = (gpa_t)gfn << PAGE_SHIFT;
 312         if (PTTYPE == 32 && is_cpuid_PSE36())
 313                 gaddr |= (*gpde & PT32_DIR_PSE36_MASK) <<
 314                         (32 - PT32_DIR_PSE36_SHIFT);
 315         FNAME(set_pte_common)(vcpu, shadow_pte, gaddr,
 316                               gpde, access_bits, user_fault, write_fault,
 317                               ptwrite, walker, gfn);
 318 }
 319
 320 /*
 321  * Fetch a shadow pte for a specific level in the paging hierarchy.
 322  */
 323 static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
 324                          struct guest_walker *walker,
 325                          int user_fault, int write_fault, int *ptwrite)
 326 {
 327         hpa_t shadow_addr;
 328         int level;
 329         u64 *shadow_ent;
 330         u64 *prev_shadow_ent = NULL;
 331         pt_element_t *guest_ent = walker->ptep;
 332
 333         if (!is_present_pte(*guest_ent))
 334                 return NULL;
 335
 336         shadow_addr = vcpu->mmu.root_hpa;
 337         level = vcpu->mmu.shadow_root_level;
 338         if (level == PT32E_ROOT_LEVEL) {
 339                 shadow_addr = vcpu->mmu.pae_root[(addr >> 30) & 3];
 340                 shadow_addr &= PT64_BASE_ADDR_MASK;
 341                 --level;
 342         }
 343
 344         for (; ; level--) {
 345                 u32 index = SHADOW_PT_INDEX(addr, level);
 346                 struct kvm_mmu_page *shadow_page;
 347                 u64 shadow_pte;
 348                 int metaphysical;
 349                 gfn_t table_gfn;
 350                 unsigned hugepage_access = 0;
 351
 352                 shadow_ent = ((u64 *)__va(shadow_addr)) + index;
 353                 if (is_present_pte(*shadow_ent) || is_io_pte(*shadow_ent)) {
 354                         if (level == PT_PAGE_TABLE_LEVEL)
 355                                 break;
 356                         shadow_addr = *shadow_ent & PT64_BASE_ADDR_MASK;
 357                         prev_shadow_ent = shadow_ent;
 358                         continue;
 359                 }
 360
 361                 if (level == PT_PAGE_TABLE_LEVEL)
 362                         break;
 363
 364                 if (level - 1 == PT_PAGE_TABLE_LEVEL
 365                     && walker->level == PT_DIRECTORY_LEVEL) {
 366                         metaphysical = 1;
 367                         hugepage_access = *guest_ent;
 368                         hugepage_access &= PT_USER_MASK | PT_WRITABLE_MASK;
 369                         if (*guest_ent & PT64_NX_MASK)
 370                                 hugepage_access |= (1 << 2);
 371                         hugepage_access >>= PT_WRITABLE_SHIFT;
 372                         table_gfn = (*guest_ent & PT_BASE_ADDR_MASK)
 373                                 >> PAGE_SHIFT;
 374                 } else {
 375                         metaphysical = 0;
 376                         table_gfn = walker->table_gfn[level - 2];
 377                 }
 378                 shadow_page = kvm_mmu_get_page(vcpu, table_gfn, addr, level-1,
 379                                                metaphysical, hugepage_access,
 380                                                shadow_ent);
 381                 shadow_addr = __pa(shadow_page->spt);
 382                 shadow_pte = shadow_addr | PT_PRESENT_MASK | PT_ACCESSED_MASK
 383                         | PT_WRITABLE_MASK | PT_USER_MASK;
 384                 *shadow_ent = shadow_pte;
 385                 prev_shadow_ent = shadow_ent;
 386         }
 387
 388         if (walker->level == PT_DIRECTORY_LEVEL) {
 389                 FNAME(set_pde)(vcpu, guest_ent, shadow_ent,
 390                                walker->inherited_ar, user_fault, write_fault,
 391                                ptwrite, walker, walker->gfn);
 392         } else {
 393                 ASSERT(walker->level == PT_PAGE_TABLE_LEVEL);
 394                 FNAME(set_pte)(vcpu, guest_ent, shadow_ent,
 395                                walker->inherited_ar, user_fault, write_fault,
 396                                ptwrite, walker, walker->gfn);
 397         }
 398         return shadow_ent;
 399 }
 400
 401 /*
 402  * Page fault handler.  There are several causes for a page fault:
 403  *   - there is no shadow pte for the guest pte
 404  *   - write access through a shadow pte marked read only so that we can set
 405  *     the dirty bit
 406  *   - write access to a shadow pte marked read only so we can update the page
 407  *     dirty bitmap, when userspace requests it
 408  *   - mmio access; in this case we will never install a present shadow pte
 409  *   - normal guest page fault due to the guest pte marked not present, not
 410  *     writable, or not executable
 411  *
 412  *  Returns: 1 if we need to emulate the instruction, 0 otherwise, or
 413  *           a negative value on error.
 414  */
 415 static int FNAME(page_fault)(struct kvm_vcpu *vcpu, gva_t addr,
 416                                u32 error_code)
 417 {
 418         int write_fault = error_code & PFERR_WRITE_MASK;
 419         int user_fault = error_code & PFERR_USER_MASK;
 420         int fetch_fault = error_code & PFERR_FETCH_MASK;
 421         struct guest_walker walker;
 422         u64 *shadow_pte;
 423         int write_pt = 0;
 424         int r;
 425
 426         pgprintk("%s: addr %lx err %x\n", __FUNCTION__, addr, error_code);
 427         kvm_mmu_audit(vcpu, "pre page fault");
 428
 429         r = mmu_topup_memory_caches(vcpu);
 430         if (r)
 431                 return r;
 432
 433         /*
 434          * Look up the shadow pte for the faulting address.
 435          */
 436         r = FNAME(walk_addr)(&walker, vcpu, addr, write_fault, user_fault,
 437                              fetch_fault);
 438
 439         /*
 440          * The page is not mapped by the guest.  Let the guest handle it.
 441          */
 442         if (!r) {
 443                 pgprintk("%s: guest page fault\n", __FUNCTION__);
 444                 inject_page_fault(vcpu, addr, walker.error_code);
 445                 FNAME(release_walker)(&walker);
 446                 vcpu->last_pt_write_count = 0; /* reset fork detector */
 447                 return 0;
 448         }
 449
 450         shadow_pte = FNAME(fetch)(vcpu, addr, &walker, user_fault, write_fault,
 451                                   &write_pt);
 452         pgprintk("%s: shadow pte %p %llx ptwrite %d\n", __FUNCTION__,
 453                  shadow_pte, *shadow_pte, write_pt);
 454
 455         FNAME(release_walker)(&walker);
 456
 457         if (!write_pt)
 458                 vcpu->last_pt_write_count = 0; /* reset fork detector */
 459
 460         /*
 461          * mmio: emulate if accessible, otherwise its a guest fault.
 462          */
 463         if (is_io_pte(*shadow_pte))
 464                 return 1;
 465
 466         ++vcpu->stat.pf_fixed;
 467         kvm_mmu_audit(vcpu, "post page fault (fixed)");
 468
 469         return write_pt;
 470 }
 471
 472 static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr)
 473 {
 474         struct guest_walker walker;
 475         gpa_t gpa = UNMAPPED_GVA;
 476         int r;
 477
 478         r = FNAME(walk_addr)(&walker, vcpu, vaddr, 0, 0, 0);
 479
 480         if (r) {
 481                 gpa = (gpa_t)walker.gfn << PAGE_SHIFT;
 482                 gpa |= vaddr & ~PAGE_MASK;
 483         }
 484
 485         FNAME(release_walker)(&walker);
 486         return gpa;
 487 }
 488
 489 #undef pt_element_t
 490 #undef guest_walker
 491 #undef FNAME
 492 #undef PT_BASE_ADDR_MASK
 493 #undef PT_INDEX
 494 #undef SHADOW_PT_INDEX
 495 #undef PT_LEVEL_MASK
 496 #undef PT_DIR_BASE_ADDR_MASK
 497 #undef PT_MAX_FULL_LEVELS