2 * ALSA driver for RME Hammerfall DSP audio interface(s)
4 * Copyright (c) 2002 Paul Davis
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #include <sound/driver.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/interrupt.h>
28 #include <linux/slab.h>
29 #include <linux/pci.h>
30 #include <linux/firmware.h>
31 #include <linux/moduleparam.h>
33 #include <sound/core.h>
34 #include <sound/control.h>
35 #include <sound/pcm.h>
36 #include <sound/info.h>
37 #include <sound/asoundef.h>
38 #include <sound/rawmidi.h>
39 #include <sound/hwdep.h>
40 #include <sound/initval.h>
41 #include <sound/hdsp.h>
43 #include <asm/byteorder.h>
44 #include <asm/current.h>
47 static int index
[SNDRV_CARDS
] = SNDRV_DEFAULT_IDX
; /* Index 0-MAX */
48 static char *id
[SNDRV_CARDS
] = SNDRV_DEFAULT_STR
; /* ID for this card */
49 static int enable
[SNDRV_CARDS
] = SNDRV_DEFAULT_ENABLE_PNP
; /* Enable this card */
51 module_param_array(index
, int, NULL
, 0444);
52 MODULE_PARM_DESC(index
, "Index value for RME Hammerfall DSP interface.");
53 module_param_array(id
, charp
, NULL
, 0444);
54 MODULE_PARM_DESC(id
, "ID string for RME Hammerfall DSP interface.");
55 module_param_array(enable
, bool, NULL
, 0444);
56 MODULE_PARM_DESC(enable
, "Enable/disable specific Hammerfall DSP soundcards.");
57 MODULE_AUTHOR("Paul Davis <paul@linuxaudiosystems.com>, Marcus Andersson, Thomas Charbonnel <thomas@undata.org>");
58 MODULE_DESCRIPTION("RME Hammerfall DSP");
59 MODULE_LICENSE("GPL");
60 MODULE_SUPPORTED_DEVICE("{{RME Hammerfall-DSP},"
64 #define HDSP_MAX_CHANNELS 26
65 #define HDSP_MAX_DS_CHANNELS 14
66 #define HDSP_MAX_QS_CHANNELS 8
67 #define DIGIFACE_SS_CHANNELS 26
68 #define DIGIFACE_DS_CHANNELS 14
69 #define MULTIFACE_SS_CHANNELS 18
70 #define MULTIFACE_DS_CHANNELS 14
71 #define H9652_SS_CHANNELS 26
72 #define H9652_DS_CHANNELS 14
73 /* This does not include possible Analog Extension Boards
74 AEBs are detected at card initialization
76 #define H9632_SS_CHANNELS 12
77 #define H9632_DS_CHANNELS 8
78 #define H9632_QS_CHANNELS 4
80 /* Write registers. These are defined as byte-offsets from the iobase value.
82 #define HDSP_resetPointer 0
83 #define HDSP_freqReg 0
84 #define HDSP_outputBufferAddress 32
85 #define HDSP_inputBufferAddress 36
86 #define HDSP_controlRegister 64
87 #define HDSP_interruptConfirmation 96
88 #define HDSP_outputEnable 128
89 #define HDSP_control2Reg 256
90 #define HDSP_midiDataOut0 352
91 #define HDSP_midiDataOut1 356
92 #define HDSP_fifoData 368
93 #define HDSP_inputEnable 384
95 /* Read registers. These are defined as byte-offsets from the iobase value
98 #define HDSP_statusRegister 0
99 #define HDSP_timecode 128
100 #define HDSP_status2Register 192
101 #define HDSP_midiDataOut0 352
102 #define HDSP_midiDataOut1 356
103 #define HDSP_midiDataIn0 360
104 #define HDSP_midiDataIn1 364
105 #define HDSP_midiStatusOut0 384
106 #define HDSP_midiStatusOut1 388
107 #define HDSP_midiStatusIn0 392
108 #define HDSP_midiStatusIn1 396
109 #define HDSP_fifoStatus 400
111 /* the meters are regular i/o-mapped registers, but offset
112 considerably from the rest. the peak registers are reset
113 when read; the least-significant 4 bits are full-scale counters;
114 the actual peak value is in the most-significant 24 bits.
117 #define HDSP_playbackPeakLevel 4096 /* 26 * 32 bit values */
118 #define HDSP_inputPeakLevel 4224 /* 26 * 32 bit values */
119 #define HDSP_outputPeakLevel 4352 /* (26+2) * 32 bit values */
120 #define HDSP_playbackRmsLevel 4612 /* 26 * 64 bit values */
121 #define HDSP_inputRmsLevel 4868 /* 26 * 64 bit values */
124 /* This is for H9652 cards
125 Peak values are read downward from the base
126 Rms values are read upward
127 There are rms values for the outputs too
128 26*3 values are read in ss mode
129 14*3 in ds mode, with no gap between values
131 #define HDSP_9652_peakBase 7164
132 #define HDSP_9652_rmsBase 4096
134 /* c.f. the hdsp_9632_meters_t struct */
135 #define HDSP_9632_metersBase 4096
137 #define HDSP_IO_EXTENT 7168
139 /* control2 register bits */
141 #define HDSP_TMS 0x01
142 #define HDSP_TCK 0x02
143 #define HDSP_TDI 0x04
144 #define HDSP_JTAG 0x08
145 #define HDSP_PWDN 0x10
146 #define HDSP_PROGRAM 0x020
147 #define HDSP_CONFIG_MODE_0 0x040
148 #define HDSP_CONFIG_MODE_1 0x080
149 #define HDSP_VERSION_BIT 0x100
150 #define HDSP_BIGENDIAN_MODE 0x200
151 #define HDSP_RD_MULTIPLE 0x400
152 #define HDSP_9652_ENABLE_MIXER 0x800
153 #define HDSP_TDO 0x10000000
155 #define HDSP_S_PROGRAM (HDSP_PROGRAM|HDSP_CONFIG_MODE_0)
156 #define HDSP_S_LOAD (HDSP_PROGRAM|HDSP_CONFIG_MODE_1)
158 /* Control Register bits */
160 #define HDSP_Start (1<<0) /* start engine */
161 #define HDSP_Latency0 (1<<1) /* buffer size = 2^n where n is defined by Latency{2,1,0} */
162 #define HDSP_Latency1 (1<<2) /* [ see above ] */
163 #define HDSP_Latency2 (1<<3) /* [ see above ] */
164 #define HDSP_ClockModeMaster (1<<4) /* 1=Master, 0=Slave/Autosync */
165 #define HDSP_AudioInterruptEnable (1<<5) /* what do you think ? */
166 #define HDSP_Frequency0 (1<<6) /* 0=44.1kHz/88.2kHz/176.4kHz 1=48kHz/96kHz/192kHz */
167 #define HDSP_Frequency1 (1<<7) /* 0=32kHz/64kHz/128kHz */
168 #define HDSP_DoubleSpeed (1<<8) /* 0=normal speed, 1=double speed */
169 #define HDSP_SPDIFProfessional (1<<9) /* 0=consumer, 1=professional */
170 #define HDSP_SPDIFEmphasis (1<<10) /* 0=none, 1=on */
171 #define HDSP_SPDIFNonAudio (1<<11) /* 0=off, 1=on */
172 #define HDSP_SPDIFOpticalOut (1<<12) /* 1=use 1st ADAT connector for SPDIF, 0=do not */
173 #define HDSP_SyncRef2 (1<<13)
174 #define HDSP_SPDIFInputSelect0 (1<<14)
175 #define HDSP_SPDIFInputSelect1 (1<<15)
176 #define HDSP_SyncRef0 (1<<16)
177 #define HDSP_SyncRef1 (1<<17)
178 #define HDSP_AnalogExtensionBoard (1<<18) /* For H9632 cards */
179 #define HDSP_XLRBreakoutCable (1<<20) /* For H9632 cards */
180 #define HDSP_Midi0InterruptEnable (1<<22)
181 #define HDSP_Midi1InterruptEnable (1<<23)
182 #define HDSP_LineOut (1<<24)
183 #define HDSP_ADGain0 (1<<25) /* From here : H9632 specific */
184 #define HDSP_ADGain1 (1<<26)
185 #define HDSP_DAGain0 (1<<27)
186 #define HDSP_DAGain1 (1<<28)
187 #define HDSP_PhoneGain0 (1<<29)
188 #define HDSP_PhoneGain1 (1<<30)
189 #define HDSP_QuadSpeed (1<<31)
191 #define HDSP_ADGainMask (HDSP_ADGain0|HDSP_ADGain1)
192 #define HDSP_ADGainMinus10dBV HDSP_ADGainMask
193 #define HDSP_ADGainPlus4dBu (HDSP_ADGain0)
194 #define HDSP_ADGainLowGain 0
196 #define HDSP_DAGainMask (HDSP_DAGain0|HDSP_DAGain1)
197 #define HDSP_DAGainHighGain HDSP_DAGainMask
198 #define HDSP_DAGainPlus4dBu (HDSP_DAGain0)
199 #define HDSP_DAGainMinus10dBV 0
201 #define HDSP_PhoneGainMask (HDSP_PhoneGain0|HDSP_PhoneGain1)
202 #define HDSP_PhoneGain0dB HDSP_PhoneGainMask
203 #define HDSP_PhoneGainMinus6dB (HDSP_PhoneGain0)
204 #define HDSP_PhoneGainMinus12dB 0
206 #define HDSP_LatencyMask (HDSP_Latency0|HDSP_Latency1|HDSP_Latency2)
207 #define HDSP_FrequencyMask (HDSP_Frequency0|HDSP_Frequency1|HDSP_DoubleSpeed|HDSP_QuadSpeed)
209 #define HDSP_SPDIFInputMask (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
210 #define HDSP_SPDIFInputADAT1 0
211 #define HDSP_SPDIFInputCoaxial (HDSP_SPDIFInputSelect0)
212 #define HDSP_SPDIFInputCdrom (HDSP_SPDIFInputSelect1)
213 #define HDSP_SPDIFInputAES (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
215 #define HDSP_SyncRefMask (HDSP_SyncRef0|HDSP_SyncRef1|HDSP_SyncRef2)
216 #define HDSP_SyncRef_ADAT1 0
217 #define HDSP_SyncRef_ADAT2 (HDSP_SyncRef0)
218 #define HDSP_SyncRef_ADAT3 (HDSP_SyncRef1)
219 #define HDSP_SyncRef_SPDIF (HDSP_SyncRef0|HDSP_SyncRef1)
220 #define HDSP_SyncRef_WORD (HDSP_SyncRef2)
221 #define HDSP_SyncRef_ADAT_SYNC (HDSP_SyncRef0|HDSP_SyncRef2)
223 /* Sample Clock Sources */
225 #define HDSP_CLOCK_SOURCE_AUTOSYNC 0
226 #define HDSP_CLOCK_SOURCE_INTERNAL_32KHZ 1
227 #define HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ 2
228 #define HDSP_CLOCK_SOURCE_INTERNAL_48KHZ 3
229 #define HDSP_CLOCK_SOURCE_INTERNAL_64KHZ 4
230 #define HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ 5
231 #define HDSP_CLOCK_SOURCE_INTERNAL_96KHZ 6
232 #define HDSP_CLOCK_SOURCE_INTERNAL_128KHZ 7
233 #define HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ 8
234 #define HDSP_CLOCK_SOURCE_INTERNAL_192KHZ 9
236 /* Preferred sync reference choices - used by "pref_sync_ref" control switch */
238 #define HDSP_SYNC_FROM_WORD 0
239 #define HDSP_SYNC_FROM_SPDIF 1
240 #define HDSP_SYNC_FROM_ADAT1 2
241 #define HDSP_SYNC_FROM_ADAT_SYNC 3
242 #define HDSP_SYNC_FROM_ADAT2 4
243 #define HDSP_SYNC_FROM_ADAT3 5
245 /* SyncCheck status */
247 #define HDSP_SYNC_CHECK_NO_LOCK 0
248 #define HDSP_SYNC_CHECK_LOCK 1
249 #define HDSP_SYNC_CHECK_SYNC 2
251 /* AutoSync references - used by "autosync_ref" control switch */
253 #define HDSP_AUTOSYNC_FROM_WORD 0
254 #define HDSP_AUTOSYNC_FROM_ADAT_SYNC 1
255 #define HDSP_AUTOSYNC_FROM_SPDIF 2
256 #define HDSP_AUTOSYNC_FROM_NONE 3
257 #define HDSP_AUTOSYNC_FROM_ADAT1 4
258 #define HDSP_AUTOSYNC_FROM_ADAT2 5
259 #define HDSP_AUTOSYNC_FROM_ADAT3 6
261 /* Possible sources of S/PDIF input */
263 #define HDSP_SPDIFIN_OPTICAL 0 /* optical (ADAT1) */
264 #define HDSP_SPDIFIN_COAXIAL 1 /* coaxial (RCA) */
265 #define HDSP_SPDIFIN_INTERNAL 2 /* internal (CDROM) */
266 #define HDSP_SPDIFIN_AES 3 /* xlr for H9632 (AES)*/
268 #define HDSP_Frequency32KHz HDSP_Frequency0
269 #define HDSP_Frequency44_1KHz HDSP_Frequency1
270 #define HDSP_Frequency48KHz (HDSP_Frequency1|HDSP_Frequency0)
271 #define HDSP_Frequency64KHz (HDSP_DoubleSpeed|HDSP_Frequency0)
272 #define HDSP_Frequency88_2KHz (HDSP_DoubleSpeed|HDSP_Frequency1)
273 #define HDSP_Frequency96KHz (HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
274 /* For H9632 cards */
275 #define HDSP_Frequency128KHz (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency0)
276 #define HDSP_Frequency176_4KHz (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1)
277 #define HDSP_Frequency192KHz (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
279 #define hdsp_encode_latency(x) (((x)<<1) & HDSP_LatencyMask)
280 #define hdsp_decode_latency(x) (((x) & HDSP_LatencyMask)>>1)
282 #define hdsp_encode_spdif_in(x) (((x)&0x3)<<14)
283 #define hdsp_decode_spdif_in(x) (((x)>>14)&0x3)
285 /* Status Register bits */
287 #define HDSP_audioIRQPending (1<<0)
288 #define HDSP_Lock2 (1<<1) /* this is for Digiface and H9652 */
289 #define HDSP_spdifFrequency3 HDSP_Lock2 /* this is for H9632 only */
290 #define HDSP_Lock1 (1<<2)
291 #define HDSP_Lock0 (1<<3)
292 #define HDSP_SPDIFSync (1<<4)
293 #define HDSP_TimecodeLock (1<<5)
294 #define HDSP_BufferPositionMask 0x000FFC0 /* Bit 6..15 : h/w buffer pointer */
295 #define HDSP_Sync2 (1<<16)
296 #define HDSP_Sync1 (1<<17)
297 #define HDSP_Sync0 (1<<18)
298 #define HDSP_DoubleSpeedStatus (1<<19)
299 #define HDSP_ConfigError (1<<20)
300 #define HDSP_DllError (1<<21)
301 #define HDSP_spdifFrequency0 (1<<22)
302 #define HDSP_spdifFrequency1 (1<<23)
303 #define HDSP_spdifFrequency2 (1<<24)
304 #define HDSP_SPDIFErrorFlag (1<<25)
305 #define HDSP_BufferID (1<<26)
306 #define HDSP_TimecodeSync (1<<27)
307 #define HDSP_AEBO (1<<28) /* H9632 specific Analog Extension Boards */
308 #define HDSP_AEBI (1<<29) /* 0 = present, 1 = absent */
309 #define HDSP_midi0IRQPending (1<<30)
310 #define HDSP_midi1IRQPending (1<<31)
312 #define HDSP_spdifFrequencyMask (HDSP_spdifFrequency0|HDSP_spdifFrequency1|HDSP_spdifFrequency2)
314 #define HDSP_spdifFrequency32KHz (HDSP_spdifFrequency0)
315 #define HDSP_spdifFrequency44_1KHz (HDSP_spdifFrequency1)
316 #define HDSP_spdifFrequency48KHz (HDSP_spdifFrequency0|HDSP_spdifFrequency1)
318 #define HDSP_spdifFrequency64KHz (HDSP_spdifFrequency2)
319 #define HDSP_spdifFrequency88_2KHz (HDSP_spdifFrequency0|HDSP_spdifFrequency2)
320 #define HDSP_spdifFrequency96KHz (HDSP_spdifFrequency2|HDSP_spdifFrequency1)
322 /* This is for H9632 cards */
323 #define HDSP_spdifFrequency128KHz HDSP_spdifFrequencyMask
324 #define HDSP_spdifFrequency176_4KHz HDSP_spdifFrequency3
325 #define HDSP_spdifFrequency192KHz (HDSP_spdifFrequency3|HDSP_spdifFrequency0)
327 /* Status2 Register bits */
329 #define HDSP_version0 (1<<0)
330 #define HDSP_version1 (1<<1)
331 #define HDSP_version2 (1<<2)
332 #define HDSP_wc_lock (1<<3)
333 #define HDSP_wc_sync (1<<4)
334 #define HDSP_inp_freq0 (1<<5)
335 #define HDSP_inp_freq1 (1<<6)
336 #define HDSP_inp_freq2 (1<<7)
337 #define HDSP_SelSyncRef0 (1<<8)
338 #define HDSP_SelSyncRef1 (1<<9)
339 #define HDSP_SelSyncRef2 (1<<10)
341 #define HDSP_wc_valid (HDSP_wc_lock|HDSP_wc_sync)
343 #define HDSP_systemFrequencyMask (HDSP_inp_freq0|HDSP_inp_freq1|HDSP_inp_freq2)
344 #define HDSP_systemFrequency32 (HDSP_inp_freq0)
345 #define HDSP_systemFrequency44_1 (HDSP_inp_freq1)
346 #define HDSP_systemFrequency48 (HDSP_inp_freq0|HDSP_inp_freq1)
347 #define HDSP_systemFrequency64 (HDSP_inp_freq2)
348 #define HDSP_systemFrequency88_2 (HDSP_inp_freq0|HDSP_inp_freq2)
349 #define HDSP_systemFrequency96 (HDSP_inp_freq1|HDSP_inp_freq2)
350 /* FIXME : more values for 9632 cards ? */
352 #define HDSP_SelSyncRefMask (HDSP_SelSyncRef0|HDSP_SelSyncRef1|HDSP_SelSyncRef2)
353 #define HDSP_SelSyncRef_ADAT1 0
354 #define HDSP_SelSyncRef_ADAT2 (HDSP_SelSyncRef0)
355 #define HDSP_SelSyncRef_ADAT3 (HDSP_SelSyncRef1)
356 #define HDSP_SelSyncRef_SPDIF (HDSP_SelSyncRef0|HDSP_SelSyncRef1)
357 #define HDSP_SelSyncRef_WORD (HDSP_SelSyncRef2)
358 #define HDSP_SelSyncRef_ADAT_SYNC (HDSP_SelSyncRef0|HDSP_SelSyncRef2)
360 /* Card state flags */
362 #define HDSP_InitializationComplete (1<<0)
363 #define HDSP_FirmwareLoaded (1<<1)
364 #define HDSP_FirmwareCached (1<<2)
366 /* FIFO wait times, defined in terms of 1/10ths of msecs */
368 #define HDSP_LONG_WAIT 5000
369 #define HDSP_SHORT_WAIT 30
371 #define UNITY_GAIN 32768
372 #define MINUS_INFINITY_GAIN 0
374 /* the size of a substream (1 mono data stream) */
376 #define HDSP_CHANNEL_BUFFER_SAMPLES (16*1024)
377 #define HDSP_CHANNEL_BUFFER_BYTES (4*HDSP_CHANNEL_BUFFER_SAMPLES)
379 /* the size of the area we need to allocate for DMA transfers. the
380 size is the same regardless of the number of channels - the
381 Multiface still uses the same memory area.
383 Note that we allocate 1 more channel than is apparently needed
384 because the h/w seems to write 1 byte beyond the end of the last
388 #define HDSP_DMA_AREA_BYTES ((HDSP_MAX_CHANNELS+1) * HDSP_CHANNEL_BUFFER_BYTES)
389 #define HDSP_DMA_AREA_KILOBYTES (HDSP_DMA_AREA_BYTES/1024)
391 /* use hotplug firmeare loader? */
392 #if defined(CONFIG_FW_LOADER) || defined(CONFIG_FW_LOADER_MODULE)
393 #if !defined(HDSP_USE_HWDEP_LOADER) && !defined(CONFIG_SND_HDSP)
394 #define HDSP_FW_LOADER
398 struct hdsp_9632_meters
{
400 u32 playback_peak
[16];
404 u32 input_rms_low
[16];
405 u32 playback_rms_low
[16];
406 u32 output_rms_low
[16];
408 u32 input_rms_high
[16];
409 u32 playback_rms_high
[16];
410 u32 output_rms_high
[16];
411 u32 xxx_rms_high
[16];
417 struct snd_rawmidi
*rmidi
;
418 struct snd_rawmidi_substream
*input
;
419 struct snd_rawmidi_substream
*output
;
420 char istimer
; /* timer in use */
421 struct timer_list timer
;
428 struct snd_pcm_substream
*capture_substream
;
429 struct snd_pcm_substream
*playback_substream
;
430 struct hdsp_midi midi
[2];
431 struct tasklet_struct midi_tasklet
;
432 int use_midi_tasklet
;
434 u32 control_register
; /* cached value */
435 u32 control2_register
; /* cached value */
437 u32 creg_spdif_stream
;
438 int clock_source_locked
;
439 char *card_name
; /* digiface/multiface */
440 enum HDSP_IO_Type io_type
; /* ditto, but for code use */
441 unsigned short firmware_rev
;
442 unsigned short state
; /* stores state bits */
443 u32 firmware_cache
[24413]; /* this helps recover from accidental iobox power failure */
444 size_t period_bytes
; /* guess what this is */
445 unsigned char max_channels
;
446 unsigned char qs_in_channels
; /* quad speed mode for H9632 */
447 unsigned char ds_in_channels
;
448 unsigned char ss_in_channels
; /* different for multiface/digiface */
449 unsigned char qs_out_channels
;
450 unsigned char ds_out_channels
;
451 unsigned char ss_out_channels
;
453 struct snd_dma_buffer capture_dma_buf
;
454 struct snd_dma_buffer playback_dma_buf
;
455 unsigned char *capture_buffer
; /* suitably aligned address */
456 unsigned char *playback_buffer
; /* suitably aligned address */
461 int system_sample_rate
;
466 void __iomem
*iobase
;
467 struct snd_card
*card
;
469 struct snd_hwdep
*hwdep
;
471 struct snd_kcontrol
*spdif_ctl
;
472 unsigned short mixer_matrix
[HDSP_MATRIX_MIXER_SIZE
];
473 unsigned int dds_value
; /* last value written to freq register */
476 /* These tables map the ALSA channels 1..N to the channels that we
477 need to use in order to find the relevant channel buffer. RME
478 refer to this kind of mapping as between "the ADAT channel and
479 the DMA channel." We index it using the logical audio channel,
480 and the value is the DMA channel (i.e. channel buffer number)
481 where the data for that channel can be read/written from/to.
484 static char channel_map_df_ss
[HDSP_MAX_CHANNELS
] = {
485 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
486 18, 19, 20, 21, 22, 23, 24, 25
489 static char channel_map_mf_ss
[HDSP_MAX_CHANNELS
] = { /* Multiface */
491 0, 1, 2, 3, 4, 5, 6, 7,
493 16, 17, 18, 19, 20, 21, 22, 23,
496 -1, -1, -1, -1, -1, -1, -1, -1
499 static char channel_map_ds
[HDSP_MAX_CHANNELS
] = {
500 /* ADAT channels are remapped */
501 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
502 /* channels 12 and 13 are S/PDIF */
504 /* others don't exist */
505 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
508 static char channel_map_H9632_ss
[HDSP_MAX_CHANNELS
] = {
510 0, 1, 2, 3, 4, 5, 6, 7,
515 /* AO4S-192 and AI4S-192 extension boards */
517 /* others don't exist */
518 -1, -1, -1, -1, -1, -1, -1, -1,
522 static char channel_map_H9632_ds
[HDSP_MAX_CHANNELS
] = {
529 /* AO4S-192 and AI4S-192 extension boards */
531 /* others don't exist */
532 -1, -1, -1, -1, -1, -1, -1, -1,
533 -1, -1, -1, -1, -1, -1
536 static char channel_map_H9632_qs
[HDSP_MAX_CHANNELS
] = {
537 /* ADAT is disabled in this mode */
542 /* AO4S-192 and AI4S-192 extension boards */
544 /* others don't exist */
545 -1, -1, -1, -1, -1, -1, -1, -1,
546 -1, -1, -1, -1, -1, -1, -1, -1,
550 static int snd_hammerfall_get_buffer(struct pci_dev
*pci
, struct snd_dma_buffer
*dmab
, size_t size
)
552 dmab
->dev
.type
= SNDRV_DMA_TYPE_DEV
;
553 dmab
->dev
.dev
= snd_dma_pci_data(pci
);
554 if (snd_dma_get_reserved_buf(dmab
, snd_dma_pci_buf_id(pci
))) {
555 if (dmab
->bytes
>= size
)
558 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV
, snd_dma_pci_data(pci
),
564 static void snd_hammerfall_free_buffer(struct snd_dma_buffer
*dmab
, struct pci_dev
*pci
)
567 dmab
->dev
.dev
= NULL
; /* make it anonymous */
568 snd_dma_reserve_buf(dmab
, snd_dma_pci_buf_id(pci
));
573 static struct pci_device_id snd_hdsp_ids
[] = {
575 .vendor
= PCI_VENDOR_ID_XILINX
,
576 .device
= PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP
,
577 .subvendor
= PCI_ANY_ID
,
578 .subdevice
= PCI_ANY_ID
,
579 }, /* RME Hammerfall-DSP */
583 MODULE_DEVICE_TABLE(pci
, snd_hdsp_ids
);
586 static int snd_hdsp_create_alsa_devices(struct snd_card
*card
, struct hdsp
*hdsp
);
587 static int snd_hdsp_create_pcm(struct snd_card
*card
, struct hdsp
*hdsp
);
588 static int snd_hdsp_enable_io (struct hdsp
*hdsp
);
589 static void snd_hdsp_initialize_midi_flush (struct hdsp
*hdsp
);
590 static void snd_hdsp_initialize_channels (struct hdsp
*hdsp
);
591 static int hdsp_fifo_wait(struct hdsp
*hdsp
, int count
, int timeout
);
592 static int hdsp_autosync_ref(struct hdsp
*hdsp
);
593 static int snd_hdsp_set_defaults(struct hdsp
*hdsp
);
594 static void snd_hdsp_9652_enable_mixer (struct hdsp
*hdsp
);
596 static int hdsp_playback_to_output_key (struct hdsp
*hdsp
, int in
, int out
)
598 switch (hdsp
->firmware_rev
) {
600 return (64 * out
) + (32 + (in
));
604 return (32 * out
) + (16 + (in
));
606 return (52 * out
) + (26 + (in
));
610 static int hdsp_input_to_output_key (struct hdsp
*hdsp
, int in
, int out
)
612 switch (hdsp
->firmware_rev
) {
614 return (64 * out
) + in
;
618 return (32 * out
) + in
;
620 return (52 * out
) + in
;
624 static void hdsp_write(struct hdsp
*hdsp
, int reg
, int val
)
626 writel(val
, hdsp
->iobase
+ reg
);
629 static unsigned int hdsp_read(struct hdsp
*hdsp
, int reg
)
631 return readl (hdsp
->iobase
+ reg
);
634 static int hdsp_check_for_iobox (struct hdsp
*hdsp
)
637 if (hdsp
->io_type
== H9652
|| hdsp
->io_type
== H9632
) return 0;
638 if (hdsp_read (hdsp
, HDSP_statusRegister
) & HDSP_ConfigError
) {
639 snd_printk ("Hammerfall-DSP: no Digiface or Multiface connected!\n");
640 hdsp
->state
&= ~HDSP_FirmwareLoaded
;
647 static int snd_hdsp_load_firmware_from_cache(struct hdsp
*hdsp
) {
652 if ((hdsp_read (hdsp
, HDSP_statusRegister
) & HDSP_DllError
) != 0) {
654 snd_printk ("Hammerfall-DSP: loading firmware\n");
656 hdsp_write (hdsp
, HDSP_control2Reg
, HDSP_S_PROGRAM
);
657 hdsp_write (hdsp
, HDSP_fifoData
, 0);
659 if (hdsp_fifo_wait (hdsp
, 0, HDSP_LONG_WAIT
)) {
660 snd_printk ("Hammerfall-DSP: timeout waiting for download preparation\n");
664 hdsp_write (hdsp
, HDSP_control2Reg
, HDSP_S_LOAD
);
666 for (i
= 0; i
< 24413; ++i
) {
667 hdsp_write(hdsp
, HDSP_fifoData
, hdsp
->firmware_cache
[i
]);
668 if (hdsp_fifo_wait (hdsp
, 127, HDSP_LONG_WAIT
)) {
669 snd_printk ("Hammerfall-DSP: timeout during firmware loading\n");
676 if (hdsp_fifo_wait (hdsp
, 0, HDSP_LONG_WAIT
)) {
677 snd_printk ("Hammerfall-DSP: timeout at end of firmware loading\n");
681 #ifdef SNDRV_BIG_ENDIAN
682 hdsp
->control2_register
= HDSP_BIGENDIAN_MODE
;
684 hdsp
->control2_register
= 0;
686 hdsp_write (hdsp
, HDSP_control2Reg
, hdsp
->control2_register
);
687 snd_printk ("Hammerfall-DSP: finished firmware loading\n");
690 if (hdsp
->state
& HDSP_InitializationComplete
) {
691 snd_printk(KERN_INFO
"Hammerfall-DSP: firmware loaded from cache, restoring defaults\n");
692 spin_lock_irqsave(&hdsp
->lock
, flags
);
693 snd_hdsp_set_defaults(hdsp
);
694 spin_unlock_irqrestore(&hdsp
->lock
, flags
);
697 hdsp
->state
|= HDSP_FirmwareLoaded
;
702 static int hdsp_get_iobox_version (struct hdsp
*hdsp
)
704 if ((hdsp_read (hdsp
, HDSP_statusRegister
) & HDSP_DllError
) != 0) {
706 hdsp_write (hdsp
, HDSP_control2Reg
, HDSP_PROGRAM
);
707 hdsp_write (hdsp
, HDSP_fifoData
, 0);
708 if (hdsp_fifo_wait (hdsp
, 0, HDSP_SHORT_WAIT
) < 0)
711 hdsp_write (hdsp
, HDSP_control2Reg
, HDSP_S_LOAD
);
712 hdsp_write (hdsp
, HDSP_fifoData
, 0);
714 if (hdsp_fifo_wait (hdsp
, 0, HDSP_SHORT_WAIT
)) {
715 hdsp
->io_type
= Multiface
;
716 hdsp_write (hdsp
, HDSP_control2Reg
, HDSP_VERSION_BIT
);
717 hdsp_write (hdsp
, HDSP_control2Reg
, HDSP_S_LOAD
);
718 hdsp_fifo_wait (hdsp
, 0, HDSP_SHORT_WAIT
);
720 hdsp
->io_type
= Digiface
;
723 /* firmware was already loaded, get iobox type */
724 if (hdsp_read(hdsp
, HDSP_status2Register
) & HDSP_version1
)
725 hdsp
->io_type
= Multiface
;
727 hdsp
->io_type
= Digiface
;
733 #ifdef HDSP_FW_LOADER
734 static int __devinit
hdsp_request_fw_loader(struct hdsp
*hdsp
);
737 static int hdsp_check_for_firmware (struct hdsp
*hdsp
, int load_on_demand
)
739 if (hdsp
->io_type
== H9652
|| hdsp
->io_type
== H9632
)
741 if ((hdsp_read (hdsp
, HDSP_statusRegister
) & HDSP_DllError
) != 0) {
742 hdsp
->state
&= ~HDSP_FirmwareLoaded
;
743 if (! load_on_demand
)
745 snd_printk(KERN_ERR
"Hammerfall-DSP: firmware not present.\n");
746 /* try to load firmware */
747 if (! (hdsp
->state
& HDSP_FirmwareCached
)) {
748 #ifdef HDSP_FW_LOADER
749 if (! hdsp_request_fw_loader(hdsp
))
753 "Hammerfall-DSP: No firmware loaded nor "
754 "cached, please upload firmware.\n");
757 if (snd_hdsp_load_firmware_from_cache(hdsp
) != 0) {
759 "Hammerfall-DSP: Firmware loading from "
760 "cache failed, please upload manually.\n");
768 static int hdsp_fifo_wait(struct hdsp
*hdsp
, int count
, int timeout
)
772 /* the fifoStatus registers reports on how many words
773 are available in the command FIFO.
776 for (i
= 0; i
< timeout
; i
++) {
778 if ((int)(hdsp_read (hdsp
, HDSP_fifoStatus
) & 0xff) <= count
)
781 /* not very friendly, but we only do this during a firmware
782 load and changing the mixer, so we just put up with it.
788 snd_printk ("Hammerfall-DSP: wait for FIFO status <= %d failed after %d iterations\n",
793 static int hdsp_read_gain (struct hdsp
*hdsp
, unsigned int addr
)
795 if (addr
>= HDSP_MATRIX_MIXER_SIZE
)
798 return hdsp
->mixer_matrix
[addr
];
801 static int hdsp_write_gain(struct hdsp
*hdsp
, unsigned int addr
, unsigned short data
)
805 if (addr
>= HDSP_MATRIX_MIXER_SIZE
)
808 if (hdsp
->io_type
== H9652
|| hdsp
->io_type
== H9632
) {
810 /* from martin bjornsen:
812 "You can only write dwords to the
813 mixer memory which contain two
814 mixer values in the low and high
815 word. So if you want to change
816 value 0 you have to read value 1
817 from the cache and write both to
818 the first dword in the mixer
822 if (hdsp
->io_type
== H9632
&& addr
>= 512)
825 if (hdsp
->io_type
== H9652
&& addr
>= 1352)
828 hdsp
->mixer_matrix
[addr
] = data
;
831 /* `addr' addresses a 16-bit wide address, but
832 the address space accessed via hdsp_write
833 uses byte offsets. put another way, addr
834 varies from 0 to 1351, but to access the
835 corresponding memory location, we need
836 to access 0 to 2703 ...
840 hdsp_write (hdsp
, 4096 + (ad
*4),
841 (hdsp
->mixer_matrix
[(addr
&0x7fe)+1] << 16) +
842 hdsp
->mixer_matrix
[addr
&0x7fe]);
848 ad
= (addr
<< 16) + data
;
850 if (hdsp_fifo_wait(hdsp
, 127, HDSP_LONG_WAIT
))
853 hdsp_write (hdsp
, HDSP_fifoData
, ad
);
854 hdsp
->mixer_matrix
[addr
] = data
;
861 static int snd_hdsp_use_is_exclusive(struct hdsp
*hdsp
)
866 spin_lock_irqsave(&hdsp
->lock
, flags
);
867 if ((hdsp
->playback_pid
!= hdsp
->capture_pid
) &&
868 (hdsp
->playback_pid
>= 0) && (hdsp
->capture_pid
>= 0))
870 spin_unlock_irqrestore(&hdsp
->lock
, flags
);
874 static int hdsp_external_sample_rate (struct hdsp
*hdsp
)
876 unsigned int status2
= hdsp_read(hdsp
, HDSP_status2Register
);
877 unsigned int rate_bits
= status2
& HDSP_systemFrequencyMask
;
880 case HDSP_systemFrequency32
: return 32000;
881 case HDSP_systemFrequency44_1
: return 44100;
882 case HDSP_systemFrequency48
: return 48000;
883 case HDSP_systemFrequency64
: return 64000;
884 case HDSP_systemFrequency88_2
: return 88200;
885 case HDSP_systemFrequency96
: return 96000;
891 static int hdsp_spdif_sample_rate(struct hdsp
*hdsp
)
893 unsigned int status
= hdsp_read(hdsp
, HDSP_statusRegister
);
894 unsigned int rate_bits
= (status
& HDSP_spdifFrequencyMask
);
896 if (status
& HDSP_SPDIFErrorFlag
)
900 case HDSP_spdifFrequency32KHz
: return 32000;
901 case HDSP_spdifFrequency44_1KHz
: return 44100;
902 case HDSP_spdifFrequency48KHz
: return 48000;
903 case HDSP_spdifFrequency64KHz
: return 64000;
904 case HDSP_spdifFrequency88_2KHz
: return 88200;
905 case HDSP_spdifFrequency96KHz
: return 96000;
906 case HDSP_spdifFrequency128KHz
:
907 if (hdsp
->io_type
== H9632
) return 128000;
909 case HDSP_spdifFrequency176_4KHz
:
910 if (hdsp
->io_type
== H9632
) return 176400;
912 case HDSP_spdifFrequency192KHz
:
913 if (hdsp
->io_type
== H9632
) return 192000;
918 snd_printk ("Hammerfall-DSP: unknown spdif frequency status; bits = 0x%x, status = 0x%x\n", rate_bits
, status
);
922 static void hdsp_compute_period_size(struct hdsp
*hdsp
)
924 hdsp
->period_bytes
= 1 << ((hdsp_decode_latency(hdsp
->control_register
) + 8));
927 static snd_pcm_uframes_t
hdsp_hw_pointer(struct hdsp
*hdsp
)
931 position
= hdsp_read(hdsp
, HDSP_statusRegister
);
933 if (!hdsp
->precise_ptr
)
934 return (position
& HDSP_BufferID
) ? (hdsp
->period_bytes
/ 4) : 0;
936 position
&= HDSP_BufferPositionMask
;
938 position
&= (hdsp
->period_bytes
/2) - 1;
942 static void hdsp_reset_hw_pointer(struct hdsp
*hdsp
)
944 hdsp_write (hdsp
, HDSP_resetPointer
, 0);
945 if (hdsp
->io_type
== H9632
&& hdsp
->firmware_rev
>= 152)
946 /* HDSP_resetPointer = HDSP_freqReg, which is strange and
947 * requires (?) to write again DDS value after a reset pointer
948 * (at least, it works like this) */
949 hdsp_write (hdsp
, HDSP_freqReg
, hdsp
->dds_value
);
952 static void hdsp_start_audio(struct hdsp
*s
)
954 s
->control_register
|= (HDSP_AudioInterruptEnable
| HDSP_Start
);
955 hdsp_write(s
, HDSP_controlRegister
, s
->control_register
);
958 static void hdsp_stop_audio(struct hdsp
*s
)
960 s
->control_register
&= ~(HDSP_Start
| HDSP_AudioInterruptEnable
);
961 hdsp_write(s
, HDSP_controlRegister
, s
->control_register
);
964 static void hdsp_silence_playback(struct hdsp
*hdsp
)
966 memset(hdsp
->playback_buffer
, 0, HDSP_DMA_AREA_BYTES
);
969 static int hdsp_set_interrupt_interval(struct hdsp
*s
, unsigned int frames
)
973 spin_lock_irq(&s
->lock
);
982 s
->control_register
&= ~HDSP_LatencyMask
;
983 s
->control_register
|= hdsp_encode_latency(n
);
985 hdsp_write(s
, HDSP_controlRegister
, s
->control_register
);
987 hdsp_compute_period_size(s
);
989 spin_unlock_irq(&s
->lock
);
994 static void hdsp_set_dds_value(struct hdsp
*hdsp
, int rate
)
1001 else if (rate
>= 56000)
1004 /* RME says n = 104857600000000, but in the windows MADI driver, I see:
1005 // return 104857600000000 / rate; // 100 MHz
1006 return 110100480000000 / rate; // 105 MHz
1008 n
= 104857600000000ULL; /* = 2^20 * 10^8 */
1009 div64_32(&n
, rate
, &r
);
1010 /* n should be less than 2^32 for being written to FREQ register */
1011 snd_assert((n
>> 32) == 0);
1012 /* HDSP_freqReg and HDSP_resetPointer are the same, so keep the DDS
1013 value to write it after a reset */
1014 hdsp
->dds_value
= n
;
1015 hdsp_write(hdsp
, HDSP_freqReg
, hdsp
->dds_value
);
1018 static int hdsp_set_rate(struct hdsp
*hdsp
, int rate
, int called_internally
)
1020 int reject_if_open
= 0;
1024 /* ASSUMPTION: hdsp->lock is either held, or
1025 there is no need for it (e.g. during module
1029 if (!(hdsp
->control_register
& HDSP_ClockModeMaster
)) {
1030 if (called_internally
) {
1031 /* request from ctl or card initialization */
1032 snd_printk(KERN_ERR
"Hammerfall-DSP: device is not running as a clock master: cannot set sample rate.\n");
1035 /* hw_param request while in AutoSync mode */
1036 int external_freq
= hdsp_external_sample_rate(hdsp
);
1037 int spdif_freq
= hdsp_spdif_sample_rate(hdsp
);
1039 if ((spdif_freq
== external_freq
*2) && (hdsp_autosync_ref(hdsp
) >= HDSP_AUTOSYNC_FROM_ADAT1
))
1040 snd_printk(KERN_INFO
"Hammerfall-DSP: Detected ADAT in double speed mode\n");
1041 else if (hdsp
->io_type
== H9632
&& (spdif_freq
== external_freq
*4) && (hdsp_autosync_ref(hdsp
) >= HDSP_AUTOSYNC_FROM_ADAT1
))
1042 snd_printk(KERN_INFO
"Hammerfall-DSP: Detected ADAT in quad speed mode\n");
1043 else if (rate
!= external_freq
) {
1044 snd_printk(KERN_INFO
"Hammerfall-DSP: No AutoSync source for requested rate\n");
1050 current_rate
= hdsp
->system_sample_rate
;
1052 /* Changing from a "single speed" to a "double speed" rate is
1053 not allowed if any substreams are open. This is because
1054 such a change causes a shift in the location of
1055 the DMA buffers and a reduction in the number of available
1058 Note that a similar but essentially insoluble problem
1059 exists for externally-driven rate changes. All we can do
1060 is to flag rate changes in the read/write routines. */
1062 if (rate
> 96000 && hdsp
->io_type
!= H9632
)
1067 if (current_rate
> 48000)
1069 rate_bits
= HDSP_Frequency32KHz
;
1072 if (current_rate
> 48000)
1074 rate_bits
= HDSP_Frequency44_1KHz
;
1077 if (current_rate
> 48000)
1079 rate_bits
= HDSP_Frequency48KHz
;
1082 if (current_rate
<= 48000 || current_rate
> 96000)
1084 rate_bits
= HDSP_Frequency64KHz
;
1087 if (current_rate
<= 48000 || current_rate
> 96000)
1089 rate_bits
= HDSP_Frequency88_2KHz
;
1092 if (current_rate
<= 48000 || current_rate
> 96000)
1094 rate_bits
= HDSP_Frequency96KHz
;
1097 if (current_rate
< 128000)
1099 rate_bits
= HDSP_Frequency128KHz
;
1102 if (current_rate
< 128000)
1104 rate_bits
= HDSP_Frequency176_4KHz
;
1107 if (current_rate
< 128000)
1109 rate_bits
= HDSP_Frequency192KHz
;
1115 if (reject_if_open
&& (hdsp
->capture_pid
>= 0 || hdsp
->playback_pid
>= 0)) {
1116 snd_printk ("Hammerfall-DSP: cannot change speed mode (capture PID = %d, playback PID = %d)\n",
1118 hdsp
->playback_pid
);
1122 hdsp
->control_register
&= ~HDSP_FrequencyMask
;
1123 hdsp
->control_register
|= rate_bits
;
1124 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
1126 /* For HDSP9632 rev 152, need to set DDS value in FREQ register */
1127 if (hdsp
->io_type
== H9632
&& hdsp
->firmware_rev
>= 152)
1128 hdsp_set_dds_value(hdsp
, rate
);
1130 if (rate
>= 128000) {
1131 hdsp
->channel_map
= channel_map_H9632_qs
;
1132 } else if (rate
> 48000) {
1133 if (hdsp
->io_type
== H9632
)
1134 hdsp
->channel_map
= channel_map_H9632_ds
;
1136 hdsp
->channel_map
= channel_map_ds
;
1138 switch (hdsp
->io_type
) {
1140 hdsp
->channel_map
= channel_map_mf_ss
;
1144 hdsp
->channel_map
= channel_map_df_ss
;
1147 hdsp
->channel_map
= channel_map_H9632_ss
;
1150 /* should never happen */
1155 hdsp
->system_sample_rate
= rate
;
1160 /*----------------------------------------------------------------------------
1162 ----------------------------------------------------------------------------*/
1164 static unsigned char snd_hdsp_midi_read_byte (struct hdsp
*hdsp
, int id
)
1166 /* the hardware already does the relevant bit-mask with 0xff */
1168 return hdsp_read(hdsp
, HDSP_midiDataIn1
);
1170 return hdsp_read(hdsp
, HDSP_midiDataIn0
);
1173 static void snd_hdsp_midi_write_byte (struct hdsp
*hdsp
, int id
, int val
)
1175 /* the hardware already does the relevant bit-mask with 0xff */
1177 hdsp_write(hdsp
, HDSP_midiDataOut1
, val
);
1179 hdsp_write(hdsp
, HDSP_midiDataOut0
, val
);
1182 static int snd_hdsp_midi_input_available (struct hdsp
*hdsp
, int id
)
1185 return (hdsp_read(hdsp
, HDSP_midiStatusIn1
) & 0xff);
1187 return (hdsp_read(hdsp
, HDSP_midiStatusIn0
) & 0xff);
1190 static int snd_hdsp_midi_output_possible (struct hdsp
*hdsp
, int id
)
1192 int fifo_bytes_used
;
1195 fifo_bytes_used
= hdsp_read(hdsp
, HDSP_midiStatusOut1
) & 0xff;
1197 fifo_bytes_used
= hdsp_read(hdsp
, HDSP_midiStatusOut0
) & 0xff;
1199 if (fifo_bytes_used
< 128)
1200 return 128 - fifo_bytes_used
;
1205 static void snd_hdsp_flush_midi_input (struct hdsp
*hdsp
, int id
)
1207 while (snd_hdsp_midi_input_available (hdsp
, id
))
1208 snd_hdsp_midi_read_byte (hdsp
, id
);
1211 static int snd_hdsp_midi_output_write (struct hdsp_midi
*hmidi
)
1213 unsigned long flags
;
1217 unsigned char buf
[128];
1219 /* Output is not interrupt driven */
1221 spin_lock_irqsave (&hmidi
->lock
, flags
);
1222 if (hmidi
->output
) {
1223 if (!snd_rawmidi_transmit_empty (hmidi
->output
)) {
1224 if ((n_pending
= snd_hdsp_midi_output_possible (hmidi
->hdsp
, hmidi
->id
)) > 0) {
1225 if (n_pending
> (int)sizeof (buf
))
1226 n_pending
= sizeof (buf
);
1228 if ((to_write
= snd_rawmidi_transmit (hmidi
->output
, buf
, n_pending
)) > 0) {
1229 for (i
= 0; i
< to_write
; ++i
)
1230 snd_hdsp_midi_write_byte (hmidi
->hdsp
, hmidi
->id
, buf
[i
]);
1235 spin_unlock_irqrestore (&hmidi
->lock
, flags
);
1239 static int snd_hdsp_midi_input_read (struct hdsp_midi
*hmidi
)
1241 unsigned char buf
[128]; /* this buffer is designed to match the MIDI input FIFO size */
1242 unsigned long flags
;
1246 spin_lock_irqsave (&hmidi
->lock
, flags
);
1247 if ((n_pending
= snd_hdsp_midi_input_available (hmidi
->hdsp
, hmidi
->id
)) > 0) {
1249 if (n_pending
> (int)sizeof (buf
))
1250 n_pending
= sizeof (buf
);
1251 for (i
= 0; i
< n_pending
; ++i
)
1252 buf
[i
] = snd_hdsp_midi_read_byte (hmidi
->hdsp
, hmidi
->id
);
1254 snd_rawmidi_receive (hmidi
->input
, buf
, n_pending
);
1256 /* flush the MIDI input FIFO */
1258 snd_hdsp_midi_read_byte (hmidi
->hdsp
, hmidi
->id
);
1263 hmidi
->hdsp
->control_register
|= HDSP_Midi1InterruptEnable
;
1265 hmidi
->hdsp
->control_register
|= HDSP_Midi0InterruptEnable
;
1266 hdsp_write(hmidi
->hdsp
, HDSP_controlRegister
, hmidi
->hdsp
->control_register
);
1267 spin_unlock_irqrestore (&hmidi
->lock
, flags
);
1268 return snd_hdsp_midi_output_write (hmidi
);
1271 static void snd_hdsp_midi_input_trigger(struct snd_rawmidi_substream
*substream
, int up
)
1274 struct hdsp_midi
*hmidi
;
1275 unsigned long flags
;
1278 hmidi
= (struct hdsp_midi
*) substream
->rmidi
->private_data
;
1280 ie
= hmidi
->id
? HDSP_Midi1InterruptEnable
: HDSP_Midi0InterruptEnable
;
1281 spin_lock_irqsave (&hdsp
->lock
, flags
);
1283 if (!(hdsp
->control_register
& ie
)) {
1284 snd_hdsp_flush_midi_input (hdsp
, hmidi
->id
);
1285 hdsp
->control_register
|= ie
;
1288 hdsp
->control_register
&= ~ie
;
1289 tasklet_kill(&hdsp
->midi_tasklet
);
1292 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
1293 spin_unlock_irqrestore (&hdsp
->lock
, flags
);
1296 static void snd_hdsp_midi_output_timer(unsigned long data
)
1298 struct hdsp_midi
*hmidi
= (struct hdsp_midi
*) data
;
1299 unsigned long flags
;
1301 snd_hdsp_midi_output_write(hmidi
);
1302 spin_lock_irqsave (&hmidi
->lock
, flags
);
1304 /* this does not bump hmidi->istimer, because the
1305 kernel automatically removed the timer when it
1306 expired, and we are now adding it back, thus
1307 leaving istimer wherever it was set before.
1310 if (hmidi
->istimer
) {
1311 hmidi
->timer
.expires
= 1 + jiffies
;
1312 add_timer(&hmidi
->timer
);
1315 spin_unlock_irqrestore (&hmidi
->lock
, flags
);
1318 static void snd_hdsp_midi_output_trigger(struct snd_rawmidi_substream
*substream
, int up
)
1320 struct hdsp_midi
*hmidi
;
1321 unsigned long flags
;
1323 hmidi
= (struct hdsp_midi
*) substream
->rmidi
->private_data
;
1324 spin_lock_irqsave (&hmidi
->lock
, flags
);
1326 if (!hmidi
->istimer
) {
1327 init_timer(&hmidi
->timer
);
1328 hmidi
->timer
.function
= snd_hdsp_midi_output_timer
;
1329 hmidi
->timer
.data
= (unsigned long) hmidi
;
1330 hmidi
->timer
.expires
= 1 + jiffies
;
1331 add_timer(&hmidi
->timer
);
1335 if (hmidi
->istimer
&& --hmidi
->istimer
<= 0)
1336 del_timer (&hmidi
->timer
);
1338 spin_unlock_irqrestore (&hmidi
->lock
, flags
);
1340 snd_hdsp_midi_output_write(hmidi
);
1343 static int snd_hdsp_midi_input_open(struct snd_rawmidi_substream
*substream
)
1345 struct hdsp_midi
*hmidi
;
1347 hmidi
= (struct hdsp_midi
*) substream
->rmidi
->private_data
;
1348 spin_lock_irq (&hmidi
->lock
);
1349 snd_hdsp_flush_midi_input (hmidi
->hdsp
, hmidi
->id
);
1350 hmidi
->input
= substream
;
1351 spin_unlock_irq (&hmidi
->lock
);
1356 static int snd_hdsp_midi_output_open(struct snd_rawmidi_substream
*substream
)
1358 struct hdsp_midi
*hmidi
;
1360 hmidi
= (struct hdsp_midi
*) substream
->rmidi
->private_data
;
1361 spin_lock_irq (&hmidi
->lock
);
1362 hmidi
->output
= substream
;
1363 spin_unlock_irq (&hmidi
->lock
);
1368 static int snd_hdsp_midi_input_close(struct snd_rawmidi_substream
*substream
)
1370 struct hdsp_midi
*hmidi
;
1372 snd_hdsp_midi_input_trigger (substream
, 0);
1374 hmidi
= (struct hdsp_midi
*) substream
->rmidi
->private_data
;
1375 spin_lock_irq (&hmidi
->lock
);
1376 hmidi
->input
= NULL
;
1377 spin_unlock_irq (&hmidi
->lock
);
1382 static int snd_hdsp_midi_output_close(struct snd_rawmidi_substream
*substream
)
1384 struct hdsp_midi
*hmidi
;
1386 snd_hdsp_midi_output_trigger (substream
, 0);
1388 hmidi
= (struct hdsp_midi
*) substream
->rmidi
->private_data
;
1389 spin_lock_irq (&hmidi
->lock
);
1390 hmidi
->output
= NULL
;
1391 spin_unlock_irq (&hmidi
->lock
);
1396 static struct snd_rawmidi_ops snd_hdsp_midi_output
=
1398 .open
= snd_hdsp_midi_output_open
,
1399 .close
= snd_hdsp_midi_output_close
,
1400 .trigger
= snd_hdsp_midi_output_trigger
,
1403 static struct snd_rawmidi_ops snd_hdsp_midi_input
=
1405 .open
= snd_hdsp_midi_input_open
,
1406 .close
= snd_hdsp_midi_input_close
,
1407 .trigger
= snd_hdsp_midi_input_trigger
,
1410 static int snd_hdsp_create_midi (struct snd_card
*card
, struct hdsp
*hdsp
, int id
)
1414 hdsp
->midi
[id
].id
= id
;
1415 hdsp
->midi
[id
].rmidi
= NULL
;
1416 hdsp
->midi
[id
].input
= NULL
;
1417 hdsp
->midi
[id
].output
= NULL
;
1418 hdsp
->midi
[id
].hdsp
= hdsp
;
1419 hdsp
->midi
[id
].istimer
= 0;
1420 hdsp
->midi
[id
].pending
= 0;
1421 spin_lock_init (&hdsp
->midi
[id
].lock
);
1423 sprintf (buf
, "%s MIDI %d", card
->shortname
, id
+1);
1424 if (snd_rawmidi_new (card
, buf
, id
, 1, 1, &hdsp
->midi
[id
].rmidi
) < 0)
1427 sprintf (hdsp
->midi
[id
].rmidi
->name
, "%s MIDI %d", card
->id
, id
+1);
1428 hdsp
->midi
[id
].rmidi
->private_data
= &hdsp
->midi
[id
];
1430 snd_rawmidi_set_ops (hdsp
->midi
[id
].rmidi
, SNDRV_RAWMIDI_STREAM_OUTPUT
, &snd_hdsp_midi_output
);
1431 snd_rawmidi_set_ops (hdsp
->midi
[id
].rmidi
, SNDRV_RAWMIDI_STREAM_INPUT
, &snd_hdsp_midi_input
);
1433 hdsp
->midi
[id
].rmidi
->info_flags
|= SNDRV_RAWMIDI_INFO_OUTPUT
|
1434 SNDRV_RAWMIDI_INFO_INPUT
|
1435 SNDRV_RAWMIDI_INFO_DUPLEX
;
1440 /*-----------------------------------------------------------------------------
1442 ----------------------------------------------------------------------------*/
1444 static u32
snd_hdsp_convert_from_aes(struct snd_aes_iec958
*aes
)
1447 val
|= (aes
->status
[0] & IEC958_AES0_PROFESSIONAL
) ? HDSP_SPDIFProfessional
: 0;
1448 val
|= (aes
->status
[0] & IEC958_AES0_NONAUDIO
) ? HDSP_SPDIFNonAudio
: 0;
1449 if (val
& HDSP_SPDIFProfessional
)
1450 val
|= (aes
->status
[0] & IEC958_AES0_PRO_EMPHASIS_5015
) ? HDSP_SPDIFEmphasis
: 0;
1452 val
|= (aes
->status
[0] & IEC958_AES0_CON_EMPHASIS_5015
) ? HDSP_SPDIFEmphasis
: 0;
1456 static void snd_hdsp_convert_to_aes(struct snd_aes_iec958
*aes
, u32 val
)
1458 aes
->status
[0] = ((val
& HDSP_SPDIFProfessional
) ? IEC958_AES0_PROFESSIONAL
: 0) |
1459 ((val
& HDSP_SPDIFNonAudio
) ? IEC958_AES0_NONAUDIO
: 0);
1460 if (val
& HDSP_SPDIFProfessional
)
1461 aes
->status
[0] |= (val
& HDSP_SPDIFEmphasis
) ? IEC958_AES0_PRO_EMPHASIS_5015
: 0;
1463 aes
->status
[0] |= (val
& HDSP_SPDIFEmphasis
) ? IEC958_AES0_CON_EMPHASIS_5015
: 0;
1466 static int snd_hdsp_control_spdif_info(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1468 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_IEC958
;
1473 static int snd_hdsp_control_spdif_get(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1475 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1477 snd_hdsp_convert_to_aes(&ucontrol
->value
.iec958
, hdsp
->creg_spdif
);
1481 static int snd_hdsp_control_spdif_put(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1483 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1487 val
= snd_hdsp_convert_from_aes(&ucontrol
->value
.iec958
);
1488 spin_lock_irq(&hdsp
->lock
);
1489 change
= val
!= hdsp
->creg_spdif
;
1490 hdsp
->creg_spdif
= val
;
1491 spin_unlock_irq(&hdsp
->lock
);
1495 static int snd_hdsp_control_spdif_stream_info(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1497 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_IEC958
;
1502 static int snd_hdsp_control_spdif_stream_get(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1504 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1506 snd_hdsp_convert_to_aes(&ucontrol
->value
.iec958
, hdsp
->creg_spdif_stream
);
1510 static int snd_hdsp_control_spdif_stream_put(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1512 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1516 val
= snd_hdsp_convert_from_aes(&ucontrol
->value
.iec958
);
1517 spin_lock_irq(&hdsp
->lock
);
1518 change
= val
!= hdsp
->creg_spdif_stream
;
1519 hdsp
->creg_spdif_stream
= val
;
1520 hdsp
->control_register
&= ~(HDSP_SPDIFProfessional
| HDSP_SPDIFNonAudio
| HDSP_SPDIFEmphasis
);
1521 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
|= val
);
1522 spin_unlock_irq(&hdsp
->lock
);
1526 static int snd_hdsp_control_spdif_mask_info(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1528 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_IEC958
;
1533 static int snd_hdsp_control_spdif_mask_get(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1535 ucontrol
->value
.iec958
.status
[0] = kcontrol
->private_value
;
1539 #define HDSP_SPDIF_IN(xname, xindex) \
1540 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1543 .info = snd_hdsp_info_spdif_in, \
1544 .get = snd_hdsp_get_spdif_in, \
1545 .put = snd_hdsp_put_spdif_in }
1547 static unsigned int hdsp_spdif_in(struct hdsp
*hdsp
)
1549 return hdsp_decode_spdif_in(hdsp
->control_register
& HDSP_SPDIFInputMask
);
1552 static int hdsp_set_spdif_input(struct hdsp
*hdsp
, int in
)
1554 hdsp
->control_register
&= ~HDSP_SPDIFInputMask
;
1555 hdsp
->control_register
|= hdsp_encode_spdif_in(in
);
1556 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
1560 static int snd_hdsp_info_spdif_in(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1562 static char *texts
[4] = {"Optical", "Coaxial", "Internal", "AES"};
1563 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1565 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
1567 uinfo
->value
.enumerated
.items
= ((hdsp
->io_type
== H9632
) ? 4 : 3);
1568 if (uinfo
->value
.enumerated
.item
> ((hdsp
->io_type
== H9632
) ? 3 : 2))
1569 uinfo
->value
.enumerated
.item
= ((hdsp
->io_type
== H9632
) ? 3 : 2);
1570 strcpy(uinfo
->value
.enumerated
.name
, texts
[uinfo
->value
.enumerated
.item
]);
1574 static int snd_hdsp_get_spdif_in(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1576 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1578 ucontrol
->value
.enumerated
.item
[0] = hdsp_spdif_in(hdsp
);
1582 static int snd_hdsp_put_spdif_in(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1584 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1588 if (!snd_hdsp_use_is_exclusive(hdsp
))
1590 val
= ucontrol
->value
.enumerated
.item
[0] % ((hdsp
->io_type
== H9632
) ? 4 : 3);
1591 spin_lock_irq(&hdsp
->lock
);
1592 change
= val
!= hdsp_spdif_in(hdsp
);
1594 hdsp_set_spdif_input(hdsp
, val
);
1595 spin_unlock_irq(&hdsp
->lock
);
1599 #define HDSP_SPDIF_OUT(xname, xindex) \
1600 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1601 .info = snd_hdsp_info_spdif_bits, \
1602 .get = snd_hdsp_get_spdif_out, .put = snd_hdsp_put_spdif_out }
1604 static int hdsp_spdif_out(struct hdsp
*hdsp
)
1606 return (hdsp
->control_register
& HDSP_SPDIFOpticalOut
) ? 1 : 0;
1609 static int hdsp_set_spdif_output(struct hdsp
*hdsp
, int out
)
1612 hdsp
->control_register
|= HDSP_SPDIFOpticalOut
;
1614 hdsp
->control_register
&= ~HDSP_SPDIFOpticalOut
;
1615 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
1619 static int snd_hdsp_info_spdif_bits(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1621 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BOOLEAN
;
1623 uinfo
->value
.integer
.min
= 0;
1624 uinfo
->value
.integer
.max
= 1;
1628 static int snd_hdsp_get_spdif_out(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1630 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1632 ucontrol
->value
.integer
.value
[0] = hdsp_spdif_out(hdsp
);
1636 static int snd_hdsp_put_spdif_out(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1638 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1642 if (!snd_hdsp_use_is_exclusive(hdsp
))
1644 val
= ucontrol
->value
.integer
.value
[0] & 1;
1645 spin_lock_irq(&hdsp
->lock
);
1646 change
= (int)val
!= hdsp_spdif_out(hdsp
);
1647 hdsp_set_spdif_output(hdsp
, val
);
1648 spin_unlock_irq(&hdsp
->lock
);
1652 #define HDSP_SPDIF_PROFESSIONAL(xname, xindex) \
1653 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1654 .info = snd_hdsp_info_spdif_bits, \
1655 .get = snd_hdsp_get_spdif_professional, .put = snd_hdsp_put_spdif_professional }
1657 static int hdsp_spdif_professional(struct hdsp
*hdsp
)
1659 return (hdsp
->control_register
& HDSP_SPDIFProfessional
) ? 1 : 0;
1662 static int hdsp_set_spdif_professional(struct hdsp
*hdsp
, int val
)
1665 hdsp
->control_register
|= HDSP_SPDIFProfessional
;
1667 hdsp
->control_register
&= ~HDSP_SPDIFProfessional
;
1668 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
1672 static int snd_hdsp_get_spdif_professional(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1674 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1676 ucontrol
->value
.integer
.value
[0] = hdsp_spdif_professional(hdsp
);
1680 static int snd_hdsp_put_spdif_professional(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1682 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1686 if (!snd_hdsp_use_is_exclusive(hdsp
))
1688 val
= ucontrol
->value
.integer
.value
[0] & 1;
1689 spin_lock_irq(&hdsp
->lock
);
1690 change
= (int)val
!= hdsp_spdif_professional(hdsp
);
1691 hdsp_set_spdif_professional(hdsp
, val
);
1692 spin_unlock_irq(&hdsp
->lock
);
1696 #define HDSP_SPDIF_EMPHASIS(xname, xindex) \
1697 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1698 .info = snd_hdsp_info_spdif_bits, \
1699 .get = snd_hdsp_get_spdif_emphasis, .put = snd_hdsp_put_spdif_emphasis }
1701 static int hdsp_spdif_emphasis(struct hdsp
*hdsp
)
1703 return (hdsp
->control_register
& HDSP_SPDIFEmphasis
) ? 1 : 0;
1706 static int hdsp_set_spdif_emphasis(struct hdsp
*hdsp
, int val
)
1709 hdsp
->control_register
|= HDSP_SPDIFEmphasis
;
1711 hdsp
->control_register
&= ~HDSP_SPDIFEmphasis
;
1712 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
1716 static int snd_hdsp_get_spdif_emphasis(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1718 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1720 ucontrol
->value
.integer
.value
[0] = hdsp_spdif_emphasis(hdsp
);
1724 static int snd_hdsp_put_spdif_emphasis(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1726 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1730 if (!snd_hdsp_use_is_exclusive(hdsp
))
1732 val
= ucontrol
->value
.integer
.value
[0] & 1;
1733 spin_lock_irq(&hdsp
->lock
);
1734 change
= (int)val
!= hdsp_spdif_emphasis(hdsp
);
1735 hdsp_set_spdif_emphasis(hdsp
, val
);
1736 spin_unlock_irq(&hdsp
->lock
);
1740 #define HDSP_SPDIF_NON_AUDIO(xname, xindex) \
1741 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1742 .info = snd_hdsp_info_spdif_bits, \
1743 .get = snd_hdsp_get_spdif_nonaudio, .put = snd_hdsp_put_spdif_nonaudio }
1745 static int hdsp_spdif_nonaudio(struct hdsp
*hdsp
)
1747 return (hdsp
->control_register
& HDSP_SPDIFNonAudio
) ? 1 : 0;
1750 static int hdsp_set_spdif_nonaudio(struct hdsp
*hdsp
, int val
)
1753 hdsp
->control_register
|= HDSP_SPDIFNonAudio
;
1755 hdsp
->control_register
&= ~HDSP_SPDIFNonAudio
;
1756 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
1760 static int snd_hdsp_get_spdif_nonaudio(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1762 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1764 ucontrol
->value
.integer
.value
[0] = hdsp_spdif_nonaudio(hdsp
);
1768 static int snd_hdsp_put_spdif_nonaudio(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1770 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1774 if (!snd_hdsp_use_is_exclusive(hdsp
))
1776 val
= ucontrol
->value
.integer
.value
[0] & 1;
1777 spin_lock_irq(&hdsp
->lock
);
1778 change
= (int)val
!= hdsp_spdif_nonaudio(hdsp
);
1779 hdsp_set_spdif_nonaudio(hdsp
, val
);
1780 spin_unlock_irq(&hdsp
->lock
);
1784 #define HDSP_SPDIF_SAMPLE_RATE(xname, xindex) \
1785 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1788 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1789 .info = snd_hdsp_info_spdif_sample_rate, \
1790 .get = snd_hdsp_get_spdif_sample_rate \
1793 static int snd_hdsp_info_spdif_sample_rate(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1795 static char *texts
[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1796 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1798 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
1800 uinfo
->value
.enumerated
.items
= (hdsp
->io_type
== H9632
) ? 10 : 7;
1801 if (uinfo
->value
.enumerated
.item
>= uinfo
->value
.enumerated
.items
)
1802 uinfo
->value
.enumerated
.item
= uinfo
->value
.enumerated
.items
- 1;
1803 strcpy(uinfo
->value
.enumerated
.name
, texts
[uinfo
->value
.enumerated
.item
]);
1807 static int snd_hdsp_get_spdif_sample_rate(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1809 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1811 switch (hdsp_spdif_sample_rate(hdsp
)) {
1813 ucontrol
->value
.enumerated
.item
[0] = 0;
1816 ucontrol
->value
.enumerated
.item
[0] = 1;
1819 ucontrol
->value
.enumerated
.item
[0] = 2;
1822 ucontrol
->value
.enumerated
.item
[0] = 3;
1825 ucontrol
->value
.enumerated
.item
[0] = 4;
1828 ucontrol
->value
.enumerated
.item
[0] = 5;
1831 ucontrol
->value
.enumerated
.item
[0] = 7;
1834 ucontrol
->value
.enumerated
.item
[0] = 8;
1837 ucontrol
->value
.enumerated
.item
[0] = 9;
1840 ucontrol
->value
.enumerated
.item
[0] = 6;
1845 #define HDSP_SYSTEM_SAMPLE_RATE(xname, xindex) \
1846 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1849 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1850 .info = snd_hdsp_info_system_sample_rate, \
1851 .get = snd_hdsp_get_system_sample_rate \
1854 static int snd_hdsp_info_system_sample_rate(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1856 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_INTEGER
;
1861 static int snd_hdsp_get_system_sample_rate(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1863 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1865 ucontrol
->value
.enumerated
.item
[0] = hdsp
->system_sample_rate
;
1869 #define HDSP_AUTOSYNC_SAMPLE_RATE(xname, xindex) \
1870 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1873 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1874 .info = snd_hdsp_info_autosync_sample_rate, \
1875 .get = snd_hdsp_get_autosync_sample_rate \
1878 static int snd_hdsp_info_autosync_sample_rate(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1880 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1881 static char *texts
[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1882 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
1884 uinfo
->value
.enumerated
.items
= (hdsp
->io_type
== H9632
) ? 10 : 7 ;
1885 if (uinfo
->value
.enumerated
.item
>= uinfo
->value
.enumerated
.items
)
1886 uinfo
->value
.enumerated
.item
= uinfo
->value
.enumerated
.items
- 1;
1887 strcpy(uinfo
->value
.enumerated
.name
, texts
[uinfo
->value
.enumerated
.item
]);
1891 static int snd_hdsp_get_autosync_sample_rate(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1893 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1895 switch (hdsp_external_sample_rate(hdsp
)) {
1897 ucontrol
->value
.enumerated
.item
[0] = 0;
1900 ucontrol
->value
.enumerated
.item
[0] = 1;
1903 ucontrol
->value
.enumerated
.item
[0] = 2;
1906 ucontrol
->value
.enumerated
.item
[0] = 3;
1909 ucontrol
->value
.enumerated
.item
[0] = 4;
1912 ucontrol
->value
.enumerated
.item
[0] = 5;
1915 ucontrol
->value
.enumerated
.item
[0] = 7;
1918 ucontrol
->value
.enumerated
.item
[0] = 8;
1921 ucontrol
->value
.enumerated
.item
[0] = 9;
1924 ucontrol
->value
.enumerated
.item
[0] = 6;
1929 #define HDSP_SYSTEM_CLOCK_MODE(xname, xindex) \
1930 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1933 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1934 .info = snd_hdsp_info_system_clock_mode, \
1935 .get = snd_hdsp_get_system_clock_mode \
1938 static int hdsp_system_clock_mode(struct hdsp
*hdsp
)
1940 if (hdsp
->control_register
& HDSP_ClockModeMaster
)
1942 else if (hdsp_external_sample_rate(hdsp
) != hdsp
->system_sample_rate
)
1947 static int snd_hdsp_info_system_clock_mode(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1949 static char *texts
[] = {"Master", "Slave" };
1951 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
1953 uinfo
->value
.enumerated
.items
= 2;
1954 if (uinfo
->value
.enumerated
.item
>= uinfo
->value
.enumerated
.items
)
1955 uinfo
->value
.enumerated
.item
= uinfo
->value
.enumerated
.items
- 1;
1956 strcpy(uinfo
->value
.enumerated
.name
, texts
[uinfo
->value
.enumerated
.item
]);
1960 static int snd_hdsp_get_system_clock_mode(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1962 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1964 ucontrol
->value
.enumerated
.item
[0] = hdsp_system_clock_mode(hdsp
);
1968 #define HDSP_CLOCK_SOURCE(xname, xindex) \
1969 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1972 .info = snd_hdsp_info_clock_source, \
1973 .get = snd_hdsp_get_clock_source, \
1974 .put = snd_hdsp_put_clock_source \
1977 static int hdsp_clock_source(struct hdsp
*hdsp
)
1979 if (hdsp
->control_register
& HDSP_ClockModeMaster
) {
1980 switch (hdsp
->system_sample_rate
) {
2007 static int hdsp_set_clock_source(struct hdsp
*hdsp
, int mode
)
2011 case HDSP_CLOCK_SOURCE_AUTOSYNC
:
2012 if (hdsp_external_sample_rate(hdsp
) != 0) {
2013 if (!hdsp_set_rate(hdsp
, hdsp_external_sample_rate(hdsp
), 1)) {
2014 hdsp
->control_register
&= ~HDSP_ClockModeMaster
;
2015 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
2020 case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ
:
2023 case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ
:
2026 case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ
:
2029 case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ
:
2032 case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ
:
2035 case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ
:
2038 case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ
:
2041 case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ
:
2044 case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ
:
2050 hdsp
->control_register
|= HDSP_ClockModeMaster
;
2051 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
2052 hdsp_set_rate(hdsp
, rate
, 1);
2056 static int snd_hdsp_info_clock_source(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2058 static char *texts
[] = {"AutoSync", "Internal 32.0 kHz", "Internal 44.1 kHz", "Internal 48.0 kHz", "Internal 64.0 kHz", "Internal 88.2 kHz", "Internal 96.0 kHz", "Internal 128 kHz", "Internal 176.4 kHz", "Internal 192.0 KHz" };
2059 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2061 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
2063 if (hdsp
->io_type
== H9632
)
2064 uinfo
->value
.enumerated
.items
= 10;
2066 uinfo
->value
.enumerated
.items
= 7;
2067 if (uinfo
->value
.enumerated
.item
>= uinfo
->value
.enumerated
.items
)
2068 uinfo
->value
.enumerated
.item
= uinfo
->value
.enumerated
.items
- 1;
2069 strcpy(uinfo
->value
.enumerated
.name
, texts
[uinfo
->value
.enumerated
.item
]);
2073 static int snd_hdsp_get_clock_source(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2075 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2077 ucontrol
->value
.enumerated
.item
[0] = hdsp_clock_source(hdsp
);
2081 static int snd_hdsp_put_clock_source(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2083 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2087 if (!snd_hdsp_use_is_exclusive(hdsp
))
2089 val
= ucontrol
->value
.enumerated
.item
[0];
2090 if (val
< 0) val
= 0;
2091 if (hdsp
->io_type
== H9632
) {
2098 spin_lock_irq(&hdsp
->lock
);
2099 if (val
!= hdsp_clock_source(hdsp
))
2100 change
= (hdsp_set_clock_source(hdsp
, val
) == 0) ? 1 : 0;
2103 spin_unlock_irq(&hdsp
->lock
);
2107 static int snd_hdsp_info_clock_source_lock(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2109 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BOOLEAN
;
2111 uinfo
->value
.integer
.min
= 0;
2112 uinfo
->value
.integer
.max
= 1;
2116 static int snd_hdsp_get_clock_source_lock(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2118 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2120 ucontrol
->value
.integer
.value
[0] = hdsp
->clock_source_locked
;
2124 static int snd_hdsp_put_clock_source_lock(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2126 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2129 change
= (int)ucontrol
->value
.integer
.value
[0] != hdsp
->clock_source_locked
;
2131 hdsp
->clock_source_locked
= ucontrol
->value
.integer
.value
[0];
2135 #define HDSP_DA_GAIN(xname, xindex) \
2136 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2139 .info = snd_hdsp_info_da_gain, \
2140 .get = snd_hdsp_get_da_gain, \
2141 .put = snd_hdsp_put_da_gain \
2144 static int hdsp_da_gain(struct hdsp
*hdsp
)
2146 switch (hdsp
->control_register
& HDSP_DAGainMask
) {
2147 case HDSP_DAGainHighGain
:
2149 case HDSP_DAGainPlus4dBu
:
2151 case HDSP_DAGainMinus10dBV
:
2158 static int hdsp_set_da_gain(struct hdsp
*hdsp
, int mode
)
2160 hdsp
->control_register
&= ~HDSP_DAGainMask
;
2163 hdsp
->control_register
|= HDSP_DAGainHighGain
;
2166 hdsp
->control_register
|= HDSP_DAGainPlus4dBu
;
2169 hdsp
->control_register
|= HDSP_DAGainMinus10dBV
;
2175 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
2179 static int snd_hdsp_info_da_gain(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2181 static char *texts
[] = {"Hi Gain", "+4 dBu", "-10 dbV"};
2183 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
2185 uinfo
->value
.enumerated
.items
= 3;
2186 if (uinfo
->value
.enumerated
.item
>= uinfo
->value
.enumerated
.items
)
2187 uinfo
->value
.enumerated
.item
= uinfo
->value
.enumerated
.items
- 1;
2188 strcpy(uinfo
->value
.enumerated
.name
, texts
[uinfo
->value
.enumerated
.item
]);
2192 static int snd_hdsp_get_da_gain(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2194 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2196 ucontrol
->value
.enumerated
.item
[0] = hdsp_da_gain(hdsp
);
2200 static int snd_hdsp_put_da_gain(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2202 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2206 if (!snd_hdsp_use_is_exclusive(hdsp
))
2208 val
= ucontrol
->value
.enumerated
.item
[0];
2209 if (val
< 0) val
= 0;
2210 if (val
> 2) val
= 2;
2211 spin_lock_irq(&hdsp
->lock
);
2212 if (val
!= hdsp_da_gain(hdsp
))
2213 change
= (hdsp_set_da_gain(hdsp
, val
) == 0) ? 1 : 0;
2216 spin_unlock_irq(&hdsp
->lock
);
2220 #define HDSP_AD_GAIN(xname, xindex) \
2221 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2224 .info = snd_hdsp_info_ad_gain, \
2225 .get = snd_hdsp_get_ad_gain, \
2226 .put = snd_hdsp_put_ad_gain \
2229 static int hdsp_ad_gain(struct hdsp
*hdsp
)
2231 switch (hdsp
->control_register
& HDSP_ADGainMask
) {
2232 case HDSP_ADGainMinus10dBV
:
2234 case HDSP_ADGainPlus4dBu
:
2236 case HDSP_ADGainLowGain
:
2243 static int hdsp_set_ad_gain(struct hdsp
*hdsp
, int mode
)
2245 hdsp
->control_register
&= ~HDSP_ADGainMask
;
2248 hdsp
->control_register
|= HDSP_ADGainMinus10dBV
;
2251 hdsp
->control_register
|= HDSP_ADGainPlus4dBu
;
2254 hdsp
->control_register
|= HDSP_ADGainLowGain
;
2260 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
2264 static int snd_hdsp_info_ad_gain(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2266 static char *texts
[] = {"-10 dBV", "+4 dBu", "Lo Gain"};
2268 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
2270 uinfo
->value
.enumerated
.items
= 3;
2271 if (uinfo
->value
.enumerated
.item
>= uinfo
->value
.enumerated
.items
)
2272 uinfo
->value
.enumerated
.item
= uinfo
->value
.enumerated
.items
- 1;
2273 strcpy(uinfo
->value
.enumerated
.name
, texts
[uinfo
->value
.enumerated
.item
]);
2277 static int snd_hdsp_get_ad_gain(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2279 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2281 ucontrol
->value
.enumerated
.item
[0] = hdsp_ad_gain(hdsp
);
2285 static int snd_hdsp_put_ad_gain(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2287 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2291 if (!snd_hdsp_use_is_exclusive(hdsp
))
2293 val
= ucontrol
->value
.enumerated
.item
[0];
2294 if (val
< 0) val
= 0;
2295 if (val
> 2) val
= 2;
2296 spin_lock_irq(&hdsp
->lock
);
2297 if (val
!= hdsp_ad_gain(hdsp
))
2298 change
= (hdsp_set_ad_gain(hdsp
, val
) == 0) ? 1 : 0;
2301 spin_unlock_irq(&hdsp
->lock
);
2305 #define HDSP_PHONE_GAIN(xname, xindex) \
2306 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2309 .info = snd_hdsp_info_phone_gain, \
2310 .get = snd_hdsp_get_phone_gain, \
2311 .put = snd_hdsp_put_phone_gain \
2314 static int hdsp_phone_gain(struct hdsp
*hdsp
)
2316 switch (hdsp
->control_register
& HDSP_PhoneGainMask
) {
2317 case HDSP_PhoneGain0dB
:
2319 case HDSP_PhoneGainMinus6dB
:
2321 case HDSP_PhoneGainMinus12dB
:
2328 static int hdsp_set_phone_gain(struct hdsp
*hdsp
, int mode
)
2330 hdsp
->control_register
&= ~HDSP_PhoneGainMask
;
2333 hdsp
->control_register
|= HDSP_PhoneGain0dB
;
2336 hdsp
->control_register
|= HDSP_PhoneGainMinus6dB
;
2339 hdsp
->control_register
|= HDSP_PhoneGainMinus12dB
;
2345 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
2349 static int snd_hdsp_info_phone_gain(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2351 static char *texts
[] = {"0 dB", "-6 dB", "-12 dB"};
2353 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
2355 uinfo
->value
.enumerated
.items
= 3;
2356 if (uinfo
->value
.enumerated
.item
>= uinfo
->value
.enumerated
.items
)
2357 uinfo
->value
.enumerated
.item
= uinfo
->value
.enumerated
.items
- 1;
2358 strcpy(uinfo
->value
.enumerated
.name
, texts
[uinfo
->value
.enumerated
.item
]);
2362 static int snd_hdsp_get_phone_gain(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2364 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2366 ucontrol
->value
.enumerated
.item
[0] = hdsp_phone_gain(hdsp
);
2370 static int snd_hdsp_put_phone_gain(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2372 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2376 if (!snd_hdsp_use_is_exclusive(hdsp
))
2378 val
= ucontrol
->value
.enumerated
.item
[0];
2379 if (val
< 0) val
= 0;
2380 if (val
> 2) val
= 2;
2381 spin_lock_irq(&hdsp
->lock
);
2382 if (val
!= hdsp_phone_gain(hdsp
))
2383 change
= (hdsp_set_phone_gain(hdsp
, val
) == 0) ? 1 : 0;
2386 spin_unlock_irq(&hdsp
->lock
);
2390 #define HDSP_XLR_BREAKOUT_CABLE(xname, xindex) \
2391 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2394 .info = snd_hdsp_info_xlr_breakout_cable, \
2395 .get = snd_hdsp_get_xlr_breakout_cable, \
2396 .put = snd_hdsp_put_xlr_breakout_cable \
2399 static int hdsp_xlr_breakout_cable(struct hdsp
*hdsp
)
2401 if (hdsp
->control_register
& HDSP_XLRBreakoutCable
)
2406 static int hdsp_set_xlr_breakout_cable(struct hdsp
*hdsp
, int mode
)
2409 hdsp
->control_register
|= HDSP_XLRBreakoutCable
;
2411 hdsp
->control_register
&= ~HDSP_XLRBreakoutCable
;
2412 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
2416 static int snd_hdsp_info_xlr_breakout_cable(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2418 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BOOLEAN
;
2420 uinfo
->value
.integer
.min
= 0;
2421 uinfo
->value
.integer
.max
= 1;
2425 static int snd_hdsp_get_xlr_breakout_cable(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2427 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2429 ucontrol
->value
.enumerated
.item
[0] = hdsp_xlr_breakout_cable(hdsp
);
2433 static int snd_hdsp_put_xlr_breakout_cable(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2435 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2439 if (!snd_hdsp_use_is_exclusive(hdsp
))
2441 val
= ucontrol
->value
.integer
.value
[0] & 1;
2442 spin_lock_irq(&hdsp
->lock
);
2443 change
= (int)val
!= hdsp_xlr_breakout_cable(hdsp
);
2444 hdsp_set_xlr_breakout_cable(hdsp
, val
);
2445 spin_unlock_irq(&hdsp
->lock
);
2449 /* (De)activates old RME Analog Extension Board
2450 These are connected to the internal ADAT connector
2451 Switching this on desactivates external ADAT
2453 #define HDSP_AEB(xname, xindex) \
2454 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2457 .info = snd_hdsp_info_aeb, \
2458 .get = snd_hdsp_get_aeb, \
2459 .put = snd_hdsp_put_aeb \
2462 static int hdsp_aeb(struct hdsp
*hdsp
)
2464 if (hdsp
->control_register
& HDSP_AnalogExtensionBoard
)
2469 static int hdsp_set_aeb(struct hdsp
*hdsp
, int mode
)
2472 hdsp
->control_register
|= HDSP_AnalogExtensionBoard
;
2474 hdsp
->control_register
&= ~HDSP_AnalogExtensionBoard
;
2475 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
2479 static int snd_hdsp_info_aeb(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2481 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BOOLEAN
;
2483 uinfo
->value
.integer
.min
= 0;
2484 uinfo
->value
.integer
.max
= 1;
2488 static int snd_hdsp_get_aeb(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2490 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2492 ucontrol
->value
.enumerated
.item
[0] = hdsp_aeb(hdsp
);
2496 static int snd_hdsp_put_aeb(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2498 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2502 if (!snd_hdsp_use_is_exclusive(hdsp
))
2504 val
= ucontrol
->value
.integer
.value
[0] & 1;
2505 spin_lock_irq(&hdsp
->lock
);
2506 change
= (int)val
!= hdsp_aeb(hdsp
);
2507 hdsp_set_aeb(hdsp
, val
);
2508 spin_unlock_irq(&hdsp
->lock
);
2512 #define HDSP_PREF_SYNC_REF(xname, xindex) \
2513 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2516 .info = snd_hdsp_info_pref_sync_ref, \
2517 .get = snd_hdsp_get_pref_sync_ref, \
2518 .put = snd_hdsp_put_pref_sync_ref \
2521 static int hdsp_pref_sync_ref(struct hdsp
*hdsp
)
2523 /* Notice that this looks at the requested sync source,
2524 not the one actually in use.
2527 switch (hdsp
->control_register
& HDSP_SyncRefMask
) {
2528 case HDSP_SyncRef_ADAT1
:
2529 return HDSP_SYNC_FROM_ADAT1
;
2530 case HDSP_SyncRef_ADAT2
:
2531 return HDSP_SYNC_FROM_ADAT2
;
2532 case HDSP_SyncRef_ADAT3
:
2533 return HDSP_SYNC_FROM_ADAT3
;
2534 case HDSP_SyncRef_SPDIF
:
2535 return HDSP_SYNC_FROM_SPDIF
;
2536 case HDSP_SyncRef_WORD
:
2537 return HDSP_SYNC_FROM_WORD
;
2538 case HDSP_SyncRef_ADAT_SYNC
:
2539 return HDSP_SYNC_FROM_ADAT_SYNC
;
2541 return HDSP_SYNC_FROM_WORD
;
2546 static int hdsp_set_pref_sync_ref(struct hdsp
*hdsp
, int pref
)
2548 hdsp
->control_register
&= ~HDSP_SyncRefMask
;
2550 case HDSP_SYNC_FROM_ADAT1
:
2551 hdsp
->control_register
&= ~HDSP_SyncRefMask
; /* clear SyncRef bits */
2553 case HDSP_SYNC_FROM_ADAT2
:
2554 hdsp
->control_register
|= HDSP_SyncRef_ADAT2
;
2556 case HDSP_SYNC_FROM_ADAT3
:
2557 hdsp
->control_register
|= HDSP_SyncRef_ADAT3
;
2559 case HDSP_SYNC_FROM_SPDIF
:
2560 hdsp
->control_register
|= HDSP_SyncRef_SPDIF
;
2562 case HDSP_SYNC_FROM_WORD
:
2563 hdsp
->control_register
|= HDSP_SyncRef_WORD
;
2565 case HDSP_SYNC_FROM_ADAT_SYNC
:
2566 hdsp
->control_register
|= HDSP_SyncRef_ADAT_SYNC
;
2571 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
2575 static int snd_hdsp_info_pref_sync_ref(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2577 static char *texts
[] = {"Word", "IEC958", "ADAT1", "ADAT Sync", "ADAT2", "ADAT3" };
2578 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2580 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
2583 switch (hdsp
->io_type
) {
2586 uinfo
->value
.enumerated
.items
= 6;
2589 uinfo
->value
.enumerated
.items
= 4;
2592 uinfo
->value
.enumerated
.items
= 3;
2595 uinfo
->value
.enumerated
.items
= 0;
2599 if (uinfo
->value
.enumerated
.item
>= uinfo
->value
.enumerated
.items
)
2600 uinfo
->value
.enumerated
.item
= uinfo
->value
.enumerated
.items
- 1;
2601 strcpy(uinfo
->value
.enumerated
.name
, texts
[uinfo
->value
.enumerated
.item
]);
2605 static int snd_hdsp_get_pref_sync_ref(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2607 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2609 ucontrol
->value
.enumerated
.item
[0] = hdsp_pref_sync_ref(hdsp
);
2613 static int snd_hdsp_put_pref_sync_ref(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2615 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2619 if (!snd_hdsp_use_is_exclusive(hdsp
))
2622 switch (hdsp
->io_type
) {
2637 val
= ucontrol
->value
.enumerated
.item
[0] % max
;
2638 spin_lock_irq(&hdsp
->lock
);
2639 change
= (int)val
!= hdsp_pref_sync_ref(hdsp
);
2640 hdsp_set_pref_sync_ref(hdsp
, val
);
2641 spin_unlock_irq(&hdsp
->lock
);
2645 #define HDSP_AUTOSYNC_REF(xname, xindex) \
2646 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2649 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
2650 .info = snd_hdsp_info_autosync_ref, \
2651 .get = snd_hdsp_get_autosync_ref, \
2654 static int hdsp_autosync_ref(struct hdsp
*hdsp
)
2656 /* This looks at the autosync selected sync reference */
2657 unsigned int status2
= hdsp_read(hdsp
, HDSP_status2Register
);
2659 switch (status2
& HDSP_SelSyncRefMask
) {
2660 case HDSP_SelSyncRef_WORD
:
2661 return HDSP_AUTOSYNC_FROM_WORD
;
2662 case HDSP_SelSyncRef_ADAT_SYNC
:
2663 return HDSP_AUTOSYNC_FROM_ADAT_SYNC
;
2664 case HDSP_SelSyncRef_SPDIF
:
2665 return HDSP_AUTOSYNC_FROM_SPDIF
;
2666 case HDSP_SelSyncRefMask
:
2667 return HDSP_AUTOSYNC_FROM_NONE
;
2668 case HDSP_SelSyncRef_ADAT1
:
2669 return HDSP_AUTOSYNC_FROM_ADAT1
;
2670 case HDSP_SelSyncRef_ADAT2
:
2671 return HDSP_AUTOSYNC_FROM_ADAT2
;
2672 case HDSP_SelSyncRef_ADAT3
:
2673 return HDSP_AUTOSYNC_FROM_ADAT3
;
2675 return HDSP_AUTOSYNC_FROM_WORD
;
2680 static int snd_hdsp_info_autosync_ref(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2682 static char *texts
[] = {"Word", "ADAT Sync", "IEC958", "None", "ADAT1", "ADAT2", "ADAT3" };
2684 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
2686 uinfo
->value
.enumerated
.items
= 7;
2687 if (uinfo
->value
.enumerated
.item
>= uinfo
->value
.enumerated
.items
)
2688 uinfo
->value
.enumerated
.item
= uinfo
->value
.enumerated
.items
- 1;
2689 strcpy(uinfo
->value
.enumerated
.name
, texts
[uinfo
->value
.enumerated
.item
]);
2693 static int snd_hdsp_get_autosync_ref(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2695 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2697 ucontrol
->value
.enumerated
.item
[0] = hdsp_autosync_ref(hdsp
);
2701 #define HDSP_LINE_OUT(xname, xindex) \
2702 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2705 .info = snd_hdsp_info_line_out, \
2706 .get = snd_hdsp_get_line_out, \
2707 .put = snd_hdsp_put_line_out \
2710 static int hdsp_line_out(struct hdsp
*hdsp
)
2712 return (hdsp
->control_register
& HDSP_LineOut
) ? 1 : 0;
2715 static int hdsp_set_line_output(struct hdsp
*hdsp
, int out
)
2718 hdsp
->control_register
|= HDSP_LineOut
;
2720 hdsp
->control_register
&= ~HDSP_LineOut
;
2721 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
2725 static int snd_hdsp_info_line_out(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2727 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BOOLEAN
;
2729 uinfo
->value
.integer
.min
= 0;
2730 uinfo
->value
.integer
.max
= 1;
2734 static int snd_hdsp_get_line_out(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2736 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2738 spin_lock_irq(&hdsp
->lock
);
2739 ucontrol
->value
.integer
.value
[0] = hdsp_line_out(hdsp
);
2740 spin_unlock_irq(&hdsp
->lock
);
2744 static int snd_hdsp_put_line_out(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2746 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2750 if (!snd_hdsp_use_is_exclusive(hdsp
))
2752 val
= ucontrol
->value
.integer
.value
[0] & 1;
2753 spin_lock_irq(&hdsp
->lock
);
2754 change
= (int)val
!= hdsp_line_out(hdsp
);
2755 hdsp_set_line_output(hdsp
, val
);
2756 spin_unlock_irq(&hdsp
->lock
);
2760 #define HDSP_PRECISE_POINTER(xname, xindex) \
2761 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2764 .info = snd_hdsp_info_precise_pointer, \
2765 .get = snd_hdsp_get_precise_pointer, \
2766 .put = snd_hdsp_put_precise_pointer \
2769 static int hdsp_set_precise_pointer(struct hdsp
*hdsp
, int precise
)
2772 hdsp
->precise_ptr
= 1;
2774 hdsp
->precise_ptr
= 0;
2778 static int snd_hdsp_info_precise_pointer(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2780 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BOOLEAN
;
2782 uinfo
->value
.integer
.min
= 0;
2783 uinfo
->value
.integer
.max
= 1;
2787 static int snd_hdsp_get_precise_pointer(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2789 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2791 spin_lock_irq(&hdsp
->lock
);
2792 ucontrol
->value
.integer
.value
[0] = hdsp
->precise_ptr
;
2793 spin_unlock_irq(&hdsp
->lock
);
2797 static int snd_hdsp_put_precise_pointer(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2799 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2803 if (!snd_hdsp_use_is_exclusive(hdsp
))
2805 val
= ucontrol
->value
.integer
.value
[0] & 1;
2806 spin_lock_irq(&hdsp
->lock
);
2807 change
= (int)val
!= hdsp
->precise_ptr
;
2808 hdsp_set_precise_pointer(hdsp
, val
);
2809 spin_unlock_irq(&hdsp
->lock
);
2813 #define HDSP_USE_MIDI_TASKLET(xname, xindex) \
2814 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2817 .info = snd_hdsp_info_use_midi_tasklet, \
2818 .get = snd_hdsp_get_use_midi_tasklet, \
2819 .put = snd_hdsp_put_use_midi_tasklet \
2822 static int hdsp_set_use_midi_tasklet(struct hdsp
*hdsp
, int use_tasklet
)
2825 hdsp
->use_midi_tasklet
= 1;
2827 hdsp
->use_midi_tasklet
= 0;
2831 static int snd_hdsp_info_use_midi_tasklet(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2833 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BOOLEAN
;
2835 uinfo
->value
.integer
.min
= 0;
2836 uinfo
->value
.integer
.max
= 1;
2840 static int snd_hdsp_get_use_midi_tasklet(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2842 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2844 spin_lock_irq(&hdsp
->lock
);
2845 ucontrol
->value
.integer
.value
[0] = hdsp
->use_midi_tasklet
;
2846 spin_unlock_irq(&hdsp
->lock
);
2850 static int snd_hdsp_put_use_midi_tasklet(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2852 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2856 if (!snd_hdsp_use_is_exclusive(hdsp
))
2858 val
= ucontrol
->value
.integer
.value
[0] & 1;
2859 spin_lock_irq(&hdsp
->lock
);
2860 change
= (int)val
!= hdsp
->use_midi_tasklet
;
2861 hdsp_set_use_midi_tasklet(hdsp
, val
);
2862 spin_unlock_irq(&hdsp
->lock
);
2866 #define HDSP_MIXER(xname, xindex) \
2867 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
2871 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
2872 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2873 .info = snd_hdsp_info_mixer, \
2874 .get = snd_hdsp_get_mixer, \
2875 .put = snd_hdsp_put_mixer \
2878 static int snd_hdsp_info_mixer(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2880 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_INTEGER
;
2882 uinfo
->value
.integer
.min
= 0;
2883 uinfo
->value
.integer
.max
= 65536;
2884 uinfo
->value
.integer
.step
= 1;
2888 static int snd_hdsp_get_mixer(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2890 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2895 source
= ucontrol
->value
.integer
.value
[0];
2896 destination
= ucontrol
->value
.integer
.value
[1];
2898 if (source
>= hdsp
->max_channels
)
2899 addr
= hdsp_playback_to_output_key(hdsp
,source
-hdsp
->max_channels
,destination
);
2901 addr
= hdsp_input_to_output_key(hdsp
,source
, destination
);
2903 spin_lock_irq(&hdsp
->lock
);
2904 ucontrol
->value
.integer
.value
[2] = hdsp_read_gain (hdsp
, addr
);
2905 spin_unlock_irq(&hdsp
->lock
);
2909 static int snd_hdsp_put_mixer(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2911 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2918 if (!snd_hdsp_use_is_exclusive(hdsp
))
2921 source
= ucontrol
->value
.integer
.value
[0];
2922 destination
= ucontrol
->value
.integer
.value
[1];
2924 if (source
>= hdsp
->max_channels
)
2925 addr
= hdsp_playback_to_output_key(hdsp
,source
-hdsp
->max_channels
, destination
);
2927 addr
= hdsp_input_to_output_key(hdsp
,source
, destination
);
2929 gain
= ucontrol
->value
.integer
.value
[2];
2931 spin_lock_irq(&hdsp
->lock
);
2932 change
= gain
!= hdsp_read_gain(hdsp
, addr
);
2934 hdsp_write_gain(hdsp
, addr
, gain
);
2935 spin_unlock_irq(&hdsp
->lock
);
2939 #define HDSP_WC_SYNC_CHECK(xname, xindex) \
2940 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2943 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2944 .info = snd_hdsp_info_sync_check, \
2945 .get = snd_hdsp_get_wc_sync_check \
2948 static int snd_hdsp_info_sync_check(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2950 static char *texts
[] = {"No Lock", "Lock", "Sync" };
2951 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
2953 uinfo
->value
.enumerated
.items
= 3;
2954 if (uinfo
->value
.enumerated
.item
>= uinfo
->value
.enumerated
.items
)
2955 uinfo
->value
.enumerated
.item
= uinfo
->value
.enumerated
.items
- 1;
2956 strcpy(uinfo
->value
.enumerated
.name
, texts
[uinfo
->value
.enumerated
.item
]);
2960 static int hdsp_wc_sync_check(struct hdsp
*hdsp
)
2962 int status2
= hdsp_read(hdsp
, HDSP_status2Register
);
2963 if (status2
& HDSP_wc_lock
) {
2964 if (status2
& HDSP_wc_sync
)
2973 static int snd_hdsp_get_wc_sync_check(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2975 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2977 ucontrol
->value
.enumerated
.item
[0] = hdsp_wc_sync_check(hdsp
);
2981 #define HDSP_SPDIF_SYNC_CHECK(xname, xindex) \
2982 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2985 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2986 .info = snd_hdsp_info_sync_check, \
2987 .get = snd_hdsp_get_spdif_sync_check \
2990 static int hdsp_spdif_sync_check(struct hdsp
*hdsp
)
2992 int status
= hdsp_read(hdsp
, HDSP_statusRegister
);
2993 if (status
& HDSP_SPDIFErrorFlag
)
2996 if (status
& HDSP_SPDIFSync
)
3004 static int snd_hdsp_get_spdif_sync_check(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
3006 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
3008 ucontrol
->value
.enumerated
.item
[0] = hdsp_spdif_sync_check(hdsp
);
3012 #define HDSP_ADATSYNC_SYNC_CHECK(xname, xindex) \
3013 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3016 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3017 .info = snd_hdsp_info_sync_check, \
3018 .get = snd_hdsp_get_adatsync_sync_check \
3021 static int hdsp_adatsync_sync_check(struct hdsp
*hdsp
)
3023 int status
= hdsp_read(hdsp
, HDSP_statusRegister
);
3024 if (status
& HDSP_TimecodeLock
) {
3025 if (status
& HDSP_TimecodeSync
)
3033 static int snd_hdsp_get_adatsync_sync_check(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
3035 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
3037 ucontrol
->value
.enumerated
.item
[0] = hdsp_adatsync_sync_check(hdsp
);
3041 #define HDSP_ADAT_SYNC_CHECK \
3042 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3043 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3044 .info = snd_hdsp_info_sync_check, \
3045 .get = snd_hdsp_get_adat_sync_check \
3048 static int hdsp_adat_sync_check(struct hdsp
*hdsp
, int idx
)
3050 int status
= hdsp_read(hdsp
, HDSP_statusRegister
);
3052 if (status
& (HDSP_Lock0
>>idx
)) {
3053 if (status
& (HDSP_Sync0
>>idx
))
3061 static int snd_hdsp_get_adat_sync_check(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
3064 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
3066 offset
= ucontrol
->id
.index
- 1;
3067 snd_assert(offset
>= 0);
3069 switch (hdsp
->io_type
) {
3084 ucontrol
->value
.enumerated
.item
[0] = hdsp_adat_sync_check(hdsp
, offset
);
3088 static struct snd_kcontrol_new snd_hdsp_9632_controls
[] = {
3089 HDSP_DA_GAIN("DA Gain", 0),
3090 HDSP_AD_GAIN("AD Gain", 0),
3091 HDSP_PHONE_GAIN("Phones Gain", 0),
3092 HDSP_XLR_BREAKOUT_CABLE("XLR Breakout Cable", 0)
3095 static struct snd_kcontrol_new snd_hdsp_controls
[] = {
3097 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
3098 .name
= SNDRV_CTL_NAME_IEC958("",PLAYBACK
,DEFAULT
),
3099 .info
= snd_hdsp_control_spdif_info
,
3100 .get
= snd_hdsp_control_spdif_get
,
3101 .put
= snd_hdsp_control_spdif_put
,
3104 .access
= SNDRV_CTL_ELEM_ACCESS_READWRITE
| SNDRV_CTL_ELEM_ACCESS_INACTIVE
,
3105 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
3106 .name
= SNDRV_CTL_NAME_IEC958("",PLAYBACK
,PCM_STREAM
),
3107 .info
= snd_hdsp_control_spdif_stream_info
,
3108 .get
= snd_hdsp_control_spdif_stream_get
,
3109 .put
= snd_hdsp_control_spdif_stream_put
,
3112 .access
= SNDRV_CTL_ELEM_ACCESS_READ
,
3113 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
3114 .name
= SNDRV_CTL_NAME_IEC958("",PLAYBACK
,CON_MASK
),
3115 .info
= snd_hdsp_control_spdif_mask_info
,
3116 .get
= snd_hdsp_control_spdif_mask_get
,
3117 .private_value
= IEC958_AES0_NONAUDIO
|
3118 IEC958_AES0_PROFESSIONAL
|
3119 IEC958_AES0_CON_EMPHASIS
,
3122 .access
= SNDRV_CTL_ELEM_ACCESS_READ
,
3123 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
3124 .name
= SNDRV_CTL_NAME_IEC958("",PLAYBACK
,PRO_MASK
),
3125 .info
= snd_hdsp_control_spdif_mask_info
,
3126 .get
= snd_hdsp_control_spdif_mask_get
,
3127 .private_value
= IEC958_AES0_NONAUDIO
|
3128 IEC958_AES0_PROFESSIONAL
|
3129 IEC958_AES0_PRO_EMPHASIS
,
3131 HDSP_MIXER("Mixer", 0),
3132 HDSP_SPDIF_IN("IEC958 Input Connector", 0),
3133 HDSP_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
3134 HDSP_SPDIF_PROFESSIONAL("IEC958 Professional Bit", 0),
3135 HDSP_SPDIF_EMPHASIS("IEC958 Emphasis Bit", 0),
3136 HDSP_SPDIF_NON_AUDIO("IEC958 Non-audio Bit", 0),
3137 /* 'Sample Clock Source' complies with the alsa control naming scheme */
3138 HDSP_CLOCK_SOURCE("Sample Clock Source", 0),
3140 .iface
= SNDRV_CTL_ELEM_IFACE_MIXER
,
3141 .name
= "Sample Clock Source Locking",
3142 .info
= snd_hdsp_info_clock_source_lock
,
3143 .get
= snd_hdsp_get_clock_source_lock
,
3144 .put
= snd_hdsp_put_clock_source_lock
,
3146 HDSP_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
3147 HDSP_PREF_SYNC_REF("Preferred Sync Reference", 0),
3148 HDSP_AUTOSYNC_REF("AutoSync Reference", 0),
3149 HDSP_SPDIF_SAMPLE_RATE("SPDIF Sample Rate", 0),
3150 HDSP_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
3151 /* 'External Rate' complies with the alsa control naming scheme */
3152 HDSP_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
3153 HDSP_WC_SYNC_CHECK("Word Clock Lock Status", 0),
3154 HDSP_SPDIF_SYNC_CHECK("SPDIF Lock Status", 0),
3155 HDSP_ADATSYNC_SYNC_CHECK("ADAT Sync Lock Status", 0),
3156 HDSP_LINE_OUT("Line Out", 0),
3157 HDSP_PRECISE_POINTER("Precise Pointer", 0),
3158 HDSP_USE_MIDI_TASKLET("Use Midi Tasklet", 0),
3161 static struct snd_kcontrol_new snd_hdsp_96xx_aeb
= HDSP_AEB("Analog Extension Board", 0);
3162 static struct snd_kcontrol_new snd_hdsp_adat_sync_check
= HDSP_ADAT_SYNC_CHECK
;
3164 static int snd_hdsp_create_controls(struct snd_card
*card
, struct hdsp
*hdsp
)
3168 struct snd_kcontrol
*kctl
;
3170 for (idx
= 0; idx
< ARRAY_SIZE(snd_hdsp_controls
); idx
++) {
3171 if ((err
= snd_ctl_add(card
, kctl
= snd_ctl_new1(&snd_hdsp_controls
[idx
], hdsp
))) < 0)
3173 if (idx
== 1) /* IEC958 (S/PDIF) Stream */
3174 hdsp
->spdif_ctl
= kctl
;
3177 /* ADAT SyncCheck status */
3178 snd_hdsp_adat_sync_check
.name
= "ADAT Lock Status";
3179 snd_hdsp_adat_sync_check
.index
= 1;
3180 if ((err
= snd_ctl_add (card
, kctl
= snd_ctl_new1(&snd_hdsp_adat_sync_check
, hdsp
))))
3182 if (hdsp
->io_type
== Digiface
|| hdsp
->io_type
== H9652
) {
3183 for (idx
= 1; idx
< 3; ++idx
) {
3184 snd_hdsp_adat_sync_check
.index
= idx
+1;
3185 if ((err
= snd_ctl_add (card
, kctl
= snd_ctl_new1(&snd_hdsp_adat_sync_check
, hdsp
))))
3190 /* DA, AD and Phone gain and XLR breakout cable controls for H9632 cards */
3191 if (hdsp
->io_type
== H9632
) {
3192 for (idx
= 0; idx
< ARRAY_SIZE(snd_hdsp_9632_controls
); idx
++) {
3193 if ((err
= snd_ctl_add(card
, kctl
= snd_ctl_new1(&snd_hdsp_9632_controls
[idx
], hdsp
))) < 0)
3198 /* AEB control for H96xx card */
3199 if (hdsp
->io_type
== H9632
|| hdsp
->io_type
== H9652
) {
3200 if ((err
= snd_ctl_add(card
, kctl
= snd_ctl_new1(&snd_hdsp_96xx_aeb
, hdsp
))) < 0)
3207 /*------------------------------------------------------------
3209 ------------------------------------------------------------*/
3212 snd_hdsp_proc_read(struct snd_info_entry
*entry
, struct snd_info_buffer
*buffer
)
3214 struct hdsp
*hdsp
= (struct hdsp
*) entry
->private_data
;
3215 unsigned int status
;
3216 unsigned int status2
;
3217 char *pref_sync_ref
;
3219 char *system_clock_mode
;
3223 if (hdsp_check_for_iobox (hdsp
)) {
3224 snd_iprintf(buffer
, "No I/O box connected.\nPlease connect one and upload firmware.\n");
3228 if (hdsp_check_for_firmware(hdsp
, 0)) {
3229 if (hdsp
->state
& HDSP_FirmwareCached
) {
3230 if (snd_hdsp_load_firmware_from_cache(hdsp
) != 0) {
3231 snd_iprintf(buffer
, "Firmware loading from cache failed, please upload manually.\n");
3236 #ifdef HDSP_FW_LOADER
3237 err
= hdsp_request_fw_loader(hdsp
);
3241 "No firmware loaded nor cached, "
3242 "please upload firmware.\n");
3248 status
= hdsp_read(hdsp
, HDSP_statusRegister
);
3249 status2
= hdsp_read(hdsp
, HDSP_status2Register
);
3251 snd_iprintf(buffer
, "%s (Card #%d)\n", hdsp
->card_name
, hdsp
->card
->number
+ 1);
3252 snd_iprintf(buffer
, "Buffers: capture %p playback %p\n",
3253 hdsp
->capture_buffer
, hdsp
->playback_buffer
);
3254 snd_iprintf(buffer
, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
3255 hdsp
->irq
, hdsp
->port
, (unsigned long)hdsp
->iobase
);
3256 snd_iprintf(buffer
, "Control register: 0x%x\n", hdsp
->control_register
);
3257 snd_iprintf(buffer
, "Control2 register: 0x%x\n", hdsp
->control2_register
);
3258 snd_iprintf(buffer
, "Status register: 0x%x\n", status
);
3259 snd_iprintf(buffer
, "Status2 register: 0x%x\n", status2
);
3260 snd_iprintf(buffer
, "FIFO status: %d\n", hdsp_read(hdsp
, HDSP_fifoStatus
) & 0xff);
3261 snd_iprintf(buffer
, "MIDI1 Output status: 0x%x\n", hdsp_read(hdsp
, HDSP_midiStatusOut0
));
3262 snd_iprintf(buffer
, "MIDI1 Input status: 0x%x\n", hdsp_read(hdsp
, HDSP_midiStatusIn0
));
3263 snd_iprintf(buffer
, "MIDI2 Output status: 0x%x\n", hdsp_read(hdsp
, HDSP_midiStatusOut1
));
3264 snd_iprintf(buffer
, "MIDI2 Input status: 0x%x\n", hdsp_read(hdsp
, HDSP_midiStatusIn1
));
3265 snd_iprintf(buffer
, "Use Midi Tasklet: %s\n", hdsp
->use_midi_tasklet
? "on" : "off");
3267 snd_iprintf(buffer
, "\n");
3269 x
= 1 << (6 + hdsp_decode_latency(hdsp
->control_register
& HDSP_LatencyMask
));
3271 snd_iprintf(buffer
, "Buffer Size (Latency): %d samples (2 periods of %lu bytes)\n", x
, (unsigned long) hdsp
->period_bytes
);
3272 snd_iprintf(buffer
, "Hardware pointer (frames): %ld\n", hdsp_hw_pointer(hdsp
));
3273 snd_iprintf(buffer
, "Precise pointer: %s\n", hdsp
->precise_ptr
? "on" : "off");
3274 snd_iprintf(buffer
, "Line out: %s\n", (hdsp
->control_register
& HDSP_LineOut
) ? "on" : "off");
3276 snd_iprintf(buffer
, "Firmware version: %d\n", (status2
&HDSP_version0
)|(status2
&HDSP_version1
)<<1|(status2
&HDSP_version2
)<<2);
3278 snd_iprintf(buffer
, "\n");
3281 switch (hdsp_clock_source(hdsp
)) {
3282 case HDSP_CLOCK_SOURCE_AUTOSYNC
:
3283 clock_source
= "AutoSync";
3285 case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ
:
3286 clock_source
= "Internal 32 kHz";
3288 case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ
:
3289 clock_source
= "Internal 44.1 kHz";
3291 case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ
:
3292 clock_source
= "Internal 48 kHz";
3294 case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ
:
3295 clock_source
= "Internal 64 kHz";
3297 case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ
:
3298 clock_source
= "Internal 88.2 kHz";
3300 case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ
:
3301 clock_source
= "Internal 96 kHz";
3303 case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ
:
3304 clock_source
= "Internal 128 kHz";
3306 case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ
:
3307 clock_source
= "Internal 176.4 kHz";
3309 case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ
:
3310 clock_source
= "Internal 192 kHz";
3313 clock_source
= "Error";
3315 snd_iprintf (buffer
, "Sample Clock Source: %s\n", clock_source
);
3317 if (hdsp_system_clock_mode(hdsp
))
3318 system_clock_mode
= "Slave";
3320 system_clock_mode
= "Master";
3322 switch (hdsp_pref_sync_ref (hdsp
)) {
3323 case HDSP_SYNC_FROM_WORD
:
3324 pref_sync_ref
= "Word Clock";
3326 case HDSP_SYNC_FROM_ADAT_SYNC
:
3327 pref_sync_ref
= "ADAT Sync";
3329 case HDSP_SYNC_FROM_SPDIF
:
3330 pref_sync_ref
= "SPDIF";
3332 case HDSP_SYNC_FROM_ADAT1
:
3333 pref_sync_ref
= "ADAT1";
3335 case HDSP_SYNC_FROM_ADAT2
:
3336 pref_sync_ref
= "ADAT2";
3338 case HDSP_SYNC_FROM_ADAT3
:
3339 pref_sync_ref
= "ADAT3";
3342 pref_sync_ref
= "Word Clock";
3345 snd_iprintf (buffer
, "Preferred Sync Reference: %s\n", pref_sync_ref
);
3347 switch (hdsp_autosync_ref (hdsp
)) {
3348 case HDSP_AUTOSYNC_FROM_WORD
:
3349 autosync_ref
= "Word Clock";
3351 case HDSP_AUTOSYNC_FROM_ADAT_SYNC
:
3352 autosync_ref
= "ADAT Sync";
3354 case HDSP_AUTOSYNC_FROM_SPDIF
:
3355 autosync_ref
= "SPDIF";
3357 case HDSP_AUTOSYNC_FROM_NONE
:
3358 autosync_ref
= "None";
3360 case HDSP_AUTOSYNC_FROM_ADAT1
:
3361 autosync_ref
= "ADAT1";
3363 case HDSP_AUTOSYNC_FROM_ADAT2
:
3364 autosync_ref
= "ADAT2";
3366 case HDSP_AUTOSYNC_FROM_ADAT3
:
3367 autosync_ref
= "ADAT3";
3370 autosync_ref
= "---";
3373 snd_iprintf (buffer
, "AutoSync Reference: %s\n", autosync_ref
);
3375 snd_iprintf (buffer
, "AutoSync Frequency: %d\n", hdsp_external_sample_rate(hdsp
));
3377 snd_iprintf (buffer
, "System Clock Mode: %s\n", system_clock_mode
);
3379 snd_iprintf (buffer
, "System Clock Frequency: %d\n", hdsp
->system_sample_rate
);
3380 snd_iprintf (buffer
, "System Clock Locked: %s\n", hdsp
->clock_source_locked
? "Yes" : "No");
3382 snd_iprintf(buffer
, "\n");
3384 switch (hdsp_spdif_in(hdsp
)) {
3385 case HDSP_SPDIFIN_OPTICAL
:
3386 snd_iprintf(buffer
, "IEC958 input: Optical\n");
3388 case HDSP_SPDIFIN_COAXIAL
:
3389 snd_iprintf(buffer
, "IEC958 input: Coaxial\n");
3391 case HDSP_SPDIFIN_INTERNAL
:
3392 snd_iprintf(buffer
, "IEC958 input: Internal\n");
3394 case HDSP_SPDIFIN_AES
:
3395 snd_iprintf(buffer
, "IEC958 input: AES\n");
3398 snd_iprintf(buffer
, "IEC958 input: ???\n");
3402 if (hdsp
->control_register
& HDSP_SPDIFOpticalOut
)
3403 snd_iprintf(buffer
, "IEC958 output: Coaxial & ADAT1\n");
3405 snd_iprintf(buffer
, "IEC958 output: Coaxial only\n");
3407 if (hdsp
->control_register
& HDSP_SPDIFProfessional
)
3408 snd_iprintf(buffer
, "IEC958 quality: Professional\n");
3410 snd_iprintf(buffer
, "IEC958 quality: Consumer\n");
3412 if (hdsp
->control_register
& HDSP_SPDIFEmphasis
)
3413 snd_iprintf(buffer
, "IEC958 emphasis: on\n");
3415 snd_iprintf(buffer
, "IEC958 emphasis: off\n");
3417 if (hdsp
->control_register
& HDSP_SPDIFNonAudio
)
3418 snd_iprintf(buffer
, "IEC958 NonAudio: on\n");
3420 snd_iprintf(buffer
, "IEC958 NonAudio: off\n");
3421 if ((x
= hdsp_spdif_sample_rate (hdsp
)) != 0)
3422 snd_iprintf (buffer
, "IEC958 sample rate: %d\n", x
);
3424 snd_iprintf (buffer
, "IEC958 sample rate: Error flag set\n");
3426 snd_iprintf(buffer
, "\n");
3429 x
= status
& HDSP_Sync0
;
3430 if (status
& HDSP_Lock0
)
3431 snd_iprintf(buffer
, "ADAT1: %s\n", x
? "Sync" : "Lock");
3433 snd_iprintf(buffer
, "ADAT1: No Lock\n");
3435 switch (hdsp
->io_type
) {
3438 x
= status
& HDSP_Sync1
;
3439 if (status
& HDSP_Lock1
)
3440 snd_iprintf(buffer
, "ADAT2: %s\n", x
? "Sync" : "Lock");
3442 snd_iprintf(buffer
, "ADAT2: No Lock\n");
3443 x
= status
& HDSP_Sync2
;
3444 if (status
& HDSP_Lock2
)
3445 snd_iprintf(buffer
, "ADAT3: %s\n", x
? "Sync" : "Lock");
3447 snd_iprintf(buffer
, "ADAT3: No Lock\n");
3454 x
= status
& HDSP_SPDIFSync
;
3455 if (status
& HDSP_SPDIFErrorFlag
)
3456 snd_iprintf (buffer
, "SPDIF: No Lock\n");
3458 snd_iprintf (buffer
, "SPDIF: %s\n", x
? "Sync" : "Lock");
3460 x
= status2
& HDSP_wc_sync
;
3461 if (status2
& HDSP_wc_lock
)
3462 snd_iprintf (buffer
, "Word Clock: %s\n", x
? "Sync" : "Lock");
3464 snd_iprintf (buffer
, "Word Clock: No Lock\n");
3466 x
= status
& HDSP_TimecodeSync
;
3467 if (status
& HDSP_TimecodeLock
)
3468 snd_iprintf(buffer
, "ADAT Sync: %s\n", x
? "Sync" : "Lock");
3470 snd_iprintf(buffer
, "ADAT Sync: No Lock\n");
3472 snd_iprintf(buffer
, "\n");
3474 /* Informations about H9632 specific controls */
3475 if (hdsp
->io_type
== H9632
) {
3478 switch (hdsp_ad_gain(hdsp
)) {
3489 snd_iprintf(buffer
, "AD Gain : %s\n", tmp
);
3491 switch (hdsp_da_gain(hdsp
)) {
3502 snd_iprintf(buffer
, "DA Gain : %s\n", tmp
);
3504 switch (hdsp_phone_gain(hdsp
)) {
3515 snd_iprintf(buffer
, "Phones Gain : %s\n", tmp
);
3517 snd_iprintf(buffer
, "XLR Breakout Cable : %s\n", hdsp_xlr_breakout_cable(hdsp
) ? "yes" : "no");
3519 if (hdsp
->control_register
& HDSP_AnalogExtensionBoard
)
3520 snd_iprintf(buffer
, "AEB : on (ADAT1 internal)\n");
3522 snd_iprintf(buffer
, "AEB : off (ADAT1 external)\n");
3523 snd_iprintf(buffer
, "\n");
3528 static void __devinit
snd_hdsp_proc_init(struct hdsp
*hdsp
)
3530 struct snd_info_entry
*entry
;
3532 if (! snd_card_proc_new(hdsp
->card
, "hdsp", &entry
))
3533 snd_info_set_text_ops(entry
, hdsp
, snd_hdsp_proc_read
);
3536 static void snd_hdsp_free_buffers(struct hdsp
*hdsp
)
3538 snd_hammerfall_free_buffer(&hdsp
->capture_dma_buf
, hdsp
->pci
);
3539 snd_hammerfall_free_buffer(&hdsp
->playback_dma_buf
, hdsp
->pci
);
3542 static int __devinit
snd_hdsp_initialize_memory(struct hdsp
*hdsp
)
3544 unsigned long pb_bus
, cb_bus
;
3546 if (snd_hammerfall_get_buffer(hdsp
->pci
, &hdsp
->capture_dma_buf
, HDSP_DMA_AREA_BYTES
) < 0 ||
3547 snd_hammerfall_get_buffer(hdsp
->pci
, &hdsp
->playback_dma_buf
, HDSP_DMA_AREA_BYTES
) < 0) {
3548 if (hdsp
->capture_dma_buf
.area
)
3549 snd_dma_free_pages(&hdsp
->capture_dma_buf
);
3550 printk(KERN_ERR
"%s: no buffers available\n", hdsp
->card_name
);
3554 /* Align to bus-space 64K boundary */
3556 cb_bus
= ALIGN(hdsp
->capture_dma_buf
.addr
, 0x10000ul
);
3557 pb_bus
= ALIGN(hdsp
->playback_dma_buf
.addr
, 0x10000ul
);
3559 /* Tell the card where it is */
3561 hdsp_write(hdsp
, HDSP_inputBufferAddress
, cb_bus
);
3562 hdsp_write(hdsp
, HDSP_outputBufferAddress
, pb_bus
);
3564 hdsp
->capture_buffer
= hdsp
->capture_dma_buf
.area
+ (cb_bus
- hdsp
->capture_dma_buf
.addr
);
3565 hdsp
->playback_buffer
= hdsp
->playback_dma_buf
.area
+ (pb_bus
- hdsp
->playback_dma_buf
.addr
);
3570 static int snd_hdsp_set_defaults(struct hdsp
*hdsp
)
3574 /* ASSUMPTION: hdsp->lock is either held, or
3575 there is no need to hold it (e.g. during module
3581 SPDIF Input via Coax
3583 maximum latency (7 => 2^7 = 8192 samples, 64Kbyte buffer,
3584 which implies 2 4096 sample, 32Kbyte periods).
3588 hdsp
->control_register
= HDSP_ClockModeMaster
|
3589 HDSP_SPDIFInputCoaxial
|
3590 hdsp_encode_latency(7) |
3594 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
3596 #ifdef SNDRV_BIG_ENDIAN
3597 hdsp
->control2_register
= HDSP_BIGENDIAN_MODE
;
3599 hdsp
->control2_register
= 0;
3601 if (hdsp
->io_type
== H9652
)
3602 snd_hdsp_9652_enable_mixer (hdsp
);
3604 hdsp_write (hdsp
, HDSP_control2Reg
, hdsp
->control2_register
);
3606 hdsp_reset_hw_pointer(hdsp
);
3607 hdsp_compute_period_size(hdsp
);
3609 /* silence everything */
3611 for (i
= 0; i
< HDSP_MATRIX_MIXER_SIZE
; ++i
)
3612 hdsp
->mixer_matrix
[i
] = MINUS_INFINITY_GAIN
;
3614 for (i
= 0; i
< ((hdsp
->io_type
== H9652
|| hdsp
->io_type
== H9632
) ? 1352 : HDSP_MATRIX_MIXER_SIZE
); ++i
) {
3615 if (hdsp_write_gain (hdsp
, i
, MINUS_INFINITY_GAIN
))
3619 /* H9632 specific defaults */
3620 if (hdsp
->io_type
== H9632
) {
3621 hdsp
->control_register
|= (HDSP_DAGainPlus4dBu
| HDSP_ADGainPlus4dBu
| HDSP_PhoneGain0dB
);
3622 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
3625 /* set a default rate so that the channel map is set up.
3628 hdsp_set_rate(hdsp
, 48000, 1);
3633 static void hdsp_midi_tasklet(unsigned long arg
)
3635 struct hdsp
*hdsp
= (struct hdsp
*)arg
;
3637 if (hdsp
->midi
[0].pending
)
3638 snd_hdsp_midi_input_read (&hdsp
->midi
[0]);
3639 if (hdsp
->midi
[1].pending
)
3640 snd_hdsp_midi_input_read (&hdsp
->midi
[1]);
3643 static irqreturn_t
snd_hdsp_interrupt(int irq
, void *dev_id
)
3645 struct hdsp
*hdsp
= (struct hdsp
*) dev_id
;
3646 unsigned int status
;
3650 unsigned int midi0status
;
3651 unsigned int midi1status
;
3654 status
= hdsp_read(hdsp
, HDSP_statusRegister
);
3656 audio
= status
& HDSP_audioIRQPending
;
3657 midi0
= status
& HDSP_midi0IRQPending
;
3658 midi1
= status
& HDSP_midi1IRQPending
;
3660 if (!audio
&& !midi0
&& !midi1
)
3663 hdsp_write(hdsp
, HDSP_interruptConfirmation
, 0);
3665 midi0status
= hdsp_read (hdsp
, HDSP_midiStatusIn0
) & 0xff;
3666 midi1status
= hdsp_read (hdsp
, HDSP_midiStatusIn1
) & 0xff;
3669 if (hdsp
->capture_substream
)
3670 snd_pcm_period_elapsed(hdsp
->pcm
->streams
[SNDRV_PCM_STREAM_CAPTURE
].substream
);
3672 if (hdsp
->playback_substream
)
3673 snd_pcm_period_elapsed(hdsp
->pcm
->streams
[SNDRV_PCM_STREAM_PLAYBACK
].substream
);
3676 if (midi0
&& midi0status
) {
3677 if (hdsp
->use_midi_tasklet
) {
3678 /* we disable interrupts for this input until processing is done */
3679 hdsp
->control_register
&= ~HDSP_Midi0InterruptEnable
;
3680 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
3681 hdsp
->midi
[0].pending
= 1;
3684 snd_hdsp_midi_input_read (&hdsp
->midi
[0]);
3687 if (hdsp
->io_type
!= Multiface
&& hdsp
->io_type
!= H9632
&& midi1
&& midi1status
) {
3688 if (hdsp
->use_midi_tasklet
) {
3689 /* we disable interrupts for this input until processing is done */
3690 hdsp
->control_register
&= ~HDSP_Midi1InterruptEnable
;
3691 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
3692 hdsp
->midi
[1].pending
= 1;
3695 snd_hdsp_midi_input_read (&hdsp
->midi
[1]);
3698 if (hdsp
->use_midi_tasklet
&& schedule
)
3699 tasklet_hi_schedule(&hdsp
->midi_tasklet
);
3703 static snd_pcm_uframes_t
snd_hdsp_hw_pointer(struct snd_pcm_substream
*substream
)
3705 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
3706 return hdsp_hw_pointer(hdsp
);
3709 static char *hdsp_channel_buffer_location(struct hdsp
*hdsp
,
3716 snd_assert(channel
>= 0 && channel
< hdsp
->max_channels
, return NULL
);
3718 if ((mapped_channel
= hdsp
->channel_map
[channel
]) < 0)
3721 if (stream
== SNDRV_PCM_STREAM_CAPTURE
)
3722 return hdsp
->capture_buffer
+ (mapped_channel
* HDSP_CHANNEL_BUFFER_BYTES
);
3724 return hdsp
->playback_buffer
+ (mapped_channel
* HDSP_CHANNEL_BUFFER_BYTES
);
3727 static int snd_hdsp_playback_copy(struct snd_pcm_substream
*substream
, int channel
,
3728 snd_pcm_uframes_t pos
, void __user
*src
, snd_pcm_uframes_t count
)
3730 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
3733 snd_assert(pos
+ count
<= HDSP_CHANNEL_BUFFER_BYTES
/ 4, return -EINVAL
);
3735 channel_buf
= hdsp_channel_buffer_location (hdsp
, substream
->pstr
->stream
, channel
);
3736 snd_assert(channel_buf
!= NULL
, return -EIO
);
3737 if (copy_from_user(channel_buf
+ pos
* 4, src
, count
* 4))
3742 static int snd_hdsp_capture_copy(struct snd_pcm_substream
*substream
, int channel
,
3743 snd_pcm_uframes_t pos
, void __user
*dst
, snd_pcm_uframes_t count
)
3745 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
3748 snd_assert(pos
+ count
<= HDSP_CHANNEL_BUFFER_BYTES
/ 4, return -EINVAL
);
3750 channel_buf
= hdsp_channel_buffer_location (hdsp
, substream
->pstr
->stream
, channel
);
3751 snd_assert(channel_buf
!= NULL
, return -EIO
);
3752 if (copy_to_user(dst
, channel_buf
+ pos
* 4, count
* 4))
3757 static int snd_hdsp_hw_silence(struct snd_pcm_substream
*substream
, int channel
,
3758 snd_pcm_uframes_t pos
, snd_pcm_uframes_t count
)
3760 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
3763 channel_buf
= hdsp_channel_buffer_location (hdsp
, substream
->pstr
->stream
, channel
);
3764 snd_assert(channel_buf
!= NULL
, return -EIO
);
3765 memset(channel_buf
+ pos
* 4, 0, count
* 4);
3769 static int snd_hdsp_reset(struct snd_pcm_substream
*substream
)
3771 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
3772 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
3773 struct snd_pcm_substream
*other
;
3774 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
3775 other
= hdsp
->capture_substream
;
3777 other
= hdsp
->playback_substream
;
3779 runtime
->status
->hw_ptr
= hdsp_hw_pointer(hdsp
);
3781 runtime
->status
->hw_ptr
= 0;
3783 struct snd_pcm_substream
*s
;
3784 struct snd_pcm_runtime
*oruntime
= other
->runtime
;
3785 snd_pcm_group_for_each_entry(s
, substream
) {
3787 oruntime
->status
->hw_ptr
= runtime
->status
->hw_ptr
;
3795 static int snd_hdsp_hw_params(struct snd_pcm_substream
*substream
,
3796 struct snd_pcm_hw_params
*params
)
3798 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
3803 if (hdsp_check_for_iobox (hdsp
))
3806 if (hdsp_check_for_firmware(hdsp
, 1))
3809 spin_lock_irq(&hdsp
->lock
);
3811 if (substream
->pstr
->stream
== SNDRV_PCM_STREAM_PLAYBACK
) {
3812 hdsp
->control_register
&= ~(HDSP_SPDIFProfessional
| HDSP_SPDIFNonAudio
| HDSP_SPDIFEmphasis
);
3813 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
|= hdsp
->creg_spdif_stream
);
3814 this_pid
= hdsp
->playback_pid
;
3815 other_pid
= hdsp
->capture_pid
;
3817 this_pid
= hdsp
->capture_pid
;
3818 other_pid
= hdsp
->playback_pid
;
3821 if ((other_pid
> 0) && (this_pid
!= other_pid
)) {
3823 /* The other stream is open, and not by the same
3824 task as this one. Make sure that the parameters
3825 that matter are the same.
3828 if (params_rate(params
) != hdsp
->system_sample_rate
) {
3829 spin_unlock_irq(&hdsp
->lock
);
3830 _snd_pcm_hw_param_setempty(params
, SNDRV_PCM_HW_PARAM_RATE
);
3834 if (params_period_size(params
) != hdsp
->period_bytes
/ 4) {
3835 spin_unlock_irq(&hdsp
->lock
);
3836 _snd_pcm_hw_param_setempty(params
, SNDRV_PCM_HW_PARAM_PERIOD_SIZE
);
3842 spin_unlock_irq(&hdsp
->lock
);
3846 spin_unlock_irq(&hdsp
->lock
);
3849 /* how to make sure that the rate matches an externally-set one ?
3852 spin_lock_irq(&hdsp
->lock
);
3853 if (! hdsp
->clock_source_locked
) {
3854 if ((err
= hdsp_set_rate(hdsp
, params_rate(params
), 0)) < 0) {
3855 spin_unlock_irq(&hdsp
->lock
);
3856 _snd_pcm_hw_param_setempty(params
, SNDRV_PCM_HW_PARAM_RATE
);
3860 spin_unlock_irq(&hdsp
->lock
);
3862 if ((err
= hdsp_set_interrupt_interval(hdsp
, params_period_size(params
))) < 0) {
3863 _snd_pcm_hw_param_setempty(params
, SNDRV_PCM_HW_PARAM_PERIOD_SIZE
);
3870 static int snd_hdsp_channel_info(struct snd_pcm_substream
*substream
,
3871 struct snd_pcm_channel_info
*info
)
3873 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
3876 snd_assert(info
->channel
< hdsp
->max_channels
, return -EINVAL
);
3878 if ((mapped_channel
= hdsp
->channel_map
[info
->channel
]) < 0)
3881 info
->offset
= mapped_channel
* HDSP_CHANNEL_BUFFER_BYTES
;
3887 static int snd_hdsp_ioctl(struct snd_pcm_substream
*substream
,
3888 unsigned int cmd
, void *arg
)
3891 case SNDRV_PCM_IOCTL1_RESET
:
3892 return snd_hdsp_reset(substream
);
3893 case SNDRV_PCM_IOCTL1_CHANNEL_INFO
:
3894 return snd_hdsp_channel_info(substream
, arg
);
3899 return snd_pcm_lib_ioctl(substream
, cmd
, arg
);
3902 static int snd_hdsp_trigger(struct snd_pcm_substream
*substream
, int cmd
)
3904 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
3905 struct snd_pcm_substream
*other
;
3908 if (hdsp_check_for_iobox (hdsp
))
3911 if (hdsp_check_for_firmware(hdsp
, 0)) /* no auto-loading in trigger */
3914 spin_lock(&hdsp
->lock
);
3915 running
= hdsp
->running
;
3917 case SNDRV_PCM_TRIGGER_START
:
3918 running
|= 1 << substream
->stream
;
3920 case SNDRV_PCM_TRIGGER_STOP
:
3921 running
&= ~(1 << substream
->stream
);
3925 spin_unlock(&hdsp
->lock
);
3928 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
3929 other
= hdsp
->capture_substream
;
3931 other
= hdsp
->playback_substream
;
3934 struct snd_pcm_substream
*s
;
3935 snd_pcm_group_for_each_entry(s
, substream
) {
3937 snd_pcm_trigger_done(s
, substream
);
3938 if (cmd
== SNDRV_PCM_TRIGGER_START
)
3939 running
|= 1 << s
->stream
;
3941 running
&= ~(1 << s
->stream
);
3945 if (cmd
== SNDRV_PCM_TRIGGER_START
) {
3946 if (!(running
& (1 << SNDRV_PCM_STREAM_PLAYBACK
)) &&
3947 substream
->stream
== SNDRV_PCM_STREAM_CAPTURE
)
3948 hdsp_silence_playback(hdsp
);
3951 substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
3952 hdsp_silence_playback(hdsp
);
3955 if (substream
->stream
== SNDRV_PCM_STREAM_CAPTURE
)
3956 hdsp_silence_playback(hdsp
);
3959 snd_pcm_trigger_done(substream
, substream
);
3960 if (!hdsp
->running
&& running
)
3961 hdsp_start_audio(hdsp
);
3962 else if (hdsp
->running
&& !running
)
3963 hdsp_stop_audio(hdsp
);
3964 hdsp
->running
= running
;
3965 spin_unlock(&hdsp
->lock
);
3970 static int snd_hdsp_prepare(struct snd_pcm_substream
*substream
)
3972 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
3975 if (hdsp_check_for_iobox (hdsp
))
3978 if (hdsp_check_for_firmware(hdsp
, 1))
3981 spin_lock_irq(&hdsp
->lock
);
3983 hdsp_reset_hw_pointer(hdsp
);
3984 spin_unlock_irq(&hdsp
->lock
);
3988 static struct snd_pcm_hardware snd_hdsp_playback_subinfo
=
3990 .info
= (SNDRV_PCM_INFO_MMAP
|
3991 SNDRV_PCM_INFO_MMAP_VALID
|
3992 SNDRV_PCM_INFO_NONINTERLEAVED
|
3993 SNDRV_PCM_INFO_SYNC_START
|
3994 SNDRV_PCM_INFO_DOUBLE
),
3995 #ifdef SNDRV_BIG_ENDIAN
3996 .formats
= SNDRV_PCM_FMTBIT_S32_BE
,
3998 .formats
= SNDRV_PCM_FMTBIT_S32_LE
,
4000 .rates
= (SNDRV_PCM_RATE_32000
|
4001 SNDRV_PCM_RATE_44100
|
4002 SNDRV_PCM_RATE_48000
|
4003 SNDRV_PCM_RATE_64000
|
4004 SNDRV_PCM_RATE_88200
|
4005 SNDRV_PCM_RATE_96000
),
4009 .channels_max
= HDSP_MAX_CHANNELS
,
4010 .buffer_bytes_max
= HDSP_CHANNEL_BUFFER_BYTES
* HDSP_MAX_CHANNELS
,
4011 .period_bytes_min
= (64 * 4) * 10,
4012 .period_bytes_max
= (8192 * 4) * HDSP_MAX_CHANNELS
,
4018 static struct snd_pcm_hardware snd_hdsp_capture_subinfo
=
4020 .info
= (SNDRV_PCM_INFO_MMAP
|
4021 SNDRV_PCM_INFO_MMAP_VALID
|
4022 SNDRV_PCM_INFO_NONINTERLEAVED
|
4023 SNDRV_PCM_INFO_SYNC_START
),
4024 #ifdef SNDRV_BIG_ENDIAN
4025 .formats
= SNDRV_PCM_FMTBIT_S32_BE
,
4027 .formats
= SNDRV_PCM_FMTBIT_S32_LE
,
4029 .rates
= (SNDRV_PCM_RATE_32000
|
4030 SNDRV_PCM_RATE_44100
|
4031 SNDRV_PCM_RATE_48000
|
4032 SNDRV_PCM_RATE_64000
|
4033 SNDRV_PCM_RATE_88200
|
4034 SNDRV_PCM_RATE_96000
),
4038 .channels_max
= HDSP_MAX_CHANNELS
,
4039 .buffer_bytes_max
= HDSP_CHANNEL_BUFFER_BYTES
* HDSP_MAX_CHANNELS
,
4040 .period_bytes_min
= (64 * 4) * 10,
4041 .period_bytes_max
= (8192 * 4) * HDSP_MAX_CHANNELS
,
4047 static unsigned int hdsp_period_sizes
[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
4049 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_period_sizes
= {
4050 .count
= ARRAY_SIZE(hdsp_period_sizes
),
4051 .list
= hdsp_period_sizes
,
4055 static unsigned int hdsp_9632_sample_rates
[] = { 32000, 44100, 48000, 64000, 88200, 96000, 128000, 176400, 192000 };
4057 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_9632_sample_rates
= {
4058 .count
= ARRAY_SIZE(hdsp_9632_sample_rates
),
4059 .list
= hdsp_9632_sample_rates
,
4063 static int snd_hdsp_hw_rule_in_channels(struct snd_pcm_hw_params
*params
,
4064 struct snd_pcm_hw_rule
*rule
)
4066 struct hdsp
*hdsp
= rule
->private;
4067 struct snd_interval
*c
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_CHANNELS
);
4068 if (hdsp
->io_type
== H9632
) {
4069 unsigned int list
[3];
4070 list
[0] = hdsp
->qs_in_channels
;
4071 list
[1] = hdsp
->ds_in_channels
;
4072 list
[2] = hdsp
->ss_in_channels
;
4073 return snd_interval_list(c
, 3, list
, 0);
4075 unsigned int list
[2];
4076 list
[0] = hdsp
->ds_in_channels
;
4077 list
[1] = hdsp
->ss_in_channels
;
4078 return snd_interval_list(c
, 2, list
, 0);
4082 static int snd_hdsp_hw_rule_out_channels(struct snd_pcm_hw_params
*params
,
4083 struct snd_pcm_hw_rule
*rule
)
4085 unsigned int list
[3];
4086 struct hdsp
*hdsp
= rule
->private;
4087 struct snd_interval
*c
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_CHANNELS
);
4088 if (hdsp
->io_type
== H9632
) {
4089 list
[0] = hdsp
->qs_out_channels
;
4090 list
[1] = hdsp
->ds_out_channels
;
4091 list
[2] = hdsp
->ss_out_channels
;
4092 return snd_interval_list(c
, 3, list
, 0);
4094 list
[0] = hdsp
->ds_out_channels
;
4095 list
[1] = hdsp
->ss_out_channels
;
4097 return snd_interval_list(c
, 2, list
, 0);
4100 static int snd_hdsp_hw_rule_in_channels_rate(struct snd_pcm_hw_params
*params
,
4101 struct snd_pcm_hw_rule
*rule
)
4103 struct hdsp
*hdsp
= rule
->private;
4104 struct snd_interval
*c
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_CHANNELS
);
4105 struct snd_interval
*r
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_RATE
);
4106 if (r
->min
> 96000 && hdsp
->io_type
== H9632
) {
4107 struct snd_interval t
= {
4108 .min
= hdsp
->qs_in_channels
,
4109 .max
= hdsp
->qs_in_channels
,
4112 return snd_interval_refine(c
, &t
);
4113 } else if (r
->min
> 48000 && r
->max
<= 96000) {
4114 struct snd_interval t
= {
4115 .min
= hdsp
->ds_in_channels
,
4116 .max
= hdsp
->ds_in_channels
,
4119 return snd_interval_refine(c
, &t
);
4120 } else if (r
->max
< 64000) {
4121 struct snd_interval t
= {
4122 .min
= hdsp
->ss_in_channels
,
4123 .max
= hdsp
->ss_in_channels
,
4126 return snd_interval_refine(c
, &t
);
4131 static int snd_hdsp_hw_rule_out_channels_rate(struct snd_pcm_hw_params
*params
,
4132 struct snd_pcm_hw_rule
*rule
)
4134 struct hdsp
*hdsp
= rule
->private;
4135 struct snd_interval
*c
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_CHANNELS
);
4136 struct snd_interval
*r
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_RATE
);
4137 if (r
->min
> 96000 && hdsp
->io_type
== H9632
) {
4138 struct snd_interval t
= {
4139 .min
= hdsp
->qs_out_channels
,
4140 .max
= hdsp
->qs_out_channels
,
4143 return snd_interval_refine(c
, &t
);
4144 } else if (r
->min
> 48000 && r
->max
<= 96000) {
4145 struct snd_interval t
= {
4146 .min
= hdsp
->ds_out_channels
,
4147 .max
= hdsp
->ds_out_channels
,
4150 return snd_interval_refine(c
, &t
);
4151 } else if (r
->max
< 64000) {
4152 struct snd_interval t
= {
4153 .min
= hdsp
->ss_out_channels
,
4154 .max
= hdsp
->ss_out_channels
,
4157 return snd_interval_refine(c
, &t
);
4162 static int snd_hdsp_hw_rule_rate_out_channels(struct snd_pcm_hw_params
*params
,
4163 struct snd_pcm_hw_rule
*rule
)
4165 struct hdsp
*hdsp
= rule
->private;
4166 struct snd_interval
*c
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_CHANNELS
);
4167 struct snd_interval
*r
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_RATE
);
4168 if (c
->min
>= hdsp
->ss_out_channels
) {
4169 struct snd_interval t
= {
4174 return snd_interval_refine(r
, &t
);
4175 } else if (c
->max
<= hdsp
->qs_out_channels
&& hdsp
->io_type
== H9632
) {
4176 struct snd_interval t
= {
4181 return snd_interval_refine(r
, &t
);
4182 } else if (c
->max
<= hdsp
->ds_out_channels
) {
4183 struct snd_interval t
= {
4188 return snd_interval_refine(r
, &t
);
4193 static int snd_hdsp_hw_rule_rate_in_channels(struct snd_pcm_hw_params
*params
,
4194 struct snd_pcm_hw_rule
*rule
)
4196 struct hdsp
*hdsp
= rule
->private;
4197 struct snd_interval
*c
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_CHANNELS
);
4198 struct snd_interval
*r
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_RATE
);
4199 if (c
->min
>= hdsp
->ss_in_channels
) {
4200 struct snd_interval t
= {
4205 return snd_interval_refine(r
, &t
);
4206 } else if (c
->max
<= hdsp
->qs_in_channels
&& hdsp
->io_type
== H9632
) {
4207 struct snd_interval t
= {
4212 return snd_interval_refine(r
, &t
);
4213 } else if (c
->max
<= hdsp
->ds_in_channels
) {
4214 struct snd_interval t
= {
4219 return snd_interval_refine(r
, &t
);
4224 static int snd_hdsp_playback_open(struct snd_pcm_substream
*substream
)
4226 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
4227 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
4229 if (hdsp_check_for_iobox (hdsp
))
4232 if (hdsp_check_for_firmware(hdsp
, 1))
4235 spin_lock_irq(&hdsp
->lock
);
4237 snd_pcm_set_sync(substream
);
4239 runtime
->hw
= snd_hdsp_playback_subinfo
;
4240 runtime
->dma_area
= hdsp
->playback_buffer
;
4241 runtime
->dma_bytes
= HDSP_DMA_AREA_BYTES
;
4243 hdsp
->playback_pid
= current
->pid
;
4244 hdsp
->playback_substream
= substream
;
4246 spin_unlock_irq(&hdsp
->lock
);
4248 snd_pcm_hw_constraint_msbits(runtime
, 0, 32, 24);
4249 snd_pcm_hw_constraint_list(runtime
, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE
, &hdsp_hw_constraints_period_sizes
);
4250 if (hdsp
->clock_source_locked
) {
4251 runtime
->hw
.rate_min
= runtime
->hw
.rate_max
= hdsp
->system_sample_rate
;
4252 } else if (hdsp
->io_type
== H9632
) {
4253 runtime
->hw
.rate_max
= 192000;
4254 runtime
->hw
.rates
= SNDRV_PCM_RATE_KNOT
;
4255 snd_pcm_hw_constraint_list(runtime
, 0, SNDRV_PCM_HW_PARAM_RATE
, &hdsp_hw_constraints_9632_sample_rates
);
4257 if (hdsp
->io_type
== H9632
) {
4258 runtime
->hw
.channels_min
= hdsp
->qs_out_channels
;
4259 runtime
->hw
.channels_max
= hdsp
->ss_out_channels
;
4262 snd_pcm_hw_rule_add(runtime
, 0, SNDRV_PCM_HW_PARAM_CHANNELS
,
4263 snd_hdsp_hw_rule_out_channels
, hdsp
,
4264 SNDRV_PCM_HW_PARAM_CHANNELS
, -1);
4265 snd_pcm_hw_rule_add(runtime
, 0, SNDRV_PCM_HW_PARAM_CHANNELS
,
4266 snd_hdsp_hw_rule_out_channels_rate
, hdsp
,
4267 SNDRV_PCM_HW_PARAM_RATE
, -1);
4268 snd_pcm_hw_rule_add(runtime
, 0, SNDRV_PCM_HW_PARAM_RATE
,
4269 snd_hdsp_hw_rule_rate_out_channels
, hdsp
,
4270 SNDRV_PCM_HW_PARAM_CHANNELS
, -1);
4272 hdsp
->creg_spdif_stream
= hdsp
->creg_spdif
;
4273 hdsp
->spdif_ctl
->vd
[0].access
&= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE
;
4274 snd_ctl_notify(hdsp
->card
, SNDRV_CTL_EVENT_MASK_VALUE
|
4275 SNDRV_CTL_EVENT_MASK_INFO
, &hdsp
->spdif_ctl
->id
);
4279 static int snd_hdsp_playback_release(struct snd_pcm_substream
*substream
)
4281 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
4283 spin_lock_irq(&hdsp
->lock
);
4285 hdsp
->playback_pid
= -1;
4286 hdsp
->playback_substream
= NULL
;
4288 spin_unlock_irq(&hdsp
->lock
);
4290 hdsp
->spdif_ctl
->vd
[0].access
|= SNDRV_CTL_ELEM_ACCESS_INACTIVE
;
4291 snd_ctl_notify(hdsp
->card
, SNDRV_CTL_EVENT_MASK_VALUE
|
4292 SNDRV_CTL_EVENT_MASK_INFO
, &hdsp
->spdif_ctl
->id
);
4297 static int snd_hdsp_capture_open(struct snd_pcm_substream
*substream
)
4299 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
4300 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
4302 if (hdsp_check_for_iobox (hdsp
))
4305 if (hdsp_check_for_firmware(hdsp
, 1))
4308 spin_lock_irq(&hdsp
->lock
);
4310 snd_pcm_set_sync(substream
);
4312 runtime
->hw
= snd_hdsp_capture_subinfo
;
4313 runtime
->dma_area
= hdsp
->capture_buffer
;
4314 runtime
->dma_bytes
= HDSP_DMA_AREA_BYTES
;
4316 hdsp
->capture_pid
= current
->pid
;
4317 hdsp
->capture_substream
= substream
;
4319 spin_unlock_irq(&hdsp
->lock
);
4321 snd_pcm_hw_constraint_msbits(runtime
, 0, 32, 24);
4322 snd_pcm_hw_constraint_list(runtime
, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE
, &hdsp_hw_constraints_period_sizes
);
4323 if (hdsp
->io_type
== H9632
) {
4324 runtime
->hw
.channels_min
= hdsp
->qs_in_channels
;
4325 runtime
->hw
.channels_max
= hdsp
->ss_in_channels
;
4326 runtime
->hw
.rate_max
= 192000;
4327 runtime
->hw
.rates
= SNDRV_PCM_RATE_KNOT
;
4328 snd_pcm_hw_constraint_list(runtime
, 0, SNDRV_PCM_HW_PARAM_RATE
, &hdsp_hw_constraints_9632_sample_rates
);
4330 snd_pcm_hw_rule_add(runtime
, 0, SNDRV_PCM_HW_PARAM_CHANNELS
,
4331 snd_hdsp_hw_rule_in_channels
, hdsp
,
4332 SNDRV_PCM_HW_PARAM_CHANNELS
, -1);
4333 snd_pcm_hw_rule_add(runtime
, 0, SNDRV_PCM_HW_PARAM_CHANNELS
,
4334 snd_hdsp_hw_rule_in_channels_rate
, hdsp
,
4335 SNDRV_PCM_HW_PARAM_RATE
, -1);
4336 snd_pcm_hw_rule_add(runtime
, 0, SNDRV_PCM_HW_PARAM_RATE
,
4337 snd_hdsp_hw_rule_rate_in_channels
, hdsp
,
4338 SNDRV_PCM_HW_PARAM_CHANNELS
, -1);
4342 static int snd_hdsp_capture_release(struct snd_pcm_substream
*substream
)
4344 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
4346 spin_lock_irq(&hdsp
->lock
);
4348 hdsp
->capture_pid
= -1;
4349 hdsp
->capture_substream
= NULL
;
4351 spin_unlock_irq(&hdsp
->lock
);
4355 static int snd_hdsp_hwdep_dummy_op(struct snd_hwdep
*hw
, struct file
*file
)
4357 /* we have nothing to initialize but the call is required */
4362 /* helper functions for copying meter values */
4363 static inline int copy_u32_le(void __user
*dest
, void __iomem
*src
)
4365 u32 val
= readl(src
);
4366 return copy_to_user(dest
, &val
, 4);
4369 static inline int copy_u64_le(void __user
*dest
, void __iomem
*src_low
, void __iomem
*src_high
)
4371 u32 rms_low
, rms_high
;
4373 rms_low
= readl(src_low
);
4374 rms_high
= readl(src_high
);
4375 rms
= ((u64
)rms_high
<< 32) | rms_low
;
4376 return copy_to_user(dest
, &rms
, 8);
4379 static inline int copy_u48_le(void __user
*dest
, void __iomem
*src_low
, void __iomem
*src_high
)
4381 u32 rms_low
, rms_high
;
4383 rms_low
= readl(src_low
) & 0xffffff00;
4384 rms_high
= readl(src_high
) & 0xffffff00;
4385 rms
= ((u64
)rms_high
<< 32) | rms_low
;
4386 return copy_to_user(dest
, &rms
, 8);
4389 static int hdsp_9652_get_peak(struct hdsp
*hdsp
, struct hdsp_peak_rms __user
*peak_rms
)
4391 int doublespeed
= 0;
4392 int i
, j
, channels
, ofs
;
4394 if (hdsp_read (hdsp
, HDSP_statusRegister
) & HDSP_DoubleSpeedStatus
)
4396 channels
= doublespeed
? 14 : 26;
4397 for (i
= 0, j
= 0; i
< 26; ++i
) {
4398 if (doublespeed
&& (i
& 4))
4400 ofs
= HDSP_9652_peakBase
- j
* 4;
4401 if (copy_u32_le(&peak_rms
->input_peaks
[i
], hdsp
->iobase
+ ofs
))
4403 ofs
-= channels
* 4;
4404 if (copy_u32_le(&peak_rms
->playback_peaks
[i
], hdsp
->iobase
+ ofs
))
4406 ofs
-= channels
* 4;
4407 if (copy_u32_le(&peak_rms
->output_peaks
[i
], hdsp
->iobase
+ ofs
))
4409 ofs
= HDSP_9652_rmsBase
+ j
* 8;
4410 if (copy_u48_le(&peak_rms
->input_rms
[i
], hdsp
->iobase
+ ofs
,
4411 hdsp
->iobase
+ ofs
+ 4))
4413 ofs
+= channels
* 8;
4414 if (copy_u48_le(&peak_rms
->playback_rms
[i
], hdsp
->iobase
+ ofs
,
4415 hdsp
->iobase
+ ofs
+ 4))
4417 ofs
+= channels
* 8;
4418 if (copy_u48_le(&peak_rms
->output_rms
[i
], hdsp
->iobase
+ ofs
,
4419 hdsp
->iobase
+ ofs
+ 4))
4426 static int hdsp_9632_get_peak(struct hdsp
*hdsp
, struct hdsp_peak_rms __user
*peak_rms
)
4429 struct hdsp_9632_meters __iomem
*m
;
4430 int doublespeed
= 0;
4432 if (hdsp_read (hdsp
, HDSP_statusRegister
) & HDSP_DoubleSpeedStatus
)
4434 m
= (struct hdsp_9632_meters __iomem
*)(hdsp
->iobase
+HDSP_9632_metersBase
);
4435 for (i
= 0, j
= 0; i
< 16; ++i
, ++j
) {
4436 if (copy_u32_le(&peak_rms
->input_peaks
[i
], &m
->input_peak
[j
]))
4438 if (copy_u32_le(&peak_rms
->playback_peaks
[i
], &m
->playback_peak
[j
]))
4440 if (copy_u32_le(&peak_rms
->output_peaks
[i
], &m
->output_peak
[j
]))
4442 if (copy_u64_le(&peak_rms
->input_rms
[i
], &m
->input_rms_low
[j
],
4443 &m
->input_rms_high
[j
]))
4445 if (copy_u64_le(&peak_rms
->playback_rms
[i
], &m
->playback_rms_low
[j
],
4446 &m
->playback_rms_high
[j
]))
4448 if (copy_u64_le(&peak_rms
->output_rms
[i
], &m
->output_rms_low
[j
],
4449 &m
->output_rms_high
[j
]))
4451 if (doublespeed
&& i
== 3) i
+= 4;
4456 static int hdsp_get_peak(struct hdsp
*hdsp
, struct hdsp_peak_rms __user
*peak_rms
)
4460 for (i
= 0; i
< 26; i
++) {
4461 if (copy_u32_le(&peak_rms
->playback_peaks
[i
],
4462 hdsp
->iobase
+ HDSP_playbackPeakLevel
+ i
* 4))
4464 if (copy_u32_le(&peak_rms
->input_peaks
[i
],
4465 hdsp
->iobase
+ HDSP_inputPeakLevel
+ i
* 4))
4468 for (i
= 0; i
< 28; i
++) {
4469 if (copy_u32_le(&peak_rms
->output_peaks
[i
],
4470 hdsp
->iobase
+ HDSP_outputPeakLevel
+ i
* 4))
4473 for (i
= 0; i
< 26; ++i
) {
4474 if (copy_u64_le(&peak_rms
->playback_rms
[i
],
4475 hdsp
->iobase
+ HDSP_playbackRmsLevel
+ i
* 8 + 4,
4476 hdsp
->iobase
+ HDSP_playbackRmsLevel
+ i
* 8))
4478 if (copy_u64_le(&peak_rms
->input_rms
[i
],
4479 hdsp
->iobase
+ HDSP_inputRmsLevel
+ i
* 8 + 4,
4480 hdsp
->iobase
+ HDSP_inputRmsLevel
+ i
* 8))
4486 static int snd_hdsp_hwdep_ioctl(struct snd_hwdep
*hw
, struct file
*file
, unsigned int cmd
, unsigned long arg
)
4488 struct hdsp
*hdsp
= (struct hdsp
*)hw
->private_data
;
4489 void __user
*argp
= (void __user
*)arg
;
4492 case SNDRV_HDSP_IOCTL_GET_PEAK_RMS
: {
4493 struct hdsp_peak_rms __user
*peak_rms
= (struct hdsp_peak_rms __user
*)arg
;
4495 if (!(hdsp
->state
& HDSP_FirmwareLoaded
)) {
4496 snd_printk(KERN_ERR
"Hammerfall-DSP: firmware needs to be uploaded to the card.\n");
4500 switch (hdsp
->io_type
) {
4502 return hdsp_9652_get_peak(hdsp
, peak_rms
);
4504 return hdsp_9632_get_peak(hdsp
, peak_rms
);
4506 return hdsp_get_peak(hdsp
, peak_rms
);
4509 case SNDRV_HDSP_IOCTL_GET_CONFIG_INFO
: {
4510 struct hdsp_config_info info
;
4511 unsigned long flags
;
4514 if (!(hdsp
->state
& HDSP_FirmwareLoaded
)) {
4515 snd_printk(KERN_ERR
"Hammerfall-DSP: Firmware needs to be uploaded to the card.\n");
4518 spin_lock_irqsave(&hdsp
->lock
, flags
);
4519 info
.pref_sync_ref
= (unsigned char)hdsp_pref_sync_ref(hdsp
);
4520 info
.wordclock_sync_check
= (unsigned char)hdsp_wc_sync_check(hdsp
);
4521 if (hdsp
->io_type
!= H9632
)
4522 info
.adatsync_sync_check
= (unsigned char)hdsp_adatsync_sync_check(hdsp
);
4523 info
.spdif_sync_check
= (unsigned char)hdsp_spdif_sync_check(hdsp
);
4524 for (i
= 0; i
< ((hdsp
->io_type
!= Multiface
&& hdsp
->io_type
!= H9632
) ? 3 : 1); ++i
)
4525 info
.adat_sync_check
[i
] = (unsigned char)hdsp_adat_sync_check(hdsp
, i
);
4526 info
.spdif_in
= (unsigned char)hdsp_spdif_in(hdsp
);
4527 info
.spdif_out
= (unsigned char)hdsp_spdif_out(hdsp
);
4528 info
.spdif_professional
= (unsigned char)hdsp_spdif_professional(hdsp
);
4529 info
.spdif_emphasis
= (unsigned char)hdsp_spdif_emphasis(hdsp
);
4530 info
.spdif_nonaudio
= (unsigned char)hdsp_spdif_nonaudio(hdsp
);
4531 info
.spdif_sample_rate
= hdsp_spdif_sample_rate(hdsp
);
4532 info
.system_sample_rate
= hdsp
->system_sample_rate
;
4533 info
.autosync_sample_rate
= hdsp_external_sample_rate(hdsp
);
4534 info
.system_clock_mode
= (unsigned char)hdsp_system_clock_mode(hdsp
);
4535 info
.clock_source
= (unsigned char)hdsp_clock_source(hdsp
);
4536 info
.autosync_ref
= (unsigned char)hdsp_autosync_ref(hdsp
);
4537 info
.line_out
= (unsigned char)hdsp_line_out(hdsp
);
4538 if (hdsp
->io_type
== H9632
) {
4539 info
.da_gain
= (unsigned char)hdsp_da_gain(hdsp
);
4540 info
.ad_gain
= (unsigned char)hdsp_ad_gain(hdsp
);
4541 info
.phone_gain
= (unsigned char)hdsp_phone_gain(hdsp
);
4542 info
.xlr_breakout_cable
= (unsigned char)hdsp_xlr_breakout_cable(hdsp
);
4545 if (hdsp
->io_type
== H9632
|| hdsp
->io_type
== H9652
)
4546 info
.analog_extension_board
= (unsigned char)hdsp_aeb(hdsp
);
4547 spin_unlock_irqrestore(&hdsp
->lock
, flags
);
4548 if (copy_to_user(argp
, &info
, sizeof(info
)))
4552 case SNDRV_HDSP_IOCTL_GET_9632_AEB
: {
4553 struct hdsp_9632_aeb h9632_aeb
;
4555 if (hdsp
->io_type
!= H9632
) return -EINVAL
;
4556 h9632_aeb
.aebi
= hdsp
->ss_in_channels
- H9632_SS_CHANNELS
;
4557 h9632_aeb
.aebo
= hdsp
->ss_out_channels
- H9632_SS_CHANNELS
;
4558 if (copy_to_user(argp
, &h9632_aeb
, sizeof(h9632_aeb
)))
4562 case SNDRV_HDSP_IOCTL_GET_VERSION
: {
4563 struct hdsp_version hdsp_version
;
4566 if (hdsp
->io_type
== H9652
|| hdsp
->io_type
== H9632
) return -EINVAL
;
4567 if (hdsp
->io_type
== Undefined
) {
4568 if ((err
= hdsp_get_iobox_version(hdsp
)) < 0)
4571 hdsp_version
.io_type
= hdsp
->io_type
;
4572 hdsp_version
.firmware_rev
= hdsp
->firmware_rev
;
4573 if ((err
= copy_to_user(argp
, &hdsp_version
, sizeof(hdsp_version
))))
4577 case SNDRV_HDSP_IOCTL_UPLOAD_FIRMWARE
: {
4578 struct hdsp_firmware __user
*firmware
;
4579 u32 __user
*firmware_data
;
4582 if (hdsp
->io_type
== H9652
|| hdsp
->io_type
== H9632
) return -EINVAL
;
4583 /* SNDRV_HDSP_IOCTL_GET_VERSION must have been called */
4584 if (hdsp
->io_type
== Undefined
) return -EINVAL
;
4586 if (hdsp
->state
& (HDSP_FirmwareCached
| HDSP_FirmwareLoaded
))
4589 snd_printk(KERN_INFO
"Hammerfall-DSP: initializing firmware upload\n");
4590 firmware
= (struct hdsp_firmware __user
*)argp
;
4592 if (get_user(firmware_data
, &firmware
->firmware_data
))
4595 if (hdsp_check_for_iobox (hdsp
))
4598 if (copy_from_user(hdsp
->firmware_cache
, firmware_data
, sizeof(hdsp
->firmware_cache
)) != 0)
4601 hdsp
->state
|= HDSP_FirmwareCached
;
4603 if ((err
= snd_hdsp_load_firmware_from_cache(hdsp
)) < 0)
4606 if (!(hdsp
->state
& HDSP_InitializationComplete
)) {
4607 if ((err
= snd_hdsp_enable_io(hdsp
)) < 0)
4610 snd_hdsp_initialize_channels(hdsp
);
4611 snd_hdsp_initialize_midi_flush(hdsp
);
4613 if ((err
= snd_hdsp_create_alsa_devices(hdsp
->card
, hdsp
)) < 0) {
4614 snd_printk(KERN_ERR
"Hammerfall-DSP: error creating alsa devices\n");
4620 case SNDRV_HDSP_IOCTL_GET_MIXER
: {
4621 struct hdsp_mixer __user
*mixer
= (struct hdsp_mixer __user
*)argp
;
4622 if (copy_to_user(mixer
->matrix
, hdsp
->mixer_matrix
, sizeof(unsigned short)*HDSP_MATRIX_MIXER_SIZE
))
4632 static struct snd_pcm_ops snd_hdsp_playback_ops
= {
4633 .open
= snd_hdsp_playback_open
,
4634 .close
= snd_hdsp_playback_release
,
4635 .ioctl
= snd_hdsp_ioctl
,
4636 .hw_params
= snd_hdsp_hw_params
,
4637 .prepare
= snd_hdsp_prepare
,
4638 .trigger
= snd_hdsp_trigger
,
4639 .pointer
= snd_hdsp_hw_pointer
,
4640 .copy
= snd_hdsp_playback_copy
,
4641 .silence
= snd_hdsp_hw_silence
,
4644 static struct snd_pcm_ops snd_hdsp_capture_ops
= {
4645 .open
= snd_hdsp_capture_open
,
4646 .close
= snd_hdsp_capture_release
,
4647 .ioctl
= snd_hdsp_ioctl
,
4648 .hw_params
= snd_hdsp_hw_params
,
4649 .prepare
= snd_hdsp_prepare
,
4650 .trigger
= snd_hdsp_trigger
,
4651 .pointer
= snd_hdsp_hw_pointer
,
4652 .copy
= snd_hdsp_capture_copy
,
4655 static int __devinit
snd_hdsp_create_hwdep(struct snd_card
*card
,
4658 struct snd_hwdep
*hw
;
4661 if ((err
= snd_hwdep_new(card
, "HDSP hwdep", 0, &hw
)) < 0)
4665 hw
->private_data
= hdsp
;
4666 strcpy(hw
->name
, "HDSP hwdep interface");
4668 hw
->ops
.open
= snd_hdsp_hwdep_dummy_op
;
4669 hw
->ops
.ioctl
= snd_hdsp_hwdep_ioctl
;
4670 hw
->ops
.release
= snd_hdsp_hwdep_dummy_op
;
4675 static int snd_hdsp_create_pcm(struct snd_card
*card
, struct hdsp
*hdsp
)
4677 struct snd_pcm
*pcm
;
4680 if ((err
= snd_pcm_new(card
, hdsp
->card_name
, 0, 1, 1, &pcm
)) < 0)
4684 pcm
->private_data
= hdsp
;
4685 strcpy(pcm
->name
, hdsp
->card_name
);
4687 snd_pcm_set_ops(pcm
, SNDRV_PCM_STREAM_PLAYBACK
, &snd_hdsp_playback_ops
);
4688 snd_pcm_set_ops(pcm
, SNDRV_PCM_STREAM_CAPTURE
, &snd_hdsp_capture_ops
);
4690 pcm
->info_flags
= SNDRV_PCM_INFO_JOINT_DUPLEX
;
4695 static void snd_hdsp_9652_enable_mixer (struct hdsp
*hdsp
)
4697 hdsp
->control2_register
|= HDSP_9652_ENABLE_MIXER
;
4698 hdsp_write (hdsp
, HDSP_control2Reg
, hdsp
->control2_register
);
4701 static int snd_hdsp_enable_io (struct hdsp
*hdsp
)
4705 if (hdsp_fifo_wait (hdsp
, 0, 100)) {
4706 snd_printk(KERN_ERR
"Hammerfall-DSP: enable_io fifo_wait failed\n");
4710 for (i
= 0; i
< hdsp
->max_channels
; ++i
) {
4711 hdsp_write (hdsp
, HDSP_inputEnable
+ (4 * i
), 1);
4712 hdsp_write (hdsp
, HDSP_outputEnable
+ (4 * i
), 1);
4718 static void snd_hdsp_initialize_channels(struct hdsp
*hdsp
)
4720 int status
, aebi_channels
, aebo_channels
;
4722 switch (hdsp
->io_type
) {
4724 hdsp
->card_name
= "RME Hammerfall DSP + Digiface";
4725 hdsp
->ss_in_channels
= hdsp
->ss_out_channels
= DIGIFACE_SS_CHANNELS
;
4726 hdsp
->ds_in_channels
= hdsp
->ds_out_channels
= DIGIFACE_DS_CHANNELS
;
4730 hdsp
->card_name
= "RME Hammerfall HDSP 9652";
4731 hdsp
->ss_in_channels
= hdsp
->ss_out_channels
= H9652_SS_CHANNELS
;
4732 hdsp
->ds_in_channels
= hdsp
->ds_out_channels
= H9652_DS_CHANNELS
;
4736 status
= hdsp_read(hdsp
, HDSP_statusRegister
);
4737 /* HDSP_AEBx bits are low when AEB are connected */
4738 aebi_channels
= (status
& HDSP_AEBI
) ? 0 : 4;
4739 aebo_channels
= (status
& HDSP_AEBO
) ? 0 : 4;
4740 hdsp
->card_name
= "RME Hammerfall HDSP 9632";
4741 hdsp
->ss_in_channels
= H9632_SS_CHANNELS
+aebi_channels
;
4742 hdsp
->ds_in_channels
= H9632_DS_CHANNELS
+aebi_channels
;
4743 hdsp
->qs_in_channels
= H9632_QS_CHANNELS
+aebi_channels
;
4744 hdsp
->ss_out_channels
= H9632_SS_CHANNELS
+aebo_channels
;
4745 hdsp
->ds_out_channels
= H9632_DS_CHANNELS
+aebo_channels
;
4746 hdsp
->qs_out_channels
= H9632_QS_CHANNELS
+aebo_channels
;
4750 hdsp
->card_name
= "RME Hammerfall DSP + Multiface";
4751 hdsp
->ss_in_channels
= hdsp
->ss_out_channels
= MULTIFACE_SS_CHANNELS
;
4752 hdsp
->ds_in_channels
= hdsp
->ds_out_channels
= MULTIFACE_DS_CHANNELS
;
4756 /* should never get here */
4761 static void snd_hdsp_initialize_midi_flush (struct hdsp
*hdsp
)
4763 snd_hdsp_flush_midi_input (hdsp
, 0);
4764 snd_hdsp_flush_midi_input (hdsp
, 1);
4767 static int snd_hdsp_create_alsa_devices(struct snd_card
*card
, struct hdsp
*hdsp
)
4771 if ((err
= snd_hdsp_create_pcm(card
, hdsp
)) < 0) {
4772 snd_printk(KERN_ERR
"Hammerfall-DSP: Error creating pcm interface\n");
4777 if ((err
= snd_hdsp_create_midi(card
, hdsp
, 0)) < 0) {
4778 snd_printk(KERN_ERR
"Hammerfall-DSP: Error creating first midi interface\n");
4782 if (hdsp
->io_type
== Digiface
|| hdsp
->io_type
== H9652
) {
4783 if ((err
= snd_hdsp_create_midi(card
, hdsp
, 1)) < 0) {
4784 snd_printk(KERN_ERR
"Hammerfall-DSP: Error creating second midi interface\n");
4789 if ((err
= snd_hdsp_create_controls(card
, hdsp
)) < 0) {
4790 snd_printk(KERN_ERR
"Hammerfall-DSP: Error creating ctl interface\n");
4794 snd_hdsp_proc_init(hdsp
);
4796 hdsp
->system_sample_rate
= -1;
4797 hdsp
->playback_pid
= -1;
4798 hdsp
->capture_pid
= -1;
4799 hdsp
->capture_substream
= NULL
;
4800 hdsp
->playback_substream
= NULL
;
4802 if ((err
= snd_hdsp_set_defaults(hdsp
)) < 0) {
4803 snd_printk(KERN_ERR
"Hammerfall-DSP: Error setting default values\n");
4807 if (!(hdsp
->state
& HDSP_InitializationComplete
)) {
4808 strcpy(card
->shortname
, "Hammerfall DSP");
4809 sprintf(card
->longname
, "%s at 0x%lx, irq %d", hdsp
->card_name
,
4810 hdsp
->port
, hdsp
->irq
);
4812 if ((err
= snd_card_register(card
)) < 0) {
4813 snd_printk(KERN_ERR
"Hammerfall-DSP: error registering card\n");
4816 hdsp
->state
|= HDSP_InitializationComplete
;
4822 #ifdef HDSP_FW_LOADER
4823 /* load firmware via hotplug fw loader */
4824 static int __devinit
hdsp_request_fw_loader(struct hdsp
*hdsp
)
4827 const struct firmware
*fw
;
4830 if (hdsp
->io_type
== H9652
|| hdsp
->io_type
== H9632
)
4832 if (hdsp
->io_type
== Undefined
) {
4833 if ((err
= hdsp_get_iobox_version(hdsp
)) < 0)
4835 if (hdsp
->io_type
== H9652
|| hdsp
->io_type
== H9632
)
4839 /* caution: max length of firmware filename is 30! */
4840 switch (hdsp
->io_type
) {
4842 if (hdsp
->firmware_rev
== 0xa)
4843 fwfile
= "multiface_firmware.bin";
4845 fwfile
= "multiface_firmware_rev11.bin";
4848 if (hdsp
->firmware_rev
== 0xa)
4849 fwfile
= "digiface_firmware.bin";
4851 fwfile
= "digiface_firmware_rev11.bin";
4854 snd_printk(KERN_ERR
"Hammerfall-DSP: invalid io_type %d\n", hdsp
->io_type
);
4858 if (request_firmware(&fw
, fwfile
, &hdsp
->pci
->dev
)) {
4859 snd_printk(KERN_ERR
"Hammerfall-DSP: cannot load firmware %s\n", fwfile
);
4862 if (fw
->size
< sizeof(hdsp
->firmware_cache
)) {
4863 snd_printk(KERN_ERR
"Hammerfall-DSP: too short firmware size %d (expected %d)\n",
4864 (int)fw
->size
, (int)sizeof(hdsp
->firmware_cache
));
4865 release_firmware(fw
);
4869 memcpy(hdsp
->firmware_cache
, fw
->data
, sizeof(hdsp
->firmware_cache
));
4871 release_firmware(fw
);
4873 hdsp
->state
|= HDSP_FirmwareCached
;
4875 if ((err
= snd_hdsp_load_firmware_from_cache(hdsp
)) < 0)
4878 if (!(hdsp
->state
& HDSP_InitializationComplete
)) {
4879 if ((err
= snd_hdsp_enable_io(hdsp
)) < 0)
4882 if ((err
= snd_hdsp_create_hwdep(hdsp
->card
, hdsp
)) < 0) {
4883 snd_printk(KERN_ERR
"Hammerfall-DSP: error creating hwdep device\n");
4886 snd_hdsp_initialize_channels(hdsp
);
4887 snd_hdsp_initialize_midi_flush(hdsp
);
4888 if ((err
= snd_hdsp_create_alsa_devices(hdsp
->card
, hdsp
)) < 0) {
4889 snd_printk(KERN_ERR
"Hammerfall-DSP: error creating alsa devices\n");
4897 static int __devinit
snd_hdsp_create(struct snd_card
*card
,
4900 struct pci_dev
*pci
= hdsp
->pci
;
4907 hdsp
->midi
[0].rmidi
= NULL
;
4908 hdsp
->midi
[1].rmidi
= NULL
;
4909 hdsp
->midi
[0].input
= NULL
;
4910 hdsp
->midi
[1].input
= NULL
;
4911 hdsp
->midi
[0].output
= NULL
;
4912 hdsp
->midi
[1].output
= NULL
;
4913 hdsp
->midi
[0].pending
= 0;
4914 hdsp
->midi
[1].pending
= 0;
4915 spin_lock_init(&hdsp
->midi
[0].lock
);
4916 spin_lock_init(&hdsp
->midi
[1].lock
);
4917 hdsp
->iobase
= NULL
;
4918 hdsp
->control_register
= 0;
4919 hdsp
->control2_register
= 0;
4920 hdsp
->io_type
= Undefined
;
4921 hdsp
->max_channels
= 26;
4925 spin_lock_init(&hdsp
->lock
);
4927 tasklet_init(&hdsp
->midi_tasklet
, hdsp_midi_tasklet
, (unsigned long)hdsp
);
4929 pci_read_config_word(hdsp
->pci
, PCI_CLASS_REVISION
, &hdsp
->firmware_rev
);
4930 hdsp
->firmware_rev
&= 0xff;
4932 /* From Martin Bjoernsen :
4933 "It is important that the card's latency timer register in
4934 the PCI configuration space is set to a value much larger
4935 than 0 by the computer's BIOS or the driver.
4936 The windows driver always sets this 8 bit register [...]
4937 to its maximum 255 to avoid problems with some computers."
4939 pci_write_config_byte(hdsp
->pci
, PCI_LATENCY_TIMER
, 0xFF);
4941 strcpy(card
->driver
, "H-DSP");
4942 strcpy(card
->mixername
, "Xilinx FPGA");
4944 if (hdsp
->firmware_rev
< 0xa)
4946 else if (hdsp
->firmware_rev
< 0x64)
4947 hdsp
->card_name
= "RME Hammerfall DSP";
4948 else if (hdsp
->firmware_rev
< 0x96) {
4949 hdsp
->card_name
= "RME HDSP 9652";
4952 hdsp
->card_name
= "RME HDSP 9632";
4953 hdsp
->max_channels
= 16;
4957 if ((err
= pci_enable_device(pci
)) < 0)
4960 pci_set_master(hdsp
->pci
);
4962 if ((err
= pci_request_regions(pci
, "hdsp")) < 0)
4964 hdsp
->port
= pci_resource_start(pci
, 0);
4965 if ((hdsp
->iobase
= ioremap_nocache(hdsp
->port
, HDSP_IO_EXTENT
)) == NULL
) {
4966 snd_printk(KERN_ERR
"Hammerfall-DSP: unable to remap region 0x%lx-0x%lx\n", hdsp
->port
, hdsp
->port
+ HDSP_IO_EXTENT
- 1);
4970 if (request_irq(pci
->irq
, snd_hdsp_interrupt
, IRQF_SHARED
,
4972 snd_printk(KERN_ERR
"Hammerfall-DSP: unable to use IRQ %d\n", pci
->irq
);
4976 hdsp
->irq
= pci
->irq
;
4977 hdsp
->precise_ptr
= 0;
4978 hdsp
->use_midi_tasklet
= 1;
4979 hdsp
->dds_value
= 0;
4981 if ((err
= snd_hdsp_initialize_memory(hdsp
)) < 0)
4984 if (!is_9652
&& !is_9632
) {
4985 /* we wait 2 seconds to let freshly inserted cardbus cards do their hardware init */
4988 if ((hdsp_read (hdsp
, HDSP_statusRegister
) & HDSP_DllError
) != 0) {
4989 #ifdef HDSP_FW_LOADER
4990 if ((err
= hdsp_request_fw_loader(hdsp
)) < 0)
4991 /* we don't fail as this can happen
4992 if userspace is not ready for
4995 snd_printk(KERN_ERR
"Hammerfall-DSP: couldn't get firmware from userspace. try using hdsploader\n");
4997 /* init is complete, we return */
5000 /* no iobox connected, we defer initialization */
5001 snd_printk(KERN_INFO
"Hammerfall-DSP: card initialization pending : waiting for firmware\n");
5002 if ((err
= snd_hdsp_create_hwdep(card
, hdsp
)) < 0)
5006 snd_printk(KERN_INFO
"Hammerfall-DSP: Firmware already present, initializing card.\n");
5007 if (hdsp_read(hdsp
, HDSP_status2Register
) & HDSP_version1
)
5008 hdsp
->io_type
= Multiface
;
5010 hdsp
->io_type
= Digiface
;
5014 if ((err
= snd_hdsp_enable_io(hdsp
)) != 0)
5018 hdsp
->io_type
= H9652
;
5021 hdsp
->io_type
= H9632
;
5023 if ((err
= snd_hdsp_create_hwdep(card
, hdsp
)) < 0)
5026 snd_hdsp_initialize_channels(hdsp
);
5027 snd_hdsp_initialize_midi_flush(hdsp
);
5029 hdsp
->state
|= HDSP_FirmwareLoaded
;
5031 if ((err
= snd_hdsp_create_alsa_devices(card
, hdsp
)) < 0)
5037 static int snd_hdsp_free(struct hdsp
*hdsp
)
5040 /* stop the audio, and cancel all interrupts */
5041 tasklet_kill(&hdsp
->midi_tasklet
);
5042 hdsp
->control_register
&= ~(HDSP_Start
|HDSP_AudioInterruptEnable
|HDSP_Midi0InterruptEnable
|HDSP_Midi1InterruptEnable
);
5043 hdsp_write (hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
5047 free_irq(hdsp
->irq
, (void *)hdsp
);
5049 snd_hdsp_free_buffers(hdsp
);
5052 iounmap(hdsp
->iobase
);
5055 pci_release_regions(hdsp
->pci
);
5057 pci_disable_device(hdsp
->pci
);
5061 static void snd_hdsp_card_free(struct snd_card
*card
)
5063 struct hdsp
*hdsp
= (struct hdsp
*) card
->private_data
;
5066 snd_hdsp_free(hdsp
);
5069 static int __devinit
snd_hdsp_probe(struct pci_dev
*pci
,
5070 const struct pci_device_id
*pci_id
)
5074 struct snd_card
*card
;
5077 if (dev
>= SNDRV_CARDS
)
5084 if (!(card
= snd_card_new(index
[dev
], id
[dev
], THIS_MODULE
, sizeof(struct hdsp
))))
5087 hdsp
= (struct hdsp
*) card
->private_data
;
5088 card
->private_free
= snd_hdsp_card_free
;
5091 snd_card_set_dev(card
, &pci
->dev
);
5093 if ((err
= snd_hdsp_create(card
, hdsp
)) < 0) {
5094 snd_card_free(card
);
5098 strcpy(card
->shortname
, "Hammerfall DSP");
5099 sprintf(card
->longname
, "%s at 0x%lx, irq %d", hdsp
->card_name
,
5100 hdsp
->port
, hdsp
->irq
);
5102 if ((err
= snd_card_register(card
)) < 0) {
5103 snd_card_free(card
);
5106 pci_set_drvdata(pci
, card
);
5111 static void __devexit
snd_hdsp_remove(struct pci_dev
*pci
)
5113 snd_card_free(pci_get_drvdata(pci
));
5114 pci_set_drvdata(pci
, NULL
);
5117 static struct pci_driver driver
= {
5118 .name
= "RME Hammerfall DSP",
5119 .id_table
= snd_hdsp_ids
,
5120 .probe
= snd_hdsp_probe
,
5121 .remove
= __devexit_p(snd_hdsp_remove
),
5124 static int __init
alsa_card_hdsp_init(void)
5126 return pci_register_driver(&driver
);
5129 static void __exit
alsa_card_hdsp_exit(void)
5131 pci_unregister_driver(&driver
);
5134 module_init(alsa_card_hdsp_init
)
5135 module_exit(alsa_card_hdsp_exit
)