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Merge branch 'master'
[linux-2.6/linux-loongson.git] / arch / ppc / platforms / prep_setup.c
blobd065358020030a1c506e1766e9b89c8c67b5ac93
1 /*
2 * arch/ppc/platforms/setup.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
7 *
8 * Support for PReP (Motorola MTX/MVME)
9 * by Troy Benjegerdes (hozer@drgw.net)
10 */
11
12 /*
13 * bootup setup stuff..
14 */
15
16 #include <linux/config.h>
17 #include <linux/delay.h>
18 #include <linux/module.h>
19 #include <linux/errno.h>
20 #include <linux/sched.h>
21 #include <linux/kernel.h>
22 #include <linux/mm.h>
23 #include <linux/stddef.h>
24 #include <linux/unistd.h>
25 #include <linux/ptrace.h>
26 #include <linux/slab.h>
27 #include <linux/user.h>
28 #include <linux/a.out.h>
29 #include <linux/tty.h>
30 #include <linux/major.h>
31 #include <linux/interrupt.h>
32 #include <linux/reboot.h>
33 #include <linux/init.h>
34 #include <linux/initrd.h>
35 #include <linux/ioport.h>
36 #include <linux/console.h>
37 #include <linux/timex.h>
38 #include <linux/pci.h>
39 #include <linux/ide.h>
40 #include <linux/seq_file.h>
41 #include <linux/root_dev.h>
42
43 #include <asm/sections.h>
44 #include <asm/mmu.h>
45 #include <asm/processor.h>
46 #include <asm/residual.h>
47 #include <asm/io.h>
48 #include <asm/pgtable.h>
49 #include <asm/cache.h>
50 #include <asm/dma.h>
51 #include <asm/machdep.h>
52 #include <asm/mc146818rtc.h>
53 #include <asm/mk48t59.h>
54 #include <asm/prep_nvram.h>
55 #include <asm/raven.h>
56 #include <asm/vga.h>
57 #include <asm/time.h>
58 #include <asm/mpc10x.h>
59 #include <asm/i8259.h>
60 #include <asm/open_pic.h>
61 #include <asm/pci-bridge.h>
62 #include <asm/todc.h>
63
64 /* prep registers for L2 */
65 #define CACHECRBA 0x80000823 /* Cache configuration register address */
66 #define L2CACHE_MASK 0x03 /* Mask for 2 L2 Cache bits */
67 #define L2CACHE_512KB 0x00 /* 512KB */
68 #define L2CACHE_256KB 0x01 /* 256KB */
69 #define L2CACHE_1MB 0x02 /* 1MB */
70 #define L2CACHE_NONE 0x03 /* NONE */
71 #define L2CACHE_PARITY 0x08 /* Mask for L2 Cache Parity Protected bit */
72
73 TODC_ALLOC();
74
75 unsigned char ucBoardRev;
76 unsigned char ucBoardRevMaj, ucBoardRevMin;
77
78 extern unsigned char prep_nvram_read_val(int addr);
79 extern void prep_nvram_write_val(int addr,
80 unsigned char val);
81 extern unsigned char rs_nvram_read_val(int addr);
82 extern void rs_nvram_write_val(int addr,
83 unsigned char val);
84 extern void ibm_prep_init(void);
85
86 extern void prep_find_bridges(void);
87
88 int _prep_type;
89
90 extern void prep_residual_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
91 extern void prep_sandalfoot_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
92 extern void prep_thinkpad_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
93 extern void prep_carolina_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
94 extern void prep_tiger1_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
95
96
97 #define cached_21 (((char *)(ppc_cached_irq_mask))[3])
98 #define cached_A1 (((char *)(ppc_cached_irq_mask))[2])
99
100 #ifdef CONFIG_SOUND_CS4232
101 long ppc_cs4232_dma, ppc_cs4232_dma2;
102 #endif
103
104 extern PTE *Hash, *Hash_end;
105 extern unsigned long Hash_size, Hash_mask;
106 extern int probingmem;
107 extern unsigned long loops_per_jiffy;
108
109 #ifdef CONFIG_SOUND_CS4232
110 EXPORT_SYMBOL(ppc_cs4232_dma);
111 EXPORT_SYMBOL(ppc_cs4232_dma2);
112 #endif
113
114 /* useful ISA ports */
115 #define PREP_SYSCTL 0x81c
116 /* present in the IBM reference design; possibly identical in Mot boxes: */
117 #define PREP_IBM_SIMM_ID 0x803 /* SIMM size: 32 or 8 MiB */
118 #define PREP_IBM_SIMM_PRESENCE 0x804
119 #define PREP_IBM_EQUIPMENT 0x80c
120 #define PREP_IBM_L2INFO 0x80d
121 #define PREP_IBM_PM1 0x82a /* power management register 1 */
122 #define PREP_IBM_PLANAR 0x852 /* planar ID - identifies the motherboard */
123 #define PREP_IBM_DISP 0x8c0 /* 4-digit LED display */
124
125 /* Equipment Present Register masks: */
126 #define PREP_IBM_EQUIPMENT_RESERVED 0x80
127 #define PREP_IBM_EQUIPMENT_SCSIFUSE 0x40
128 #define PREP_IBM_EQUIPMENT_L2_COPYBACK 0x08
129 #define PREP_IBM_EQUIPMENT_L2_256 0x04
130 #define PREP_IBM_EQUIPMENT_CPU 0x02
131 #define PREP_IBM_EQUIPMENT_L2 0x01
132
133 /* planar ID values: */
134 /* Sandalfoot/Sandalbow (6015/7020) */
135 #define PREP_IBM_SANDALFOOT 0xfc
136 /* Woodfield, Thinkpad 850/860 (6042/7249) */
137 #define PREP_IBM_THINKPAD 0xff /* planar ID unimplemented */
138 /* PowerSeries 830/850 (6050/6070) */
139 #define PREP_IBM_CAROLINA_IDE_0 0xf0
140 #define PREP_IBM_CAROLINA_IDE_1 0xf1
141 #define PREP_IBM_CAROLINA_IDE_2 0xf2
142 #define PREP_IBM_CAROLINA_IDE_3 0xf3
143 /* 7248-43P */
144 #define PREP_IBM_CAROLINA_SCSI_0 0xf4
145 #define PREP_IBM_CAROLINA_SCSI_1 0xf5
146 #define PREP_IBM_CAROLINA_SCSI_2 0xf6
147 #define PREP_IBM_CAROLINA_SCSI_3 0xf7 /* missing from Carolina Tech Spec */
148 /* Tiger1 (7043-140) */
149 #define PREP_IBM_TIGER1_133 0xd1
150 #define PREP_IBM_TIGER1_166 0xd2
151 #define PREP_IBM_TIGER1_180 0xd3
152 #define PREP_IBM_TIGER1_xxx 0xd4 /* unknown, but probably exists */
153 #define PREP_IBM_TIGER1_333 0xd5 /* missing from Tiger Tech Spec */
154
155 /* setup_ibm_pci:
156 * set Motherboard_map_name, Motherboard_map, Motherboard_routes.
157 * return 8259 edge/level masks.
158 */
159 void (*setup_ibm_pci)(char *irq_lo, char *irq_hi);
160
161 extern char *Motherboard_map_name; /* for use in *_cpuinfo */
162
163 /*
164 * As found in the PReP reference implementation.
165 * Used by Thinkpad, Sandalfoot (6015/7020), and all Motorola PReP.
166 */
167 static void __init
168 prep_gen_enable_l2(void)
169 {
170 outb(inb(PREP_SYSCTL) | 0x3, PREP_SYSCTL);
171 }
172
173 /* Used by Carolina and Tiger1 */
174 static void __init
175 prep_carolina_enable_l2(void)
176 {
177 outb(inb(PREP_SYSCTL) | 0xc0, PREP_SYSCTL);
178 }
179
180 /* cpuinfo code common to all IBM PReP */
181 static void
182 prep_ibm_cpuinfo(struct seq_file *m)
183 {
184 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
185
186 seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name);
187
188 seq_printf(m, "upgrade cpu\t: ");
189 if (equip_reg & PREP_IBM_EQUIPMENT_CPU) {
190 seq_printf(m, "not ");
191 }
192 seq_printf(m, "present\n");
193
194 /* print info about the SCSI fuse */
195 seq_printf(m, "scsi fuse\t: ");
196 if (equip_reg & PREP_IBM_EQUIPMENT_SCSIFUSE)
197 seq_printf(m, "ok");
198 else
199 seq_printf(m, "bad");
200 seq_printf(m, "\n");
201
202 /* print info about SIMMs */
203 if (have_residual_data) {
204 int i;
205 seq_printf(m, "simms\t\t: ");
206 for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) {
207 if (res->Memories[i].SIMMSize != 0)
208 seq_printf(m, "%d:%ldMiB ", i,
209 (res->Memories[i].SIMMSize > 1024) ?
210 res->Memories[i].SIMMSize>>20 :
211 res->Memories[i].SIMMSize);
212 }
213 seq_printf(m, "\n");
214 }
215 }
216
217 static int
218 prep_gen_cpuinfo(struct seq_file *m)
219 {
220 prep_ibm_cpuinfo(m);
221 return 0;
222 }
223
224 static int
225 prep_sandalfoot_cpuinfo(struct seq_file *m)
226 {
227 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
228
229 prep_ibm_cpuinfo(m);
230
231 /* report amount and type of L2 cache present */
232 seq_printf(m, "L2 cache\t: ");
233 if (equip_reg & PREP_IBM_EQUIPMENT_L2) {
234 seq_printf(m, "not present");
235 } else {
236 if (equip_reg & PREP_IBM_EQUIPMENT_L2_256)
237 seq_printf(m, "256KiB");
238 else
239 seq_printf(m, "unknown size");
240
241 if (equip_reg & PREP_IBM_EQUIPMENT_L2_COPYBACK)
242 seq_printf(m, ", copy-back");
243 else
244 seq_printf(m, ", write-through");
245 }
246 seq_printf(m, "\n");
247
248 return 0;
249 }
250
251 static int
252 prep_thinkpad_cpuinfo(struct seq_file *m)
253 {
254 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
255 char *cpubus_speed, *pci_speed;
256
257 prep_ibm_cpuinfo(m);
258
259 /* report amount and type of L2 cache present */
260 seq_printf(m, "l2 cache\t: ");
261 if ((equip_reg & 0x1) == 0) {
262 switch ((equip_reg & 0xc) >> 2) {
263 case 0x0:
264 seq_printf(m, "128KiB look-aside 2-way write-through\n");
265 break;
266 case 0x1:
267 seq_printf(m, "512KiB look-aside direct-mapped write-back\n");
268 break;
269 case 0x2:
270 seq_printf(m, "256KiB look-aside 2-way write-through\n");
271 break;
272 case 0x3:
273 seq_printf(m, "256KiB look-aside direct-mapped write-back\n");
274 break;
275 }
276 } else {
277 seq_printf(m, "not present\n");
278 }
279
280 /* report bus speeds because we can */
281 if ((equip_reg & 0x80) == 0) {
282 switch ((equip_reg & 0x30) >> 4) {
283 case 0x1:
284 cpubus_speed = "50";
285 pci_speed = "25";
286 break;
287 case 0x3:
288 cpubus_speed = "66";
289 pci_speed = "33";
290 break;
291 default:
292 cpubus_speed = "unknown";
293 pci_speed = "unknown";
294 break;
295 }
296 } else {
297 switch ((equip_reg & 0x30) >> 4) {
298 case 0x1:
299 cpubus_speed = "25";
300 pci_speed = "25";
301 break;
302 case 0x2:
303 cpubus_speed = "60";
304 pci_speed = "30";
305 break;
306 case 0x3:
307 cpubus_speed = "33";
308 pci_speed = "33";
309 break;
310 default:
311 cpubus_speed = "unknown";
312 pci_speed = "unknown";
313 break;
314 }
315 }
316 seq_printf(m, "60x bus\t\t: %sMHz\n", cpubus_speed);
317 seq_printf(m, "pci bus\t\t: %sMHz\n", pci_speed);
318
319 return 0;
320 }
321
322 static int
323 prep_carolina_cpuinfo(struct seq_file *m)
324 {
325 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
326
327 prep_ibm_cpuinfo(m);
328
329 /* report amount and type of L2 cache present */
330 seq_printf(m, "l2 cache\t: ");
331 if ((equip_reg & 0x1) == 0) {
332 unsigned int l2_reg = inb(PREP_IBM_L2INFO);
333
334 /* L2 size */
335 if ((l2_reg & 0x60) == 0)
336 seq_printf(m, "256KiB");
337 else if ((l2_reg & 0x60) == 0x20)
338 seq_printf(m, "512KiB");
339 else
340 seq_printf(m, "unknown size");
341
342 /* L2 type */
343 if ((l2_reg & 0x3) == 0)
344 seq_printf(m, ", async");
345 else if ((l2_reg & 0x3) == 1)
346 seq_printf(m, ", sync");
347 else
348 seq_printf(m, ", unknown type");
349
350 seq_printf(m, "\n");
351 } else {
352 seq_printf(m, "not present\n");
353 }
354
355 return 0;
356 }
357
358 static int
359 prep_tiger1_cpuinfo(struct seq_file *m)
360 {
361 unsigned int l2_reg = inb(PREP_IBM_L2INFO);
362
363 prep_ibm_cpuinfo(m);
364
365 /* report amount and type of L2 cache present */
366 seq_printf(m, "l2 cache\t: ");
367 if ((l2_reg & 0xf) == 0xf) {
368 seq_printf(m, "not present\n");
369 } else {
370 if (l2_reg & 0x8)
371 seq_printf(m, "async, ");
372 else
373 seq_printf(m, "sync burst, ");
374
375 if (l2_reg & 0x4)
376 seq_printf(m, "parity, ");
377 else
378 seq_printf(m, "no parity, ");
379
380 switch (l2_reg & 0x3) {
381 case 0x0:
382 seq_printf(m, "256KiB\n");
383 break;
384 case 0x1:
385 seq_printf(m, "512KiB\n");
386 break;
387 case 0x2:
388 seq_printf(m, "1MiB\n");
389 break;
390 default:
391 seq_printf(m, "unknown size\n");
392 break;
393 }
394 }
395
396 return 0;
397 }
398
399
400 /* Used by all Motorola PReP */
401 static int
402 prep_mot_cpuinfo(struct seq_file *m)
403 {
404 unsigned int cachew = *((unsigned char *)CACHECRBA);
405
406 seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name);
407
408 /* report amount and type of L2 cache present */
409 seq_printf(m, "l2 cache\t: ");
410 switch (cachew & L2CACHE_MASK) {
411 case L2CACHE_512KB:
412 seq_printf(m, "512KiB");
413 break;
414 case L2CACHE_256KB:
415 seq_printf(m, "256KiB");
416 break;
417 case L2CACHE_1MB:
418 seq_printf(m, "1MiB");
419 break;
420 case L2CACHE_NONE:
421 seq_printf(m, "none\n");
422 goto no_l2;
423 break;
424 default:
425 seq_printf(m, "%x\n", cachew);
426 }
427
428 seq_printf(m, ", parity %s",
429 (cachew & L2CACHE_PARITY)? "enabled" : "disabled");
430
431 seq_printf(m, " SRAM:");
432
433 switch ( ((cachew & 0xf0) >> 4) & ~(0x3) ) {
434 case 1: seq_printf(m, "synchronous, parity, flow-through\n");
435 break;
436 case 2: seq_printf(m, "asynchronous, no parity\n");
437 break;
438 case 3: seq_printf(m, "asynchronous, parity\n");
439 break;
440 default:seq_printf(m, "synchronous, pipelined, no parity\n");
441 break;
442 }
443
444 no_l2:
445 /* print info about SIMMs */
446 if (have_residual_data) {
447 int i;
448 seq_printf(m, "simms\t\t: ");
449 for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) {
450 if (res->Memories[i].SIMMSize != 0)
451 seq_printf(m, "%d:%ldM ", i,
452 (res->Memories[i].SIMMSize > 1024) ?
453 res->Memories[i].SIMMSize>>20 :
454 res->Memories[i].SIMMSize);
455 }
456 seq_printf(m, "\n");
457 }
458
459 return 0;
460 }
461
462 static void
463 prep_restart(char *cmd)
464 {
465 #define PREP_SP92 0x92 /* Special Port 92 */
466 local_irq_disable(); /* no interrupts */
467
468 /* set exception prefix high - to the prom */
469 _nmask_and_or_msr(0, MSR_IP);
470
471 /* make sure bit 0 (reset) is a 0 */
472 outb( inb(PREP_SP92) & ~1L , PREP_SP92);
473 /* signal a reset to system control port A - soft reset */
474 outb( inb(PREP_SP92) | 1 , PREP_SP92);
475
476 while ( 1 ) ;
477 /* not reached */
478 #undef PREP_SP92
479 }
480
481 static void
482 prep_halt(void)
483 {
484 local_irq_disable(); /* no interrupts */
485
486 /* set exception prefix high - to the prom */
487 _nmask_and_or_msr(0, MSR_IP);
488
489 while ( 1 ) ;
490 /* not reached */
491 }
492
493 /* Carrera is the power manager in the Thinkpads. Unfortunately not much is
494 * known about it, so we can't power down.
495 */
496 static void
497 prep_carrera_poweroff(void)
498 {
499 prep_halt();
500 }
501
502 /*
503 * On most IBM PReP's, power management is handled by a Signetics 87c750
504 * behind the Utah component on the ISA bus. To access the 750 you must write
505 * a series of nibbles to port 0x82a (decoded by the Utah). This is described
506 * somewhat in the IBM Carolina Technical Specification.
507 * -Hollis
508 */
509 static void
510 utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value)
511 {
512 /*
513 * byte1: 0 0 0 1 0 d a5 a4
514 * byte2: 0 0 0 1 a3 a2 a1 a0
515 *
516 * d = the bit's value, enabled or disabled
517 * (a5 a4 a3) = the byte number, minus 20
518 * (a2 a1 a0) = the bit number
519 *
520 * example: set the 5th bit of byte 21 (21.5)
521 * a5 a4 a3 = 001 (byte 1)
522 * a2 a1 a0 = 101 (bit 5)
523 *
524 * byte1 = 0001 0100 (0x14)
525 * byte2 = 0001 1101 (0x1d)
526 */
527 unsigned char byte1=0x10, byte2=0x10;
528
529 /* the 750's '20.0' is accessed as '0.0' through Utah (which adds 20) */
530 bytenum -= 20;
531
532 byte1 |= (!!value) << 2; /* set d */
533 byte1 |= (bytenum >> 1) & 0x3; /* set a5, a4 */
534
535 byte2 |= (bytenum & 0x1) << 3; /* set a3 */
536 byte2 |= bitnum & 0x7; /* set a2, a1, a0 */
537
538 outb(byte1, PREP_IBM_PM1); /* first nibble */
539 mb();
540 udelay(100); /* important: let controller recover */
541
542 outb(byte2, PREP_IBM_PM1); /* second nibble */
543 mb();
544 udelay(100); /* important: let controller recover */
545 }
546
547 static void
548 prep_sig750_poweroff(void)
549 {
550 /* tweak the power manager found in most IBM PRePs (except Thinkpads) */
551
552 local_irq_disable();
553 /* set exception prefix high - to the prom */
554 _nmask_and_or_msr(0, MSR_IP);
555
556 utah_sig87c750_setbit(21, 5, 1); /* set bit 21.5, "PMEXEC_OFF" */
557
558 while (1) ;
559 /* not reached */
560 }
561
562 static int
563 prep_show_percpuinfo(struct seq_file *m, int i)
564 {
565 /* PREP's without residual data will give incorrect values here */
566 seq_printf(m, "clock\t\t: ");
567 if (have_residual_data)
568 seq_printf(m, "%ldMHz\n",
569 (res->VitalProductData.ProcessorHz > 1024) ?
570 res->VitalProductData.ProcessorHz / 1000000 :
571 res->VitalProductData.ProcessorHz);
572 else
573 seq_printf(m, "???\n");
574
575 return 0;
576 }
577
578 #ifdef CONFIG_SOUND_CS4232
579 static long __init masktoint(unsigned int i)
580 {
581 int t = -1;
582 while (i >> ++t)
583 ;
584 return (t-1);
585 }
586
587 /*
588 * ppc_cs4232_dma and ppc_cs4232_dma2 are used in include/asm/dma.h
589 * to distinguish sound dma-channels from others. This is because
590 * blocksize on 16 bit dma-channels 5,6,7 is 128k, but
591 * the cs4232.c uses 64k like on 8 bit dma-channels 0,1,2,3
592 */
593
594 static void __init prep_init_sound(void)
595 {
596 PPC_DEVICE *audiodevice = NULL;
597
598 /*
599 * Get the needed resource informations from residual data.
600 *
601 */
602 if (have_residual_data)
603 audiodevice = residual_find_device(~0, NULL,
604 MultimediaController, AudioController, -1, 0);
605
606 if (audiodevice != NULL) {
607 PnP_TAG_PACKET *pkt;
608
609 pkt = PnP_find_packet((unsigned char *)&res->DevicePnPHeap[audiodevice->AllocatedOffset],
610 S5_Packet, 0);
611 if (pkt != NULL)
612 ppc_cs4232_dma = masktoint(pkt->S5_Pack.DMAMask);
613 pkt = PnP_find_packet((unsigned char*)&res->DevicePnPHeap[audiodevice->AllocatedOffset],
614 S5_Packet, 1);
615 if (pkt != NULL)
616 ppc_cs4232_dma2 = masktoint(pkt->S5_Pack.DMAMask);
617 }
618
619 /*
620 * These are the PReP specs' defaults for the cs4231. We use these
621 * as fallback incase we don't have residual data.
622 * At least the IBM Thinkpad 850 with IDE DMA Channels at 6 and 7
623 * will use the other values.
624 */
625 if (audiodevice == NULL) {
626 switch (_prep_type) {
627 case _PREP_IBM:
628 ppc_cs4232_dma = 1;
629 ppc_cs4232_dma2 = -1;
630 break;
631 default:
632 ppc_cs4232_dma = 6;
633 ppc_cs4232_dma2 = 7;
634 }
635 }
636
637 /*
638 * Find a way to push these informations to the cs4232 driver
639 * Give it out with printk, when not in cmd_line?
640 * Append it to cmd_line and saved_command_line?
641 * Format is cs4232=io,irq,dma,dma2
642 */
643 }
644 #endif /* CONFIG_SOUND_CS4232 */
645
646 /*
647 * Fill out screen_info according to the residual data. This allows us to use
648 * at least vesafb.
649 */
650 static void __init
651 prep_init_vesa(void)
652 {
653 #if (defined(CONFIG_FB_VGA16) || defined(CONFIG_FB_VGA16_MODULE) || \
654 defined(CONFIG_FB_VESA))
655 PPC_DEVICE *vgadev = NULL;
656
657 if (have_residual_data)
658 vgadev = residual_find_device(~0, NULL, DisplayController,
659 SVGAController, -1, 0);
660
661 if (vgadev != NULL) {
662 PnP_TAG_PACKET *pkt;
663
664 pkt = PnP_find_large_vendor_packet(
665 (unsigned char *)&res->DevicePnPHeap[vgadev->AllocatedOffset],
666 0x04, 0); /* 0x04 = Display Tag */
667 if (pkt != NULL) {
668 unsigned char *ptr = (unsigned char *)pkt;
669
670 if (ptr[4]) {
671 /* graphics mode */
672 screen_info.orig_video_isVGA = VIDEO_TYPE_VLFB;
673
674 screen_info.lfb_depth = ptr[4] * 8;
675
676 screen_info.lfb_width = swab16(*(short *)(ptr+6));
677 screen_info.lfb_height = swab16(*(short *)(ptr+8));
678 screen_info.lfb_linelength = swab16(*(short *)(ptr+10));
679
680 screen_info.lfb_base = swab32(*(long *)(ptr+12));
681 screen_info.lfb_size = swab32(*(long *)(ptr+20)) / 65536;
682 }
683 }
684 }
685 #endif
686 }
687
688 /*
689 * Set DBAT 2 to access 0x80000000 so early progress messages will work
690 */
691 static __inline__ void
692 prep_set_bat(void)
693 {
694 /* wait for all outstanding memory access to complete */
695 mb();
696
697 /* setup DBATs */
698 mtspr(SPRN_DBAT2U, 0x80001ffe);
699 mtspr(SPRN_DBAT2L, 0x8000002a);
700
701 /* wait for updates */
702 mb();
703 }
704
705 /*
706 * IBM 3-digit status LED
707 */
708 static unsigned int ibm_statusled_base;
709
710 static void
711 ibm_statusled_progress(char *s, unsigned short hex);
712
713 static int
714 ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2,
715 void * dummy3)
716 {
717 ibm_statusled_progress(NULL, 0x505); /* SOS */
718 return NOTIFY_DONE;
719 }
720
721 static struct notifier_block ibm_statusled_block = {
722 ibm_statusled_panic,
723 NULL,
724 INT_MAX /* try to do it first */
725 };
726
727 static void
728 ibm_statusled_progress(char *s, unsigned short hex)
729 {
730 static int notifier_installed;
731 /*
732 * Progress uses 4 digits and we have only 3. So, we map 0xffff to
733 * 0xfff for display switch off. Out of range values are mapped to
734 * 0xeff, as I'm told 0xf00 and above are reserved for hardware codes.
735 * Install the panic notifier when the display is first switched off.
736 */
737 if (hex == 0xffff) {
738 hex = 0xfff;
739 if (!notifier_installed) {
740 ++notifier_installed;
741 notifier_chain_register(&panic_notifier_list,
742 &ibm_statusled_block);
743 }
744 }
745 else
746 if (hex > 0xfff)
747 hex = 0xeff;
748
749 mb();
750 outw(hex, ibm_statusled_base);
751 }
752
753 static void __init
754 ibm_statusled_init(void)
755 {
756 /*
757 * The IBM 3-digit LED display is specified in the residual data
758 * as an operator panel device, type "System Status LED". Find
759 * that device and determine its address. We validate all the
760 * other parameters on the off-chance another, similar device
761 * exists.
762 */
763 if (have_residual_data) {
764 PPC_DEVICE *led;
765 PnP_TAG_PACKET *pkt;
766
767 led = residual_find_device(~0, NULL, SystemPeripheral,
768 OperatorPanel, SystemStatusLED, 0);
769 if (!led)
770 return;
771
772 pkt = PnP_find_packet((unsigned char *)
773 &res->DevicePnPHeap[led->AllocatedOffset], S8_Packet, 0);
774 if (!pkt)
775 return;
776
777 if (pkt->S8_Pack.IOInfo != ISAAddr16bit)
778 return;
779 if (*(unsigned short *)pkt->S8_Pack.RangeMin !=
780 *(unsigned short *)pkt->S8_Pack.RangeMax)
781 return;
782 if (pkt->S8_Pack.IOAlign != 2)
783 return;
784 if (pkt->S8_Pack.IONum != 2)
785 return;
786
787 ibm_statusled_base = ld_le16((unsigned short *)
788 (pkt->S8_Pack.RangeMin));
789 ppc_md.progress = ibm_statusled_progress;
790 }
791 }
792
793 static void __init
794 prep_setup_arch(void)
795 {
796 unsigned char reg;
797 int is_ide=0;
798
799 /* init to some ~sane value until calibrate_delay() runs */
800 loops_per_jiffy = 50000000;
801
802 /* Lookup PCI host bridges */
803 prep_find_bridges();
804
805 /* Set up floppy in PS/2 mode */
806 outb(0x09, SIO_CONFIG_RA);
807 reg = inb(SIO_CONFIG_RD);
808 reg = (reg & 0x3F) | 0x40;
809 outb(reg, SIO_CONFIG_RD);
810 outb(reg, SIO_CONFIG_RD); /* Have to write twice to change! */
811
812 switch ( _prep_type )
813 {
814 case _PREP_IBM:
815 reg = inb(PREP_IBM_PLANAR);
816 printk(KERN_INFO "IBM planar ID: %02x", reg);
817 switch (reg) {
818 case PREP_IBM_SANDALFOOT:
819 prep_gen_enable_l2();
820 setup_ibm_pci = prep_sandalfoot_setup_pci;
821 ppc_md.power_off = prep_sig750_poweroff;
822 ppc_md.show_cpuinfo = prep_sandalfoot_cpuinfo;
823 break;
824 case PREP_IBM_THINKPAD:
825 prep_gen_enable_l2();
826 setup_ibm_pci = prep_thinkpad_setup_pci;
827 ppc_md.power_off = prep_carrera_poweroff;
828 ppc_md.show_cpuinfo = prep_thinkpad_cpuinfo;
829 break;
830 default:
831 if (have_residual_data) {
832 prep_gen_enable_l2();
833 setup_ibm_pci = prep_residual_setup_pci;
834 ppc_md.power_off = prep_halt;
835 ppc_md.show_cpuinfo = prep_gen_cpuinfo;
836 break;
837 }
838 else
839 printk(" - unknown! Assuming Carolina");
840 /* fall through */
841 case PREP_IBM_CAROLINA_IDE_0:
842 case PREP_IBM_CAROLINA_IDE_1:
843 case PREP_IBM_CAROLINA_IDE_2:
844 case PREP_IBM_CAROLINA_IDE_3:
845 is_ide = 1;
846 case PREP_IBM_CAROLINA_SCSI_0:
847 case PREP_IBM_CAROLINA_SCSI_1:
848 case PREP_IBM_CAROLINA_SCSI_2:
849 case PREP_IBM_CAROLINA_SCSI_3:
850 prep_carolina_enable_l2();
851 setup_ibm_pci = prep_carolina_setup_pci;
852 ppc_md.power_off = prep_sig750_poweroff;
853 ppc_md.show_cpuinfo = prep_carolina_cpuinfo;
854 break;
855 case PREP_IBM_TIGER1_133:
856 case PREP_IBM_TIGER1_166:
857 case PREP_IBM_TIGER1_180:
858 case PREP_IBM_TIGER1_xxx:
859 case PREP_IBM_TIGER1_333:
860 prep_carolina_enable_l2();
861 setup_ibm_pci = prep_tiger1_setup_pci;
862 ppc_md.power_off = prep_sig750_poweroff;
863 ppc_md.show_cpuinfo = prep_tiger1_cpuinfo;
864 break;
865 }
866 printk("\n");
867
868 /* default root device */
869 if (is_ide)
870 ROOT_DEV = MKDEV(IDE0_MAJOR, 3);
871 else
872 ROOT_DEV = MKDEV(SCSI_DISK0_MAJOR, 3);
873
874 break;
875 case _PREP_Motorola:
876 prep_gen_enable_l2();
877 ppc_md.power_off = prep_halt;
878 ppc_md.show_cpuinfo = prep_mot_cpuinfo;
879
880 #ifdef CONFIG_BLK_DEV_INITRD
881 if (initrd_start)
882 ROOT_DEV = Root_RAM0;
883 else
884 #endif
885 #ifdef CONFIG_ROOT_NFS
886 ROOT_DEV = Root_NFS;
887 #else
888 ROOT_DEV = Root_SDA2;
889 #endif
890 break;
891 }
892
893 /* Read in NVRAM data */
894 init_prep_nvram();
895
896 /* if no bootargs, look in NVRAM */
897 if ( cmd_line[0] == '\0' ) {
898 char *bootargs;
899 bootargs = prep_nvram_get_var("bootargs");
900 if (bootargs != NULL) {
901 strcpy(cmd_line, bootargs);
902 /* again.. */
903 strcpy(saved_command_line, cmd_line);
904 }
905 }
906
907 #ifdef CONFIG_SOUND_CS4232
908 prep_init_sound();
909 #endif /* CONFIG_SOUND_CS4232 */
910
911 prep_init_vesa();
912
913 switch (_prep_type) {
914 case _PREP_Motorola:
915 raven_init();
916 break;
917 case _PREP_IBM:
918 ibm_prep_init();
919 break;
920 }
921
922 #ifdef CONFIG_VGA_CONSOLE
923 /* vgacon.c needs to know where we mapped IO memory in io_block_mapping() */
924 vgacon_remap_base = 0xf0000000;
925 conswitchp = &vga_con;
926 #endif
927 }
928
929 /*
930 * First, see if we can get this information from the residual data.
931 * This is important on some IBM PReP systems. If we cannot, we let the
932 * TODC code handle doing this.
933 */
934 static void __init
935 prep_calibrate_decr(void)
936 {
937 if (have_residual_data) {
938 unsigned long freq, divisor = 4;
939
940 if ( res->VitalProductData.ProcessorBusHz ) {
941 freq = res->VitalProductData.ProcessorBusHz;
942 printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
943 (freq/divisor)/1000000,
944 (freq/divisor)%1000000);
945 tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000);
946 tb_ticks_per_jiffy = freq / HZ / divisor;
947 }
948 }
949 else
950 todc_calibrate_decr();
951 }
952
953 static void __init
954 prep_init_IRQ(void)
955 {
956 unsigned int pci_viddid, pci_did;
957
958 if (OpenPIC_Addr != NULL) {
959 openpic_init(NUM_8259_INTERRUPTS);
960 /* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
961 openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
962 i8259_irq);
963 }
964
965 if (have_residual_data) {
966 i8259_init(residual_isapic_addr(), 0);
967 return;
968 }
969
970 /* If we have a Raven PCI bridge or a Hawk PCI bridge / Memory
971 * controller, we poll (as they have a different int-ack address). */
972 early_read_config_dword(NULL, 0, 0, PCI_VENDOR_ID, &pci_viddid);
973 pci_did = (pci_viddid & 0xffff0000) >> 16;
974 if (((pci_viddid & 0xffff) == PCI_VENDOR_ID_MOTOROLA)
975 && ((pci_did == PCI_DEVICE_ID_MOTOROLA_RAVEN)
976 || (pci_did == PCI_DEVICE_ID_MOTOROLA_HAWK)))
977 i8259_init(0, 0);
978 else
979 /* PCI interrupt ack address given in section 6.1.8 of the
980 * PReP specification. */
981 i8259_init(MPC10X_MAPA_PCI_INTACK_ADDR, 0);
982 }
983
984 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
985 /*
986 * IDE stuff.
987 */
988 static int
989 prep_ide_default_irq(unsigned long base)
990 {
991 switch (base) {
992 case 0x1f0: return 13;
993 case 0x170: return 13;
994 case 0x1e8: return 11;
995 case 0x168: return 10;
996 case 0xfff0: return 14; /* MCP(N)750 ide0 */
997 case 0xffe0: return 15; /* MCP(N)750 ide1 */
998 default: return 0;
999 }
1000 }
1001
1002 static unsigned long
1003 prep_ide_default_io_base(int index)
1004 {
1005 switch (index) {
1006 case 0: return 0x1f0;
1007 case 1: return 0x170;
1008 case 2: return 0x1e8;
1009 case 3: return 0x168;
1010 default:
1011 return 0;
1012 }
1013 }
1014 #endif
1015
1016 #ifdef CONFIG_SMP
1017 /* PReP (MTX) support */
1018 static int __init
1019 smp_prep_probe(void)
1020 {
1021 extern int mot_multi;
1022
1023 if (mot_multi) {
1024 openpic_request_IPIs();
1025 smp_hw_index[1] = 1;
1026 return 2;
1027 }
1028
1029 return 1;
1030 }
1031
1032 static void __init
1033 smp_prep_kick_cpu(int nr)
1034 {
1035 *(unsigned long *)KERNELBASE = nr;
1036 asm volatile("dcbf 0,%0"::"r"(KERNELBASE):"memory");
1037 printk("CPU1 released, waiting\n");
1038 }
1039
1040 static void __init
1041 smp_prep_setup_cpu(int cpu_nr)
1042 {
1043 if (OpenPIC_Addr)
1044 do_openpic_setup_cpu();
1045 }
1046
1047 static struct smp_ops_t prep_smp_ops = {
1048 smp_openpic_message_pass,
1049 smp_prep_probe,
1050 smp_prep_kick_cpu,
1051 smp_prep_setup_cpu,
1052 .give_timebase = smp_generic_give_timebase,
1053 .take_timebase = smp_generic_take_timebase,
1054 };
1055 #endif /* CONFIG_SMP */
1056
1057 /*
1058 * Setup the bat mappings we're going to load that cover
1059 * the io areas. RAM was mapped by mapin_ram().
1060 * -- Cort
1061 */
1062 static void __init
1063 prep_map_io(void)
1064 {
1065 io_block_mapping(0x80000000, PREP_ISA_IO_BASE, 0x10000000, _PAGE_IO);
1066 io_block_mapping(0xf0000000, PREP_ISA_MEM_BASE, 0x08000000, _PAGE_IO);
1067 }
1068
1069 static int __init
1070 prep_request_io(void)
1071 {
1072 if (_machine == _MACH_prep) {
1073 #ifdef CONFIG_NVRAM
1074 request_region(PREP_NVRAM_AS0, 0x8, "nvram");
1075 #endif
1076 request_region(0x00,0x20,"dma1");
1077 request_region(0x40,0x20,"timer");
1078 request_region(0x80,0x10,"dma page reg");
1079 request_region(0xc0,0x20,"dma2");
1080 }
1081
1082 return 0;
1083 }
1084
1085 device_initcall(prep_request_io);
1086
1087 void __init
1088 prep_init(unsigned long r3, unsigned long r4, unsigned long r5,
1089 unsigned long r6, unsigned long r7)
1090 {
1091 #ifdef CONFIG_PREP_RESIDUAL
1092 /* make a copy of residual data */
1093 if ( r3 ) {
1094 memcpy((void *)res,(void *)(r3+KERNELBASE),
1095 sizeof(RESIDUAL));
1096 }
1097 #endif
1098
1099 isa_io_base = PREP_ISA_IO_BASE;
1100 isa_mem_base = PREP_ISA_MEM_BASE;
1101 pci_dram_offset = PREP_PCI_DRAM_OFFSET;
1102 ISA_DMA_THRESHOLD = 0x00ffffff;
1103 DMA_MODE_READ = 0x44;
1104 DMA_MODE_WRITE = 0x48;
1105 ppc_do_canonicalize_irqs = 1;
1106
1107 /* figure out what kind of prep workstation we are */
1108 if (have_residual_data) {
1109 if ( !strncmp(res->VitalProductData.PrintableModel,"IBM",3) )
1110 _prep_type = _PREP_IBM;
1111 else
1112 _prep_type = _PREP_Motorola;
1113 }
1114 else {
1115 /* assume motorola if no residual (netboot?) */
1116 _prep_type = _PREP_Motorola;
1117 }
1118
1119 #ifdef CONFIG_PREP_RESIDUAL
1120 /* Switch off all residual data processing if the user requests it */
1121 if (strstr(cmd_line, "noresidual") != NULL)
1122 res = NULL;
1123 #endif
1124
1125 /* Initialise progress early to get maximum benefit */
1126 prep_set_bat();
1127 ibm_statusled_init();
1128
1129 ppc_md.setup_arch = prep_setup_arch;
1130 ppc_md.show_percpuinfo = prep_show_percpuinfo;
1131 ppc_md.show_cpuinfo = NULL; /* set in prep_setup_arch() */
1132 ppc_md.init_IRQ = prep_init_IRQ;
1133 /* this gets changed later on if we have an OpenPIC -- Cort */
1134 ppc_md.get_irq = i8259_irq;
1135
1136 ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot;
1137
1138 ppc_md.restart = prep_restart;
1139 ppc_md.power_off = NULL; /* set in prep_setup_arch() */
1140 ppc_md.halt = prep_halt;
1141
1142 ppc_md.nvram_read_val = prep_nvram_read_val;
1143 ppc_md.nvram_write_val = prep_nvram_write_val;
1144
1145 ppc_md.time_init = todc_time_init;
1146 if (_prep_type == _PREP_IBM) {
1147 ppc_md.rtc_read_val = todc_mc146818_read_val;
1148 ppc_md.rtc_write_val = todc_mc146818_write_val;
1149 TODC_INIT(TODC_TYPE_MC146818, RTC_PORT(0), NULL, RTC_PORT(1),
1150 8);
1151 } else {
1152 TODC_INIT(TODC_TYPE_MK48T59, PREP_NVRAM_AS0, PREP_NVRAM_AS1,
1153 PREP_NVRAM_DATA, 8);
1154 }
1155
1156 ppc_md.calibrate_decr = prep_calibrate_decr;
1157 ppc_md.set_rtc_time = todc_set_rtc_time;
1158 ppc_md.get_rtc_time = todc_get_rtc_time;
1159
1160 ppc_md.setup_io_mappings = prep_map_io;
1161
1162 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
1163 ppc_ide_md.default_irq = prep_ide_default_irq;
1164 ppc_ide_md.default_io_base = prep_ide_default_io_base;
1165 #endif
1166
1167 #ifdef CONFIG_SMP
1168 smp_ops = &prep_smp_ops;
1169 #endif /* CONFIG_SMP */
1170 }
linux kernel for loongson