[MIPS] Ocelot C: Fix large number of warnings.
[linux-2.6/linux-loongson.git] / arch / sh64 / mach-sim / setup.c
blobf09400c1ad1b4e8b19af701915955162097ccbd3
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
6 * arch/sh64/mach-sim/setup.c
8 * ST50 Simulator Platform Support
10 * This file handles the architecture-dependent parts of initialization
12 * Copyright (C) 2000, 2001 Paolo Alberelli
14 * lethal@linux-sh.org: 15th May 2003
15 * Use the generic procfs cpuinfo interface, just return a valid board name.
18 #include <linux/stddef.h>
19 #include <linux/init.h>
20 #include <linux/mm.h>
21 #include <linux/bootmem.h>
22 #include <linux/delay.h>
23 #include <linux/kernel.h>
24 #include <asm/addrspace.h>
25 #include <asm/processor.h>
26 #include <asm/platform.h>
27 #include <asm/io.h>
28 #include <asm/irq.h>
29 #include <asm/page.h>
31 #ifdef CONFIG_BLK_DEV_INITRD
32 #include "../rootfs/rootfs.h"
33 #endif
35 static __init void platform_monitor(void);
36 static __init void platform_setup(void);
37 static __init void platform_reserve(void);
40 #define PHYS_MEMORY CONFIG_MEMORY_SIZE_IN_MB*1024*1024
42 #if (PHYS_MEMORY < P1SEG_FOOTPRINT_RAM)
43 #error "Invalid kernel configuration. Physical memory below footprint requirements."
44 #endif
46 #define RAM_DISK_START CONFIG_MEMORY_START+P1SEG_INITRD_BLOCK /* Top of 4MB */
47 #ifdef PLATFORM_ROMFS_SIZE
48 #define RAM_DISK_SIZE (PAGE_ALIGN(PLATFORM_ROMFS_SIZE)) /* Variable Top */
49 #if ((RAM_DISK_START + RAM_DISK_SIZE) > (CONFIG_MEMORY_START + PHYS_MEMORY))
50 #error "Invalid kernel configuration. ROM RootFS exceeding physical memory."
51 #endif
52 #else
53 #define RAM_DISK_SIZE P1SEG_INITRD_BLOCK_SIZE /* Top of 4MB */
54 #endif
56 #define RES_COUNT(res) ((sizeof((res))/sizeof(struct resource)))
59 * Platform Dependent Interrupt Priorities.
62 /* Using defaults defined in irq.h */
63 #define RES NO_PRIORITY /* Disabled */
64 #define IR0 IRL0_PRIORITY /* IRLs */
65 #define IR1 IRL1_PRIORITY
66 #define IR2 IRL2_PRIORITY
67 #define IR3 IRL3_PRIORITY
68 #define PCA INTA_PRIORITY /* PCI Ints */
69 #define PCB INTB_PRIORITY
70 #define PCC INTC_PRIORITY
71 #define PCD INTD_PRIORITY
72 #define SER TOP_PRIORITY
73 #define ERR TOP_PRIORITY
74 #define PW0 TOP_PRIORITY
75 #define PW1 TOP_PRIORITY
76 #define PW2 TOP_PRIORITY
77 #define PW3 TOP_PRIORITY
78 #define DM0 NO_PRIORITY /* DMA Ints */
79 #define DM1 NO_PRIORITY
80 #define DM2 NO_PRIORITY
81 #define DM3 NO_PRIORITY
82 #define DAE NO_PRIORITY
83 #define TU0 TIMER_PRIORITY /* TMU Ints */
84 #define TU1 NO_PRIORITY
85 #define TU2 NO_PRIORITY
86 #define TI2 NO_PRIORITY
87 #define ATI NO_PRIORITY /* RTC Ints */
88 #define PRI NO_PRIORITY
89 #define CUI RTC_PRIORITY
90 #define ERI SCIF_PRIORITY /* SCIF Ints */
91 #define RXI SCIF_PRIORITY
92 #define BRI SCIF_PRIORITY
93 #define TXI SCIF_PRIORITY
94 #define ITI TOP_PRIORITY /* WDT Ints */
97 * Platform dependent structures: maps and parms block.
99 struct resource io_resources[] = {
100 /* Nothing yet .. */
103 struct resource kram_resources[] = {
104 { "Kernel code", 0, 0 }, /* These must be last in the array */
105 { "Kernel data", 0, 0 } /* These must be last in the array */
108 struct resource xram_resources[] = {
109 /* Nothing yet .. */
112 struct resource rom_resources[] = {
113 /* Nothing yet .. */
116 struct sh64_platform platform_parms = {
117 .readonly_rootfs = 1,
118 .initial_root_dev = 0x0100,
119 .loader_type = 1,
120 .initrd_start = RAM_DISK_START,
121 .initrd_size = RAM_DISK_SIZE,
122 .io_res_p = io_resources,
123 .io_res_count = RES_COUNT(io_resources),
124 .kram_res_p = kram_resources,
125 .kram_res_count = RES_COUNT(kram_resources),
126 .xram_res_p = xram_resources,
127 .xram_res_count = RES_COUNT(xram_resources),
128 .rom_res_p = rom_resources,
129 .rom_res_count = RES_COUNT(rom_resources),
132 int platform_int_priority[NR_IRQS] = {
133 IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */
134 RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */
135 PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */
136 RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */
137 TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */
138 RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */
139 RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */
140 RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */
143 void __init platform_setup(void)
145 /* Simulator platform leaves the decision to head.S */
146 platform_parms.fpu_flags = fpu_in_use;
149 void __init platform_monitor(void)
151 /* Nothing yet .. */
154 void __init platform_reserve(void)
156 /* Nothing yet .. */
159 const char *get_system_type(void)
161 return "SH-5 Simulator";