drivers/char/drm/r300_reg.h

   1 /**************************************************************************
   2
   3 Copyright (C) 2004-2005 Nicolai Haehnle et al.
   4
   5 Permission is hereby granted, free of charge, to any person obtaining a
   6 copy of this software and associated documentation files (the "Software"),
   7 to deal in the Software without restriction, including without limitation
   8 on the rights to use, copy, modify, merge, publish, distribute, sub
   9 license, and/or sell copies of the Software, and to permit persons to whom
  10 the Software is furnished to do so, subject to the following conditions:
  11
  12 The above copyright notice and this permission notice (including the next
  13 paragraph) shall be included in all copies or substantial portions of the
  14 Software.
  15
  16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19 THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20 DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21 OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22 USE OR OTHER DEALINGS IN THE SOFTWARE.
  23
  24 **************************************************************************/
  25
  26 #ifndef _R300_REG_H
  27 #define _R300_REG_H
  28
  29 #define R300_MC_INIT_MISC_LAT_TIMER     0x180
  30 #       define R300_MC_MISC__MC_CPR_INIT_LAT_SHIFT      0
  31 #       define R300_MC_MISC__MC_VF_INIT_LAT_SHIFT       4
  32 #       define R300_MC_MISC__MC_DISP0R_INIT_LAT_SHIFT   8
  33 #       define R300_MC_MISC__MC_DISP1R_INIT_LAT_SHIFT   12
  34 #       define R300_MC_MISC__MC_FIXED_INIT_LAT_SHIFT    16
  35 #       define R300_MC_MISC__MC_E2R_INIT_LAT_SHIFT      20
  36 #       define R300_MC_MISC__MC_SAME_PAGE_PRIO_SHIFT    24
  37 #       define R300_MC_MISC__MC_GLOBW_INIT_LAT_SHIFT    28
  38
  39 #define R300_MC_INIT_GFX_LAT_TIMER      0x154
  40 #       define R300_MC_MISC__MC_G3D0R_INIT_LAT_SHIFT    0
  41 #       define R300_MC_MISC__MC_G3D1R_INIT_LAT_SHIFT    4
  42 #       define R300_MC_MISC__MC_G3D2R_INIT_LAT_SHIFT    8
  43 #       define R300_MC_MISC__MC_G3D3R_INIT_LAT_SHIFT    12
  44 #       define R300_MC_MISC__MC_TX0R_INIT_LAT_SHIFT     16
  45 #       define R300_MC_MISC__MC_TX1R_INIT_LAT_SHIFT     20
  46 #       define R300_MC_MISC__MC_GLOBR_INIT_LAT_SHIFT    24
  47 #       define R300_MC_MISC__MC_GLOBW_FULL_LAT_SHIFT    28
  48
  49 /*
  50  * This file contains registers and constants for the R300. They have been
  51  * found mostly by examining command buffers captured using glxtest, as well
  52  * as by extrapolating some known registers and constants from the R200.
  53  * I am fairly certain that they are correct unless stated otherwise
  54  * in comments.
  55  */
  56
  57 #define R300_SE_VPORT_XSCALE                0x1D98
  58 #define R300_SE_VPORT_XOFFSET               0x1D9C
  59 #define R300_SE_VPORT_YSCALE                0x1DA0
  60 #define R300_SE_VPORT_YOFFSET               0x1DA4
  61 #define R300_SE_VPORT_ZSCALE                0x1DA8
  62 #define R300_SE_VPORT_ZOFFSET               0x1DAC
  63
  64
  65 /*
  66  * Vertex Array Processing (VAP) Control
  67  * Stolen from r200 code from Christoph Brill (It's a guess!)
  68  */
  69 #define R300_VAP_CNTL   0x2080
  70
  71 /* This register is written directly and also starts data section
  72  * in many 3d CP_PACKET3's
  73  */
  74 #define R300_VAP_VF_CNTL        0x2084
  75 #       define  R300_VAP_VF_CNTL__PRIM_TYPE__SHIFT              0
  76 #       define  R300_VAP_VF_CNTL__PRIM_NONE                     (0<<0)
  77 #       define  R300_VAP_VF_CNTL__PRIM_POINTS                   (1<<0)
  78 #       define  R300_VAP_VF_CNTL__PRIM_LINES                    (2<<0)
  79 #       define  R300_VAP_VF_CNTL__PRIM_LINE_STRIP               (3<<0)
  80 #       define  R300_VAP_VF_CNTL__PRIM_TRIANGLES                (4<<0)
  81 #       define  R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN             (5<<0)
  82 #       define  R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP           (6<<0)
  83 #       define  R300_VAP_VF_CNTL__PRIM_LINE_LOOP                (12<<0)
  84 #       define  R300_VAP_VF_CNTL__PRIM_QUADS                    (13<<0)
  85 #       define  R300_VAP_VF_CNTL__PRIM_QUAD_STRIP               (14<<0)
  86 #       define  R300_VAP_VF_CNTL__PRIM_POLYGON                  (15<<0)
  87
  88 #       define  R300_VAP_VF_CNTL__PRIM_WALK__SHIFT              4
  89         /* State based - direct writes to registers trigger vertex
  90            generation */
  91 #       define  R300_VAP_VF_CNTL__PRIM_WALK_STATE_BASED         (0<<4)
  92 #       define  R300_VAP_VF_CNTL__PRIM_WALK_INDICES             (1<<4)
  93 #       define  R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST         (2<<4)
  94 #       define  R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED     (3<<4)
  95
  96         /* I don't think I saw these three used.. */
  97 #       define  R300_VAP_VF_CNTL__COLOR_ORDER__SHIFT            6
  98 #       define  R300_VAP_VF_CNTL__TCL_OUTPUT_CTL_ENA__SHIFT     9
  99 #       define  R300_VAP_VF_CNTL__PROG_STREAM_ENA__SHIFT        10
 100
 101         /* index size - when not set the indices are assumed to be 16 bit */
 102 #       define  R300_VAP_VF_CNTL__INDEX_SIZE_32bit              (1<<11)
 103         /* number of vertices */
 104 #       define  R300_VAP_VF_CNTL__NUM_VERTICES__SHIFT           16
 105
 106 /* BEGIN: Wild guesses */
 107 #define R300_VAP_OUTPUT_VTX_FMT_0           0x2090
 108 #       define R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT     (1<<0)
 109 #       define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT   (1<<1)
 110 #       define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_1_PRESENT (1<<2)  /* GUESS */
 111 #       define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_2_PRESENT (1<<3)  /* GUESS */
 112 #       define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_3_PRESENT (1<<4)  /* GUESS */
 113 #       define R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT (1<<16) /* GUESS */
 114
 115 #define R300_VAP_OUTPUT_VTX_FMT_1           0x2094
 116         /* each of the following is 3 bits wide, specifies number
 117            of components */
 118 #       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_0_COMP_CNT_SHIFT 0
 119 #       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_1_COMP_CNT_SHIFT 3
 120 #       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_2_COMP_CNT_SHIFT 6
 121 #       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_3_COMP_CNT_SHIFT 9
 122 #       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_4_COMP_CNT_SHIFT 12
 123 #       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_5_COMP_CNT_SHIFT 15
 124 #       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_6_COMP_CNT_SHIFT 18
 125 #       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_7_COMP_CNT_SHIFT 21
 126 /* END: Wild guesses */
 127
 128 #define R300_SE_VTE_CNTL                  0x20b0
 129 #       define     R300_VPORT_X_SCALE_ENA                0x00000001
 130 #       define     R300_VPORT_X_OFFSET_ENA               0x00000002
 131 #       define     R300_VPORT_Y_SCALE_ENA                0x00000004
 132 #       define     R300_VPORT_Y_OFFSET_ENA               0x00000008
 133 #       define     R300_VPORT_Z_SCALE_ENA                0x00000010
 134 #       define     R300_VPORT_Z_OFFSET_ENA               0x00000020
 135 #       define     R300_VTX_XY_FMT                       0x00000100
 136 #       define     R300_VTX_Z_FMT                        0x00000200
 137 #       define     R300_VTX_W0_FMT                       0x00000400
 138 #       define     R300_VTX_W0_NORMALIZE                 0x00000800
 139 #       define     R300_VTX_ST_DENORMALIZED              0x00001000
 140
 141 /* BEGIN: Vertex data assembly - lots of uncertainties */
 142
 143 /* gap */
 144
 145 #define R300_VAP_CNTL_STATUS              0x2140
 146 #       define R300_VC_NO_SWAP                  (0 << 0)
 147 #       define R300_VC_16BIT_SWAP               (1 << 0)
 148 #       define R300_VC_32BIT_SWAP               (2 << 0)
 149 #       define R300_VAP_TCL_BYPASS              (1 << 8)
 150
 151 /* gap */
 152
 153 /* Where do we get our vertex data?
 154  *
 155  * Vertex data either comes either from immediate mode registers or from
 156  * vertex arrays.
 157  * There appears to be no mixed mode (though we can force the pitch of
 158  * vertex arrays to 0, effectively reusing the same element over and over
 159  * again).
 160  *
 161  * Immediate mode is controlled by the INPUT_CNTL registers. I am not sure
 162  * if these registers influence vertex array processing.
 163  *
 164  * Vertex arrays are controlled via the 3D_LOAD_VBPNTR packet3.
 165  *
 166  * In both cases, vertex attributes are then passed through INPUT_ROUTE.
 167  *
 168  * Beginning with INPUT_ROUTE_0_0 is a list of WORDs that route vertex data
 169  * into the vertex processor's input registers.
 170  * The first word routes the first input, the second word the second, etc.
 171  * The corresponding input is routed into the register with the given index.
 172  * The list is ended by a word with INPUT_ROUTE_END set.
 173  *
 174  * Always set COMPONENTS_4 in immediate mode.
 175  */
 176
 177 #define R300_VAP_INPUT_ROUTE_0_0            0x2150
 178 #       define R300_INPUT_ROUTE_COMPONENTS_1     (0 << 0)
 179 #       define R300_INPUT_ROUTE_COMPONENTS_2     (1 << 0)
 180 #       define R300_INPUT_ROUTE_COMPONENTS_3     (2 << 0)
 181 #       define R300_INPUT_ROUTE_COMPONENTS_4     (3 << 0)
 182 #       define R300_INPUT_ROUTE_COMPONENTS_RGBA  (4 << 0) /* GUESS */
 183 #       define R300_VAP_INPUT_ROUTE_IDX_SHIFT    8
 184 #       define R300_VAP_INPUT_ROUTE_IDX_MASK     (31 << 8) /* GUESS */
 185 #       define R300_VAP_INPUT_ROUTE_END          (1 << 13)
 186 #       define R300_INPUT_ROUTE_IMMEDIATE_MODE   (0 << 14) /* GUESS */
 187 #       define R300_INPUT_ROUTE_FLOAT            (1 << 14) /* GUESS */
 188 #       define R300_INPUT_ROUTE_UNSIGNED_BYTE    (2 << 14) /* GUESS */
 189 #       define R300_INPUT_ROUTE_FLOAT_COLOR      (3 << 14) /* GUESS */
 190 #define R300_VAP_INPUT_ROUTE_0_1            0x2154
 191 #define R300_VAP_INPUT_ROUTE_0_2            0x2158
 192 #define R300_VAP_INPUT_ROUTE_0_3            0x215C
 193 #define R300_VAP_INPUT_ROUTE_0_4            0x2160
 194 #define R300_VAP_INPUT_ROUTE_0_5            0x2164
 195 #define R300_VAP_INPUT_ROUTE_0_6            0x2168
 196 #define R300_VAP_INPUT_ROUTE_0_7            0x216C
 197
 198 /* gap */
 199
 200 /* Notes:
 201  *  - always set up to produce at least two attributes:
 202  *    if vertex program uses only position, fglrx will set normal, too
 203  *  - INPUT_CNTL_0_COLOR and INPUT_CNTL_COLOR bits are always equal.
 204  */
 205 #define R300_VAP_INPUT_CNTL_0               0x2180
 206 #       define R300_INPUT_CNTL_0_COLOR           0x00000001
 207 #define R300_VAP_INPUT_CNTL_1               0x2184
 208 #       define R300_INPUT_CNTL_POS               0x00000001
 209 #       define R300_INPUT_CNTL_NORMAL            0x00000002
 210 #       define R300_INPUT_CNTL_COLOR             0x00000004
 211 #       define R300_INPUT_CNTL_TC0               0x00000400
 212 #       define R300_INPUT_CNTL_TC1               0x00000800
 213 #       define R300_INPUT_CNTL_TC2               0x00001000 /* GUESS */
 214 #       define R300_INPUT_CNTL_TC3               0x00002000 /* GUESS */
 215 #       define R300_INPUT_CNTL_TC4               0x00004000 /* GUESS */
 216 #       define R300_INPUT_CNTL_TC5               0x00008000 /* GUESS */
 217 #       define R300_INPUT_CNTL_TC6               0x00010000 /* GUESS */
 218 #       define R300_INPUT_CNTL_TC7               0x00020000 /* GUESS */
 219
 220 /* gap */
 221
 222 /* Words parallel to INPUT_ROUTE_0; All words that are active in INPUT_ROUTE_0
 223  * are set to a swizzling bit pattern, other words are 0.
 224  *
 225  * In immediate mode, the pattern is always set to xyzw. In vertex array
 226  * mode, the swizzling pattern is e.g. used to set zw components in texture
 227  * coordinates with only tweo components.
 228  */
 229 #define R300_VAP_INPUT_ROUTE_1_0            0x21E0
 230 #       define R300_INPUT_ROUTE_SELECT_X    0
 231 #       define R300_INPUT_ROUTE_SELECT_Y    1
 232 #       define R300_INPUT_ROUTE_SELECT_Z    2
 233 #       define R300_INPUT_ROUTE_SELECT_W    3
 234 #       define R300_INPUT_ROUTE_SELECT_ZERO 4
 235 #       define R300_INPUT_ROUTE_SELECT_ONE  5
 236 #       define R300_INPUT_ROUTE_SELECT_MASK 7
 237 #       define R300_INPUT_ROUTE_X_SHIFT     0
 238 #       define R300_INPUT_ROUTE_Y_SHIFT     3
 239 #       define R300_INPUT_ROUTE_Z_SHIFT     6
 240 #       define R300_INPUT_ROUTE_W_SHIFT     9
 241 #       define R300_INPUT_ROUTE_ENABLE      (15 << 12)
 242 #define R300_VAP_INPUT_ROUTE_1_1            0x21E4
 243 #define R300_VAP_INPUT_ROUTE_1_2            0x21E8
 244 #define R300_VAP_INPUT_ROUTE_1_3            0x21EC
 245 #define R300_VAP_INPUT_ROUTE_1_4            0x21F0
 246 #define R300_VAP_INPUT_ROUTE_1_5            0x21F4
 247 #define R300_VAP_INPUT_ROUTE_1_6            0x21F8
 248 #define R300_VAP_INPUT_ROUTE_1_7            0x21FC
 249
 250 /* END: Vertex data assembly */
 251
 252 /* gap */
 253
 254 /* BEGIN: Upload vertex program and data */
 255
 256 /*
 257  * The programmable vertex shader unit has a memory bank of unknown size
 258  * that can be written to in 16 byte units by writing the address into
 259  * UPLOAD_ADDRESS, followed by data in UPLOAD_DATA (multiples of 4 DWORDs).
 260  *
 261  * Pointers into the memory bank are always in multiples of 16 bytes.
 262  *
 263  * The memory bank is divided into areas with fixed meaning.
 264  *
 265  * Starting at address UPLOAD_PROGRAM: Vertex program instructions.
 266  * Native limits reported by drivers from ATI suggest size 256 (i.e. 4KB),
 267  * whereas the difference between known addresses suggests size 512.
 268  *
 269  * Starting at address UPLOAD_PARAMETERS: Vertex program parameters.
 270  * Native reported limits and the VPI layout suggest size 256, whereas
 271  * difference between known addresses suggests size 512.
 272  *
 273  * At address UPLOAD_POINTSIZE is a vector (0, 0, ps, 0), where ps is the
 274  * floating point pointsize. The exact purpose of this state is uncertain,
 275  * as there is also the R300_RE_POINTSIZE register.
 276  *
 277  * Multiple vertex programs and parameter sets can be loaded at once,
 278  * which could explain the size discrepancy.
 279  */
 280 #define R300_VAP_PVS_UPLOAD_ADDRESS         0x2200
 281 #       define R300_PVS_UPLOAD_PROGRAM           0x00000000
 282 #       define R300_PVS_UPLOAD_PARAMETERS        0x00000200
 283 #       define R300_PVS_UPLOAD_POINTSIZE         0x00000406
 284
 285 /* gap */
 286
 287 #define R300_VAP_PVS_UPLOAD_DATA            0x2208
 288
 289 /* END: Upload vertex program and data */
 290
 291 /* gap */
 292
 293 /* I do not know the purpose of this register. However, I do know that
 294  * it is set to 221C_CLEAR for clear operations and to 221C_NORMAL
 295  * for normal rendering.
 296  */
 297 #define R300_VAP_UNKNOWN_221C               0x221C
 298 #       define R300_221C_NORMAL                  0x00000000
 299 #       define R300_221C_CLEAR                   0x0001C000
 300
 301 /* These seem to be per-pixel and per-vertex X and Y clipping planes. The first
 302  * plane is per-pixel and the second plane is per-vertex.
 303  *
 304  * This was determined by experimentation alone but I believe it is correct.
 305  *
 306  * These registers are called X_QUAD0_1_FL to X_QUAD0_4_FL by glxtest.
 307  */
 308 #define R300_VAP_CLIP_X_0                   0x2220
 309 #define R300_VAP_CLIP_X_1                   0x2224
 310 #define R300_VAP_CLIP_Y_0                   0x2228
 311 #define R300_VAP_CLIP_Y_1                   0x2230
 312
 313 /* gap */
 314
 315 /* Sometimes, END_OF_PKT and 0x2284=0 are the only commands sent between
 316  * rendering commands and overwriting vertex program parameters.
 317  * Therefore, I suspect writing zero to 0x2284 synchronizes the engine and
 318  * avoids bugs caused by still running shaders reading bad data from memory.
 319  */
 320 #define R300_VAP_PVS_WAITIDLE               0x2284 /* GUESS */
 321
 322 /* Absolutely no clue what this register is about. */
 323 #define R300_VAP_UNKNOWN_2288               0x2288
 324 #       define R300_2288_R300                    0x00750000 /* -- nh */
 325 #       define R300_2288_RV350                   0x0000FFFF /* -- Vladimir */
 326
 327 /* gap */
 328
 329 /* Addresses are relative to the vertex program instruction area of the
 330  * memory bank. PROGRAM_END points to the last instruction of the active
 331  * program
 332  *
 333  * The meaning of the two UNKNOWN fields is obviously not known. However,
 334  * experiments so far have shown that both *must* point to an instruction
 335  * inside the vertex program, otherwise the GPU locks up.
 336  *
 337  * fglrx usually sets CNTL_3_UNKNOWN to the end of the program and
 338  * R300_PVS_CNTL_1_POS_END_SHIFT points to instruction where last write to
 339  * position takes place.
 340  *
 341  * Most likely this is used to ignore rest of the program in cases
 342  * where group of verts arent visible. For some reason this "section"
 343  * is sometimes accepted other instruction that have no relationship with
 344  * position calculations.
 345  */
 346 #define R300_VAP_PVS_CNTL_1                 0x22D0
 347 #       define R300_PVS_CNTL_1_PROGRAM_START_SHIFT   0
 348 #       define R300_PVS_CNTL_1_POS_END_SHIFT         10
 349 #       define R300_PVS_CNTL_1_PROGRAM_END_SHIFT     20
 350 /* Addresses are relative the the vertex program parameters area. */
 351 #define R300_VAP_PVS_CNTL_2                 0x22D4
 352 #       define R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT 0
 353 #       define R300_PVS_CNTL_2_PARAM_COUNT_SHIFT  16
 354 #define R300_VAP_PVS_CNTL_3                0x22D8
 355 #       define R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT 10
 356 #       define R300_PVS_CNTL_3_PROGRAM_UNKNOWN2_SHIFT 0
 357
 358 /* The entire range from 0x2300 to 0x2AC inclusive seems to be used for
 359  * immediate vertices
 360  */
 361 #define R300_VAP_VTX_COLOR_R                0x2464
 362 #define R300_VAP_VTX_COLOR_G                0x2468
 363 #define R300_VAP_VTX_COLOR_B                0x246C
 364 #define R300_VAP_VTX_POS_0_X_1              0x2490 /* used for glVertex2*() */
 365 #define R300_VAP_VTX_POS_0_Y_1              0x2494
 366 #define R300_VAP_VTX_COLOR_PKD              0x249C /* RGBA */
 367 #define R300_VAP_VTX_POS_0_X_2              0x24A0 /* used for glVertex3*() */
 368 #define R300_VAP_VTX_POS_0_Y_2              0x24A4
 369 #define R300_VAP_VTX_POS_0_Z_2              0x24A8
 370 /* write 0 to indicate end of packet? */
 371 #define R300_VAP_VTX_END_OF_PKT             0x24AC
 372
 373 /* gap */
 374
 375 /* These are values from r300_reg/r300_reg.h - they are known to be correct
 376  * and are here so we can use one register file instead of several
 377  * - Vladimir
 378  */
 379 #define R300_GB_VAP_RASTER_VTX_FMT_0    0x4000
 380 #       define R300_GB_VAP_RASTER_VTX_FMT_0__POS_PRESENT        (1<<0)
 381 #       define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_0_PRESENT    (1<<1)
 382 #       define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_1_PRESENT    (1<<2)
 383 #       define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_2_PRESENT    (1<<3)
 384 #       define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_3_PRESENT    (1<<4)
 385 #       define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_SPACE        (0xf<<5)
 386 #       define R300_GB_VAP_RASTER_VTX_FMT_0__PT_SIZE_PRESENT    (0x1<<16)
 387
 388 #define R300_GB_VAP_RASTER_VTX_FMT_1    0x4004
 389         /* each of the following is 3 bits wide, specifies number
 390            of components */
 391 #       define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_0_COMP_CNT_SHIFT       0
 392 #       define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_1_COMP_CNT_SHIFT       3
 393 #       define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_2_COMP_CNT_SHIFT       6
 394 #       define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_3_COMP_CNT_SHIFT       9
 395 #       define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_4_COMP_CNT_SHIFT       12
 396 #       define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_5_COMP_CNT_SHIFT       15
 397 #       define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_6_COMP_CNT_SHIFT       18
 398 #       define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_7_COMP_CNT_SHIFT       21
 399
 400 /* UNK30 seems to enables point to quad transformation on textures
 401  * (or something closely related to that).
 402  * This bit is rather fatal at the time being due to lackings at pixel
 403  * shader side
 404  */
 405 #define R300_GB_ENABLE  0x4008
 406 #       define R300_GB_POINT_STUFF_ENABLE       (1<<0)
 407 #       define R300_GB_LINE_STUFF_ENABLE        (1<<1)
 408 #       define R300_GB_TRIANGLE_STUFF_ENABLE    (1<<2)
 409 #       define R300_GB_STENCIL_AUTO_ENABLE      (1<<4)
 410 #       define R300_GB_UNK31                    (1<<31)
 411         /* each of the following is 2 bits wide */
 412 #define R300_GB_TEX_REPLICATE   0
 413 #define R300_GB_TEX_ST          1
 414 #define R300_GB_TEX_STR         2
 415 #       define R300_GB_TEX0_SOURCE_SHIFT        16
 416 #       define R300_GB_TEX1_SOURCE_SHIFT        18
 417 #       define R300_GB_TEX2_SOURCE_SHIFT        20
 418 #       define R300_GB_TEX3_SOURCE_SHIFT        22
 419 #       define R300_GB_TEX4_SOURCE_SHIFT        24
 420 #       define R300_GB_TEX5_SOURCE_SHIFT        26
 421 #       define R300_GB_TEX6_SOURCE_SHIFT        28
 422 #       define R300_GB_TEX7_SOURCE_SHIFT        30
 423
 424 /* MSPOS - positions for multisample antialiasing (?) */
 425 #define R300_GB_MSPOS0  0x4010
 426         /* shifts - each of the fields is 4 bits */
 427 #       define R300_GB_MSPOS0__MS_X0_SHIFT      0
 428 #       define R300_GB_MSPOS0__MS_Y0_SHIFT      4
 429 #       define R300_GB_MSPOS0__MS_X1_SHIFT      8
 430 #       define R300_GB_MSPOS0__MS_Y1_SHIFT      12
 431 #       define R300_GB_MSPOS0__MS_X2_SHIFT      16
 432 #       define R300_GB_MSPOS0__MS_Y2_SHIFT      20
 433 #       define R300_GB_MSPOS0__MSBD0_Y          24
 434 #       define R300_GB_MSPOS0__MSBD0_X          28
 435
 436 #define R300_GB_MSPOS1  0x4014
 437 #       define R300_GB_MSPOS1__MS_X3_SHIFT      0
 438 #       define R300_GB_MSPOS1__MS_Y3_SHIFT      4
 439 #       define R300_GB_MSPOS1__MS_X4_SHIFT      8
 440 #       define R300_GB_MSPOS1__MS_Y4_SHIFT      12
 441 #       define R300_GB_MSPOS1__MS_X5_SHIFT      16
 442 #       define R300_GB_MSPOS1__MS_Y5_SHIFT      20
 443 #       define R300_GB_MSPOS1__MSBD1            24
 444
 445
 446 #define R300_GB_TILE_CONFIG     0x4018
 447 #       define R300_GB_TILE_ENABLE      (1<<0)
 448 #       define R300_GB_TILE_PIPE_COUNT_RV300    0
 449 #       define R300_GB_TILE_PIPE_COUNT_R300     (3<<1)
 450 #       define R300_GB_TILE_PIPE_COUNT_R420     (7<<1)
 451 #       define R300_GB_TILE_PIPE_COUNT_RV410    (3<<1)
 452 #       define R300_GB_TILE_SIZE_8              0
 453 #       define R300_GB_TILE_SIZE_16             (1<<4)
 454 #       define R300_GB_TILE_SIZE_32             (2<<4)
 455 #       define R300_GB_SUPER_SIZE_1             (0<<6)
 456 #       define R300_GB_SUPER_SIZE_2             (1<<6)
 457 #       define R300_GB_SUPER_SIZE_4             (2<<6)
 458 #       define R300_GB_SUPER_SIZE_8             (3<<6)
 459 #       define R300_GB_SUPER_SIZE_16            (4<<6)
 460 #       define R300_GB_SUPER_SIZE_32            (5<<6)
 461 #       define R300_GB_SUPER_SIZE_64            (6<<6)
 462 #       define R300_GB_SUPER_SIZE_128           (7<<6)
 463 #       define R300_GB_SUPER_X_SHIFT            9       /* 3 bits wide */
 464 #       define R300_GB_SUPER_Y_SHIFT            12      /* 3 bits wide */
 465 #       define R300_GB_SUPER_TILE_A             0
 466 #       define R300_GB_SUPER_TILE_B             (1<<15)
 467 #       define R300_GB_SUBPIXEL_1_12            0
 468 #       define R300_GB_SUBPIXEL_1_16            (1<<16)
 469
 470 #define R300_GB_FIFO_SIZE       0x4024
 471         /* each of the following is 2 bits wide */
 472 #define R300_GB_FIFO_SIZE_32    0
 473 #define R300_GB_FIFO_SIZE_64    1
 474 #define R300_GB_FIFO_SIZE_128   2
 475 #define R300_GB_FIFO_SIZE_256   3
 476 #       define R300_SC_IFIFO_SIZE_SHIFT 0
 477 #       define R300_SC_TZFIFO_SIZE_SHIFT        2
 478 #       define R300_SC_BFIFO_SIZE_SHIFT 4
 479
 480 #       define R300_US_OFIFO_SIZE_SHIFT 12
 481 #       define R300_US_WFIFO_SIZE_SHIFT 14
 482         /* the following use the same constants as above, but meaning is
 483            is times 2 (i.e. instead of 32 words it means 64 */
 484 #       define R300_RS_TFIFO_SIZE_SHIFT 6
 485 #       define R300_RS_CFIFO_SIZE_SHIFT 8
 486 #       define R300_US_RAM_SIZE_SHIFT           10
 487         /* watermarks, 3 bits wide */
 488 #       define R300_RS_HIGHWATER_COL_SHIFT      16
 489 #       define R300_RS_HIGHWATER_TEX_SHIFT      19
 490 #       define R300_OFIFO_HIGHWATER_SHIFT       22      /* two bits only */
 491 #       define R300_CUBE_FIFO_HIGHWATER_COL_SHIFT       24
 492
 493 #define R300_GB_SELECT  0x401C
 494 #       define R300_GB_FOG_SELECT_C0A           0
 495 #       define R300_GB_FOG_SELECT_C1A           1
 496 #       define R300_GB_FOG_SELECT_C2A           2
 497 #       define R300_GB_FOG_SELECT_C3A           3
 498 #       define R300_GB_FOG_SELECT_1_1_W 4
 499 #       define R300_GB_FOG_SELECT_Z             5
 500 #       define R300_GB_DEPTH_SELECT_Z           0
 501 #       define R300_GB_DEPTH_SELECT_1_1_W       (1<<3)
 502 #       define R300_GB_W_SELECT_1_W             0
 503 #       define R300_GB_W_SELECT_1               (1<<4)
 504
 505 #define R300_GB_AA_CONFIG               0x4020
 506 #       define R300_AA_DISABLE                  0x00
 507 #       define R300_AA_ENABLE                   0x01
 508 #       define R300_AA_SUBSAMPLES_2             0
 509 #       define R300_AA_SUBSAMPLES_3             (1<<1)
 510 #       define R300_AA_SUBSAMPLES_4             (2<<1)
 511 #       define R300_AA_SUBSAMPLES_6             (3<<1)
 512
 513 /* gap */
 514
 515 /* Zero to flush caches. */
 516 #define R300_TX_CNTL                        0x4100
 517 #define R300_TX_FLUSH                       0x0
 518
 519 /* The upper enable bits are guessed, based on fglrx reported limits. */
 520 #define R300_TX_ENABLE                      0x4104
 521 #       define R300_TX_ENABLE_0                  (1 << 0)
 522 #       define R300_TX_ENABLE_1                  (1 << 1)
 523 #       define R300_TX_ENABLE_2                  (1 << 2)
 524 #       define R300_TX_ENABLE_3                  (1 << 3)
 525 #       define R300_TX_ENABLE_4                  (1 << 4)
 526 #       define R300_TX_ENABLE_5                  (1 << 5)
 527 #       define R300_TX_ENABLE_6                  (1 << 6)
 528 #       define R300_TX_ENABLE_7                  (1 << 7)
 529 #       define R300_TX_ENABLE_8                  (1 << 8)
 530 #       define R300_TX_ENABLE_9                  (1 << 9)
 531 #       define R300_TX_ENABLE_10                 (1 << 10)
 532 #       define R300_TX_ENABLE_11                 (1 << 11)
 533 #       define R300_TX_ENABLE_12                 (1 << 12)
 534 #       define R300_TX_ENABLE_13                 (1 << 13)
 535 #       define R300_TX_ENABLE_14                 (1 << 14)
 536 #       define R300_TX_ENABLE_15                 (1 << 15)
 537
 538 /* The pointsize is given in multiples of 6. The pointsize can be
 539  * enormous: Clear() renders a single point that fills the entire
 540  * framebuffer.
 541  */
 542 #define R300_RE_POINTSIZE                   0x421C
 543 #       define R300_POINTSIZE_Y_SHIFT            0
 544 #       define R300_POINTSIZE_Y_MASK             (0xFFFF << 0) /* GUESS */
 545 #       define R300_POINTSIZE_X_SHIFT            16
 546 #       define R300_POINTSIZE_X_MASK             (0xFFFF << 16) /* GUESS */
 547 #       define R300_POINTSIZE_MAX             (R300_POINTSIZE_Y_MASK / 6)
 548
 549 /* The line width is given in multiples of 6.
 550  * In default mode lines are classified as vertical lines.
 551  * HO: horizontal
 552  * VE: vertical or horizontal
 553  * HO & VE: no classification
 554  */
 555 #define R300_RE_LINE_CNT                      0x4234
 556 #       define R300_LINESIZE_SHIFT            0
 557 #       define R300_LINESIZE_MASK             (0xFFFF << 0) /* GUESS */
 558 #       define R300_LINESIZE_MAX             (R300_LINESIZE_MASK / 6)
 559 #       define R300_LINE_CNT_HO               (1 << 16)
 560 #       define R300_LINE_CNT_VE               (1 << 17)
 561
 562 /* Some sort of scale or clamp value for texcoordless textures. */
 563 #define R300_RE_UNK4238                       0x4238
 564
 565 /* Something shade related */
 566 #define R300_RE_SHADE                         0x4274
 567
 568 #define R300_RE_SHADE_MODEL                   0x4278
 569 #       define R300_RE_SHADE_MODEL_SMOOTH     0x3aaaa
 570 #       define R300_RE_SHADE_MODEL_FLAT       0x39595
 571
 572 /* Dangerous */
 573 #define R300_RE_POLYGON_MODE                  0x4288
 574 #       define R300_PM_ENABLED                (1 << 0)
 575 #       define R300_PM_FRONT_POINT            (0 << 0)
 576 #       define R300_PM_BACK_POINT             (0 << 0)
 577 #       define R300_PM_FRONT_LINE             (1 << 4)
 578 #       define R300_PM_FRONT_FILL             (1 << 5)
 579 #       define R300_PM_BACK_LINE              (1 << 7)
 580 #       define R300_PM_BACK_FILL              (1 << 8)
 581
 582 /* Fog parameters */
 583 #define R300_RE_FOG_SCALE                     0x4294
 584 #define R300_RE_FOG_START                     0x4298
 585
 586 /* Not sure why there are duplicate of factor and constant values.
 587  * My best guess so far is that there are separate zbiases for test and write.
 588  * Ordering might be wrong.
 589  * Some of the tests indicate that fgl has a fallback implementation of zbias
 590  * via pixel shaders.
 591  */
 592 #define R300_RE_ZBIAS_CNTL                    0x42A0 /* GUESS */
 593 #define R300_RE_ZBIAS_T_FACTOR                0x42A4
 594 #define R300_RE_ZBIAS_T_CONSTANT              0x42A8
 595 #define R300_RE_ZBIAS_W_FACTOR                0x42AC
 596 #define R300_RE_ZBIAS_W_CONSTANT              0x42B0
 597
 598 /* This register needs to be set to (1<<1) for RV350 to correctly
 599  * perform depth test (see --vb-triangles in r300_demo)
 600  * Don't know about other chips. - Vladimir
 601  * This is set to 3 when GL_POLYGON_OFFSET_FILL is on.
 602  * My guess is that there are two bits for each zbias primitive
 603  * (FILL, LINE, POINT).
 604  *  One to enable depth test and one for depth write.
 605  * Yet this doesnt explain why depth writes work ...
 606  */
 607 #define R300_RE_OCCLUSION_CNTL              0x42B4
 608 #       define R300_OCCLUSION_ON                (1<<1)
 609
 610 #define R300_RE_CULL_CNTL                   0x42B8
 611 #       define R300_CULL_FRONT                   (1 << 0)
 612 #       define R300_CULL_BACK                    (1 << 1)
 613 #       define R300_FRONT_FACE_CCW               (0 << 2)
 614 #       define R300_FRONT_FACE_CW                (1 << 2)
 615
 616
 617 /* BEGIN: Rasterization / Interpolators - many guesses */
 618
 619 /* 0_UNKNOWN_18 has always been set except for clear operations.
 620  * TC_CNT is the number of incoming texture coordinate sets (i.e. it depends
 621  * on the vertex program, *not* the fragment program)
 622  */
 623 #define R300_RS_CNTL_0                      0x4300
 624 #       define R300_RS_CNTL_TC_CNT_SHIFT         2
 625 #       define R300_RS_CNTL_TC_CNT_MASK          (7 << 2)
 626         /* number of color interpolators used */
 627 #       define R300_RS_CNTL_CI_CNT_SHIFT         7
 628 #       define R300_RS_CNTL_0_UNKNOWN_18         (1 << 18)
 629         /* Guess: RS_CNTL_1 holds the index of the highest used RS_ROUTE_n
 630            register. */
 631 #define R300_RS_CNTL_1                      0x4304
 632
 633 /* gap */
 634
 635 /* Only used for texture coordinates.
 636  * Use the source field to route texture coordinate input from the
 637  * vertex program to the desired interpolator. Note that the source
 638  * field is relative to the outputs the vertex program *actually*
 639  * writes. If a vertex program only writes texcoord[1], this will
 640  * be source index 0.
 641  * Set INTERP_USED on all interpolators that produce data used by
 642  * the fragment program. INTERP_USED looks like a swizzling mask,
 643  * but I haven't seen it used that way.
 644  *
 645  * Note: The _UNKNOWN constants are always set in their respective
 646  * register. I don't know if this is necessary.
 647  */
 648 #define R300_RS_INTERP_0                    0x4310
 649 #define R300_RS_INTERP_1                    0x4314
 650 #       define R300_RS_INTERP_1_UNKNOWN          0x40
 651 #define R300_RS_INTERP_2                    0x4318
 652 #       define R300_RS_INTERP_2_UNKNOWN          0x80
 653 #define R300_RS_INTERP_3                    0x431C
 654 #       define R300_RS_INTERP_3_UNKNOWN          0xC0
 655 #define R300_RS_INTERP_4                    0x4320
 656 #define R300_RS_INTERP_5                    0x4324
 657 #define R300_RS_INTERP_6                    0x4328
 658 #define R300_RS_INTERP_7                    0x432C
 659 #       define R300_RS_INTERP_SRC_SHIFT          2
 660 #       define R300_RS_INTERP_SRC_MASK           (7 << 2)
 661 #       define R300_RS_INTERP_USED               0x00D10000
 662
 663 /* These DWORDs control how vertex data is routed into fragment program
 664  * registers, after interpolators.
 665  */
 666 #define R300_RS_ROUTE_0                     0x4330
 667 #define R300_RS_ROUTE_1                     0x4334
 668 #define R300_RS_ROUTE_2                     0x4338
 669 #define R300_RS_ROUTE_3                     0x433C /* GUESS */
 670 #define R300_RS_ROUTE_4                     0x4340 /* GUESS */
 671 #define R300_RS_ROUTE_5                     0x4344 /* GUESS */
 672 #define R300_RS_ROUTE_6                     0x4348 /* GUESS */
 673 #define R300_RS_ROUTE_7                     0x434C /* GUESS */
 674 #       define R300_RS_ROUTE_SOURCE_INTERP_0     0
 675 #       define R300_RS_ROUTE_SOURCE_INTERP_1     1
 676 #       define R300_RS_ROUTE_SOURCE_INTERP_2     2
 677 #       define R300_RS_ROUTE_SOURCE_INTERP_3     3
 678 #       define R300_RS_ROUTE_SOURCE_INTERP_4     4
 679 #       define R300_RS_ROUTE_SOURCE_INTERP_5     5 /* GUESS */
 680 #       define R300_RS_ROUTE_SOURCE_INTERP_6     6 /* GUESS */
 681 #       define R300_RS_ROUTE_SOURCE_INTERP_7     7 /* GUESS */
 682 #       define R300_RS_ROUTE_ENABLE              (1 << 3) /* GUESS */
 683 #       define R300_RS_ROUTE_DEST_SHIFT          6
 684 #       define R300_RS_ROUTE_DEST_MASK           (31 << 6) /* GUESS */
 685
 686 /* Special handling for color: When the fragment program uses color,
 687  * the ROUTE_0_COLOR bit is set and ROUTE_0_COLOR_DEST contains the
 688  * color register index.
 689  *
 690  * Apperently you may set the R300_RS_ROUTE_0_COLOR bit, but not provide any
 691  * R300_RS_ROUTE_0_COLOR_DEST value; this setup is used for clearing the state.
 692  * See r300_ioctl.c:r300EmitClearState. I'm not sure if this setup is strictly
 693  * correct or not. - Oliver.
 694  */
 695 #       define R300_RS_ROUTE_0_COLOR             (1 << 14)
 696 #       define R300_RS_ROUTE_0_COLOR_DEST_SHIFT  17
 697 #       define R300_RS_ROUTE_0_COLOR_DEST_MASK   (31 << 17) /* GUESS */
 698 /* As above, but for secondary color */
 699 #               define R300_RS_ROUTE_1_COLOR1            (1 << 14)
 700 #               define R300_RS_ROUTE_1_COLOR1_DEST_SHIFT 17
 701 #               define R300_RS_ROUTE_1_COLOR1_DEST_MASK  (31 << 17)
 702 #               define R300_RS_ROUTE_1_UNKNOWN11         (1 << 11)
 703 /* END: Rasterization / Interpolators - many guesses */
 704
 705 /* BEGIN: Scissors and cliprects */
 706
 707 /* There are four clipping rectangles. Their corner coordinates are inclusive.
 708  * Every pixel is assigned a number from 0 and 15 by setting bits 0-3 depending
 709  * on whether the pixel is inside cliprects 0-3, respectively. For example,
 710  * if a pixel is inside cliprects 0 and 1, but outside 2 and 3, it is assigned
 711  * the number 3 (binary 0011).
 712  * Iff the bit corresponding to the pixel's number in RE_CLIPRECT_CNTL is set,
 713  * the pixel is rasterized.
 714  *
 715  * In addition to this, there is a scissors rectangle. Only pixels inside the
 716  * scissors rectangle are drawn. (coordinates are inclusive)
 717  *
 718  * For some reason, the top-left corner of the framebuffer is at (1440, 1440)
 719  * for the purpose of clipping and scissors.
 720  */
 721 #define R300_RE_CLIPRECT_TL_0               0x43B0
 722 #define R300_RE_CLIPRECT_BR_0               0x43B4
 723 #define R300_RE_CLIPRECT_TL_1               0x43B8
 724 #define R300_RE_CLIPRECT_BR_1               0x43BC
 725 #define R300_RE_CLIPRECT_TL_2               0x43C0
 726 #define R300_RE_CLIPRECT_BR_2               0x43C4
 727 #define R300_RE_CLIPRECT_TL_3               0x43C8
 728 #define R300_RE_CLIPRECT_BR_3               0x43CC
 729 #       define R300_CLIPRECT_OFFSET              1440
 730 #       define R300_CLIPRECT_MASK                0x1FFF
 731 #       define R300_CLIPRECT_X_SHIFT             0
 732 #       define R300_CLIPRECT_X_MASK              (0x1FFF << 0)
 733 #       define R300_CLIPRECT_Y_SHIFT             13
 734 #       define R300_CLIPRECT_Y_MASK              (0x1FFF << 13)
 735 #define R300_RE_CLIPRECT_CNTL               0x43D0
 736 #       define R300_CLIP_OUT                     (1 << 0)
 737 #       define R300_CLIP_0                       (1 << 1)
 738 #       define R300_CLIP_1                       (1 << 2)
 739 #       define R300_CLIP_10                      (1 << 3)
 740 #       define R300_CLIP_2                       (1 << 4)
 741 #       define R300_CLIP_20                      (1 << 5)
 742 #       define R300_CLIP_21                      (1 << 6)
 743 #       define R300_CLIP_210                     (1 << 7)
 744 #       define R300_CLIP_3                       (1 << 8)
 745 #       define R300_CLIP_30                      (1 << 9)
 746 #       define R300_CLIP_31                      (1 << 10)
 747 #       define R300_CLIP_310                     (1 << 11)
 748 #       define R300_CLIP_32                      (1 << 12)
 749 #       define R300_CLIP_320                     (1 << 13)
 750 #       define R300_CLIP_321                     (1 << 14)
 751 #       define R300_CLIP_3210                    (1 << 15)
 752
 753 /* gap */
 754
 755 #define R300_RE_SCISSORS_TL                 0x43E0
 756 #define R300_RE_SCISSORS_BR                 0x43E4
 757 #       define R300_SCISSORS_OFFSET              1440
 758 #       define R300_SCISSORS_X_SHIFT             0
 759 #       define R300_SCISSORS_X_MASK              (0x1FFF << 0)
 760 #       define R300_SCISSORS_Y_SHIFT             13
 761 #       define R300_SCISSORS_Y_MASK              (0x1FFF << 13)
 762 /* END: Scissors and cliprects */
 763
 764 /* BEGIN: Texture specification */
 765
 766 /*
 767  * The texture specification dwords are grouped by meaning and not by texture
 768  * unit. This means that e.g. the offset for texture image unit N is found in
 769  * register TX_OFFSET_0 + (4*N)
 770  */
 771 #define R300_TX_FILTER_0                    0x4400
 772 #       define R300_TX_REPEAT                    0
 773 #       define R300_TX_MIRRORED                  1
 774 #       define R300_TX_CLAMP                     4
 775 #       define R300_TX_CLAMP_TO_EDGE             2
 776 #       define R300_TX_CLAMP_TO_BORDER           6
 777 #       define R300_TX_WRAP_S_SHIFT              0
 778 #       define R300_TX_WRAP_S_MASK               (7 << 0)
 779 #       define R300_TX_WRAP_T_SHIFT              3
 780 #       define R300_TX_WRAP_T_MASK               (7 << 3)
 781 #       define R300_TX_WRAP_Q_SHIFT              6
 782 #       define R300_TX_WRAP_Q_MASK               (7 << 6)
 783 #       define R300_TX_MAG_FILTER_NEAREST        (1 << 9)
 784 #       define R300_TX_MAG_FILTER_LINEAR         (2 << 9)
 785 #       define R300_TX_MAG_FILTER_MASK           (3 << 9)
 786 #       define R300_TX_MIN_FILTER_NEAREST        (1 << 11)
 787 #       define R300_TX_MIN_FILTER_LINEAR         (2 << 11)
 788 #       define R300_TX_MIN_FILTER_NEAREST_MIP_NEAREST       (5  <<  11)
 789 #       define R300_TX_MIN_FILTER_NEAREST_MIP_LINEAR        (9  <<  11)
 790 #       define R300_TX_MIN_FILTER_LINEAR_MIP_NEAREST        (6  <<  11)
 791 #       define R300_TX_MIN_FILTER_LINEAR_MIP_LINEAR         (10 <<  11)
 792
 793 /* NOTE: NEAREST doesnt seem to exist.
 794  * Im not seting MAG_FILTER_MASK and (3 << 11) on for all
 795  * anisotropy modes because that would void selected mag filter
 796  */
 797 #       define R300_TX_MIN_FILTER_ANISO_NEAREST             (0 << 13)
 798 #       define R300_TX_MIN_FILTER_ANISO_LINEAR              (0 << 13)
 799 #       define R300_TX_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST (1 << 13)
 800 #       define R300_TX_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR  (2 << 13)
 801 #       define R300_TX_MIN_FILTER_MASK   ( (15 << 11) | (3 << 13) )
 802 #       define R300_TX_MAX_ANISO_1_TO_1  (0 << 21)
 803 #       define R300_TX_MAX_ANISO_2_TO_1  (2 << 21)
 804 #       define R300_TX_MAX_ANISO_4_TO_1  (4 << 21)
 805 #       define R300_TX_MAX_ANISO_8_TO_1  (6 << 21)
 806 #       define R300_TX_MAX_ANISO_16_TO_1 (8 << 21)
 807 #       define R300_TX_MAX_ANISO_MASK    (14 << 21)
 808
 809 #define R300_TX_FILTER1_0                      0x4440
 810 #       define R300_CHROMA_KEY_MODE_DISABLE    0
 811 #       define R300_CHROMA_KEY_FORCE           1
 812 #       define R300_CHROMA_KEY_BLEND           2
 813 #       define R300_MC_ROUND_NORMAL            (0<<2)
 814 #       define R300_MC_ROUND_MPEG4             (1<<2)
 815 #       define R300_LOD_BIAS_MASK           0x1fff
 816 #       define R300_EDGE_ANISO_EDGE_DIAG       (0<<13)
 817 #       define R300_EDGE_ANISO_EDGE_ONLY       (1<<13)
 818 #       define R300_MC_COORD_TRUNCATE_DISABLE  (0<<14)
 819 #       define R300_MC_COORD_TRUNCATE_MPEG     (1<<14)
 820 #       define R300_TX_TRI_PERF_0_8            (0<<15)
 821 #       define R300_TX_TRI_PERF_1_8            (1<<15)
 822 #       define R300_TX_TRI_PERF_1_4            (2<<15)
 823 #       define R300_TX_TRI_PERF_3_8            (3<<15)
 824 #       define R300_ANISO_THRESHOLD_MASK       (7<<17)
 825
 826 #define R300_TX_SIZE_0                      0x4480
 827 #       define R300_TX_WIDTHMASK_SHIFT           0
 828 #       define R300_TX_WIDTHMASK_MASK            (2047 << 0)
 829 #       define R300_TX_HEIGHTMASK_SHIFT          11
 830 #       define R300_TX_HEIGHTMASK_MASK           (2047 << 11)
 831 #       define R300_TX_UNK23                     (1 << 23)
 832 #       define R300_TX_MAX_MIP_LEVEL_SHIFT       26
 833 #       define R300_TX_MAX_MIP_LEVEL_MASK        (0xf << 26)
 834 #       define R300_TX_SIZE_PROJECTED            (1<<30)
 835 #       define R300_TX_SIZE_TXPITCH_EN           (1<<31)
 836 #define R300_TX_FORMAT_0                    0x44C0
 837         /* The interpretation of the format word by Wladimir van der Laan */
 838         /* The X, Y, Z and W refer to the layout of the components.
 839            They are given meanings as R, G, B and Alpha by the swizzle
 840            specification */
 841 #       define R300_TX_FORMAT_X8                    0x0
 842 #       define R300_TX_FORMAT_X16                   0x1
 843 #       define R300_TX_FORMAT_Y4X4                  0x2
 844 #       define R300_TX_FORMAT_Y8X8                  0x3
 845 #       define R300_TX_FORMAT_Y16X16                0x4
 846 #       define R300_TX_FORMAT_Z3Y3X2                0x5
 847 #       define R300_TX_FORMAT_Z5Y6X5                0x6
 848 #       define R300_TX_FORMAT_Z6Y5X5                0x7
 849 #       define R300_TX_FORMAT_Z11Y11X10             0x8
 850 #       define R300_TX_FORMAT_Z10Y11X11             0x9
 851 #       define R300_TX_FORMAT_W4Z4Y4X4              0xA
 852 #       define R300_TX_FORMAT_W1Z5Y5X5              0xB
 853 #       define R300_TX_FORMAT_W8Z8Y8X8              0xC
 854 #       define R300_TX_FORMAT_W2Z10Y10X10           0xD
 855 #       define R300_TX_FORMAT_W16Z16Y16X16          0xE
 856 #       define R300_TX_FORMAT_DXT1                  0xF
 857 #       define R300_TX_FORMAT_DXT3                  0x10
 858 #       define R300_TX_FORMAT_DXT5                  0x11
 859 #       define R300_TX_FORMAT_D3DMFT_CxV8U8         0x12     /* no swizzle */
 860 #       define R300_TX_FORMAT_A8R8G8B8              0x13     /* no swizzle */
 861 #       define R300_TX_FORMAT_B8G8_B8G8             0x14     /* no swizzle */
 862 #       define R300_TX_FORMAT_G8R8_G8B8             0x15     /* no swizzle */
 863         /* 0x16 - some 16 bit green format.. ?? */
 864 #       define R300_TX_FORMAT_UNK25                (1 << 25) /* no swizzle */
 865 #       define R300_TX_FORMAT_CUBIC_MAP            (1 << 26)
 866
 867         /* gap */
 868         /* Floating point formats */
 869         /* Note - hardware supports both 16 and 32 bit floating point */
 870 #       define R300_TX_FORMAT_FL_I16                0x18
 871 #       define R300_TX_FORMAT_FL_I16A16             0x19
 872 #       define R300_TX_FORMAT_FL_R16G16B16A16       0x1A
 873 #       define R300_TX_FORMAT_FL_I32                0x1B
 874 #       define R300_TX_FORMAT_FL_I32A32             0x1C
 875 #       define R300_TX_FORMAT_FL_R32G32B32A32       0x1D
 876         /* alpha modes, convenience mostly */
 877         /* if you have alpha, pick constant appropriate to the
 878            number of channels (1 for I8, 2 for I8A8, 4 for R8G8B8A8, etc */
 879 #       define R300_TX_FORMAT_ALPHA_1CH             0x000
 880 #       define R300_TX_FORMAT_ALPHA_2CH             0x200
 881 #       define R300_TX_FORMAT_ALPHA_4CH             0x600
 882 #       define R300_TX_FORMAT_ALPHA_NONE            0xA00
 883         /* Swizzling */
 884         /* constants */
 885 #       define R300_TX_FORMAT_X         0
 886 #       define R300_TX_FORMAT_Y         1
 887 #       define R300_TX_FORMAT_Z         2
 888 #       define R300_TX_FORMAT_W         3
 889 #       define R300_TX_FORMAT_ZERO      4
 890 #       define R300_TX_FORMAT_ONE       5
 891         /* 2.0*Z, everything above 1.0 is set to 0.0 */
 892 #       define R300_TX_FORMAT_CUT_Z     6
 893         /* 2.0*W, everything above 1.0 is set to 0.0 */
 894 #       define R300_TX_FORMAT_CUT_W     7
 895
 896 #       define R300_TX_FORMAT_B_SHIFT   18
 897 #       define R300_TX_FORMAT_G_SHIFT   15
 898 #       define R300_TX_FORMAT_R_SHIFT   12
 899 #       define R300_TX_FORMAT_A_SHIFT   9
 900         /* Convenience macro to take care of layout and swizzling */
 901 #       define R300_EASY_TX_FORMAT(B, G, R, A, FMT)     (               \
 902                 ((R300_TX_FORMAT_##B)<<R300_TX_FORMAT_B_SHIFT)          \
 903                 | ((R300_TX_FORMAT_##G)<<R300_TX_FORMAT_G_SHIFT)        \
 904                 | ((R300_TX_FORMAT_##R)<<R300_TX_FORMAT_R_SHIFT)        \
 905                 | ((R300_TX_FORMAT_##A)<<R300_TX_FORMAT_A_SHIFT)        \
 906                 | (R300_TX_FORMAT_##FMT)                                \
 907                 )
 908         /* These can be ORed with result of R300_EASY_TX_FORMAT()
 909            We don't really know what they do. Take values from a
 910            constant color ? */
 911 #       define R300_TX_FORMAT_CONST_X           (1<<5)
 912 #       define R300_TX_FORMAT_CONST_Y           (2<<5)
 913 #       define R300_TX_FORMAT_CONST_Z           (4<<5)
 914 #       define R300_TX_FORMAT_CONST_W           (8<<5)
 915
 916 #       define R300_TX_FORMAT_YUV_MODE          0x00800000
 917
 918 #define R300_TX_PITCH_0                     0x4500 /* obvious missing in gap */
 919 #define R300_TX_OFFSET_0                    0x4540
 920         /* BEGIN: Guess from R200 */
 921 #       define R300_TXO_ENDIAN_NO_SWAP           (0 << 0)
 922 #       define R300_TXO_ENDIAN_BYTE_SWAP         (1 << 0)
 923 #       define R300_TXO_ENDIAN_WORD_SWAP         (2 << 0)
 924 #       define R300_TXO_ENDIAN_HALFDW_SWAP       (3 << 0)
 925 #       define R300_TXO_MACRO_TILE               (1 << 2)
 926 #       define R300_TXO_MICRO_TILE               (1 << 3)
 927 #       define R300_TXO_OFFSET_MASK              0xffffffe0
 928 #       define R300_TXO_OFFSET_SHIFT             5
 929         /* END: Guess from R200 */
 930
 931 /* 32 bit chroma key */
 932 #define R300_TX_CHROMA_KEY_0                      0x4580
 933 /* ff00ff00 == { 0, 1.0, 0, 1.0 } */
 934 #define R300_TX_BORDER_COLOR_0              0x45C0
 935
 936 /* END: Texture specification */
 937
 938 /* BEGIN: Fragment program instruction set */
 939
 940 /* Fragment programs are written directly into register space.
 941  * There are separate instruction streams for texture instructions and ALU
 942  * instructions.
 943  * In order to synchronize these streams, the program is divided into up
 944  * to 4 nodes. Each node begins with a number of TEX operations, followed
 945  * by a number of ALU operations.
 946  * The first node can have zero TEX ops, all subsequent nodes must have at
 947  * least
 948  * one TEX ops.
 949  * All nodes must have at least one ALU op.
 950  *
 951  * The index of the last node is stored in PFS_CNTL_0: A value of 0 means
 952  * 1 node, a value of 3 means 4 nodes.
 953  * The total amount of instructions is defined in PFS_CNTL_2. The offsets are
 954  * offsets into the respective instruction streams, while *_END points to the
 955  * last instruction relative to this offset.
 956  */
 957 #define R300_PFS_CNTL_0                     0x4600
 958 #       define R300_PFS_CNTL_LAST_NODES_SHIFT    0
 959 #       define R300_PFS_CNTL_LAST_NODES_MASK     (3 << 0)
 960 #       define R300_PFS_CNTL_FIRST_NODE_HAS_TEX  (1 << 3)
 961 #define R300_PFS_CNTL_1                     0x4604
 962 /* There is an unshifted value here which has so far always been equal to the
 963  * index of the highest used temporary register.
 964  */
 965 #define R300_PFS_CNTL_2                     0x4608
 966 #       define R300_PFS_CNTL_ALU_OFFSET_SHIFT    0
 967 #       define R300_PFS_CNTL_ALU_OFFSET_MASK     (63 << 0)
 968 #       define R300_PFS_CNTL_ALU_END_SHIFT       6
 969 #       define R300_PFS_CNTL_ALU_END_MASK        (63 << 6)
 970 #       define R300_PFS_CNTL_TEX_OFFSET_SHIFT    12
 971 #       define R300_PFS_CNTL_TEX_OFFSET_MASK     (31 << 12) /* GUESS */
 972 #       define R300_PFS_CNTL_TEX_END_SHIFT       18
 973 #       define R300_PFS_CNTL_TEX_END_MASK        (31 << 18) /* GUESS */
 974
 975 /* gap */
 976
 977 /* Nodes are stored backwards. The last active node is always stored in
 978  * PFS_NODE_3.
 979  * Example: In a 2-node program, NODE_0 and NODE_1 are set to 0. The
 980  * first node is stored in NODE_2, the second node is stored in NODE_3.
 981  *
 982  * Offsets are relative to the master offset from PFS_CNTL_2.
 983  */
 984 #define R300_PFS_NODE_0                     0x4610
 985 #define R300_PFS_NODE_1                     0x4614
 986 #define R300_PFS_NODE_2                     0x4618
 987 #define R300_PFS_NODE_3                     0x461C
 988 #       define R300_PFS_NODE_ALU_OFFSET_SHIFT    0
 989 #       define R300_PFS_NODE_ALU_OFFSET_MASK     (63 << 0)
 990 #       define R300_PFS_NODE_ALU_END_SHIFT       6
 991 #       define R300_PFS_NODE_ALU_END_MASK        (63 << 6)
 992 #       define R300_PFS_NODE_TEX_OFFSET_SHIFT    12
 993 #       define R300_PFS_NODE_TEX_OFFSET_MASK     (31 << 12)
 994 #       define R300_PFS_NODE_TEX_END_SHIFT       17
 995 #       define R300_PFS_NODE_TEX_END_MASK        (31 << 17)
 996 #               define R300_PFS_NODE_OUTPUT_COLOR        (1 << 22)
 997 #               define R300_PFS_NODE_OUTPUT_DEPTH        (1 << 23)
 998
 999 /* TEX
1000  * As far as I can tell, texture instructions cannot write into output
1001  * registers directly. A subsequent ALU instruction is always necessary,
1002  * even if it's just MAD o0, r0, 1, 0
1003  */
1004 #define R300_PFS_TEXI_0                     0x4620
1005 #       define R300_FPITX_SRC_SHIFT              0
1006 #       define R300_FPITX_SRC_MASK               (31 << 0)
1007         /* GUESS */
1008 #       define R300_FPITX_SRC_CONST              (1 << 5)
1009 #       define R300_FPITX_DST_SHIFT              6
1010 #       define R300_FPITX_DST_MASK               (31 << 6)
1011 #       define R300_FPITX_IMAGE_SHIFT            11
1012         /* GUESS based on layout and native limits */
1013 #       define R300_FPITX_IMAGE_MASK             (15 << 11)
1014 /* Unsure if these are opcodes, or some kind of bitfield, but this is how
1015  * they were set when I checked
1016  */
1017 #       define R300_FPITX_OPCODE_SHIFT          15
1018 #               define R300_FPITX_OP_TEX        1
1019 #               define R300_FPITX_OP_KIL        2
1020 #               define R300_FPITX_OP_TXP        3
1021 #               define R300_FPITX_OP_TXB        4
1022 #       define R300_FPITX_OPCODE_MASK           (7 << 15)
1023
1024 /* ALU
1025  * The ALU instructions register blocks are enumerated according to the order
1026  * in which fglrx. I assume there is space for 64 instructions, since
1027  * each block has space for a maximum of 64 DWORDs, and this matches reported
1028  * native limits.
1029  *
1030  * The basic functional block seems to be one MAD for each color and alpha,
1031  * and an adder that adds all components after the MUL.
1032  *  - ADD, MUL, MAD etc.: use MAD with appropriate neutral operands
1033  *  - DP4: Use OUTC_DP4, OUTA_DP4
1034  *  - DP3: Use OUTC_DP3, OUTA_DP4, appropriate alpha operands
1035  *  - DPH: Use OUTC_DP4, OUTA_DP4, appropriate alpha operands
1036  *  - CMPH: If ARG2 > 0.5, return ARG0, else return ARG1
1037  *  - CMP: If ARG2 < 0, return ARG1, else return ARG0
1038  *  - FLR: use FRC+MAD
1039  *  - XPD: use MAD+MAD
1040  *  - SGE, SLT: use MAD+CMP
1041  *  - RSQ: use ABS modifier for argument
1042  *  - Use OUTC_REPL_ALPHA to write results of an alpha-only operation
1043  *    (e.g. RCP) into color register
1044  *  - apparently, there's no quick DST operation
1045  *  - fglrx set FPI2_UNKNOWN_31 on a "MAD fragment.color, tmp0, tmp1, tmp2"
1046  *  - fglrx set FPI2_UNKNOWN_31 on a "MAX r2, r1, c0"
1047  *  - fglrx once set FPI0_UNKNOWN_31 on a "FRC r1, r1"
1048  *
1049  * Operand selection
1050  * First stage selects three sources from the available registers and
1051  * constant parameters. This is defined in INSTR1 (color) and INSTR3 (alpha).
1052  * fglrx sorts the three source fields: Registers before constants,
1053  * lower indices before higher indices; I do not know whether this is
1054  * necessary.
1055  *
1056  * fglrx fills unused sources with "read constant 0"
1057  * According to specs, you cannot select more than two different constants.
1058  *
1059  * Second stage selects the operands from the sources. This is defined in
1060  * INSTR0 (color) and INSTR2 (alpha). You can also select the special constants
1061  * zero and one.
1062  * Swizzling and negation happens in this stage, as well.
1063  *
1064  * Important: Color and alpha seem to be mostly separate, i.e. their sources
1065  * selection appears to be fully independent (the register storage is probably
1066  * physically split into a color and an alpha section).
1067  * However (because of the apparent physical split), there is some interaction
1068  * WRT swizzling. If, for example, you want to load an R component into an
1069  * Alpha operand, this R component is taken from a *color* source, not from
1070  * an alpha source. The corresponding register doesn't even have to appear in
1071  * the alpha sources list. (I hope this all makes sense to you)
1072  *
1073  * Destination selection
1074  * The destination register index is in FPI1 (color) and FPI3 (alpha)
1075  * together with enable bits.
1076  * There are separate enable bits for writing into temporary registers
1077  * (DSTC_REG_* /DSTA_REG) and and program output registers (DSTC_OUTPUT_*
1078  * /DSTA_OUTPUT). You can write to both at once, or not write at all (the
1079  * same index must be used for both).
1080  *
1081  * Note: There is a special form for LRP
1082  *  - Argument order is the same as in ARB_fragment_program.
1083  *  - Operation is MAD
1084  *  - ARG1 is set to ARGC_SRC1C_LRP/ARGC_SRC1A_LRP
1085  *  - Set FPI0/FPI2_SPECIAL_LRP
1086  * Arbitrary LRP (including support for swizzling) requires vanilla MAD+MAD
1087  */
1088 #define R300_PFS_INSTR1_0                   0x46C0
1089 #       define R300_FPI1_SRC0C_SHIFT             0
1090 #       define R300_FPI1_SRC0C_MASK              (31 << 0)
1091 #       define R300_FPI1_SRC0C_CONST             (1 << 5)
1092 #       define R300_FPI1_SRC1C_SHIFT             6
1093 #       define R300_FPI1_SRC1C_MASK              (31 << 6)
1094 #       define R300_FPI1_SRC1C_CONST             (1 << 11)
1095 #       define R300_FPI1_SRC2C_SHIFT             12
1096 #       define R300_FPI1_SRC2C_MASK              (31 << 12)
1097 #       define R300_FPI1_SRC2C_CONST             (1 << 17)
1098 #       define R300_FPI1_SRC_MASK                0x0003ffff
1099 #       define R300_FPI1_DSTC_SHIFT              18
1100 #       define R300_FPI1_DSTC_MASK               (31 << 18)
1101 #               define R300_FPI1_DSTC_REG_MASK_SHIFT     23
1102 #       define R300_FPI1_DSTC_REG_X              (1 << 23)
1103 #       define R300_FPI1_DSTC_REG_Y              (1 << 24)
1104 #       define R300_FPI1_DSTC_REG_Z              (1 << 25)
1105 #               define R300_FPI1_DSTC_OUTPUT_MASK_SHIFT  26
1106 #       define R300_FPI1_DSTC_OUTPUT_X           (1 << 26)
1107 #       define R300_FPI1_DSTC_OUTPUT_Y           (1 << 27)
1108 #       define R300_FPI1_DSTC_OUTPUT_Z           (1 << 28)
1109
1110 #define R300_PFS_INSTR3_0                   0x47C0
1111 #       define R300_FPI3_SRC0A_SHIFT             0
1112 #       define R300_FPI3_SRC0A_MASK              (31 << 0)
1113 #       define R300_FPI3_SRC0A_CONST             (1 << 5)
1114 #       define R300_FPI3_SRC1A_SHIFT             6
1115 #       define R300_FPI3_SRC1A_MASK              (31 << 6)
1116 #       define R300_FPI3_SRC1A_CONST             (1 << 11)
1117 #       define R300_FPI3_SRC2A_SHIFT             12
1118 #       define R300_FPI3_SRC2A_MASK              (31 << 12)
1119 #       define R300_FPI3_SRC2A_CONST             (1 << 17)
1120 #       define R300_FPI3_SRC_MASK                0x0003ffff
1121 #       define R300_FPI3_DSTA_SHIFT              18
1122 #       define R300_FPI3_DSTA_MASK               (31 << 18)
1123 #       define R300_FPI3_DSTA_REG                (1 << 23)
1124 #       define R300_FPI3_DSTA_OUTPUT             (1 << 24)
1125 #               define R300_FPI3_DSTA_DEPTH              (1 << 27)
1126
1127 #define R300_PFS_INSTR0_0                   0x48C0
1128 #       define R300_FPI0_ARGC_SRC0C_XYZ          0
1129 #       define R300_FPI0_ARGC_SRC0C_XXX          1
1130 #       define R300_FPI0_ARGC_SRC0C_YYY          2
1131 #       define R300_FPI0_ARGC_SRC0C_ZZZ          3
1132 #       define R300_FPI0_ARGC_SRC1C_XYZ          4
1133 #       define R300_FPI0_ARGC_SRC1C_XXX          5
1134 #       define R300_FPI0_ARGC_SRC1C_YYY          6
1135 #       define R300_FPI0_ARGC_SRC1C_ZZZ          7
1136 #       define R300_FPI0_ARGC_SRC2C_XYZ          8
1137 #       define R300_FPI0_ARGC_SRC2C_XXX          9
1138 #       define R300_FPI0_ARGC_SRC2C_YYY          10
1139 #       define R300_FPI0_ARGC_SRC2C_ZZZ          11
1140 #       define R300_FPI0_ARGC_SRC0A              12
1141 #       define R300_FPI0_ARGC_SRC1A              13
1142 #       define R300_FPI0_ARGC_SRC2A              14
1143 #       define R300_FPI0_ARGC_SRC1C_LRP          15
1144 #       define R300_FPI0_ARGC_ZERO               20
1145 #       define R300_FPI0_ARGC_ONE                21
1146         /* GUESS */
1147 #       define R300_FPI0_ARGC_HALF               22
1148 #       define R300_FPI0_ARGC_SRC0C_YZX          23
1149 #       define R300_FPI0_ARGC_SRC1C_YZX          24
1150 #       define R300_FPI0_ARGC_SRC2C_YZX          25
1151 #       define R300_FPI0_ARGC_SRC0C_ZXY          26
1152 #       define R300_FPI0_ARGC_SRC1C_ZXY          27
1153 #       define R300_FPI0_ARGC_SRC2C_ZXY          28
1154 #       define R300_FPI0_ARGC_SRC0CA_WZY         29
1155 #       define R300_FPI0_ARGC_SRC1CA_WZY         30
1156 #       define R300_FPI0_ARGC_SRC2CA_WZY         31
1157
1158 #       define R300_FPI0_ARG0C_SHIFT             0
1159 #       define R300_FPI0_ARG0C_MASK              (31 << 0)
1160 #       define R300_FPI0_ARG0C_NEG               (1 << 5)
1161 #       define R300_FPI0_ARG0C_ABS               (1 << 6)
1162 #       define R300_FPI0_ARG1C_SHIFT             7
1163 #       define R300_FPI0_ARG1C_MASK              (31 << 7)
1164 #       define R300_FPI0_ARG1C_NEG               (1 << 12)
1165 #       define R300_FPI0_ARG1C_ABS               (1 << 13)
1166 #       define R300_FPI0_ARG2C_SHIFT             14
1167 #       define R300_FPI0_ARG2C_MASK              (31 << 14)
1168 #       define R300_FPI0_ARG2C_NEG               (1 << 19)
1169 #       define R300_FPI0_ARG2C_ABS               (1 << 20)
1170 #       define R300_FPI0_SPECIAL_LRP             (1 << 21)
1171 #       define R300_FPI0_OUTC_MAD                (0 << 23)
1172 #       define R300_FPI0_OUTC_DP3                (1 << 23)
1173 #       define R300_FPI0_OUTC_DP4                (2 << 23)
1174 #       define R300_FPI0_OUTC_MIN                (4 << 23)
1175 #       define R300_FPI0_OUTC_MAX                (5 << 23)
1176 #       define R300_FPI0_OUTC_CMPH               (7 << 23)
1177 #       define R300_FPI0_OUTC_CMP                (8 << 23)
1178 #       define R300_FPI0_OUTC_FRC                (9 << 23)
1179 #       define R300_FPI0_OUTC_REPL_ALPHA         (10 << 23)
1180 #       define R300_FPI0_OUTC_SAT                (1 << 30)
1181 #       define R300_FPI0_INSERT_NOP              (1 << 31)
1182
1183 #define R300_PFS_INSTR2_0                   0x49C0
1184 #       define R300_FPI2_ARGA_SRC0C_X            0
1185 #       define R300_FPI2_ARGA_SRC0C_Y            1
1186 #       define R300_FPI2_ARGA_SRC0C_Z            2
1187 #       define R300_FPI2_ARGA_SRC1C_X            3
1188 #       define R300_FPI2_ARGA_SRC1C_Y            4
1189 #       define R300_FPI2_ARGA_SRC1C_Z            5
1190 #       define R300_FPI2_ARGA_SRC2C_X            6
1191 #       define R300_FPI2_ARGA_SRC2C_Y            7
1192 #       define R300_FPI2_ARGA_SRC2C_Z            8
1193 #       define R300_FPI2_ARGA_SRC0A              9
1194 #       define R300_FPI2_ARGA_SRC1A              10
1195 #       define R300_FPI2_ARGA_SRC2A              11
1196 #       define R300_FPI2_ARGA_SRC1A_LRP          15
1197 #       define R300_FPI2_ARGA_ZERO               16
1198 #       define R300_FPI2_ARGA_ONE                17
1199         /* GUESS */
1200 #       define R300_FPI2_ARGA_HALF               18
1201 #       define R300_FPI2_ARG0A_SHIFT             0
1202 #       define R300_FPI2_ARG0A_MASK              (31 << 0)
1203 #       define R300_FPI2_ARG0A_NEG               (1 << 5)
1204         /* GUESS */
1205 #       define R300_FPI2_ARG0A_ABS               (1 << 6)
1206 #       define R300_FPI2_ARG1A_SHIFT             7
1207 #       define R300_FPI2_ARG1A_MASK              (31 << 7)
1208 #       define R300_FPI2_ARG1A_NEG               (1 << 12)
1209         /* GUESS */
1210 #       define R300_FPI2_ARG1A_ABS               (1 << 13)
1211 #       define R300_FPI2_ARG2A_SHIFT             14
1212 #       define R300_FPI2_ARG2A_MASK              (31 << 14)
1213 #       define R300_FPI2_ARG2A_NEG               (1 << 19)
1214         /* GUESS */
1215 #       define R300_FPI2_ARG2A_ABS               (1 << 20)
1216 #       define R300_FPI2_SPECIAL_LRP             (1 << 21)
1217 #       define R300_FPI2_OUTA_MAD                (0 << 23)
1218 #       define R300_FPI2_OUTA_DP4                (1 << 23)
1219 #       define R300_FPI2_OUTA_MIN                (2 << 23)
1220 #       define R300_FPI2_OUTA_MAX                (3 << 23)
1221 #       define R300_FPI2_OUTA_CMP                (6 << 23)
1222 #       define R300_FPI2_OUTA_FRC                (7 << 23)
1223 #       define R300_FPI2_OUTA_EX2                (8 << 23)
1224 #       define R300_FPI2_OUTA_LG2                (9 << 23)
1225 #       define R300_FPI2_OUTA_RCP                (10 << 23)
1226 #       define R300_FPI2_OUTA_RSQ                (11 << 23)
1227 #       define R300_FPI2_OUTA_SAT                (1 << 30)
1228 #       define R300_FPI2_UNKNOWN_31              (1 << 31)
1229 /* END: Fragment program instruction set */
1230
1231 /* Fog state and color */
1232 #define R300_RE_FOG_STATE                   0x4BC0
1233 #       define R300_FOG_ENABLE                   (1 << 0)
1234 #       define R300_FOG_MODE_LINEAR              (0 << 1)
1235 #       define R300_FOG_MODE_EXP                 (1 << 1)
1236 #       define R300_FOG_MODE_EXP2                (2 << 1)
1237 #       define R300_FOG_MODE_MASK                (3 << 1)
1238 #define R300_FOG_COLOR_R                    0x4BC8
1239 #define R300_FOG_COLOR_G                    0x4BCC
1240 #define R300_FOG_COLOR_B                    0x4BD0
1241
1242 #define R300_PP_ALPHA_TEST                  0x4BD4
1243 #       define R300_REF_ALPHA_MASK               0x000000ff
1244 #       define R300_ALPHA_TEST_FAIL              (0 << 8)
1245 #       define R300_ALPHA_TEST_LESS              (1 << 8)
1246 #       define R300_ALPHA_TEST_LEQUAL            (3 << 8)
1247 #       define R300_ALPHA_TEST_EQUAL             (2 << 8)
1248 #       define R300_ALPHA_TEST_GEQUAL            (6 << 8)
1249 #       define R300_ALPHA_TEST_GREATER           (4 << 8)
1250 #       define R300_ALPHA_TEST_NEQUAL            (5 << 8)
1251 #       define R300_ALPHA_TEST_PASS              (7 << 8)
1252 #       define R300_ALPHA_TEST_OP_MASK           (7 << 8)
1253 #       define R300_ALPHA_TEST_ENABLE            (1 << 11)
1254
1255 /* gap */
1256
1257 /* Fragment program parameters in 7.16 floating point */
1258 #define R300_PFS_PARAM_0_X                  0x4C00
1259 #define R300_PFS_PARAM_0_Y                  0x4C04
1260 #define R300_PFS_PARAM_0_Z                  0x4C08
1261 #define R300_PFS_PARAM_0_W                  0x4C0C
1262 /* GUESS: PARAM_31 is last, based on native limits reported by fglrx */
1263 #define R300_PFS_PARAM_31_X                 0x4DF0
1264 #define R300_PFS_PARAM_31_Y                 0x4DF4
1265 #define R300_PFS_PARAM_31_Z                 0x4DF8
1266 #define R300_PFS_PARAM_31_W                 0x4DFC
1267
1268 /* Notes:
1269  * - AFAIK fglrx always sets BLEND_UNKNOWN when blending is used in
1270  *   the application
1271  * - AFAIK fglrx always sets BLEND_NO_SEPARATE when CBLEND and ABLEND
1272  *    are set to the same
1273  *   function (both registers are always set up completely in any case)
1274  * - Most blend flags are simply copied from R200 and not tested yet
1275  */
1276 #define R300_RB3D_CBLEND                    0x4E04
1277 #define R300_RB3D_ABLEND                    0x4E08
1278 /* the following only appear in CBLEND */
1279 #       define R300_BLEND_ENABLE                     (1 << 0)
1280 #       define R300_BLEND_UNKNOWN                    (3 << 1)
1281 #       define R300_BLEND_NO_SEPARATE                (1 << 3)
1282 /* the following are shared between CBLEND and ABLEND */
1283 #       define R300_FCN_MASK                         (3  << 12)
1284 #       define R300_COMB_FCN_ADD_CLAMP               (0  << 12)
1285 #       define R300_COMB_FCN_ADD_NOCLAMP             (1  << 12)
1286 #       define R300_COMB_FCN_SUB_CLAMP               (2  << 12)
1287 #       define R300_COMB_FCN_SUB_NOCLAMP             (3  << 12)
1288 #       define R300_COMB_FCN_MIN                     (4  << 12)
1289 #       define R300_COMB_FCN_MAX                     (5  << 12)
1290 #       define R300_COMB_FCN_RSUB_CLAMP              (6  << 12)
1291 #       define R300_COMB_FCN_RSUB_NOCLAMP            (7  << 12)
1292 #       define R300_BLEND_GL_ZERO                    (32)
1293 #       define R300_BLEND_GL_ONE                     (33)
1294 #       define R300_BLEND_GL_SRC_COLOR               (34)
1295 #       define R300_BLEND_GL_ONE_MINUS_SRC_COLOR     (35)
1296 #       define R300_BLEND_GL_DST_COLOR               (36)
1297 #       define R300_BLEND_GL_ONE_MINUS_DST_COLOR     (37)
1298 #       define R300_BLEND_GL_SRC_ALPHA               (38)
1299 #       define R300_BLEND_GL_ONE_MINUS_SRC_ALPHA     (39)
1300 #       define R300_BLEND_GL_DST_ALPHA               (40)
1301 #       define R300_BLEND_GL_ONE_MINUS_DST_ALPHA     (41)
1302 #       define R300_BLEND_GL_SRC_ALPHA_SATURATE      (42)
1303 #       define R300_BLEND_GL_CONST_COLOR             (43)
1304 #       define R300_BLEND_GL_ONE_MINUS_CONST_COLOR   (44)
1305 #       define R300_BLEND_GL_CONST_ALPHA             (45)
1306 #       define R300_BLEND_GL_ONE_MINUS_CONST_ALPHA   (46)
1307 #       define R300_BLEND_MASK                       (63)
1308 #       define R300_SRC_BLEND_SHIFT                  (16)
1309 #       define R300_DST_BLEND_SHIFT                  (24)
1310 #define R300_RB3D_BLEND_COLOR               0x4E10
1311 #define R300_RB3D_COLORMASK                 0x4E0C
1312 #       define R300_COLORMASK0_B                 (1<<0)
1313 #       define R300_COLORMASK0_G                 (1<<1)
1314 #       define R300_COLORMASK0_R                 (1<<2)
1315 #       define R300_COLORMASK0_A                 (1<<3)
1316
1317 /* gap */
1318
1319 #define R300_RB3D_COLOROFFSET0              0x4E28
1320 #       define R300_COLOROFFSET_MASK             0xFFFFFFF0 /* GUESS */
1321 #define R300_RB3D_COLOROFFSET1              0x4E2C /* GUESS */
1322 #define R300_RB3D_COLOROFFSET2              0x4E30 /* GUESS */
1323 #define R300_RB3D_COLOROFFSET3              0x4E34 /* GUESS */
1324
1325 /* gap */
1326
1327 /* Bit 16: Larger tiles
1328  * Bit 17: 4x2 tiles
1329  * Bit 18: Extremely weird tile like, but some pixels duplicated?
1330  */
1331 #define R300_RB3D_COLORPITCH0               0x4E38
1332 #       define R300_COLORPITCH_MASK              0x00001FF8 /* GUESS */
1333 #       define R300_COLOR_TILE_ENABLE            (1 << 16) /* GUESS */
1334 #       define R300_COLOR_MICROTILE_ENABLE       (1 << 17) /* GUESS */
1335 #       define R300_COLOR_ENDIAN_NO_SWAP         (0 << 18) /* GUESS */
1336 #       define R300_COLOR_ENDIAN_WORD_SWAP       (1 << 18) /* GUESS */
1337 #       define R300_COLOR_ENDIAN_DWORD_SWAP      (2 << 18) /* GUESS */
1338 #       define R300_COLOR_FORMAT_RGB565          (2 << 22)
1339 #       define R300_COLOR_FORMAT_ARGB8888        (3 << 22)
1340 #define R300_RB3D_COLORPITCH1               0x4E3C /* GUESS */
1341 #define R300_RB3D_COLORPITCH2               0x4E40 /* GUESS */
1342 #define R300_RB3D_COLORPITCH3               0x4E44 /* GUESS */
1343
1344 /* gap */
1345
1346 /* Guess by Vladimir.
1347  * Set to 0A before 3D operations, set to 02 afterwards.
1348  */
1349 /*#define R300_RB3D_DSTCACHE_CTLSTAT          0x4E4C*/
1350 #       define R300_RB3D_DSTCACHE_UNKNOWN_02             0x00000002
1351 #       define R300_RB3D_DSTCACHE_UNKNOWN_0A             0x0000000A
1352
1353 /* gap */
1354 /* There seems to be no "write only" setting, so use Z-test = ALWAYS
1355  * for this.
1356  * Bit (1<<8) is the "test" bit. so plain write is 6  - vd
1357  */
1358 #define R300_RB3D_ZSTENCIL_CNTL_0                   0x4F00
1359 #       define R300_RB3D_Z_DISABLED_1            0x00000010
1360 #       define R300_RB3D_Z_DISABLED_2            0x00000014
1361 #       define R300_RB3D_Z_TEST                  0x00000012
1362 #       define R300_RB3D_Z_TEST_AND_WRITE        0x00000016
1363 #       define R300_RB3D_Z_WRITE_ONLY            0x00000006
1364
1365 #       define R300_RB3D_Z_TEST                  0x00000012
1366 #       define R300_RB3D_Z_TEST_AND_WRITE        0x00000016
1367 #       define R300_RB3D_Z_WRITE_ONLY            0x00000006
1368 #       define R300_RB3D_STENCIL_ENABLE          0x00000001
1369
1370 #define R300_RB3D_ZSTENCIL_CNTL_1                   0x4F04
1371         /* functions */
1372 #       define R300_ZS_NEVER                    0
1373 #       define R300_ZS_LESS                     1
1374 #       define R300_ZS_LEQUAL                   2
1375 #       define R300_ZS_EQUAL                    3
1376 #       define R300_ZS_GEQUAL                   4
1377 #       define R300_ZS_GREATER                  5
1378 #       define R300_ZS_NOTEQUAL                 6
1379 #       define R300_ZS_ALWAYS                   7
1380 #       define R300_ZS_MASK                     7
1381         /* operations */
1382 #       define R300_ZS_KEEP                     0
1383 #       define R300_ZS_ZERO                     1
1384 #       define R300_ZS_REPLACE                  2
1385 #       define R300_ZS_INCR                     3
1386 #       define R300_ZS_DECR                     4
1387 #       define R300_ZS_INVERT                   5
1388 #       define R300_ZS_INCR_WRAP                6
1389 #       define R300_ZS_DECR_WRAP                7
1390         /* front and back refer to operations done for front
1391            and back faces, i.e. separate stencil function support */
1392 #       define R300_RB3D_ZS1_DEPTH_FUNC_SHIFT           0
1393 #       define R300_RB3D_ZS1_FRONT_FUNC_SHIFT           3
1394 #       define R300_RB3D_ZS1_FRONT_FAIL_OP_SHIFT        6
1395 #       define R300_RB3D_ZS1_FRONT_ZPASS_OP_SHIFT       9
1396 #       define R300_RB3D_ZS1_FRONT_ZFAIL_OP_SHIFT      12
1397 #       define R300_RB3D_ZS1_BACK_FUNC_SHIFT           15
1398 #       define R300_RB3D_ZS1_BACK_FAIL_OP_SHIFT        18
1399 #       define R300_RB3D_ZS1_BACK_ZPASS_OP_SHIFT       21
1400 #       define R300_RB3D_ZS1_BACK_ZFAIL_OP_SHIFT       24
1401
1402 #define R300_RB3D_ZSTENCIL_CNTL_2                   0x4F08
1403 #       define R300_RB3D_ZS2_STENCIL_REF_SHIFT          0
1404 #       define R300_RB3D_ZS2_STENCIL_MASK               0xFF
1405 #       define R300_RB3D_ZS2_STENCIL_MASK_SHIFT         8
1406 #       define R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT   16
1407
1408 /* gap */
1409
1410 #define R300_RB3D_ZSTENCIL_FORMAT                   0x4F10
1411 #       define R300_DEPTH_FORMAT_16BIT_INT_Z     (0 << 0)
1412 #       define R300_DEPTH_FORMAT_24BIT_INT_Z     (2 << 0)
1413         /* 16 bit format or some aditional bit ? */
1414 #       define R300_DEPTH_FORMAT_UNK32          (32 << 0)
1415
1416 #define R300_RB3D_EARLY_Z                           0x4F14
1417 #       define R300_EARLY_Z_DISABLE              (0 << 0)
1418 #       define R300_EARLY_Z_ENABLE               (1 << 0)
1419
1420 /* gap */
1421
1422 #define R300_RB3D_ZCACHE_CTLSTAT            0x4F18 /* GUESS */
1423 #       define R300_RB3D_ZCACHE_UNKNOWN_01  0x1
1424 #       define R300_RB3D_ZCACHE_UNKNOWN_03  0x3
1425
1426 /* gap */
1427
1428 #define R300_RB3D_DEPTHOFFSET               0x4F20
1429 #define R300_RB3D_DEPTHPITCH                0x4F24
1430 #       define R300_DEPTHPITCH_MASK              0x00001FF8 /* GUESS */
1431 #       define R300_DEPTH_TILE_ENABLE            (1 << 16) /* GUESS */
1432 #       define R300_DEPTH_MICROTILE_ENABLE       (1 << 17) /* GUESS */
1433 #       define R300_DEPTH_ENDIAN_NO_SWAP         (0 << 18) /* GUESS */
1434 #       define R300_DEPTH_ENDIAN_WORD_SWAP       (1 << 18) /* GUESS */
1435 #       define R300_DEPTH_ENDIAN_DWORD_SWAP      (2 << 18) /* GUESS */
1436
1437 /* BEGIN: Vertex program instruction set */
1438
1439 /* Every instruction is four dwords long:
1440  *  DWORD 0: output and opcode
1441  *  DWORD 1: first argument
1442  *  DWORD 2: second argument
1443  *  DWORD 3: third argument
1444  *
1445  * Notes:
1446  *  - ABS r, a is implemented as MAX r, a, -a
1447  *  - MOV is implemented as ADD to zero
1448  *  - XPD is implemented as MUL + MAD
1449  *  - FLR is implemented as FRC + ADD
1450  *  - apparently, fglrx tries to schedule instructions so that there is at
1451  *    least one instruction between the write to a temporary and the first
1452  *    read from said temporary; however, violations of this scheduling are
1453  *    allowed
1454  *  - register indices seem to be unrelated with OpenGL aliasing to
1455  *    conventional state
1456  *  - only one attribute and one parameter can be loaded at a time; however,
1457  *    the same attribute/parameter can be used for more than one argument
1458  *  - the second software argument for POW is the third hardware argument
1459  *    (no idea why)
1460  *  - MAD with only temporaries as input seems to use VPI_OUT_SELECT_MAD_2
1461  *
1462  * There is some magic surrounding LIT:
1463  *   The single argument is replicated across all three inputs, but swizzled:
1464  *     First argument: xyzy
1465  *     Second argument: xyzx
1466  *     Third argument: xyzw
1467  *   Whenever the result is used later in the fragment program, fglrx forces
1468  *   x and w to be 1.0 in the input selection; I don't know whether this is
1469  *   strictly necessary
1470  */
1471 #define R300_VPI_OUT_OP_DOT                     (1 << 0)
1472 #define R300_VPI_OUT_OP_MUL                     (2 << 0)
1473 #define R300_VPI_OUT_OP_ADD                     (3 << 0)
1474 #define R300_VPI_OUT_OP_MAD                     (4 << 0)
1475 #define R300_VPI_OUT_OP_DST                     (5 << 0)
1476 #define R300_VPI_OUT_OP_FRC                     (6 << 0)
1477 #define R300_VPI_OUT_OP_MAX                     (7 << 0)
1478 #define R300_VPI_OUT_OP_MIN                     (8 << 0)
1479 #define R300_VPI_OUT_OP_SGE                     (9 << 0)
1480 #define R300_VPI_OUT_OP_SLT                     (10 << 0)
1481         /* Used in GL_POINT_DISTANCE_ATTENUATION_ARB, vector(scalar, vector) */
1482 #define R300_VPI_OUT_OP_UNK12                   (12 << 0)
1483 #define R300_VPI_OUT_OP_ARL                     (13 << 0)
1484 #define R300_VPI_OUT_OP_EXP                     (65 << 0)
1485 #define R300_VPI_OUT_OP_LOG                     (66 << 0)
1486         /* Used in fog computations, scalar(scalar) */
1487 #define R300_VPI_OUT_OP_UNK67                   (67 << 0)
1488 #define R300_VPI_OUT_OP_LIT                     (68 << 0)
1489 #define R300_VPI_OUT_OP_POW                     (69 << 0)
1490 #define R300_VPI_OUT_OP_RCP                     (70 << 0)
1491 #define R300_VPI_OUT_OP_RSQ                     (72 << 0)
1492         /* Used in GL_POINT_DISTANCE_ATTENUATION_ARB, scalar(scalar) */
1493 #define R300_VPI_OUT_OP_UNK73                   (73 << 0)
1494 #define R300_VPI_OUT_OP_EX2                     (75 << 0)
1495 #define R300_VPI_OUT_OP_LG2                     (76 << 0)
1496 #define R300_VPI_OUT_OP_MAD_2                   (128 << 0)
1497         /* all temps, vector(scalar, vector, vector) */
1498 #define R300_VPI_OUT_OP_UNK129                  (129 << 0)
1499
1500 #define R300_VPI_OUT_REG_CLASS_TEMPORARY        (0 << 8)
1501 #define R300_VPI_OUT_REG_CLASS_ADDR             (1 << 8)
1502 #define R300_VPI_OUT_REG_CLASS_RESULT           (2 << 8)
1503 #define R300_VPI_OUT_REG_CLASS_MASK             (31 << 8)
1504
1505 #define R300_VPI_OUT_REG_INDEX_SHIFT            13
1506         /* GUESS based on fglrx native limits */
1507 #define R300_VPI_OUT_REG_INDEX_MASK             (31 << 13)
1508
1509 #define R300_VPI_OUT_WRITE_X                    (1 << 20)
1510 #define R300_VPI_OUT_WRITE_Y                    (1 << 21)
1511 #define R300_VPI_OUT_WRITE_Z                    (1 << 22)
1512 #define R300_VPI_OUT_WRITE_W                    (1 << 23)
1513
1514 #define R300_VPI_IN_REG_CLASS_TEMPORARY         (0 << 0)
1515 #define R300_VPI_IN_REG_CLASS_ATTRIBUTE         (1 << 0)
1516 #define R300_VPI_IN_REG_CLASS_PARAMETER         (2 << 0)
1517 #define R300_VPI_IN_REG_CLASS_NONE              (9 << 0)
1518 #define R300_VPI_IN_REG_CLASS_MASK              (31 << 0)
1519
1520 #define R300_VPI_IN_REG_INDEX_SHIFT             5
1521         /* GUESS based on fglrx native limits */
1522 #define R300_VPI_IN_REG_INDEX_MASK              (255 << 5)
1523
1524 /* The R300 can select components from the input register arbitrarily.
1525  * Use the following constants, shifted by the component shift you
1526  * want to select
1527  */
1528 #define R300_VPI_IN_SELECT_X    0
1529 #define R300_VPI_IN_SELECT_Y    1
1530 #define R300_VPI_IN_SELECT_Z    2
1531 #define R300_VPI_IN_SELECT_W    3
1532 #define R300_VPI_IN_SELECT_ZERO 4
1533 #define R300_VPI_IN_SELECT_ONE  5
1534 #define R300_VPI_IN_SELECT_MASK 7
1535
1536 #define R300_VPI_IN_X_SHIFT                     13
1537 #define R300_VPI_IN_Y_SHIFT                     16
1538 #define R300_VPI_IN_Z_SHIFT                     19
1539 #define R300_VPI_IN_W_SHIFT                     22
1540
1541 #define R300_VPI_IN_NEG_X                       (1 << 25)
1542 #define R300_VPI_IN_NEG_Y                       (1 << 26)
1543 #define R300_VPI_IN_NEG_Z                       (1 << 27)
1544 #define R300_VPI_IN_NEG_W                       (1 << 28)
1545 /* END: Vertex program instruction set */
1546
1547 /* BEGIN: Packet 3 commands */
1548
1549 /* A primitive emission dword. */
1550 #define R300_PRIM_TYPE_NONE                     (0 << 0)
1551 #define R300_PRIM_TYPE_POINT                    (1 << 0)
1552 #define R300_PRIM_TYPE_LINE                     (2 << 0)
1553 #define R300_PRIM_TYPE_LINE_STRIP               (3 << 0)
1554 #define R300_PRIM_TYPE_TRI_LIST                 (4 << 0)
1555 #define R300_PRIM_TYPE_TRI_FAN                  (5 << 0)
1556 #define R300_PRIM_TYPE_TRI_STRIP                (6 << 0)
1557 #define R300_PRIM_TYPE_TRI_TYPE2                (7 << 0)
1558 #define R300_PRIM_TYPE_RECT_LIST                (8 << 0)
1559 #define R300_PRIM_TYPE_3VRT_POINT_LIST          (9 << 0)
1560 #define R300_PRIM_TYPE_3VRT_LINE_LIST           (10 << 0)
1561         /* GUESS (based on r200) */
1562 #define R300_PRIM_TYPE_POINT_SPRITES            (11 << 0)
1563 #define R300_PRIM_TYPE_LINE_LOOP                (12 << 0)
1564 #define R300_PRIM_TYPE_QUADS                    (13 << 0)
1565 #define R300_PRIM_TYPE_QUAD_STRIP               (14 << 0)
1566 #define R300_PRIM_TYPE_POLYGON                  (15 << 0)
1567 #define R300_PRIM_TYPE_MASK                     0xF
1568 #define R300_PRIM_WALK_IND                      (1 << 4)
1569 #define R300_PRIM_WALK_LIST                     (2 << 4)
1570 #define R300_PRIM_WALK_RING                     (3 << 4)
1571 #define R300_PRIM_WALK_MASK                     (3 << 4)
1572         /* GUESS (based on r200) */
1573 #define R300_PRIM_COLOR_ORDER_BGRA              (0 << 6)
1574 #define R300_PRIM_COLOR_ORDER_RGBA              (1 << 6)
1575 #define R300_PRIM_NUM_VERTICES_SHIFT            16
1576 #define R300_PRIM_NUM_VERTICES_MASK             0xffff
1577
1578 /* Draw a primitive from vertex data in arrays loaded via 3D_LOAD_VBPNTR.
1579  * Two parameter dwords:
1580  * 0. The first parameter appears to be always 0
1581  * 1. The second parameter is a standard primitive emission dword.
1582  */
1583 #define R300_PACKET3_3D_DRAW_VBUF           0x00002800
1584
1585 /* Specify the full set of vertex arrays as (address, stride).
1586  * The first parameter is the number of vertex arrays specified.
1587  * The rest of the command is a variable length list of blocks, where
1588  * each block is three dwords long and specifies two arrays.
1589  * The first dword of a block is split into two words, the lower significant
1590  * word refers to the first array, the more significant word to the second
1591  * array in the block.
1592  * The low byte of each word contains the size of an array entry in dwords,
1593  * the high byte contains the stride of the array.
1594  * The second dword of a block contains the pointer to the first array,
1595  * the third dword of a block contains the pointer to the second array.
1596  * Note that if the total number of arrays is odd, the third dword of
1597  * the last block is omitted.
1598  */
1599 #define R300_PACKET3_3D_LOAD_VBPNTR         0x00002F00
1600
1601 #define R300_PACKET3_INDX_BUFFER            0x00003300
1602 #    define R300_EB_UNK1_SHIFT                      24
1603 #    define R300_EB_UNK1                    (0x80<<24)
1604 #    define R300_EB_UNK2                        0x0810
1605 #define R300_PACKET3_3D_DRAW_VBUF_2         0x00003400
1606 #define R300_PACKET3_3D_DRAW_INDX_2         0x00003600
1607
1608 /* END: Packet 3 commands */
1609
1610
1611 /* Color formats for 2d packets
1612  */
1613 #define R300_CP_COLOR_FORMAT_CI8        2
1614 #define R300_CP_COLOR_FORMAT_ARGB1555   3
1615 #define R300_CP_COLOR_FORMAT_RGB565     4
1616 #define R300_CP_COLOR_FORMAT_ARGB8888   6
1617 #define R300_CP_COLOR_FORMAT_RGB332     7
1618 #define R300_CP_COLOR_FORMAT_RGB8       9
1619 #define R300_CP_COLOR_FORMAT_ARGB4444   15
1620
1621 /*
1622  * CP type-3 packets
1623  */
1624 #define R300_CP_CMD_BITBLT_MULTI        0xC0009B00
1625
1626 #define R500_VAP_INDEX_OFFSET           0x208c
1627
1628 #define R500_GA_US_VECTOR_INDEX         0x4250
1629 #define R500_GA_US_VECTOR_DATA          0x4254
1630
1631 #define R500_RS_IP_0                    0x4074
1632 #define R500_RS_INST_0                  0x4320
1633
1634 #define R500_US_CONFIG                  0x4600
1635
1636 #define R500_US_FC_CTRL                 0x4624
1637 #define R500_US_CODE_ADDR               0x4630
1638
1639 #define R500_RB3D_COLOR_CLEAR_VALUE_AR  0x46c0
1640 #define R500_RB3D_CONSTANT_COLOR_AR     0x4ef8
1641
1642 #endif /* _R300_REG_H */