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[ALSA] Remove superfluous macros
[linux-2.6/linux-loongson.git] / sound / pci / atiixp_modem.c
blob649a999214e28daa4553a12de8dbfb8bbf98b1a1
1 /*
2 * ALSA driver for ATI IXP 150/200/250 AC97 modem controllers
3 *
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22 #include <sound/driver.h>
23 #include <asm/io.h>
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
26 #include <linux/init.h>
27 #include <linux/pci.h>
28 #include <linux/slab.h>
29 #include <linux/moduleparam.h>
30 #include <sound/core.h>
31 #include <sound/pcm.h>
32 #include <sound/pcm_params.h>
33 #include <sound/info.h>
34 #include <sound/ac97_codec.h>
35 #include <sound/initval.h>
36
37 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
38 MODULE_DESCRIPTION("ATI IXP MC97 controller");
39 MODULE_LICENSE("GPL");
40 MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250}}");
41
42 static int index = -2; /* Exclude the first card */
43 static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
44 static int ac97_clock = 48000;
45
46 module_param(index, int, 0444);
47 MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
48 module_param(id, charp, 0444);
49 MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
50 module_param(ac97_clock, int, 0444);
51 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
52
53 /* just for backward compatibility */
54 static int enable;
55 module_param(enable, bool, 0444);
56
57
58 /*
59 */
60
61 #define ATI_REG_ISR 0x00 /* interrupt source */
62 #define ATI_REG_ISR_MODEM_IN_XRUN (1U<<0)
63 #define ATI_REG_ISR_MODEM_IN_STATUS (1U<<1)
64 #define ATI_REG_ISR_MODEM_OUT1_XRUN (1U<<2)
65 #define ATI_REG_ISR_MODEM_OUT1_STATUS (1U<<3)
66 #define ATI_REG_ISR_MODEM_OUT2_XRUN (1U<<4)
67 #define ATI_REG_ISR_MODEM_OUT2_STATUS (1U<<5)
68 #define ATI_REG_ISR_MODEM_OUT3_XRUN (1U<<6)
69 #define ATI_REG_ISR_MODEM_OUT3_STATUS (1U<<7)
70 #define ATI_REG_ISR_PHYS_INTR (1U<<8)
71 #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
72 #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
73 #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
74 #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
75 #define ATI_REG_ISR_NEW_FRAME (1U<<13)
76 #define ATI_REG_ISR_MODEM_GPIO_DATA (1U<<14)
77
78 #define ATI_REG_IER 0x04 /* interrupt enable */
79 #define ATI_REG_IER_MODEM_IN_XRUN_EN (1U<<0)
80 #define ATI_REG_IER_MODEM_STATUS_EN (1U<<1)
81 #define ATI_REG_IER_MODEM_OUT1_XRUN_EN (1U<<2)
82 #define ATI_REG_IER_MODEM_OUT2_XRUN_EN (1U<<4)
83 #define ATI_REG_IER_MODEM_OUT3_XRUN_EN (1U<<6)
84 #define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
85 #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
86 #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
87 #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
88 #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
89 #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
90 #define ATI_REG_IER_MODEM_GPIO_DATA_EN (1U<<14) /* (WO) modem is running */
91 #define ATI_REG_IER_MODEM_SET_BUS_BUSY (1U<<15)
92
93 #define ATI_REG_CMD 0x08 /* command */
94 #define ATI_REG_CMD_POWERDOWN (1U<<0)
95 #define ATI_REG_CMD_MODEM_RECEIVE_EN (1U<<1) /* modem only */
96 #define ATI_REG_CMD_MODEM_SEND1_EN (1U<<2) /* modem only */
97 #define ATI_REG_CMD_MODEM_SEND2_EN (1U<<3) /* modem only */
98 #define ATI_REG_CMD_MODEM_SEND3_EN (1U<<4) /* modem only */
99 #define ATI_REG_CMD_MODEM_STATUS_MEM (1U<<5) /* modem only */
100 #define ATI_REG_CMD_MODEM_IN_DMA_EN (1U<<8) /* modem only */
101 #define ATI_REG_CMD_MODEM_OUT_DMA1_EN (1U<<9) /* modem only */
102 #define ATI_REG_CMD_MODEM_OUT_DMA2_EN (1U<<10) /* modem only */
103 #define ATI_REG_CMD_MODEM_OUT_DMA3_EN (1U<<11) /* modem only */
104 #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
105 #define ATI_REG_CMD_MODEM_GPIO_THRU_DMA (1U<<22) /* modem only */
106 #define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
107 #define ATI_REG_CMD_PACKED_DIS (1U<<24)
108 #define ATI_REG_CMD_BURST_EN (1U<<25)
109 #define ATI_REG_CMD_PANIC_EN (1U<<26)
110 #define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
111 #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
112 #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
113 #define ATI_REG_CMD_AC_SYNC (1U<<30)
114 #define ATI_REG_CMD_AC_RESET (1U<<31)
115
116 #define ATI_REG_PHYS_OUT_ADDR 0x0c
117 #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
118 #define ATI_REG_PHYS_OUT_RW (1U<<2)
119 #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
120 #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
121 #define ATI_REG_PHYS_OUT_DATA_SHIFT 16
122
123 #define ATI_REG_PHYS_IN_ADDR 0x10
124 #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
125 #define ATI_REG_PHYS_IN_ADDR_SHIFT 9
126 #define ATI_REG_PHYS_IN_DATA_SHIFT 16
127
128 #define ATI_REG_SLOTREQ 0x14
129
130 #define ATI_REG_COUNTER 0x18
131 #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
132 #define ATI_REG_COUNTER_BITCLOCK (31U<<8)
133
134 #define ATI_REG_IN_FIFO_THRESHOLD 0x1c
135
136 #define ATI_REG_MODEM_IN_DMA_LINKPTR 0x20
137 #define ATI_REG_MODEM_IN_DMA_DT_START 0x24 /* RO */
138 #define ATI_REG_MODEM_IN_DMA_DT_NEXT 0x28 /* RO */
139 #define ATI_REG_MODEM_IN_DMA_DT_CUR 0x2c /* RO */
140 #define ATI_REG_MODEM_IN_DMA_DT_SIZE 0x30
141 #define ATI_REG_MODEM_OUT_FIFO 0x34 /* output threshold */
142 #define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK (0xf<<16)
143 #define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT 16
144 #define ATI_REG_MODEM_OUT_DMA1_LINKPTR 0x38
145 #define ATI_REG_MODEM_OUT_DMA2_LINKPTR 0x3c
146 #define ATI_REG_MODEM_OUT_DMA3_LINKPTR 0x40
147 #define ATI_REG_MODEM_OUT_DMA1_DT_START 0x44
148 #define ATI_REG_MODEM_OUT_DMA1_DT_NEXT 0x48
149 #define ATI_REG_MODEM_OUT_DMA1_DT_CUR 0x4c
150 #define ATI_REG_MODEM_OUT_DMA2_DT_START 0x50
151 #define ATI_REG_MODEM_OUT_DMA2_DT_NEXT 0x54
152 #define ATI_REG_MODEM_OUT_DMA2_DT_CUR 0x58
153 #define ATI_REG_MODEM_OUT_DMA3_DT_START 0x5c
154 #define ATI_REG_MODEM_OUT_DMA3_DT_NEXT 0x60
155 #define ATI_REG_MODEM_OUT_DMA3_DT_CUR 0x64
156 #define ATI_REG_MODEM_OUT_DMA12_DT_SIZE 0x68
157 #define ATI_REG_MODEM_OUT_DMA3_DT_SIZE 0x6c
158 #define ATI_REG_MODEM_OUT_FIFO_USED 0x70
159 #define ATI_REG_MODEM_OUT_GPIO 0x74
160 #define ATI_REG_MODEM_OUT_GPIO_EN 1
161 #define ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT 5
162 #define ATI_REG_MODEM_IN_GPIO 0x78
163
164 #define ATI_REG_MODEM_MIRROR 0x7c
165 #define ATI_REG_AUDIO_MIRROR 0x80
166
167 #define ATI_REG_MODEM_FIFO_FLUSH 0x88
168 #define ATI_REG_MODEM_FIFO_OUT1_FLUSH (1U<<0)
169 #define ATI_REG_MODEM_FIFO_OUT2_FLUSH (1U<<1)
170 #define ATI_REG_MODEM_FIFO_OUT3_FLUSH (1U<<2)
171 #define ATI_REG_MODEM_FIFO_IN_FLUSH (1U<<3)
172
173 /* LINKPTR */
174 #define ATI_REG_LINKPTR_EN (1U<<0)
175
176 #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
177
178
179 /*
180 */
181
182 typedef struct snd_atiixp atiixp_t;
183 typedef struct snd_atiixp_dma atiixp_dma_t;
184 typedef struct snd_atiixp_dma_ops atiixp_dma_ops_t;
185
186
187 /*
188 * DMA packate descriptor
189 */
190
191 typedef struct atiixp_dma_desc {
192 u32 addr; /* DMA buffer address */
193 u16 status; /* status bits */
194 u16 size; /* size of the packet in dwords */
195 u32 next; /* address of the next packet descriptor */
196 } atiixp_dma_desc_t;
197
198 /*
199 * stream enum
200 */
201 enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, NUM_ATI_DMAS }; /* DMAs */
202 enum { ATI_PCM_OUT, ATI_PCM_IN, NUM_ATI_PCMS }; /* AC97 pcm slots */
203 enum { ATI_PCMDEV_ANALOG, NUM_ATI_PCMDEVS }; /* pcm devices */
204
205 #define NUM_ATI_CODECS 3
206
207
208 /*
209 * constants and callbacks for each DMA type
210 */
211 struct snd_atiixp_dma_ops {
212 int type; /* ATI_DMA_XXX */
213 unsigned int llp_offset; /* LINKPTR offset */
214 unsigned int dt_cur; /* DT_CUR offset */
215 void (*enable_dma)(atiixp_t *chip, int on); /* called from open callback */
216 void (*enable_transfer)(atiixp_t *chip, int on); /* called from trigger (START/STOP) */
217 void (*flush_dma)(atiixp_t *chip); /* called from trigger (STOP only) */
218 };
219
220 /*
221 * DMA stream
222 */
223 struct snd_atiixp_dma {
224 const atiixp_dma_ops_t *ops;
225 struct snd_dma_buffer desc_buf;
226 snd_pcm_substream_t *substream; /* assigned PCM substream */
227 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
228 unsigned int period_bytes, periods;
229 int opened;
230 int running;
231 int pcm_open_flag;
232 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
233 };
234
235 /*
236 * ATI IXP chip
237 */
238 struct snd_atiixp {
239 snd_card_t *card;
240 struct pci_dev *pci;
241
242 struct resource *res; /* memory i/o */
243 unsigned long addr;
244 void __iomem *remap_addr;
245 int irq;
246
247 ac97_bus_t *ac97_bus;
248 ac97_t *ac97[NUM_ATI_CODECS];
249
250 spinlock_t reg_lock;
251
252 atiixp_dma_t dmas[NUM_ATI_DMAS];
253 struct ac97_pcm *pcms[NUM_ATI_PCMS];
254 snd_pcm_t *pcmdevs[NUM_ATI_PCMDEVS];
255
256 int max_channels; /* max. channels for PCM out */
257
258 unsigned int codec_not_ready_bits; /* for codec detection */
259
260 int spdif_over_aclink; /* passed from the module option */
261 struct semaphore open_mutex; /* playback open mutex */
262 };
263
264
265 /*
266 */
267 static struct pci_device_id snd_atiixp_ids[] = {
268 { 0x1002, 0x434d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB200 */
269 { 0x1002, 0x4378, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB400 */
270 { 0, }
271 };
272
273 MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
274
275
276 /*
277 * lowlevel functions
278 */
279
280 /*
281 * update the bits of the given register.
282 * return 1 if the bits changed.
283 */
284 static int snd_atiixp_update_bits(atiixp_t *chip, unsigned int reg,
285 unsigned int mask, unsigned int value)
286 {
287 void __iomem *addr = chip->remap_addr + reg;
288 unsigned int data, old_data;
289 old_data = data = readl(addr);
290 data &= ~mask;
291 data |= value;
292 if (old_data == data)
293 return 0;
294 writel(data, addr);
295 return 1;
296 }
297
298 /*
299 * macros for easy use
300 */
301 #define atiixp_write(chip,reg,value) \
302 writel(value, chip->remap_addr + ATI_REG_##reg)
303 #define atiixp_read(chip,reg) \
304 readl(chip->remap_addr + ATI_REG_##reg)
305 #define atiixp_update(chip,reg,mask,val) \
306 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
307
308 /*
309 * handling DMA packets
310 *
311 * we allocate a linear buffer for the DMA, and split it to each packet.
312 * in a future version, a scatter-gather buffer should be implemented.
313 */
314
315 #define ATI_DESC_LIST_SIZE \
316 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(atiixp_dma_desc_t))
317
318 /*
319 * build packets ring for the given buffer size.
320 *
321 * IXP handles the buffer descriptors, which are connected as a linked
322 * list. although we can change the list dynamically, in this version,
323 * a static RING of buffer descriptors is used.
324 *
325 * the ring is built in this function, and is set up to the hardware.
326 */
327 static int atiixp_build_dma_packets(atiixp_t *chip, atiixp_dma_t *dma,
328 snd_pcm_substream_t *substream,
329 unsigned int periods,
330 unsigned int period_bytes)
331 {
332 unsigned int i;
333 u32 addr, desc_addr;
334 unsigned long flags;
335
336 if (periods > ATI_MAX_DESCRIPTORS)
337 return -ENOMEM;
338
339 if (dma->desc_buf.area == NULL) {
340 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
341 ATI_DESC_LIST_SIZE, &dma->desc_buf) < 0)
342 return -ENOMEM;
343 dma->period_bytes = dma->periods = 0; /* clear */
344 }
345
346 if (dma->periods == periods && dma->period_bytes == period_bytes)
347 return 0;
348
349 /* reset DMA before changing the descriptor table */
350 spin_lock_irqsave(&chip->reg_lock, flags);
351 writel(0, chip->remap_addr + dma->ops->llp_offset);
352 dma->ops->enable_dma(chip, 0);
353 dma->ops->enable_dma(chip, 1);
354 spin_unlock_irqrestore(&chip->reg_lock, flags);
355
356 /* fill the entries */
357 addr = (u32)substream->runtime->dma_addr;
358 desc_addr = (u32)dma->desc_buf.addr;
359 for (i = 0; i < periods; i++) {
360 atiixp_dma_desc_t *desc = &((atiixp_dma_desc_t *)dma->desc_buf.area)[i];
361 desc->addr = cpu_to_le32(addr);
362 desc->status = 0;
363 desc->size = period_bytes >> 2; /* in dwords */
364 desc_addr += sizeof(atiixp_dma_desc_t);
365 if (i == periods - 1)
366 desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
367 else
368 desc->next = cpu_to_le32(desc_addr);
369 addr += period_bytes;
370 }
371
372 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
373 chip->remap_addr + dma->ops->llp_offset);
374
375 dma->period_bytes = period_bytes;
376 dma->periods = periods;
377
378 return 0;
379 }
380
381 /*
382 * remove the ring buffer and release it if assigned
383 */
384 static void atiixp_clear_dma_packets(atiixp_t *chip, atiixp_dma_t *dma, snd_pcm_substream_t *substream)
385 {
386 if (dma->desc_buf.area) {
387 writel(0, chip->remap_addr + dma->ops->llp_offset);
388 snd_dma_free_pages(&dma->desc_buf);
389 dma->desc_buf.area = NULL;
390 }
391 }
392
393 /*
394 * AC97 interface
395 */
396 static int snd_atiixp_acquire_codec(atiixp_t *chip)
397 {
398 int timeout = 1000;
399
400 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
401 if (! timeout--) {
402 snd_printk(KERN_WARNING "atiixp-modem: codec acquire timeout\n");
403 return -EBUSY;
404 }
405 udelay(1);
406 }
407 return 0;
408 }
409
410 static unsigned short snd_atiixp_codec_read(atiixp_t *chip, unsigned short codec, unsigned short reg)
411 {
412 unsigned int data;
413 int timeout;
414
415 if (snd_atiixp_acquire_codec(chip) < 0)
416 return 0xffff;
417 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
418 ATI_REG_PHYS_OUT_ADDR_EN |
419 ATI_REG_PHYS_OUT_RW |
420 codec;
421 atiixp_write(chip, PHYS_OUT_ADDR, data);
422 if (snd_atiixp_acquire_codec(chip) < 0)
423 return 0xffff;
424 timeout = 1000;
425 do {
426 data = atiixp_read(chip, PHYS_IN_ADDR);
427 if (data & ATI_REG_PHYS_IN_READ_FLAG)
428 return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
429 udelay(1);
430 } while (--timeout);
431 /* time out may happen during reset */
432 if (reg < 0x7c)
433 snd_printk(KERN_WARNING "atiixp-modem: codec read timeout (reg %x)\n", reg);
434 return 0xffff;
435 }
436
437
438 static void snd_atiixp_codec_write(atiixp_t *chip, unsigned short codec, unsigned short reg, unsigned short val)
439 {
440 unsigned int data;
441
442 if (snd_atiixp_acquire_codec(chip) < 0)
443 return;
444 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
445 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
446 ATI_REG_PHYS_OUT_ADDR_EN | codec;
447 atiixp_write(chip, PHYS_OUT_ADDR, data);
448 }
449
450
451 static unsigned short snd_atiixp_ac97_read(ac97_t *ac97, unsigned short reg)
452 {
453 atiixp_t *chip = ac97->private_data;
454 return snd_atiixp_codec_read(chip, ac97->num, reg);
455
456 }
457
458 static void snd_atiixp_ac97_write(ac97_t *ac97, unsigned short reg, unsigned short val)
459 {
460 atiixp_t *chip = ac97->private_data;
461 if (reg == AC97_GPIO_STATUS) {
462 atiixp_write(chip, MODEM_OUT_GPIO,
463 (val << ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT) | ATI_REG_MODEM_OUT_GPIO_EN);
464 return;
465 }
466 snd_atiixp_codec_write(chip, ac97->num, reg, val);
467 }
468
469 /*
470 * reset AC link
471 */
472 static int snd_atiixp_aclink_reset(atiixp_t *chip)
473 {
474 int timeout;
475
476 /* reset powerdoewn */
477 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
478 udelay(10);
479
480 /* perform a software reset */
481 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
482 atiixp_read(chip, CMD);
483 udelay(10);
484 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
485
486 timeout = 10;
487 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
488 /* do a hard reset */
489 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
490 ATI_REG_CMD_AC_SYNC);
491 atiixp_read(chip, CMD);
492 msleep(1);
493 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
494 if (--timeout) {
495 snd_printk(KERN_ERR "atiixp-modem: codec reset timeout\n");
496 break;
497 }
498 }
499
500 /* deassert RESET and assert SYNC to make sure */
501 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
502 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
503
504 return 0;
505 }
506
507 #ifdef CONFIG_PM
508 static int snd_atiixp_aclink_down(atiixp_t *chip)
509 {
510 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
511 // return -EBUSY;
512 atiixp_update(chip, CMD,
513 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
514 ATI_REG_CMD_POWERDOWN);
515 return 0;
516 }
517 #endif
518
519 /*
520 * auto-detection of codecs
521 *
522 * the IXP chip can generate interrupts for the non-existing codecs.
523 * NEW_FRAME interrupt is used to make sure that the interrupt is generated
524 * even if all three codecs are connected.
525 */
526
527 #define ALL_CODEC_NOT_READY \
528 (ATI_REG_ISR_CODEC0_NOT_READY |\
529 ATI_REG_ISR_CODEC1_NOT_READY |\
530 ATI_REG_ISR_CODEC2_NOT_READY)
531 #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
532
533 static int snd_atiixp_codec_detect(atiixp_t *chip)
534 {
535 int timeout;
536
537 chip->codec_not_ready_bits = 0;
538 atiixp_write(chip, IER, CODEC_CHECK_BITS);
539 /* wait for the interrupts */
540 timeout = 50;
541 while (timeout-- > 0) {
542 msleep(1);
543 if (chip->codec_not_ready_bits)
544 break;
545 }
546 atiixp_write(chip, IER, 0); /* disable irqs */
547
548 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
549 snd_printk(KERN_ERR "atiixp-modem: no codec detected!\n");
550 return -ENXIO;
551 }
552 return 0;
553 }
554
555
556 /*
557 * enable DMA and irqs
558 */
559 static int snd_atiixp_chip_start(atiixp_t *chip)
560 {
561 unsigned int reg;
562
563 /* set up spdif, enable burst mode */
564 reg = atiixp_read(chip, CMD);
565 reg |= ATI_REG_CMD_BURST_EN;
566 if(!(reg & ATI_REG_CMD_MODEM_PRESENT))
567 reg |= ATI_REG_CMD_MODEM_PRESENT;
568 atiixp_write(chip, CMD, reg);
569
570 /* clear all interrupt source */
571 atiixp_write(chip, ISR, 0xffffffff);
572 /* enable irqs */
573 atiixp_write(chip, IER,
574 ATI_REG_IER_MODEM_STATUS_EN |
575 ATI_REG_IER_MODEM_IN_XRUN_EN |
576 ATI_REG_IER_MODEM_OUT1_XRUN_EN);
577 return 0;
578 }
579
580
581 /*
582 * disable DMA and IRQs
583 */
584 static int snd_atiixp_chip_stop(atiixp_t *chip)
585 {
586 /* clear interrupt source */
587 atiixp_write(chip, ISR, atiixp_read(chip, ISR));
588 /* disable irqs */
589 atiixp_write(chip, IER, 0);
590 return 0;
591 }
592
593
594 /*
595 * PCM section
596 */
597
598 /*
599 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
600 * position. when SG-buffer is implemented, the offset must be calculated
601 * correctly...
602 */
603 static snd_pcm_uframes_t snd_atiixp_pcm_pointer(snd_pcm_substream_t *substream)
604 {
605 atiixp_t *chip = snd_pcm_substream_chip(substream);
606 snd_pcm_runtime_t *runtime = substream->runtime;
607 atiixp_dma_t *dma = (atiixp_dma_t *)runtime->private_data;
608 unsigned int curptr;
609 int timeout = 1000;
610
611 while (timeout--) {
612 curptr = readl(chip->remap_addr + dma->ops->dt_cur);
613 if (curptr < dma->buf_addr)
614 continue;
615 curptr -= dma->buf_addr;
616 if (curptr >= dma->buf_bytes)
617 continue;
618 return bytes_to_frames(runtime, curptr);
619 }
620 snd_printd("atiixp-modem: invalid DMA pointer read 0x%x (buf=%x)\n",
621 readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
622 return 0;
623 }
624
625 /*
626 * XRUN detected, and stop the PCM substream
627 */
628 static void snd_atiixp_xrun_dma(atiixp_t *chip, atiixp_dma_t *dma)
629 {
630 if (! dma->substream || ! dma->running)
631 return;
632 snd_printdd("atiixp-modem: XRUN detected (DMA %d)\n", dma->ops->type);
633 snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN);
634 }
635
636 /*
637 * the period ack. update the substream.
638 */
639 static void snd_atiixp_update_dma(atiixp_t *chip, atiixp_dma_t *dma)
640 {
641 if (! dma->substream || ! dma->running)
642 return;
643 snd_pcm_period_elapsed(dma->substream);
644 }
645
646 /* set BUS_BUSY interrupt bit if any DMA is running */
647 /* call with spinlock held */
648 static void snd_atiixp_check_bus_busy(atiixp_t *chip)
649 {
650 unsigned int bus_busy;
651 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_MODEM_SEND1_EN |
652 ATI_REG_CMD_MODEM_RECEIVE_EN))
653 bus_busy = ATI_REG_IER_MODEM_SET_BUS_BUSY;
654 else
655 bus_busy = 0;
656 atiixp_update(chip, IER, ATI_REG_IER_MODEM_SET_BUS_BUSY, bus_busy);
657 }
658
659 /* common trigger callback
660 * calling the lowlevel callbacks in it
661 */
662 static int snd_atiixp_pcm_trigger(snd_pcm_substream_t *substream, int cmd)
663 {
664 atiixp_t *chip = snd_pcm_substream_chip(substream);
665 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
666 int err = 0;
667
668 snd_assert(dma->ops->enable_transfer && dma->ops->flush_dma, return -EINVAL);
669
670 spin_lock(&chip->reg_lock);
671 switch(cmd) {
672 case SNDRV_PCM_TRIGGER_START:
673 dma->ops->enable_transfer(chip, 1);
674 dma->running = 1;
675 break;
676 case SNDRV_PCM_TRIGGER_STOP:
677 dma->ops->enable_transfer(chip, 0);
678 dma->running = 0;
679 break;
680 default:
681 err = -EINVAL;
682 break;
683 }
684 if (! err) {
685 snd_atiixp_check_bus_busy(chip);
686 if (cmd == SNDRV_PCM_TRIGGER_STOP) {
687 dma->ops->flush_dma(chip);
688 snd_atiixp_check_bus_busy(chip);
689 }
690 }
691 spin_unlock(&chip->reg_lock);
692 return err;
693 }
694
695
696 /*
697 * lowlevel callbacks for each DMA type
698 *
699 * every callback is supposed to be called in chip->reg_lock spinlock
700 */
701
702 /* flush FIFO of analog OUT DMA */
703 static void atiixp_out_flush_dma(atiixp_t *chip)
704 {
705 atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_OUT1_FLUSH);
706 }
707
708 /* enable/disable analog OUT DMA */
709 static void atiixp_out_enable_dma(atiixp_t *chip, int on)
710 {
711 unsigned int data;
712 data = atiixp_read(chip, CMD);
713 if (on) {
714 if (data & ATI_REG_CMD_MODEM_OUT_DMA1_EN)
715 return;
716 atiixp_out_flush_dma(chip);
717 data |= ATI_REG_CMD_MODEM_OUT_DMA1_EN;
718 } else
719 data &= ~ATI_REG_CMD_MODEM_OUT_DMA1_EN;
720 atiixp_write(chip, CMD, data);
721 }
722
723 /* start/stop transfer over OUT DMA */
724 static void atiixp_out_enable_transfer(atiixp_t *chip, int on)
725 {
726 atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_SEND1_EN,
727 on ? ATI_REG_CMD_MODEM_SEND1_EN : 0);
728 }
729
730 /* enable/disable analog IN DMA */
731 static void atiixp_in_enable_dma(atiixp_t *chip, int on)
732 {
733 atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_IN_DMA_EN,
734 on ? ATI_REG_CMD_MODEM_IN_DMA_EN : 0);
735 }
736
737 /* start/stop analog IN DMA */
738 static void atiixp_in_enable_transfer(atiixp_t *chip, int on)
739 {
740 if (on) {
741 unsigned int data = atiixp_read(chip, CMD);
742 if (! (data & ATI_REG_CMD_MODEM_RECEIVE_EN)) {
743 data |= ATI_REG_CMD_MODEM_RECEIVE_EN;
744 atiixp_write(chip, CMD, data);
745 }
746 } else
747 atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_RECEIVE_EN, 0);
748 }
749
750 /* flush FIFO of analog IN DMA */
751 static void atiixp_in_flush_dma(atiixp_t *chip)
752 {
753 atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_IN_FLUSH);
754 }
755
756 /* set up slots and formats for analog OUT */
757 static int snd_atiixp_playback_prepare(snd_pcm_substream_t *substream)
758 {
759 atiixp_t *chip = snd_pcm_substream_chip(substream);
760 unsigned int data;
761
762 spin_lock_irq(&chip->reg_lock);
763 /* set output threshold */
764 data = atiixp_read(chip, MODEM_OUT_FIFO);
765 data &= ~ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK;
766 data |= 0x04 << ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT;
767 atiixp_write(chip, MODEM_OUT_FIFO, data);
768 spin_unlock_irq(&chip->reg_lock);
769 return 0;
770 }
771
772 /* set up slots and formats for analog IN */
773 static int snd_atiixp_capture_prepare(snd_pcm_substream_t *substream)
774 {
775 return 0;
776 }
777
778 /*
779 * hw_params - allocate the buffer and set up buffer descriptors
780 */
781 static int snd_atiixp_pcm_hw_params(snd_pcm_substream_t *substream,
782 snd_pcm_hw_params_t *hw_params)
783 {
784 atiixp_t *chip = snd_pcm_substream_chip(substream);
785 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
786 int err;
787 int i;
788
789 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
790 if (err < 0)
791 return err;
792 dma->buf_addr = substream->runtime->dma_addr;
793 dma->buf_bytes = params_buffer_bytes(hw_params);
794
795 err = atiixp_build_dma_packets(chip, dma, substream,
796 params_periods(hw_params),
797 params_period_bytes(hw_params));
798 if (err < 0)
799 return err;
800
801 /* set up modem rate */
802 for (i = 0; i < NUM_ATI_CODECS; i++) {
803 if (! chip->ac97[i])
804 continue;
805 snd_ac97_write(chip->ac97[i], AC97_LINE1_RATE, params_rate(hw_params));
806 snd_ac97_write(chip->ac97[i], AC97_LINE1_LEVEL, 0);
807 }
808
809 return err;
810 }
811
812 static int snd_atiixp_pcm_hw_free(snd_pcm_substream_t * substream)
813 {
814 atiixp_t *chip = snd_pcm_substream_chip(substream);
815 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
816
817 atiixp_clear_dma_packets(chip, dma, substream);
818 snd_pcm_lib_free_pages(substream);
819 return 0;
820 }
821
822
823 /*
824 * pcm hardware definition, identical for all DMA types
825 */
826 static snd_pcm_hardware_t snd_atiixp_pcm_hw =
827 {
828 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
829 SNDRV_PCM_INFO_BLOCK_TRANSFER |
830 SNDRV_PCM_INFO_MMAP_VALID),
831 .formats = SNDRV_PCM_FMTBIT_S16_LE,
832 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_KNOT,
833 .rate_min = 8000,
834 .rate_max = 16000,
835 .channels_min = 2,
836 .channels_max = 2,
837 .buffer_bytes_max = 256 * 1024,
838 .period_bytes_min = 32,
839 .period_bytes_max = 128 * 1024,
840 .periods_min = 2,
841 .periods_max = ATI_MAX_DESCRIPTORS,
842 };
843
844 static int snd_atiixp_pcm_open(snd_pcm_substream_t *substream, atiixp_dma_t *dma, int pcm_type)
845 {
846 atiixp_t *chip = snd_pcm_substream_chip(substream);
847 snd_pcm_runtime_t *runtime = substream->runtime;
848 int err;
849 static unsigned int rates[] = { 8000, 9600, 12000, 16000 };
850 static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
851 .count = ARRAY_SIZE(rates),
852 .list = rates,
853 .mask = 0,
854 };
855
856 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
857
858 if (dma->opened)
859 return -EBUSY;
860 dma->substream = substream;
861 runtime->hw = snd_atiixp_pcm_hw;
862 dma->ac97_pcm_type = pcm_type;
863 if ((err = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates)) < 0)
864 return err;
865 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
866 return err;
867 runtime->private_data = dma;
868
869 /* enable DMA bits */
870 spin_lock_irq(&chip->reg_lock);
871 dma->ops->enable_dma(chip, 1);
872 spin_unlock_irq(&chip->reg_lock);
873 dma->opened = 1;
874
875 return 0;
876 }
877
878 static int snd_atiixp_pcm_close(snd_pcm_substream_t *substream, atiixp_dma_t *dma)
879 {
880 atiixp_t *chip = snd_pcm_substream_chip(substream);
881 /* disable DMA bits */
882 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
883 spin_lock_irq(&chip->reg_lock);
884 dma->ops->enable_dma(chip, 0);
885 spin_unlock_irq(&chip->reg_lock);
886 dma->substream = NULL;
887 dma->opened = 0;
888 return 0;
889 }
890
891 /*
892 */
893 static int snd_atiixp_playback_open(snd_pcm_substream_t *substream)
894 {
895 atiixp_t *chip = snd_pcm_substream_chip(substream);
896 int err;
897
898 down(&chip->open_mutex);
899 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
900 up(&chip->open_mutex);
901 if (err < 0)
902 return err;
903 return 0;
904 }
905
906 static int snd_atiixp_playback_close(snd_pcm_substream_t *substream)
907 {
908 atiixp_t *chip = snd_pcm_substream_chip(substream);
909 int err;
910 down(&chip->open_mutex);
911 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
912 up(&chip->open_mutex);
913 return err;
914 }
915
916 static int snd_atiixp_capture_open(snd_pcm_substream_t *substream)
917 {
918 atiixp_t *chip = snd_pcm_substream_chip(substream);
919 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
920 }
921
922 static int snd_atiixp_capture_close(snd_pcm_substream_t *substream)
923 {
924 atiixp_t *chip = snd_pcm_substream_chip(substream);
925 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
926 }
927
928
929 /* AC97 playback */
930 static snd_pcm_ops_t snd_atiixp_playback_ops = {
931 .open = snd_atiixp_playback_open,
932 .close = snd_atiixp_playback_close,
933 .ioctl = snd_pcm_lib_ioctl,
934 .hw_params = snd_atiixp_pcm_hw_params,
935 .hw_free = snd_atiixp_pcm_hw_free,
936 .prepare = snd_atiixp_playback_prepare,
937 .trigger = snd_atiixp_pcm_trigger,
938 .pointer = snd_atiixp_pcm_pointer,
939 };
940
941 /* AC97 capture */
942 static snd_pcm_ops_t snd_atiixp_capture_ops = {
943 .open = snd_atiixp_capture_open,
944 .close = snd_atiixp_capture_close,
945 .ioctl = snd_pcm_lib_ioctl,
946 .hw_params = snd_atiixp_pcm_hw_params,
947 .hw_free = snd_atiixp_pcm_hw_free,
948 .prepare = snd_atiixp_capture_prepare,
949 .trigger = snd_atiixp_pcm_trigger,
950 .pointer = snd_atiixp_pcm_pointer,
951 };
952
953 static atiixp_dma_ops_t snd_atiixp_playback_dma_ops = {
954 .type = ATI_DMA_PLAYBACK,
955 .llp_offset = ATI_REG_MODEM_OUT_DMA1_LINKPTR,
956 .dt_cur = ATI_REG_MODEM_OUT_DMA1_DT_CUR,
957 .enable_dma = atiixp_out_enable_dma,
958 .enable_transfer = atiixp_out_enable_transfer,
959 .flush_dma = atiixp_out_flush_dma,
960 };
961
962 static atiixp_dma_ops_t snd_atiixp_capture_dma_ops = {
963 .type = ATI_DMA_CAPTURE,
964 .llp_offset = ATI_REG_MODEM_IN_DMA_LINKPTR,
965 .dt_cur = ATI_REG_MODEM_IN_DMA_DT_CUR,
966 .enable_dma = atiixp_in_enable_dma,
967 .enable_transfer = atiixp_in_enable_transfer,
968 .flush_dma = atiixp_in_flush_dma,
969 };
970
971 static int __devinit snd_atiixp_pcm_new(atiixp_t *chip)
972 {
973 snd_pcm_t *pcm;
974 int err;
975
976 /* initialize constants */
977 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
978 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
979
980 /* PCM #0: analog I/O */
981 err = snd_pcm_new(chip->card, "ATI IXP MC97", ATI_PCMDEV_ANALOG, 1, 1, &pcm);
982 if (err < 0)
983 return err;
984 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
985 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
986 pcm->dev_class = SNDRV_PCM_CLASS_MODEM;
987 pcm->private_data = chip;
988 strcpy(pcm->name, "ATI IXP MC97");
989 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
990
991 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
992 snd_dma_pci_data(chip->pci), 64*1024, 128*1024);
993
994 return 0;
995 }
996
997
998
999 /*
1000 * interrupt handler
1001 */
1002 static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1003 {
1004 atiixp_t *chip = dev_id;
1005 unsigned int status;
1006
1007 status = atiixp_read(chip, ISR);
1008
1009 if (! status)
1010 return IRQ_NONE;
1011
1012 /* process audio DMA */
1013 if (status & ATI_REG_ISR_MODEM_OUT1_XRUN)
1014 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1015 else if (status & ATI_REG_ISR_MODEM_OUT1_STATUS)
1016 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1017 if (status & ATI_REG_ISR_MODEM_IN_XRUN)
1018 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1019 else if (status & ATI_REG_ISR_MODEM_IN_STATUS)
1020 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1021
1022 /* for codec detection */
1023 if (status & CODEC_CHECK_BITS) {
1024 unsigned int detected;
1025 detected = status & CODEC_CHECK_BITS;
1026 spin_lock(&chip->reg_lock);
1027 chip->codec_not_ready_bits |= detected;
1028 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
1029 spin_unlock(&chip->reg_lock);
1030 }
1031
1032 /* ack */
1033 atiixp_write(chip, ISR, status);
1034
1035 return IRQ_HANDLED;
1036 }
1037
1038
1039 /*
1040 * ac97 mixer section
1041 */
1042
1043 static int __devinit snd_atiixp_mixer_new(atiixp_t *chip, int clock)
1044 {
1045 ac97_bus_t *pbus;
1046 ac97_template_t ac97;
1047 int i, err;
1048 int codec_count;
1049 static ac97_bus_ops_t ops = {
1050 .write = snd_atiixp_ac97_write,
1051 .read = snd_atiixp_ac97_read,
1052 };
1053 static unsigned int codec_skip[NUM_ATI_CODECS] = {
1054 ATI_REG_ISR_CODEC0_NOT_READY,
1055 ATI_REG_ISR_CODEC1_NOT_READY,
1056 ATI_REG_ISR_CODEC2_NOT_READY,
1057 };
1058
1059 if (snd_atiixp_codec_detect(chip) < 0)
1060 return -ENXIO;
1061
1062 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
1063 return err;
1064 pbus->clock = clock;
1065 chip->ac97_bus = pbus;
1066
1067 codec_count = 0;
1068 for (i = 0; i < NUM_ATI_CODECS; i++) {
1069 if (chip->codec_not_ready_bits & codec_skip[i])
1070 continue;
1071 memset(&ac97, 0, sizeof(ac97));
1072 ac97.private_data = chip;
1073 ac97.pci = chip->pci;
1074 ac97.num = i;
1075 ac97.scaps = AC97_SCAP_SKIP_AUDIO;
1076 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
1077 chip->ac97[i] = NULL; /* to be sure */
1078 snd_printdd("atiixp-modem: codec %d not available for modem\n", i);
1079 continue;
1080 }
1081 codec_count++;
1082 }
1083
1084 if (! codec_count) {
1085 snd_printk(KERN_ERR "atiixp-modem: no codec available\n");
1086 return -ENODEV;
1087 }
1088
1089 /* snd_ac97_tune_hardware(chip->ac97, ac97_quirks); */
1090
1091 return 0;
1092 }
1093
1094
1095 #ifdef CONFIG_PM
1096 /*
1097 * power management
1098 */
1099 static int snd_atiixp_suspend(snd_card_t *card, pm_message_t state)
1100 {
1101 atiixp_t *chip = card->pm_private_data;
1102 int i;
1103
1104 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1105 if (chip->pcmdevs[i])
1106 snd_pcm_suspend_all(chip->pcmdevs[i]);
1107 for (i = 0; i < NUM_ATI_CODECS; i++)
1108 if (chip->ac97[i])
1109 snd_ac97_suspend(chip->ac97[i]);
1110 snd_atiixp_aclink_down(chip);
1111 snd_atiixp_chip_stop(chip);
1112
1113 pci_set_power_state(chip->pci, PCI_D3hot);
1114 pci_disable_device(chip->pci);
1115 return 0;
1116 }
1117
1118 static int snd_atiixp_resume(snd_card_t *card)
1119 {
1120 atiixp_t *chip = card->pm_private_data;
1121 int i;
1122
1123 pci_enable_device(chip->pci);
1124 pci_set_power_state(chip->pci, PCI_D0);
1125 pci_set_master(chip->pci);
1126
1127 snd_atiixp_aclink_reset(chip);
1128 snd_atiixp_chip_start(chip);
1129
1130 for (i = 0; i < NUM_ATI_CODECS; i++)
1131 if (chip->ac97[i])
1132 snd_ac97_resume(chip->ac97[i]);
1133
1134 return 0;
1135 }
1136 #endif /* CONFIG_PM */
1137
1138
1139 /*
1140 * proc interface for register dump
1141 */
1142
1143 static void snd_atiixp_proc_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
1144 {
1145 atiixp_t *chip = entry->private_data;
1146 int i;
1147
1148 for (i = 0; i < 256; i += 4)
1149 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
1150 }
1151
1152 static void __devinit snd_atiixp_proc_init(atiixp_t *chip)
1153 {
1154 snd_info_entry_t *entry;
1155
1156 if (! snd_card_proc_new(chip->card, "atiixp-modem", &entry))
1157 snd_info_set_text_ops(entry, chip, 1024, snd_atiixp_proc_read);
1158 }
1159
1160
1161
1162 /*
1163 * destructor
1164 */
1165
1166 static int snd_atiixp_free(atiixp_t *chip)
1167 {
1168 if (chip->irq < 0)
1169 goto __hw_end;
1170 snd_atiixp_chip_stop(chip);
1171 synchronize_irq(chip->irq);
1172 __hw_end:
1173 if (chip->irq >= 0)
1174 free_irq(chip->irq, (void *)chip);
1175 if (chip->remap_addr)
1176 iounmap(chip->remap_addr);
1177 pci_release_regions(chip->pci);
1178 pci_disable_device(chip->pci);
1179 kfree(chip);
1180 return 0;
1181 }
1182
1183 static int snd_atiixp_dev_free(snd_device_t *device)
1184 {
1185 atiixp_t *chip = device->device_data;
1186 return snd_atiixp_free(chip);
1187 }
1188
1189 /*
1190 * constructor for chip instance
1191 */
1192 static int __devinit snd_atiixp_create(snd_card_t *card,
1193 struct pci_dev *pci,
1194 atiixp_t **r_chip)
1195 {
1196 static snd_device_ops_t ops = {
1197 .dev_free = snd_atiixp_dev_free,
1198 };
1199 atiixp_t *chip;
1200 int err;
1201
1202 if ((err = pci_enable_device(pci)) < 0)
1203 return err;
1204
1205 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1206 if (chip == NULL) {
1207 pci_disable_device(pci);
1208 return -ENOMEM;
1209 }
1210
1211 spin_lock_init(&chip->reg_lock);
1212 init_MUTEX(&chip->open_mutex);
1213 chip->card = card;
1214 chip->pci = pci;
1215 chip->irq = -1;
1216 if ((err = pci_request_regions(pci, "ATI IXP MC97")) < 0) {
1217 kfree(chip);
1218 pci_disable_device(pci);
1219 return err;
1220 }
1221 chip->addr = pci_resource_start(pci, 0);
1222 chip->remap_addr = ioremap_nocache(chip->addr, pci_resource_len(pci, 0));
1223 if (chip->remap_addr == NULL) {
1224 snd_printk(KERN_ERR "AC'97 space ioremap problem\n");
1225 snd_atiixp_free(chip);
1226 return -EIO;
1227 }
1228
1229 if (request_irq(pci->irq, snd_atiixp_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
1230 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1231 snd_atiixp_free(chip);
1232 return -EBUSY;
1233 }
1234 chip->irq = pci->irq;
1235 pci_set_master(pci);
1236 synchronize_irq(chip->irq);
1237
1238 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1239 snd_atiixp_free(chip);
1240 return err;
1241 }
1242
1243 snd_card_set_dev(card, &pci->dev);
1244
1245 *r_chip = chip;
1246 return 0;
1247 }
1248
1249
1250 static int __devinit snd_atiixp_probe(struct pci_dev *pci,
1251 const struct pci_device_id *pci_id)
1252 {
1253 snd_card_t *card;
1254 atiixp_t *chip;
1255 unsigned char revision;
1256 int err;
1257
1258 card = snd_card_new(index, id, THIS_MODULE, 0);
1259 if (card == NULL)
1260 return -ENOMEM;
1261
1262 pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
1263
1264 strcpy(card->driver, "ATIIXP-MODEM");
1265 strcpy(card->shortname, "ATI IXP Modem");
1266 if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
1267 goto __error;
1268
1269 if ((err = snd_atiixp_aclink_reset(chip)) < 0)
1270 goto __error;
1271
1272 if ((err = snd_atiixp_mixer_new(chip, ac97_clock)) < 0)
1273 goto __error;
1274
1275 if ((err = snd_atiixp_pcm_new(chip)) < 0)
1276 goto __error;
1277
1278 snd_atiixp_proc_init(chip);
1279
1280 snd_atiixp_chip_start(chip);
1281
1282 sprintf(card->longname, "%s rev %x at 0x%lx, irq %i",
1283 card->shortname, revision, chip->addr, chip->irq);
1284
1285 snd_card_set_pm_callback(card, snd_atiixp_suspend, snd_atiixp_resume, chip);
1286
1287 if ((err = snd_card_register(card)) < 0)
1288 goto __error;
1289
1290 pci_set_drvdata(pci, card);
1291 return 0;
1292
1293 __error:
1294 snd_card_free(card);
1295 return err;
1296 }
1297
1298 static void __devexit snd_atiixp_remove(struct pci_dev *pci)
1299 {
1300 snd_card_free(pci_get_drvdata(pci));
1301 pci_set_drvdata(pci, NULL);
1302 }
1303
1304 static struct pci_driver driver = {
1305 .name = "ATI IXP MC97 controller",
1306 .id_table = snd_atiixp_ids,
1307 .probe = snd_atiixp_probe,
1308 .remove = __devexit_p(snd_atiixp_remove),
1309 SND_PCI_PM_CALLBACKS
1310 };
1311
1312
1313 static int __init alsa_card_atiixp_init(void)
1314 {
1315 return pci_register_driver(&driver);
1316 }
1317
1318 static void __exit alsa_card_atiixp_exit(void)
1319 {
1320 pci_unregister_driver(&driver);
1321 }
1322
1323 module_init(alsa_card_atiixp_init)
1324 module_exit(alsa_card_atiixp_exit)
linux kernel for loongson