include/asm-sparc/bitops.h

   1 /* $Id: bitops.h,v 1.67 2001/11/19 18:36:34 davem Exp $
   2  * bitops.h: Bit string operations on the Sparc.
   3  *
   4  * Copyright 1995 David S. Miller (davem@caip.rutgers.edu)
   5  * Copyright 1996 Eddie C. Dost   (ecd@skynet.be)
   6  * Copyright 2001 Anton Blanchard (anton@samba.org)
   7  */
   8
   9 #ifndef _SPARC_BITOPS_H
  10 #define _SPARC_BITOPS_H
  11
  12 #include <linux/compiler.h>
  13 #include <asm/byteorder.h>
  14
  15 #ifdef __KERNEL__
  16
  17 /*
  18  * Set bit 'nr' in 32-bit quantity at address 'addr' where bit '0'
  19  * is in the highest of the four bytes and bit '31' is the high bit
  20  * within the first byte. Sparc is BIG-Endian. Unless noted otherwise
  21  * all bit-ops return 0 if bit was previously clear and != 0 otherwise.
  22  */
  23 static inline int test_and_set_bit(unsigned long nr, volatile unsigned long *addr)
  24 {
  25         register unsigned long mask asm("g2");
  26         register unsigned long *ADDR asm("g1");
  27         register int tmp1 asm("g3");
  28         register int tmp2 asm("g4");
  29         register int tmp3 asm("g5");
  30         register int tmp4 asm("g7");
  31
  32         ADDR = ((unsigned long *) addr) + (nr >> 5);
  33         mask = 1 << (nr & 31);
  34
  35         __asm__ __volatile__(
  36         "mov    %%o7, %%g4\n\t"
  37         "call   ___set_bit\n\t"
  38         " add   %%o7, 8, %%o7\n"
  39         : "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
  40         : "0" (mask), "r" (ADDR)
  41         : "memory", "cc");
  42
  43         return mask != 0;
  44 }
  45
  46 static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
  47 {
  48         register unsigned long mask asm("g2");
  49         register unsigned long *ADDR asm("g1");
  50         register int tmp1 asm("g3");
  51         register int tmp2 asm("g4");
  52         register int tmp3 asm("g5");
  53         register int tmp4 asm("g7");
  54
  55         ADDR = ((unsigned long *) addr) + (nr >> 5);
  56         mask = 1 << (nr & 31);
  57
  58         __asm__ __volatile__(
  59         "mov    %%o7, %%g4\n\t"
  60         "call   ___set_bit\n\t"
  61         " add   %%o7, 8, %%o7\n"
  62         : "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
  63         : "0" (mask), "r" (ADDR)
  64         : "memory", "cc");
  65 }
  66
  67 static inline int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
  68 {
  69         register unsigned long mask asm("g2");
  70         register unsigned long *ADDR asm("g1");
  71         register int tmp1 asm("g3");
  72         register int tmp2 asm("g4");
  73         register int tmp3 asm("g5");
  74         register int tmp4 asm("g7");
  75
  76         ADDR = ((unsigned long *) addr) + (nr >> 5);
  77         mask = 1 << (nr & 31);
  78
  79         __asm__ __volatile__(
  80         "mov    %%o7, %%g4\n\t"
  81         "call   ___clear_bit\n\t"
  82         " add   %%o7, 8, %%o7\n"
  83         : "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
  84         : "0" (mask), "r" (ADDR)
  85         : "memory", "cc");
  86
  87         return mask != 0;
  88 }
  89
  90 static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
  91 {
  92         register unsigned long mask asm("g2");
  93         register unsigned long *ADDR asm("g1");
  94         register int tmp1 asm("g3");
  95         register int tmp2 asm("g4");
  96         register int tmp3 asm("g5");
  97         register int tmp4 asm("g7");
  98
  99         ADDR = ((unsigned long *) addr) + (nr >> 5);
 100         mask = 1 << (nr & 31);
 101
 102         __asm__ __volatile__(
 103         "mov    %%o7, %%g4\n\t"
 104         "call   ___clear_bit\n\t"
 105         " add   %%o7, 8, %%o7\n"
 106         : "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
 107         : "0" (mask), "r" (ADDR)
 108         : "memory", "cc");
 109 }
 110
 111 static inline int test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
 112 {
 113         register unsigned long mask asm("g2");
 114         register unsigned long *ADDR asm("g1");
 115         register int tmp1 asm("g3");
 116         register int tmp2 asm("g4");
 117         register int tmp3 asm("g5");
 118         register int tmp4 asm("g7");
 119
 120         ADDR = ((unsigned long *) addr) + (nr >> 5);
 121         mask = 1 << (nr & 31);
 122
 123         __asm__ __volatile__(
 124         "mov    %%o7, %%g4\n\t"
 125         "call   ___change_bit\n\t"
 126         " add   %%o7, 8, %%o7\n"
 127         : "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
 128         : "0" (mask), "r" (ADDR)
 129         : "memory", "cc");
 130
 131         return mask != 0;
 132 }
 133
 134 static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
 135 {
 136         register unsigned long mask asm("g2");
 137         register unsigned long *ADDR asm("g1");
 138         register int tmp1 asm("g3");
 139         register int tmp2 asm("g4");
 140         register int tmp3 asm("g5");
 141         register int tmp4 asm("g7");
 142
 143         ADDR = ((unsigned long *) addr) + (nr >> 5);
 144         mask = 1 << (nr & 31);
 145
 146         __asm__ __volatile__(
 147         "mov    %%o7, %%g4\n\t"
 148         "call   ___change_bit\n\t"
 149         " add   %%o7, 8, %%o7\n"
 150         : "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
 151         : "0" (mask), "r" (ADDR)
 152         : "memory", "cc");
 153 }
 154
 155 #include <asm-generic/bitops/non-atomic.h>
 156
 157 #define smp_mb__before_clear_bit()      do { } while(0)
 158 #define smp_mb__after_clear_bit()       do { } while(0)
 159
 160 #include <asm-generic/bitops/ffz.h>
 161 #include <asm-generic/bitops/__ffs.h>
 162 #include <asm-generic/bitops/sched.h>
 163 #include <asm-generic/bitops/ffs.h>
 164 #include <asm-generic/bitops/fls.h>
 165 #include <asm-generic/bitops/fls64.h>
 166 #include <asm-generic/bitops/hweight.h>
 167 #include <asm-generic/bitops/find.h>
 168 #include <asm-generic/bitops/ext2-non-atomic.h>
 169 #include <asm-generic/bitops/ext2-atomic.h>
 170 #include <asm-generic/bitops/minix.h>
 171
 172 #endif /* __KERNEL__ */
 173
 174 #endif /* defined(_SPARC_BITOPS_H) */