[ALSA] Add Aux input switch control for Aureon Universe
[linux-2.6/linux-loongson.git] / include / asm-ppc / mpc8xx.h
blob3515a7fa6c8939cc11515b6ff3807e35e576da9f
1 /* This is the single file included by all MPC8xx build options.
2 * Since there are many different boards and no standard configuration,
3 * we have a unique include file for each. Rather than change every
4 * file that has to include MPC8xx configuration, they all include
5 * this one and the configuration switching is done here.
6 */
7 #ifdef __KERNEL__
8 #ifndef __CONFIG_8xx_DEFS
9 #define __CONFIG_8xx_DEFS
11 #include <linux/config.h>
13 #ifdef CONFIG_8xx
15 #ifdef CONFIG_MBX
16 #include <platforms/mbx.h>
17 #endif
19 #ifdef CONFIG_FADS
20 #include <platforms/fads.h>
21 #endif
23 #ifdef CONFIG_RPXLITE
24 #include <platforms/rpxlite.h>
25 #endif
27 #ifdef CONFIG_BSEIP
28 #include <platforms/bseip.h>
29 #endif
31 #ifdef CONFIG_RPXCLASSIC
32 #include <platforms/rpxclassic.h>
33 #endif
35 #if defined(CONFIG_TQM8xxL)
36 #include <platforms/tqm8xx.h>
37 #endif
39 #if defined(CONFIG_IVMS8) || defined(CONFIG_IVML24)
40 #include <platforms/ivms8.h>
41 #endif
43 #if defined(CONFIG_HERMES_PRO)
44 #include <platforms/hermes.h>
45 #endif
47 #if defined(CONFIG_IP860)
48 #include <platforms/ip860.h>
49 #endif
51 #if defined(CONFIG_LWMON)
52 #include <platforms/lwmon.h>
53 #endif
55 #if defined(CONFIG_PCU_E)
56 #include <platforms/pcu_e.h>
57 #endif
59 #if defined(CONFIG_CCM)
60 #include <platforms/ccm.h>
61 #endif
63 #if defined(CONFIG_LANTEC)
64 #include <platforms/lantec.h>
65 #endif
67 #if defined(CONFIG_MPC885ADS)
68 #include <platforms/mpc885ads.h>
69 #endif
71 /* Currently, all 8xx boards that support a processor to PCI/ISA bridge
72 * use the same memory map.
74 #if 0
75 #if defined(CONFIG_PCI) && defined(PCI_ISA_IO_ADDR)
76 #define _IO_BASE PCI_ISA_IO_ADDR
77 #define _ISA_MEM_BASE PCI_ISA_MEM_ADDR
78 #define PCI_DRAM_OFFSET 0x80000000
79 #else
80 #define _IO_BASE 0
81 #define _ISA_MEM_BASE 0
82 #define PCI_DRAM_OFFSET 0
83 #endif
84 #else
85 #if !defined(_IO_BASE) /* defined in board specific header */
86 #define _IO_BASE 0
87 #endif
88 #define _ISA_MEM_BASE 0
89 #define PCI_DRAM_OFFSET 0
90 #endif
92 #ifndef __ASSEMBLY__
93 /* The "residual" data board information structure the boot loader
94 * hands to us.
96 extern unsigned char __res[];
98 struct pt_regs;
100 enum ppc_sys_devices {
101 MPC8xx_CPM_FEC1,
102 MPC8xx_CPM_FEC2,
103 MPC8xx_CPM_I2C,
104 MPC8xx_CPM_SCC1,
105 MPC8xx_CPM_SCC2,
106 MPC8xx_CPM_SCC3,
107 MPC8xx_CPM_SCC4,
108 MPC8xx_CPM_SPI,
109 MPC8xx_CPM_MCC1,
110 MPC8xx_CPM_MCC2,
111 MPC8xx_CPM_SMC1,
112 MPC8xx_CPM_SMC2,
113 MPC8xx_CPM_USB,
114 NUM_PPC_SYS_DEVS,
117 #define PPC_PIN_SIZE (24 * 1024 * 1024) /* 24Mbytes of data pinned */
119 #ifndef BOARD_CHIP_NAME
120 #define BOARD_CHIP_NAME ""
121 #endif
123 #endif /* !__ASSEMBLY__ */
124 #endif /* CONFIG_8xx */
125 #endif /* __CONFIG_8xx_DEFS */
126 #endif /* __KERNEL__ */