MIPS: handle write_combine in pci_mmap_page_range
[linux-2.6/linux-loongson.git] / drivers / net / ixgbe / ixgbe_ethtool.c
blobf0a20facc6509d7f06a6e60804a03e65666826c2
1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 /* ethtool support for ixgbe */
30 #include <linux/types.h>
31 #include <linux/module.h>
32 #include <linux/pci.h>
33 #include <linux/netdevice.h>
34 #include <linux/ethtool.h>
35 #include <linux/vmalloc.h>
36 #include <linux/uaccess.h>
38 #include "ixgbe.h"
41 #define IXGBE_ALL_RAR_ENTRIES 16
43 struct ixgbe_stats {
44 char stat_string[ETH_GSTRING_LEN];
45 int sizeof_stat;
46 int stat_offset;
49 #define IXGBE_STAT(m) sizeof(((struct ixgbe_adapter *)0)->m), \
50 offsetof(struct ixgbe_adapter, m)
51 static struct ixgbe_stats ixgbe_gstrings_stats[] = {
52 {"rx_packets", IXGBE_STAT(net_stats.rx_packets)},
53 {"tx_packets", IXGBE_STAT(net_stats.tx_packets)},
54 {"rx_bytes", IXGBE_STAT(net_stats.rx_bytes)},
55 {"tx_bytes", IXGBE_STAT(net_stats.tx_bytes)},
56 {"lsc_int", IXGBE_STAT(lsc_int)},
57 {"tx_busy", IXGBE_STAT(tx_busy)},
58 {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
59 {"rx_errors", IXGBE_STAT(net_stats.rx_errors)},
60 {"tx_errors", IXGBE_STAT(net_stats.tx_errors)},
61 {"rx_dropped", IXGBE_STAT(net_stats.rx_dropped)},
62 {"tx_dropped", IXGBE_STAT(net_stats.tx_dropped)},
63 {"multicast", IXGBE_STAT(net_stats.multicast)},
64 {"broadcast", IXGBE_STAT(stats.bprc)},
65 {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
66 {"collisions", IXGBE_STAT(net_stats.collisions)},
67 {"rx_over_errors", IXGBE_STAT(net_stats.rx_over_errors)},
68 {"rx_crc_errors", IXGBE_STAT(net_stats.rx_crc_errors)},
69 {"rx_frame_errors", IXGBE_STAT(net_stats.rx_frame_errors)},
70 {"rx_fifo_errors", IXGBE_STAT(net_stats.rx_fifo_errors)},
71 {"rx_missed_errors", IXGBE_STAT(net_stats.rx_missed_errors)},
72 {"tx_aborted_errors", IXGBE_STAT(net_stats.tx_aborted_errors)},
73 {"tx_carrier_errors", IXGBE_STAT(net_stats.tx_carrier_errors)},
74 {"tx_fifo_errors", IXGBE_STAT(net_stats.tx_fifo_errors)},
75 {"tx_heartbeat_errors", IXGBE_STAT(net_stats.tx_heartbeat_errors)},
76 {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
77 {"tx_restart_queue", IXGBE_STAT(restart_queue)},
78 {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
79 {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
80 {"tx_tcp4_seg_ctxt", IXGBE_STAT(hw_tso_ctxt)},
81 {"tx_tcp6_seg_ctxt", IXGBE_STAT(hw_tso6_ctxt)},
82 {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
83 {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
84 {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
85 {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
86 {"rx_csum_offload_good", IXGBE_STAT(hw_csum_rx_good)},
87 {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
88 {"tx_csum_offload_ctxt", IXGBE_STAT(hw_csum_tx_good)},
89 {"rx_header_split", IXGBE_STAT(rx_hdr_split)},
90 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
91 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
92 {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
95 #define IXGBE_QUEUE_STATS_LEN \
96 ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \
97 ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \
98 (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
99 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
100 #define IXGBE_PB_STATS_LEN ( \
101 (((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \
102 IXGBE_FLAG_DCB_ENABLED) ? \
103 (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
104 sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
105 sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
106 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
107 / sizeof(u64) : 0)
108 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
109 IXGBE_PB_STATS_LEN + \
110 IXGBE_QUEUE_STATS_LEN)
112 static int ixgbe_get_settings(struct net_device *netdev,
113 struct ethtool_cmd *ecmd)
115 struct ixgbe_adapter *adapter = netdev_priv(netdev);
116 struct ixgbe_hw *hw = &adapter->hw;
117 u32 link_speed = 0;
118 bool link_up;
120 ecmd->supported = SUPPORTED_10000baseT_Full;
121 ecmd->autoneg = AUTONEG_ENABLE;
122 ecmd->transceiver = XCVR_EXTERNAL;
123 if (hw->phy.media_type == ixgbe_media_type_copper) {
124 ecmd->supported |= (SUPPORTED_1000baseT_Full |
125 SUPPORTED_TP | SUPPORTED_Autoneg);
127 ecmd->advertising = (ADVERTISED_TP | ADVERTISED_Autoneg);
128 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
129 ecmd->advertising |= ADVERTISED_10000baseT_Full;
130 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
131 ecmd->advertising |= ADVERTISED_1000baseT_Full;
133 * It's possible that phy.autoneg_advertised may not be
134 * set yet. If so display what the default would be -
135 * both 1G and 10G supported.
137 if (!(ecmd->advertising & (ADVERTISED_1000baseT_Full |
138 ADVERTISED_10000baseT_Full)))
139 ecmd->advertising |= (ADVERTISED_10000baseT_Full |
140 ADVERTISED_1000baseT_Full);
142 ecmd->port = PORT_TP;
143 } else if (hw->phy.media_type == ixgbe_media_type_backplane) {
144 /* Set as FIBRE until SERDES defined in kernel */
145 switch (hw->device_id) {
146 case IXGBE_DEV_ID_82598:
147 ecmd->supported |= (SUPPORTED_1000baseT_Full |
148 SUPPORTED_FIBRE);
149 ecmd->advertising = (ADVERTISED_10000baseT_Full |
150 ADVERTISED_1000baseT_Full |
151 ADVERTISED_FIBRE);
152 ecmd->port = PORT_FIBRE;
153 break;
154 case IXGBE_DEV_ID_82598_BX:
155 ecmd->supported = (SUPPORTED_1000baseT_Full |
156 SUPPORTED_FIBRE);
157 ecmd->advertising = (ADVERTISED_1000baseT_Full |
158 ADVERTISED_FIBRE);
159 ecmd->port = PORT_FIBRE;
160 ecmd->autoneg = AUTONEG_DISABLE;
161 break;
163 } else {
164 ecmd->supported |= SUPPORTED_FIBRE;
165 ecmd->advertising = (ADVERTISED_10000baseT_Full |
166 ADVERTISED_FIBRE);
167 ecmd->port = PORT_FIBRE;
168 ecmd->autoneg = AUTONEG_DISABLE;
171 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
172 if (link_up) {
173 ecmd->speed = (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
174 SPEED_10000 : SPEED_1000;
175 ecmd->duplex = DUPLEX_FULL;
176 } else {
177 ecmd->speed = -1;
178 ecmd->duplex = -1;
181 return 0;
184 static int ixgbe_set_settings(struct net_device *netdev,
185 struct ethtool_cmd *ecmd)
187 struct ixgbe_adapter *adapter = netdev_priv(netdev);
188 struct ixgbe_hw *hw = &adapter->hw;
189 u32 advertised, old;
190 s32 err;
192 switch (hw->phy.media_type) {
193 case ixgbe_media_type_fiber:
194 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
195 (ecmd->speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
196 return -EINVAL;
197 /* in this case we currently only support 10Gb/FULL */
198 break;
199 case ixgbe_media_type_copper:
200 /* 10000/copper and 1000/copper must autoneg
201 * this function does not support any duplex forcing, but can
202 * limit the advertising of the adapter to only 10000 or 1000 */
203 if (ecmd->autoneg == AUTONEG_DISABLE)
204 return -EINVAL;
206 old = hw->phy.autoneg_advertised;
207 advertised = 0;
208 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
209 advertised |= IXGBE_LINK_SPEED_10GB_FULL;
211 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
212 advertised |= IXGBE_LINK_SPEED_1GB_FULL;
214 if (old == advertised)
215 break;
216 /* this sets the link speed and restarts auto-neg */
217 err = hw->mac.ops.setup_link_speed(hw, advertised, true, true);
218 if (err) {
219 DPRINTK(PROBE, INFO,
220 "setup link failed with code %d\n", err);
221 hw->mac.ops.setup_link_speed(hw, old, true, true);
223 break;
224 default:
225 break;
228 return 0;
231 static void ixgbe_get_pauseparam(struct net_device *netdev,
232 struct ethtool_pauseparam *pause)
234 struct ixgbe_adapter *adapter = netdev_priv(netdev);
235 struct ixgbe_hw *hw = &adapter->hw;
238 * Flow Control Autoneg isn't on if
239 * - we didn't ask for it OR
240 * - it failed, we know this by tx & rx being off
242 if (hw->fc.disable_fc_autoneg ||
243 (hw->fc.current_mode == ixgbe_fc_none))
244 pause->autoneg = 0;
245 else
246 pause->autoneg = 1;
248 if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
249 pause->rx_pause = 1;
250 } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
251 pause->tx_pause = 1;
252 } else if (hw->fc.current_mode == ixgbe_fc_full) {
253 pause->rx_pause = 1;
254 pause->tx_pause = 1;
258 static int ixgbe_set_pauseparam(struct net_device *netdev,
259 struct ethtool_pauseparam *pause)
261 struct ixgbe_adapter *adapter = netdev_priv(netdev);
262 struct ixgbe_hw *hw = &adapter->hw;
264 if (pause->autoneg != AUTONEG_ENABLE)
265 hw->fc.disable_fc_autoneg = true;
266 else
267 hw->fc.disable_fc_autoneg = false;
269 if (pause->rx_pause && pause->tx_pause)
270 hw->fc.requested_mode = ixgbe_fc_full;
271 else if (pause->rx_pause && !pause->tx_pause)
272 hw->fc.requested_mode = ixgbe_fc_rx_pause;
273 else if (!pause->rx_pause && pause->tx_pause)
274 hw->fc.requested_mode = ixgbe_fc_tx_pause;
275 else if (!pause->rx_pause && !pause->tx_pause)
276 hw->fc.requested_mode = ixgbe_fc_none;
277 else
278 return -EINVAL;
280 hw->mac.ops.setup_fc(hw, 0);
282 return 0;
285 static u32 ixgbe_get_rx_csum(struct net_device *netdev)
287 struct ixgbe_adapter *adapter = netdev_priv(netdev);
288 return (adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED);
291 static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
293 struct ixgbe_adapter *adapter = netdev_priv(netdev);
294 if (data)
295 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
296 else
297 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
299 if (netif_running(netdev))
300 ixgbe_reinit_locked(adapter);
301 else
302 ixgbe_reset(adapter);
304 return 0;
307 static u32 ixgbe_get_tx_csum(struct net_device *netdev)
309 return (netdev->features & NETIF_F_IP_CSUM) != 0;
312 static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
314 if (data)
315 netdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
316 else
317 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
319 return 0;
322 static int ixgbe_set_tso(struct net_device *netdev, u32 data)
324 if (data) {
325 netdev->features |= NETIF_F_TSO;
326 netdev->features |= NETIF_F_TSO6;
327 } else {
328 netif_tx_stop_all_queues(netdev);
329 netdev->features &= ~NETIF_F_TSO;
330 netdev->features &= ~NETIF_F_TSO6;
331 netif_tx_start_all_queues(netdev);
333 return 0;
336 static u32 ixgbe_get_msglevel(struct net_device *netdev)
338 struct ixgbe_adapter *adapter = netdev_priv(netdev);
339 return adapter->msg_enable;
342 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
344 struct ixgbe_adapter *adapter = netdev_priv(netdev);
345 adapter->msg_enable = data;
348 static int ixgbe_get_regs_len(struct net_device *netdev)
350 #define IXGBE_REGS_LEN 1128
351 return IXGBE_REGS_LEN * sizeof(u32);
354 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
356 static void ixgbe_get_regs(struct net_device *netdev,
357 struct ethtool_regs *regs, void *p)
359 struct ixgbe_adapter *adapter = netdev_priv(netdev);
360 struct ixgbe_hw *hw = &adapter->hw;
361 u32 *regs_buff = p;
362 u8 i;
364 memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
366 regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
368 /* General Registers */
369 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
370 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
371 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
372 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
373 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
374 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
375 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
376 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
378 /* NVM Register */
379 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
380 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
381 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
382 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
383 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
384 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
385 regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
386 regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
387 regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
388 regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
390 /* Interrupt */
391 /* don't read EICR because it can clear interrupt causes, instead
392 * read EICS which is a shadow but doesn't clear EICR */
393 regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
394 regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
395 regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
396 regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
397 regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
398 regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
399 regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
400 regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
401 regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
402 regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
403 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
404 regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
406 /* Flow Control */
407 regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
408 regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
409 regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
410 regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
411 regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
412 for (i = 0; i < 8; i++)
413 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
414 for (i = 0; i < 8; i++)
415 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
416 regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
417 regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
419 /* Receive DMA */
420 for (i = 0; i < 64; i++)
421 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
422 for (i = 0; i < 64; i++)
423 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
424 for (i = 0; i < 64; i++)
425 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
426 for (i = 0; i < 64; i++)
427 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
428 for (i = 0; i < 64; i++)
429 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
430 for (i = 0; i < 64; i++)
431 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
432 for (i = 0; i < 16; i++)
433 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
434 for (i = 0; i < 16; i++)
435 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
436 regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
437 for (i = 0; i < 8; i++)
438 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
439 regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
440 regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
442 /* Receive */
443 regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
444 regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
445 for (i = 0; i < 16; i++)
446 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
447 for (i = 0; i < 16; i++)
448 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
449 regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
450 regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
451 regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
452 regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
453 regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
454 regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
455 for (i = 0; i < 8; i++)
456 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
457 for (i = 0; i < 8; i++)
458 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
459 regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
461 /* Transmit */
462 for (i = 0; i < 32; i++)
463 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
464 for (i = 0; i < 32; i++)
465 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
466 for (i = 0; i < 32; i++)
467 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
468 for (i = 0; i < 32; i++)
469 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
470 for (i = 0; i < 32; i++)
471 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
472 for (i = 0; i < 32; i++)
473 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
474 for (i = 0; i < 32; i++)
475 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
476 for (i = 0; i < 32; i++)
477 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
478 regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
479 for (i = 0; i < 16; i++)
480 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
481 regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
482 for (i = 0; i < 8; i++)
483 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
484 regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
486 /* Wake Up */
487 regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
488 regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
489 regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
490 regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
491 regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
492 regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
493 regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
494 regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
495 regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
497 regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
498 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
499 regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
500 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
501 for (i = 0; i < 8; i++)
502 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
503 for (i = 0; i < 8; i++)
504 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
505 for (i = 0; i < 8; i++)
506 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
507 for (i = 0; i < 8; i++)
508 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
509 for (i = 0; i < 8; i++)
510 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
511 for (i = 0; i < 8; i++)
512 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
514 /* Statistics */
515 regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
516 regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
517 regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
518 regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
519 for (i = 0; i < 8; i++)
520 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
521 regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
522 regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
523 regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
524 regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
525 regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
526 regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
527 regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
528 for (i = 0; i < 8; i++)
529 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
530 for (i = 0; i < 8; i++)
531 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
532 for (i = 0; i < 8; i++)
533 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
534 for (i = 0; i < 8; i++)
535 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
536 regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
537 regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
538 regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
539 regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
540 regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
541 regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
542 regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
543 regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
544 regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
545 regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
546 regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
547 regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
548 for (i = 0; i < 8; i++)
549 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
550 regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
551 regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
552 regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
553 regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
554 regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
555 regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
556 regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
557 regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
558 regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
559 regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
560 regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
561 regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
562 regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
563 regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
564 regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
565 regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
566 regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
567 regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
568 regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
569 for (i = 0; i < 16; i++)
570 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
571 for (i = 0; i < 16; i++)
572 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
573 for (i = 0; i < 16; i++)
574 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
575 for (i = 0; i < 16; i++)
576 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
578 /* MAC */
579 regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
580 regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
581 regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
582 regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
583 regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
584 regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
585 regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
586 regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
587 regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
588 regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
589 regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
590 regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
591 regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
592 regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
593 regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
594 regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
595 regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
596 regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
597 regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
598 regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
599 regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
600 regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
601 regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
602 regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
603 regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
604 regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
605 regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
606 regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
607 regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
608 regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
609 regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
610 regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
611 regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
613 /* Diagnostic */
614 regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
615 for (i = 0; i < 8; i++)
616 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
617 regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
618 for (i = 0; i < 4; i++)
619 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
620 regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
621 regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
622 for (i = 0; i < 8; i++)
623 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
624 regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
625 for (i = 0; i < 4; i++)
626 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
627 regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
628 regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
629 regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
630 regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
631 regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
632 regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
633 regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
634 regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
635 regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
636 regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
637 regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
638 for (i = 0; i < 8; i++)
639 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
640 regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
641 regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
642 regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
643 regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
644 regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
645 regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
646 regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
647 regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
648 regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
651 static int ixgbe_get_eeprom_len(struct net_device *netdev)
653 struct ixgbe_adapter *adapter = netdev_priv(netdev);
654 return adapter->hw.eeprom.word_size * 2;
657 static int ixgbe_get_eeprom(struct net_device *netdev,
658 struct ethtool_eeprom *eeprom, u8 *bytes)
660 struct ixgbe_adapter *adapter = netdev_priv(netdev);
661 struct ixgbe_hw *hw = &adapter->hw;
662 u16 *eeprom_buff;
663 int first_word, last_word, eeprom_len;
664 int ret_val = 0;
665 u16 i;
667 if (eeprom->len == 0)
668 return -EINVAL;
670 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
672 first_word = eeprom->offset >> 1;
673 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
674 eeprom_len = last_word - first_word + 1;
676 eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
677 if (!eeprom_buff)
678 return -ENOMEM;
680 for (i = 0; i < eeprom_len; i++) {
681 if ((ret_val = hw->eeprom.ops.read(hw, first_word + i,
682 &eeprom_buff[i])))
683 break;
686 /* Device's eeprom is always little-endian, word addressable */
687 for (i = 0; i < eeprom_len; i++)
688 le16_to_cpus(&eeprom_buff[i]);
690 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
691 kfree(eeprom_buff);
693 return ret_val;
696 static void ixgbe_get_drvinfo(struct net_device *netdev,
697 struct ethtool_drvinfo *drvinfo)
699 struct ixgbe_adapter *adapter = netdev_priv(netdev);
700 char firmware_version[32];
702 strncpy(drvinfo->driver, ixgbe_driver_name, 32);
703 strncpy(drvinfo->version, ixgbe_driver_version, 32);
705 sprintf(firmware_version, "%d.%d-%d",
706 (adapter->eeprom_version & 0xF000) >> 12,
707 (adapter->eeprom_version & 0x0FF0) >> 4,
708 adapter->eeprom_version & 0x000F);
710 strncpy(drvinfo->fw_version, firmware_version, 32);
711 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
712 drvinfo->n_stats = IXGBE_STATS_LEN;
713 drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
716 static void ixgbe_get_ringparam(struct net_device *netdev,
717 struct ethtool_ringparam *ring)
719 struct ixgbe_adapter *adapter = netdev_priv(netdev);
720 struct ixgbe_ring *tx_ring = adapter->tx_ring;
721 struct ixgbe_ring *rx_ring = adapter->rx_ring;
723 ring->rx_max_pending = IXGBE_MAX_RXD;
724 ring->tx_max_pending = IXGBE_MAX_TXD;
725 ring->rx_mini_max_pending = 0;
726 ring->rx_jumbo_max_pending = 0;
727 ring->rx_pending = rx_ring->count;
728 ring->tx_pending = tx_ring->count;
729 ring->rx_mini_pending = 0;
730 ring->rx_jumbo_pending = 0;
733 static int ixgbe_set_ringparam(struct net_device *netdev,
734 struct ethtool_ringparam *ring)
736 struct ixgbe_adapter *adapter = netdev_priv(netdev);
737 struct ixgbe_ring *temp_tx_ring, *temp_rx_ring;
738 int i, err;
739 u32 new_rx_count, new_tx_count;
740 bool need_update = false;
742 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
743 return -EINVAL;
745 new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
746 new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
747 new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
749 new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
750 new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
751 new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
753 if ((new_tx_count == adapter->tx_ring->count) &&
754 (new_rx_count == adapter->rx_ring->count)) {
755 /* nothing to do */
756 return 0;
759 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
760 msleep(1);
762 temp_tx_ring = kcalloc(adapter->num_tx_queues,
763 sizeof(struct ixgbe_ring), GFP_KERNEL);
764 if (!temp_tx_ring) {
765 err = -ENOMEM;
766 goto err_setup;
769 if (new_tx_count != adapter->tx_ring_count) {
770 memcpy(temp_tx_ring, adapter->tx_ring,
771 adapter->num_tx_queues * sizeof(struct ixgbe_ring));
772 for (i = 0; i < adapter->num_tx_queues; i++) {
773 temp_tx_ring[i].count = new_tx_count;
774 err = ixgbe_setup_tx_resources(adapter,
775 &temp_tx_ring[i]);
776 if (err) {
777 while (i) {
778 i--;
779 ixgbe_free_tx_resources(adapter,
780 &temp_tx_ring[i]);
782 goto err_setup;
784 temp_tx_ring[i].v_idx = adapter->tx_ring[i].v_idx;
786 need_update = true;
789 temp_rx_ring = kcalloc(adapter->num_rx_queues,
790 sizeof(struct ixgbe_ring), GFP_KERNEL);
791 if ((!temp_rx_ring) && (need_update)) {
792 for (i = 0; i < adapter->num_tx_queues; i++)
793 ixgbe_free_tx_resources(adapter, &temp_tx_ring[i]);
794 kfree(temp_tx_ring);
795 err = -ENOMEM;
796 goto err_setup;
799 if (new_rx_count != adapter->rx_ring_count) {
800 memcpy(temp_rx_ring, adapter->rx_ring,
801 adapter->num_rx_queues * sizeof(struct ixgbe_ring));
802 for (i = 0; i < adapter->num_rx_queues; i++) {
803 temp_rx_ring[i].count = new_rx_count;
804 err = ixgbe_setup_rx_resources(adapter,
805 &temp_rx_ring[i]);
806 if (err) {
807 while (i) {
808 i--;
809 ixgbe_free_rx_resources(adapter,
810 &temp_rx_ring[i]);
812 goto err_setup;
814 temp_rx_ring[i].v_idx = adapter->rx_ring[i].v_idx;
816 need_update = true;
819 /* if rings need to be updated, here's the place to do it in one shot */
820 if (need_update) {
821 if (netif_running(netdev))
822 ixgbe_down(adapter);
824 /* tx */
825 if (new_tx_count != adapter->tx_ring_count) {
826 kfree(adapter->tx_ring);
827 adapter->tx_ring = temp_tx_ring;
828 temp_tx_ring = NULL;
829 adapter->tx_ring_count = new_tx_count;
832 /* rx */
833 if (new_rx_count != adapter->rx_ring_count) {
834 kfree(adapter->rx_ring);
835 adapter->rx_ring = temp_rx_ring;
836 temp_rx_ring = NULL;
837 adapter->rx_ring_count = new_rx_count;
841 /* success! */
842 err = 0;
843 if (netif_running(netdev))
844 ixgbe_up(adapter);
846 err_setup:
847 clear_bit(__IXGBE_RESETTING, &adapter->state);
848 return err;
851 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
853 switch (sset) {
854 case ETH_SS_STATS:
855 return IXGBE_STATS_LEN;
856 default:
857 return -EOPNOTSUPP;
861 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
862 struct ethtool_stats *stats, u64 *data)
864 struct ixgbe_adapter *adapter = netdev_priv(netdev);
865 u64 *queue_stat;
866 int stat_count = sizeof(struct ixgbe_queue_stats) / sizeof(u64);
867 int j, k;
868 int i;
870 ixgbe_update_stats(adapter);
871 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
872 char *p = (char *)adapter + ixgbe_gstrings_stats[i].stat_offset;
873 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
874 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
876 for (j = 0; j < adapter->num_tx_queues; j++) {
877 queue_stat = (u64 *)&adapter->tx_ring[j].stats;
878 for (k = 0; k < stat_count; k++)
879 data[i + k] = queue_stat[k];
880 i += k;
882 for (j = 0; j < adapter->num_rx_queues; j++) {
883 queue_stat = (u64 *)&adapter->rx_ring[j].stats;
884 for (k = 0; k < stat_count; k++)
885 data[i + k] = queue_stat[k];
886 i += k;
888 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
889 for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) {
890 data[i++] = adapter->stats.pxontxc[j];
891 data[i++] = adapter->stats.pxofftxc[j];
893 for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) {
894 data[i++] = adapter->stats.pxonrxc[j];
895 data[i++] = adapter->stats.pxoffrxc[j];
900 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
901 u8 *data)
903 struct ixgbe_adapter *adapter = netdev_priv(netdev);
904 char *p = (char *)data;
905 int i;
907 switch (stringset) {
908 case ETH_SS_STATS:
909 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
910 memcpy(p, ixgbe_gstrings_stats[i].stat_string,
911 ETH_GSTRING_LEN);
912 p += ETH_GSTRING_LEN;
914 for (i = 0; i < adapter->num_tx_queues; i++) {
915 sprintf(p, "tx_queue_%u_packets", i);
916 p += ETH_GSTRING_LEN;
917 sprintf(p, "tx_queue_%u_bytes", i);
918 p += ETH_GSTRING_LEN;
920 for (i = 0; i < adapter->num_rx_queues; i++) {
921 sprintf(p, "rx_queue_%u_packets", i);
922 p += ETH_GSTRING_LEN;
923 sprintf(p, "rx_queue_%u_bytes", i);
924 p += ETH_GSTRING_LEN;
926 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
927 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
928 sprintf(p, "tx_pb_%u_pxon", i);
929 p += ETH_GSTRING_LEN;
930 sprintf(p, "tx_pb_%u_pxoff", i);
931 p += ETH_GSTRING_LEN;
933 for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) {
934 sprintf(p, "rx_pb_%u_pxon", i);
935 p += ETH_GSTRING_LEN;
936 sprintf(p, "rx_pb_%u_pxoff", i);
937 p += ETH_GSTRING_LEN;
940 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
941 break;
946 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
947 struct ethtool_wolinfo *wol)
949 struct ixgbe_hw *hw = &adapter->hw;
950 int retval = 1;
952 switch(hw->device_id) {
953 case IXGBE_DEV_ID_82599_KX4:
954 retval = 0;
955 break;
956 default:
957 wol->supported = 0;
958 retval = 0;
961 return retval;
964 static void ixgbe_get_wol(struct net_device *netdev,
965 struct ethtool_wolinfo *wol)
967 struct ixgbe_adapter *adapter = netdev_priv(netdev);
969 wol->supported = WAKE_UCAST | WAKE_MCAST |
970 WAKE_BCAST | WAKE_MAGIC;
971 wol->wolopts = 0;
973 if (ixgbe_wol_exclusion(adapter, wol) ||
974 !device_can_wakeup(&adapter->pdev->dev))
975 return;
977 if (adapter->wol & IXGBE_WUFC_EX)
978 wol->wolopts |= WAKE_UCAST;
979 if (adapter->wol & IXGBE_WUFC_MC)
980 wol->wolopts |= WAKE_MCAST;
981 if (adapter->wol & IXGBE_WUFC_BC)
982 wol->wolopts |= WAKE_BCAST;
983 if (adapter->wol & IXGBE_WUFC_MAG)
984 wol->wolopts |= WAKE_MAGIC;
986 return;
989 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
991 struct ixgbe_adapter *adapter = netdev_priv(netdev);
993 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
994 return -EOPNOTSUPP;
996 if (ixgbe_wol_exclusion(adapter, wol))
997 return wol->wolopts ? -EOPNOTSUPP : 0;
999 adapter->wol = 0;
1001 if (wol->wolopts & WAKE_UCAST)
1002 adapter->wol |= IXGBE_WUFC_EX;
1003 if (wol->wolopts & WAKE_MCAST)
1004 adapter->wol |= IXGBE_WUFC_MC;
1005 if (wol->wolopts & WAKE_BCAST)
1006 adapter->wol |= IXGBE_WUFC_BC;
1007 if (wol->wolopts & WAKE_MAGIC)
1008 adapter->wol |= IXGBE_WUFC_MAG;
1010 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1012 return 0;
1015 static int ixgbe_nway_reset(struct net_device *netdev)
1017 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1019 if (netif_running(netdev))
1020 ixgbe_reinit_locked(adapter);
1022 return 0;
1025 static int ixgbe_phys_id(struct net_device *netdev, u32 data)
1027 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1028 struct ixgbe_hw *hw = &adapter->hw;
1029 u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
1030 u32 i;
1032 if (!data || data > 300)
1033 data = 300;
1035 for (i = 0; i < (data * 1000); i += 400) {
1036 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
1037 msleep_interruptible(200);
1038 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
1039 msleep_interruptible(200);
1042 /* Restore LED settings */
1043 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, led_reg);
1045 return 0;
1048 static int ixgbe_get_coalesce(struct net_device *netdev,
1049 struct ethtool_coalesce *ec)
1051 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1053 ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0].work_limit;
1055 /* only valid if in constant ITR mode */
1056 switch (adapter->itr_setting) {
1057 case 0:
1058 /* throttling disabled */
1059 ec->rx_coalesce_usecs = 0;
1060 break;
1061 case 1:
1062 /* dynamic ITR mode */
1063 ec->rx_coalesce_usecs = 1;
1064 break;
1065 default:
1066 /* fixed interrupt rate mode */
1067 ec->rx_coalesce_usecs = 1000000/adapter->eitr_param;
1068 break;
1070 return 0;
1073 static int ixgbe_set_coalesce(struct net_device *netdev,
1074 struct ethtool_coalesce *ec)
1076 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1077 int i;
1079 if (ec->tx_max_coalesced_frames_irq)
1080 adapter->tx_ring[0].work_limit = ec->tx_max_coalesced_frames_irq;
1082 if (ec->rx_coalesce_usecs > 1) {
1083 /* check the limits */
1084 if ((1000000/ec->rx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
1085 (1000000/ec->rx_coalesce_usecs < IXGBE_MIN_INT_RATE))
1086 return -EINVAL;
1088 /* store the value in ints/second */
1089 adapter->eitr_param = 1000000/ec->rx_coalesce_usecs;
1091 /* static value of interrupt rate */
1092 adapter->itr_setting = adapter->eitr_param;
1093 /* clear the lower bit as its used for dynamic state */
1094 adapter->itr_setting &= ~1;
1095 } else if (ec->rx_coalesce_usecs == 1) {
1096 /* 1 means dynamic mode */
1097 adapter->eitr_param = 20000;
1098 adapter->itr_setting = 1;
1099 } else {
1101 * any other value means disable eitr, which is best
1102 * served by setting the interrupt rate very high
1104 adapter->eitr_param = IXGBE_MAX_INT_RATE;
1105 adapter->itr_setting = 0;
1108 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
1109 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1110 if (q_vector->txr_count && !q_vector->rxr_count)
1111 /* tx vector gets half the rate */
1112 q_vector->eitr = (adapter->eitr_param >> 1);
1113 else
1114 /* rx only or mixed */
1115 q_vector->eitr = adapter->eitr_param;
1116 ixgbe_write_eitr(adapter, i,
1117 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
1120 return 0;
1124 static const struct ethtool_ops ixgbe_ethtool_ops = {
1125 .get_settings = ixgbe_get_settings,
1126 .set_settings = ixgbe_set_settings,
1127 .get_drvinfo = ixgbe_get_drvinfo,
1128 .get_regs_len = ixgbe_get_regs_len,
1129 .get_regs = ixgbe_get_regs,
1130 .get_wol = ixgbe_get_wol,
1131 .set_wol = ixgbe_set_wol,
1132 .nway_reset = ixgbe_nway_reset,
1133 .get_link = ethtool_op_get_link,
1134 .get_eeprom_len = ixgbe_get_eeprom_len,
1135 .get_eeprom = ixgbe_get_eeprom,
1136 .get_ringparam = ixgbe_get_ringparam,
1137 .set_ringparam = ixgbe_set_ringparam,
1138 .get_pauseparam = ixgbe_get_pauseparam,
1139 .set_pauseparam = ixgbe_set_pauseparam,
1140 .get_rx_csum = ixgbe_get_rx_csum,
1141 .set_rx_csum = ixgbe_set_rx_csum,
1142 .get_tx_csum = ixgbe_get_tx_csum,
1143 .set_tx_csum = ixgbe_set_tx_csum,
1144 .get_sg = ethtool_op_get_sg,
1145 .set_sg = ethtool_op_set_sg,
1146 .get_msglevel = ixgbe_get_msglevel,
1147 .set_msglevel = ixgbe_set_msglevel,
1148 .get_tso = ethtool_op_get_tso,
1149 .set_tso = ixgbe_set_tso,
1150 .get_strings = ixgbe_get_strings,
1151 .phys_id = ixgbe_phys_id,
1152 .get_sset_count = ixgbe_get_sset_count,
1153 .get_ethtool_stats = ixgbe_get_ethtool_stats,
1154 .get_coalesce = ixgbe_get_coalesce,
1155 .set_coalesce = ixgbe_set_coalesce,
1156 .get_flags = ethtool_op_get_flags,
1157 .set_flags = ethtool_op_set_flags,
1160 void ixgbe_set_ethtool_ops(struct net_device *netdev)
1162 SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);