arch/arm/mach-s3c2410/cpu.c

   1 /* linux/arch/arm/mach-s3c2410/cpu.c
   2  *
   3  * Copyright (c) 2004-2005 Simtec Electronics
   4  *      http://www.simtec.co.uk/products/SWLINUX/
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *
   7  * S3C24XX CPU Support
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  22 */
  23
  24
  25 #include <linux/init.h>
  26 #include <linux/module.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/ioport.h>
  29 #include <linux/device.h>
  30
  31 #include <asm/hardware.h>
  32 #include <asm/irq.h>
  33 #include <asm/io.h>
  34 #include <asm/delay.h>
  35
  36 #include <asm/mach/arch.h>
  37 #include <asm/mach/map.h>
  38
  39 #include <asm/arch/regs-gpio.h>
  40
  41 #include "cpu.h"
  42 #include "clock.h"
  43 #include "s3c2410.h"
  44 #include "s3c2440.h"
  45
  46 struct cpu_table {
  47         unsigned long   idcode;
  48         unsigned long   idmask;
  49         void            (*map_io)(struct map_desc *mach_desc, int size);
  50         void            (*init_uarts)(struct s3c2410_uartcfg *cfg, int no);
  51         void            (*init_clocks)(int xtal);
  52         int             (*init)(void);
  53         const char      *name;
  54 };
  55
  56 /* table of supported CPUs */
  57
  58 static const char name_s3c2410[]  = "S3C2410";
  59 static const char name_s3c2440[]  = "S3C2440";
  60 static const char name_s3c2410a[] = "S3C2410A";
  61 static const char name_s3c2440a[] = "S3C2440A";
  62
  63 static struct cpu_table cpu_ids[] __initdata = {
  64         {
  65                 .idcode         = 0x32410000,
  66                 .idmask         = 0xffffffff,
  67                 .map_io         = s3c2410_map_io,
  68                 .init_clocks    = s3c2410_init_clocks,
  69                 .init_uarts     = s3c2410_init_uarts,
  70                 .init           = s3c2410_init,
  71                 .name           = name_s3c2410
  72         },
  73         {
  74                 .idcode         = 0x32410002,
  75                 .idmask         = 0xffffffff,
  76                 .map_io         = s3c2410_map_io,
  77                 .init_clocks    = s3c2410_init_clocks,
  78                 .init_uarts     = s3c2410_init_uarts,
  79                 .init           = s3c2410_init,
  80                 .name           = name_s3c2410a
  81         },
  82         {
  83                 .idcode         = 0x32440000,
  84                 .idmask         = 0xffffffff,
  85                 .map_io         = s3c2440_map_io,
  86                 .init_clocks    = s3c2440_init_clocks,
  87                 .init_uarts     = s3c2440_init_uarts,
  88                 .init           = s3c2440_init,
  89                 .name           = name_s3c2440
  90         },
  91         {
  92                 .idcode         = 0x32440001,
  93                 .idmask         = 0xffffffff,
  94                 .map_io         = s3c2440_map_io,
  95                 .init_clocks    = s3c2440_init_clocks,
  96                 .init_uarts     = s3c2440_init_uarts,
  97                 .init           = s3c2440_init,
  98                 .name           = name_s3c2440a
  99         }
 100 };
 101
 102 /* minimal IO mapping */
 103
 104 static struct map_desc s3c_iodesc[] __initdata = {
 105         IODESC_ENT(GPIO),
 106         IODESC_ENT(IRQ),
 107         IODESC_ENT(MEMCTRL),
 108         IODESC_ENT(UART)
 109 };
 110
 111
 112 static struct cpu_table *
 113 s3c_lookup_cpu(unsigned long idcode)
 114 {
 115         struct cpu_table *tab;
 116         int count;
 117
 118         tab = cpu_ids;
 119         for (count = 0; count < ARRAY_SIZE(cpu_ids); count++, tab++) {
 120                 if ((idcode & tab->idmask) == tab->idcode)
 121                         return tab;
 122         }
 123
 124         return NULL;
 125 }
 126
 127 /* board information */
 128
 129 static struct s3c24xx_board *board;
 130
 131 void s3c24xx_set_board(struct s3c24xx_board *b)
 132 {
 133         int i;
 134
 135         board = b;
 136
 137         if (b->clocks_count != 0) {
 138                 struct clk **ptr = b->clocks;;
 139
 140                 for (i = b->clocks_count; i > 0; i--, ptr++)
 141                         s3c24xx_register_clock(*ptr);
 142         }
 143 }
 144
 145 /* cpu information */
 146
 147 static struct cpu_table *cpu;
 148
 149 void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
 150 {
 151         unsigned long idcode;
 152
 153         /* initialise the io descriptors we need for initialisation */
 154         iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
 155
 156         idcode = __raw_readl(S3C2410_GSTATUS1);
 157         cpu = s3c_lookup_cpu(idcode);
 158
 159         if (cpu == NULL) {
 160                 printk(KERN_ERR "Unknown CPU type 0x%08lx\n", idcode);
 161                 panic("Unknown S3C24XX CPU");
 162         }
 163
 164         if (cpu->map_io == NULL || cpu->init == NULL) {
 165                 printk(KERN_ERR "CPU %s support not enabled\n", cpu->name);
 166                 panic("Unsupported S3C24XX CPU");
 167         }
 168
 169         printk("CPU %s (id 0x%08lx)\n", cpu->name, idcode);
 170
 171         (cpu->map_io)(mach_desc, size);
 172 }
 173
 174 /* s3c24xx_init_clocks
 175  *
 176  * Initialise the clock subsystem and associated information from the
 177  * given master crystal value.
 178  *
 179  * xtal  = 0 -> use default PLL crystal value (normally 12MHz)
 180  *      != 0 -> PLL crystal value in Hz
 181 */
 182
 183 void __init s3c24xx_init_clocks(int xtal)
 184 {
 185         if (xtal == 0)
 186                 xtal = 12*1000*1000;
 187
 188         if (cpu == NULL)
 189                 panic("s3c24xx_init_clocks: no cpu setup?\n");
 190
 191         if (cpu->init_clocks == NULL)
 192                 panic("s3c24xx_init_clocks: cpu has no clock init\n");
 193         else
 194                 (cpu->init_clocks)(xtal);
 195 }
 196
 197 void __init s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
 198 {
 199         if (cpu == NULL)
 200                 return;
 201
 202         if (cpu->init_uarts == NULL) {
 203                 printk(KERN_ERR "s3c24xx_init_uarts: cpu has no uart init\n");
 204         } else
 205                 (cpu->init_uarts)(cfg, no);
 206 }
 207
 208 static int __init s3c_arch_init(void)
 209 {
 210         int ret;
 211
 212         // do the correct init for cpu
 213
 214         if (cpu == NULL)
 215                 panic("s3c_arch_init: NULL cpu\n");
 216
 217         ret = (cpu->init)();
 218         if (ret != 0)
 219                 return ret;
 220
 221         if (board != NULL) {
 222                 struct platform_device **ptr = board->devices;
 223                 int i;
 224
 225                 for (i = 0; i < board->devices_count; i++, ptr++) {
 226                         ret = platform_device_register(*ptr);
 227
 228                         if (ret) {
 229                                 printk(KERN_ERR "s3c24xx: failed to add board device %s (%d) @%p\n", (*ptr)->name, ret, *ptr);
 230                         }
 231                 }
 232
 233                 /* mask any error, we may not need all these board
 234                  * devices */
 235                 ret = 0;
 236         }
 237
 238         return ret;
 239 }
 240
 241 arch_initcall(s3c_arch_init);