include/asm-powerpc/ppc-pci.h

   1 /*
   2  * c 2001 PPC 64 Team, IBM Corp
   3  *
   4  *      This program is free software; you can redistribute it and/or
   5  *      modify it under the terms of the GNU General Public License
   6  *      as published by the Free Software Foundation; either version
   7  *      2 of the License, or (at your option) any later version.
   8  */
   9 #ifndef _ASM_POWERPC_PPC_PCI_H
  10 #define _ASM_POWERPC_PPC_PCI_H
  11 #ifdef __KERNEL__
  12
  13 #include <linux/pci.h>
  14 #include <asm/pci-bridge.h>
  15
  16 extern unsigned long isa_io_base;
  17
  18 extern void pci_setup_phb_io(struct pci_controller *hose, int primary);
  19 extern void pci_setup_phb_io_dynamic(struct pci_controller *hose, int primary);
  20
  21
  22 extern struct list_head hose_list;
  23 extern int global_phb_number;
  24
  25 extern unsigned long find_and_init_phbs(void);
  26
  27 extern struct pci_dev *ppc64_isabridge_dev;     /* may be NULL if no ISA bus */
  28
  29 /** Bus Unit ID macros; get low and hi 32-bits of the 64-bit BUID */
  30 #define BUID_HI(buid) ((buid) >> 32)
  31 #define BUID_LO(buid) ((buid) & 0xffffffff)
  32
  33 /* PCI device_node operations */
  34 struct device_node;
  35 typedef void *(*traverse_func)(struct device_node *me, void *data);
  36 void *traverse_pci_devices(struct device_node *start, traverse_func pre,
  37                 void *data);
  38
  39 extern void pci_devs_phb_init(void);
  40 extern void pci_devs_phb_init_dynamic(struct pci_controller *phb);
  41 extern void scan_phb(struct pci_controller *hose);
  42
  43 /* From rtas_pci.h */
  44 extern void init_pci_config_tokens (void);
  45 extern unsigned long get_phb_buid (struct device_node *);
  46 extern int rtas_setup_phb(struct pci_controller *phb);
  47
  48 /* From pSeries_pci.h */
  49 extern void pSeries_final_fixup(void);
  50
  51 extern unsigned long pci_probe_only;
  52
  53 /* ---- EEH internal-use-only related routines ---- */
  54 #ifdef CONFIG_EEH
  55
  56 void pci_addr_cache_insert_device(struct pci_dev *dev);
  57 void pci_addr_cache_remove_device(struct pci_dev *dev);
  58 void pci_addr_cache_build(void);
  59 struct pci_dev *pci_get_device_by_addr(unsigned long addr);
  60
  61 /**
  62  * eeh_slot_error_detail -- record and EEH error condition to the log
  63  * @severity: 1 if temporary, 2 if permanent failure.
  64  *
  65  * Obtains the the EEH error details from the RTAS subsystem,
  66  * and then logs these details with the RTAS error log system.
  67  */
  68 void eeh_slot_error_detail (struct pci_dn *pdn, int severity);
  69
  70 /**
  71  * rtas_pci_enableo - enable IO transfers for this slot
  72  * @pdn:       pci device node
  73  * @function:  either EEH_THAW_MMIO or EEH_THAW_DMA
  74  *
  75  * Enable I/O transfers to this slot
  76  */
  77 #define EEH_THAW_MMIO 2
  78 #define EEH_THAW_DMA  3
  79 int rtas_pci_enable(struct pci_dn *pdn, int function);
  80
  81 /**
  82  * rtas_set_slot_reset -- unfreeze a frozen slot
  83  *
  84  * Clear the EEH-frozen condition on a slot.  This routine
  85  * does this by asserting the PCI #RST line for 1/8th of
  86  * a second; this routine will sleep while the adapter is
  87  * being reset.
  88  *
  89  * Returns a non-zero value if the reset failed.
  90  */
  91 int rtas_set_slot_reset (struct pci_dn *);
  92
  93 /**
  94  * eeh_restore_bars - Restore device configuration info.
  95  *
  96  * A reset of a PCI device will clear out its config space.
  97  * This routines will restore the config space for this
  98  * device, and is children, to values previously obtained
  99  * from the firmware.
 100  */
 101 void eeh_restore_bars(struct pci_dn *);
 102
 103 /**
 104  * rtas_configure_bridge -- firmware initialization of pci bridge
 105  *
 106  * Ask the firmware to configure all PCI bridges devices
 107  * located behind the indicated node. Required after a
 108  * pci device reset. Does essentially the same hing as
 109  * eeh_restore_bars, but for brdges, and lets firmware
 110  * do the work.
 111  */
 112 void rtas_configure_bridge(struct pci_dn *);
 113
 114 int rtas_write_config(struct pci_dn *, int where, int size, u32 val);
 115 int rtas_read_config(struct pci_dn *, int where, int size, u32 *val);
 116
 117 /**
 118  * mark and clear slots: find "partition endpoint" PE and set or
 119  * clear the flags for each subnode of the PE.
 120  */
 121 void eeh_mark_slot (struct device_node *dn, int mode_flag);
 122 void eeh_clear_slot (struct device_node *dn, int mode_flag);
 123
 124 /* Find the associated "Partiationable Endpoint" PE */
 125 struct device_node * find_device_pe(struct device_node *dn);
 126
 127 #endif
 128
 129 #endif /* __KERNEL__ */
 130 #endif /* _ASM_POWERPC_PPC_PCI_H */