2 =========================================================================
3 r8169.c: A RealTek RTL-8169 Gigabit Ethernet driver for Linux kernel 2.4.x.
4 --------------------------------------------------------------------
7 Feb 4 2002 - created initially by ShuChen <shuchen@realtek.com.tw>.
8 May 20 2002 - Add link status force-mode and TBI mode support.
9 2004 - Massive updates. See kernel SCM system for details.
10 =========================================================================
11 1. [DEPRECATED: use ethtool instead] The media can be forced in 5 modes.
12 Command: 'insmod r8169 media = SET_MEDIA'
13 Ex: 'insmod r8169 media = 0x04' will force PHY to operate in 100Mpbs Half-duplex.
23 =========================================================================
24 VERSION 1.1 <2002/10/4>
26 The bit4:0 of MII register 4 is called "selector field", and have to be
27 00001b to indicate support of IEEE std 802.3 during NWay process of
28 exchanging Link Code Word (FLP).
30 VERSION 1.2 <2002/11/30>
33 - Use ether_crc in stock kernel (linux/crc32.h)
34 - Copy mc_filter setup code from 8139cp
35 (includes an optimization, and avoids set_bit use)
37 VERSION 1.6LK <2004/04/14>
39 - Merge of Realtek's version 1.6
40 - Conversion to DMA API
45 VERSION 2.2LK <2005/01/25>
47 - RX csum, TX csum/SG, TSO
49 - baby (< 7200) Jumbo frames support
50 - Merge of Realtek's version 2.2 (new phy)
53 #include <linux/module.h>
54 #include <linux/moduleparam.h>
55 #include <linux/pci.h>
56 #include <linux/netdevice.h>
57 #include <linux/etherdevice.h>
58 #include <linux/delay.h>
59 #include <linux/ethtool.h>
60 #include <linux/mii.h>
61 #include <linux/if_vlan.h>
62 #include <linux/crc32.h>
65 #include <linux/tcp.h>
66 #include <linux/init.h>
67 #include <linux/dma-mapping.h>
72 #ifdef CONFIG_R8169_NAPI
73 #define NAPI_SUFFIX "-NAPI"
75 #define NAPI_SUFFIX ""
78 #define RTL8169_VERSION "2.2LK" NAPI_SUFFIX
79 #define MODULENAME "r8169"
80 #define PFX MODULENAME ": "
83 #define assert(expr) \
85 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
86 #expr,__FILE__,__FUNCTION__,__LINE__); \
88 #define dprintk(fmt, args...) do { printk(PFX fmt, ## args); } while (0)
90 #define assert(expr) do {} while (0)
91 #define dprintk(fmt, args...) do {} while (0)
92 #endif /* RTL8169_DEBUG */
94 #define R8169_MSG_DEFAULT \
95 (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
97 #define TX_BUFFS_AVAIL(tp) \
98 (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)
100 #ifdef CONFIG_R8169_NAPI
101 #define rtl8169_rx_skb netif_receive_skb
102 #define rtl8169_rx_hwaccel_skb vlan_hwaccel_receive_skb
103 #define rtl8169_rx_quota(count, quota) min(count, quota)
105 #define rtl8169_rx_skb netif_rx
106 #define rtl8169_rx_hwaccel_skb vlan_hwaccel_rx
107 #define rtl8169_rx_quota(count, quota) count
112 static int media
[MAX_UNITS
] = { -1, -1, -1, -1, -1, -1, -1, -1 };
113 static int num_media
= 0;
115 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
116 static const int max_interrupt_work
= 20;
118 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
119 The RTL chips use a 64 element hash table based on the Ethernet CRC. */
120 static const int multicast_filter_limit
= 32;
122 /* MAC address length */
123 #define MAC_ADDR_LEN 6
125 #define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
126 #define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
127 #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
128 #define EarlyTxThld 0x3F /* 0x3F means NO early transmit */
129 #define RxPacketMaxSize 0x3FE8 /* 16K - 1 - ETH_HLEN - VLAN - CRC... */
130 #define SafeMtu 0x1c20 /* ... actually life sucks beyond ~7k */
131 #define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */
133 #define R8169_REGS_SIZE 256
134 #define R8169_NAPI_WEIGHT 64
135 #define NUM_TX_DESC 64 /* Number of Tx descriptor registers */
136 #define NUM_RX_DESC 256 /* Number of Rx descriptor registers */
137 #define RX_BUF_SIZE 1536 /* Rx Buffer size */
138 #define R8169_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
139 #define R8169_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
141 #define RTL8169_TX_TIMEOUT (6*HZ)
142 #define RTL8169_PHY_TIMEOUT (10*HZ)
144 /* write/read MMIO register */
145 #define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
146 #define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg))
147 #define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg))
148 #define RTL_R8(reg) readb (ioaddr + (reg))
149 #define RTL_R16(reg) readw (ioaddr + (reg))
150 #define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg)))
153 RTL_GIGA_MAC_VER_01
= 0x00,
154 RTL_GIGA_MAC_VER_02
= 0x01,
155 RTL_GIGA_MAC_VER_03
= 0x02,
156 RTL_GIGA_MAC_VER_04
= 0x03,
157 RTL_GIGA_MAC_VER_05
= 0x04,
158 RTL_GIGA_MAC_VER_11
= 0x0b,
159 RTL_GIGA_MAC_VER_12
= 0x0c,
160 RTL_GIGA_MAC_VER_13
= 0x0d,
161 RTL_GIGA_MAC_VER_14
= 0x0e,
162 RTL_GIGA_MAC_VER_15
= 0x0f
166 RTL_GIGA_PHY_VER_C
= 0x03, /* PHY Reg 0x03 bit0-3 == 0x0000 */
167 RTL_GIGA_PHY_VER_D
= 0x04, /* PHY Reg 0x03 bit0-3 == 0x0000 */
168 RTL_GIGA_PHY_VER_E
= 0x05, /* PHY Reg 0x03 bit0-3 == 0x0000 */
169 RTL_GIGA_PHY_VER_F
= 0x06, /* PHY Reg 0x03 bit0-3 == 0x0001 */
170 RTL_GIGA_PHY_VER_G
= 0x07, /* PHY Reg 0x03 bit0-3 == 0x0002 */
171 RTL_GIGA_PHY_VER_H
= 0x08, /* PHY Reg 0x03 bit0-3 == 0x0003 */
174 #define _R(NAME,MAC,MASK) \
175 { .name = NAME, .mac_version = MAC, .RxConfigMask = MASK }
177 static const struct {
180 u32 RxConfigMask
; /* Clears the bits supported by this chip */
181 } rtl_chip_info
[] = {
182 _R("RTL8169", RTL_GIGA_MAC_VER_01
, 0xff7e1880),
183 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_02
, 0xff7e1880),
184 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_03
, 0xff7e1880),
185 _R("RTL8169sb/8110sb", RTL_GIGA_MAC_VER_04
, 0xff7e1880),
186 _R("RTL8169sc/8110sc", RTL_GIGA_MAC_VER_05
, 0xff7e1880),
187 _R("RTL8168b/8111b", RTL_GIGA_MAC_VER_11
, 0xff7e1880), // PCI-E
188 _R("RTL8168b/8111b", RTL_GIGA_MAC_VER_12
, 0xff7e1880), // PCI-E
189 _R("RTL8101e", RTL_GIGA_MAC_VER_13
, 0xff7e1880), // PCI-E 8139
190 _R("RTL8100e", RTL_GIGA_MAC_VER_14
, 0xff7e1880), // PCI-E 8139
191 _R("RTL8100e", RTL_GIGA_MAC_VER_15
, 0xff7e1880) // PCI-E 8139
201 static const struct {
205 [RTL_CFG_0
] = { 1, NET_IP_ALIGN
},
206 [RTL_CFG_1
] = { 2, NET_IP_ALIGN
},
207 [RTL_CFG_2
] = { 2, 8 }
210 static struct pci_device_id rtl8169_pci_tbl
[] = {
211 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK
, 0x8129), 0, 0, RTL_CFG_0
},
212 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK
, 0x8136), 0, 0, RTL_CFG_2
},
213 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK
, 0x8167), 0, 0, RTL_CFG_0
},
214 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK
, 0x8168), 0, 0, RTL_CFG_2
},
215 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK
, 0x8169), 0, 0, RTL_CFG_0
},
216 { PCI_DEVICE(PCI_VENDOR_ID_DLINK
, 0x4300), 0, 0, RTL_CFG_0
},
217 { PCI_DEVICE(0x1259, 0xc107), 0, 0, RTL_CFG_0
},
218 { PCI_DEVICE(0x16ec, 0x0116), 0, 0, RTL_CFG_0
},
219 { PCI_VENDOR_ID_LINKSYS
, 0x1032,
220 PCI_ANY_ID
, 0x0024, 0, 0, RTL_CFG_0
},
224 MODULE_DEVICE_TABLE(pci
, rtl8169_pci_tbl
);
226 static int rx_copybreak
= 200;
232 enum RTL8169_registers
{
233 MAC0
= 0, /* Ethernet hardware address. */
234 MAR0
= 8, /* Multicast filter. */
235 CounterAddrLow
= 0x10,
236 CounterAddrHigh
= 0x14,
237 TxDescStartAddrLow
= 0x20,
238 TxDescStartAddrHigh
= 0x24,
239 TxHDescStartAddrLow
= 0x28,
240 TxHDescStartAddrHigh
= 0x2c,
266 RxDescAddrLow
= 0xE4,
267 RxDescAddrHigh
= 0xE8,
270 FuncEventMask
= 0xF4,
271 FuncPresetState
= 0xF8,
272 FuncForceEvent
= 0xFC,
275 enum RTL8169_register_content
{
276 /* InterruptStatusBits */
280 TxDescUnavail
= 0x80,
304 Cfg9346_Unlock
= 0xC0,
309 AcceptBroadcast
= 0x08,
310 AcceptMulticast
= 0x04,
312 AcceptAllPhys
= 0x01,
319 TxInterFrameGapShift
= 24,
320 TxDMAShift
= 8, /* DMA burst value (0-7) is shift this many bits */
322 /* Config1 register p.24 */
323 PMEnable
= (1 << 0), /* Power Management Enable */
325 /* Config3 register p.25 */
326 MagicPacket
= (1 << 5), /* Wake up when receives a Magic Packet */
327 LinkUp
= (1 << 4), /* Wake up when the cable connection is re-established */
329 /* Config5 register p.27 */
330 BWF
= (1 << 6), /* Accept Broadcast wakeup frame */
331 MWF
= (1 << 5), /* Accept Multicast wakeup frame */
332 UWF
= (1 << 4), /* Accept Unicast wakeup frame */
333 LanWake
= (1 << 1), /* LanWake enable/disable */
334 PMEStatus
= (1 << 0), /* PME status can be reset by PCI RST# */
337 TBIReset
= 0x80000000,
338 TBILoopback
= 0x40000000,
339 TBINwEnable
= 0x20000000,
340 TBINwRestart
= 0x10000000,
341 TBILinkOk
= 0x02000000,
342 TBINwComplete
= 0x01000000,
350 /* rtl8169_PHYstatus */
368 TBILinkOK
= 0x02000000,
370 /* DumpCounterCommand */
374 enum _DescStatusBit
{
375 DescOwn
= (1 << 31), /* Descriptor is owned by NIC */
376 RingEnd
= (1 << 30), /* End of descriptor ring */
377 FirstFrag
= (1 << 29), /* First segment of a packet */
378 LastFrag
= (1 << 28), /* Final segment of a packet */
381 LargeSend
= (1 << 27), /* TCP Large Send Offload (TSO) */
382 MSSShift
= 16, /* MSS value position */
383 MSSMask
= 0xfff, /* MSS value + LargeSend bit: 12 bits */
384 IPCS
= (1 << 18), /* Calculate IP checksum */
385 UDPCS
= (1 << 17), /* Calculate UDP/IP checksum */
386 TCPCS
= (1 << 16), /* Calculate TCP/IP checksum */
387 TxVlanTag
= (1 << 17), /* Add VLAN tag */
390 PID1
= (1 << 18), /* Protocol ID bit 1/2 */
391 PID0
= (1 << 17), /* Protocol ID bit 2/2 */
393 #define RxProtoUDP (PID1)
394 #define RxProtoTCP (PID0)
395 #define RxProtoIP (PID1 | PID0)
396 #define RxProtoMask RxProtoIP
398 IPFail
= (1 << 16), /* IP checksum failed */
399 UDPFail
= (1 << 15), /* UDP/IP checksum failed */
400 TCPFail
= (1 << 14), /* TCP/IP checksum failed */
401 RxVlanTag
= (1 << 16), /* VLAN tag available */
404 #define RsvdMask 0x3fffc000
421 u8 __pad
[sizeof(void *) - sizeof(u32
)];
424 struct rtl8169_private
{
425 void __iomem
*mmio_addr
; /* memory map physical address */
426 struct pci_dev
*pci_dev
; /* Index of PCI device */
427 struct net_device_stats stats
; /* statistics of net device */
428 spinlock_t lock
; /* spin lock flag */
433 u32 cur_rx
; /* Index into the Rx descriptor buffer of next Rx pkt. */
434 u32 cur_tx
; /* Index into the Tx descriptor buffer of next Rx pkt. */
437 struct TxDesc
*TxDescArray
; /* 256-aligned Tx descriptor ring */
438 struct RxDesc
*RxDescArray
; /* 256-aligned Rx descriptor ring */
439 dma_addr_t TxPhyAddr
;
440 dma_addr_t RxPhyAddr
;
441 struct sk_buff
*Rx_skbuff
[NUM_RX_DESC
]; /* Rx data buffers */
442 struct ring_info tx_skb
[NUM_TX_DESC
]; /* Tx data buffers */
445 struct timer_list timer
;
448 int phy_auto_nego_reg
;
449 int phy_1000_ctrl_reg
;
450 #ifdef CONFIG_R8169_VLAN
451 struct vlan_group
*vlgrp
;
453 int (*set_speed
)(struct net_device
*, u8 autoneg
, u16 speed
, u8 duplex
);
454 void (*get_settings
)(struct net_device
*, struct ethtool_cmd
*);
455 void (*phy_reset_enable
)(void __iomem
*);
456 unsigned int (*phy_reset_pending
)(void __iomem
*);
457 unsigned int (*link_ok
)(void __iomem
*);
458 struct work_struct task
;
459 unsigned wol_enabled
: 1;
462 MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>");
463 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
464 module_param_array(media
, int, &num_media
, 0);
465 MODULE_PARM_DESC(media
, "force phy operation. Deprecated by ethtool (8).");
466 module_param(rx_copybreak
, int, 0);
467 MODULE_PARM_DESC(rx_copybreak
, "Copy breakpoint for copy-only-tiny-frames");
468 module_param(use_dac
, int, 0);
469 MODULE_PARM_DESC(use_dac
, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
470 module_param_named(debug
, debug
.msg_enable
, int, 0);
471 MODULE_PARM_DESC(debug
, "Debug verbosity level (0=none, ..., 16=all)");
472 MODULE_LICENSE("GPL");
473 MODULE_VERSION(RTL8169_VERSION
);
475 static int rtl8169_open(struct net_device
*dev
);
476 static int rtl8169_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
);
477 static irqreturn_t
rtl8169_interrupt(int irq
, void *dev_instance
,
478 struct pt_regs
*regs
);
479 static int rtl8169_init_ring(struct net_device
*dev
);
480 static void rtl8169_hw_start(struct net_device
*dev
);
481 static int rtl8169_close(struct net_device
*dev
);
482 static void rtl8169_set_rx_mode(struct net_device
*dev
);
483 static void rtl8169_tx_timeout(struct net_device
*dev
);
484 static struct net_device_stats
*rtl8169_get_stats(struct net_device
*dev
);
485 static int rtl8169_rx_interrupt(struct net_device
*, struct rtl8169_private
*,
487 static int rtl8169_change_mtu(struct net_device
*dev
, int new_mtu
);
488 static void rtl8169_down(struct net_device
*dev
);
490 #ifdef CONFIG_R8169_NAPI
491 static int rtl8169_poll(struct net_device
*dev
, int *budget
);
494 static const u16 rtl8169_intr_mask
=
495 SYSErr
| LinkChg
| RxOverflow
| RxFIFOOver
| TxErr
| TxOK
| RxErr
| RxOK
;
496 static const u16 rtl8169_napi_event
=
497 RxOK
| RxOverflow
| RxFIFOOver
| TxOK
| TxErr
;
498 static const unsigned int rtl8169_rx_config
=
499 (RX_FIFO_THRESH
<< RxCfgFIFOShift
) | (RX_DMA_BURST
<< RxCfgDMAShift
);
501 static void mdio_write(void __iomem
*ioaddr
, int RegAddr
, int value
)
505 RTL_W32(PHYAR
, 0x80000000 | (RegAddr
& 0xFF) << 16 | value
);
507 for (i
= 20; i
> 0; i
--) {
508 /* Check if the RTL8169 has completed writing to the specified MII register */
509 if (!(RTL_R32(PHYAR
) & 0x80000000))
515 static int mdio_read(void __iomem
*ioaddr
, int RegAddr
)
519 RTL_W32(PHYAR
, 0x0 | (RegAddr
& 0xFF) << 16);
521 for (i
= 20; i
> 0; i
--) {
522 /* Check if the RTL8169 has completed retrieving data from the specified MII register */
523 if (RTL_R32(PHYAR
) & 0x80000000) {
524 value
= (int) (RTL_R32(PHYAR
) & 0xFFFF);
532 static void rtl8169_irq_mask_and_ack(void __iomem
*ioaddr
)
534 RTL_W16(IntrMask
, 0x0000);
536 RTL_W16(IntrStatus
, 0xffff);
539 static void rtl8169_asic_down(void __iomem
*ioaddr
)
541 RTL_W8(ChipCmd
, 0x00);
542 rtl8169_irq_mask_and_ack(ioaddr
);
546 static unsigned int rtl8169_tbi_reset_pending(void __iomem
*ioaddr
)
548 return RTL_R32(TBICSR
) & TBIReset
;
551 static unsigned int rtl8169_xmii_reset_pending(void __iomem
*ioaddr
)
553 return mdio_read(ioaddr
, MII_BMCR
) & BMCR_RESET
;
556 static unsigned int rtl8169_tbi_link_ok(void __iomem
*ioaddr
)
558 return RTL_R32(TBICSR
) & TBILinkOk
;
561 static unsigned int rtl8169_xmii_link_ok(void __iomem
*ioaddr
)
563 return RTL_R8(PHYstatus
) & LinkStatus
;
566 static void rtl8169_tbi_reset_enable(void __iomem
*ioaddr
)
568 RTL_W32(TBICSR
, RTL_R32(TBICSR
) | TBIReset
);
571 static void rtl8169_xmii_reset_enable(void __iomem
*ioaddr
)
575 val
= (mdio_read(ioaddr
, MII_BMCR
) | BMCR_RESET
) & 0xffff;
576 mdio_write(ioaddr
, MII_BMCR
, val
);
579 static void rtl8169_check_link_status(struct net_device
*dev
,
580 struct rtl8169_private
*tp
, void __iomem
*ioaddr
)
584 spin_lock_irqsave(&tp
->lock
, flags
);
585 if (tp
->link_ok(ioaddr
)) {
586 netif_carrier_on(dev
);
587 if (netif_msg_ifup(tp
))
588 printk(KERN_INFO PFX
"%s: link up\n", dev
->name
);
590 if (netif_msg_ifdown(tp
))
591 printk(KERN_INFO PFX
"%s: link down\n", dev
->name
);
592 netif_carrier_off(dev
);
594 spin_unlock_irqrestore(&tp
->lock
, flags
);
597 static void rtl8169_link_option(int idx
, u8
*autoneg
, u16
*speed
, u8
*duplex
)
604 } link_settings
[] = {
605 { SPEED_10
, DUPLEX_HALF
, AUTONEG_DISABLE
, _10_Half
},
606 { SPEED_10
, DUPLEX_FULL
, AUTONEG_DISABLE
, _10_Full
},
607 { SPEED_100
, DUPLEX_HALF
, AUTONEG_DISABLE
, _100_Half
},
608 { SPEED_100
, DUPLEX_FULL
, AUTONEG_DISABLE
, _100_Full
},
609 { SPEED_1000
, DUPLEX_FULL
, AUTONEG_DISABLE
, _1000_Full
},
611 { SPEED_1000
, DUPLEX_FULL
, AUTONEG_ENABLE
, 0xff }
613 unsigned char option
;
615 option
= ((idx
< MAX_UNITS
) && (idx
>= 0)) ? media
[idx
] : 0xff;
617 if ((option
!= 0xff) && !idx
&& netif_msg_drv(&debug
))
618 printk(KERN_WARNING PFX
"media option is deprecated.\n");
620 for (p
= link_settings
; p
->media
!= 0xff; p
++) {
621 if (p
->media
== option
)
624 *autoneg
= p
->autoneg
;
629 static void rtl8169_get_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
631 struct rtl8169_private
*tp
= netdev_priv(dev
);
632 void __iomem
*ioaddr
= tp
->mmio_addr
;
637 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
638 wol
->supported
= WAKE_ANY
;
640 spin_lock_irq(&tp
->lock
);
642 options
= RTL_R8(Config1
);
643 if (!(options
& PMEnable
))
646 options
= RTL_R8(Config3
);
647 if (options
& LinkUp
)
648 wol
->wolopts
|= WAKE_PHY
;
649 if (options
& MagicPacket
)
650 wol
->wolopts
|= WAKE_MAGIC
;
652 options
= RTL_R8(Config5
);
654 wol
->wolopts
|= WAKE_UCAST
;
656 wol
->wolopts
|= WAKE_BCAST
;
658 wol
->wolopts
|= WAKE_MCAST
;
661 spin_unlock_irq(&tp
->lock
);
664 static int rtl8169_set_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
666 struct rtl8169_private
*tp
= netdev_priv(dev
);
667 void __iomem
*ioaddr
= tp
->mmio_addr
;
674 { WAKE_ANY
, Config1
, PMEnable
},
675 { WAKE_PHY
, Config3
, LinkUp
},
676 { WAKE_MAGIC
, Config3
, MagicPacket
},
677 { WAKE_UCAST
, Config5
, UWF
},
678 { WAKE_BCAST
, Config5
, BWF
},
679 { WAKE_MCAST
, Config5
, MWF
},
680 { WAKE_ANY
, Config5
, LanWake
}
683 spin_lock_irq(&tp
->lock
);
685 RTL_W8(Cfg9346
, Cfg9346_Unlock
);
687 for (i
= 0; i
< ARRAY_SIZE(cfg
); i
++) {
688 u8 options
= RTL_R8(cfg
[i
].reg
) & ~cfg
[i
].mask
;
689 if (wol
->wolopts
& cfg
[i
].opt
)
690 options
|= cfg
[i
].mask
;
691 RTL_W8(cfg
[i
].reg
, options
);
694 RTL_W8(Cfg9346
, Cfg9346_Lock
);
696 tp
->wol_enabled
= (wol
->wolopts
) ? 1 : 0;
698 spin_unlock_irq(&tp
->lock
);
703 static void rtl8169_get_drvinfo(struct net_device
*dev
,
704 struct ethtool_drvinfo
*info
)
706 struct rtl8169_private
*tp
= netdev_priv(dev
);
708 strcpy(info
->driver
, MODULENAME
);
709 strcpy(info
->version
, RTL8169_VERSION
);
710 strcpy(info
->bus_info
, pci_name(tp
->pci_dev
));
713 static int rtl8169_get_regs_len(struct net_device
*dev
)
715 return R8169_REGS_SIZE
;
718 static int rtl8169_set_speed_tbi(struct net_device
*dev
,
719 u8 autoneg
, u16 speed
, u8 duplex
)
721 struct rtl8169_private
*tp
= netdev_priv(dev
);
722 void __iomem
*ioaddr
= tp
->mmio_addr
;
726 reg
= RTL_R32(TBICSR
);
727 if ((autoneg
== AUTONEG_DISABLE
) && (speed
== SPEED_1000
) &&
728 (duplex
== DUPLEX_FULL
)) {
729 RTL_W32(TBICSR
, reg
& ~(TBINwEnable
| TBINwRestart
));
730 } else if (autoneg
== AUTONEG_ENABLE
)
731 RTL_W32(TBICSR
, reg
| TBINwEnable
| TBINwRestart
);
733 if (netif_msg_link(tp
)) {
734 printk(KERN_WARNING
"%s: "
735 "incorrect speed setting refused in TBI mode\n",
744 static int rtl8169_set_speed_xmii(struct net_device
*dev
,
745 u8 autoneg
, u16 speed
, u8 duplex
)
747 struct rtl8169_private
*tp
= netdev_priv(dev
);
748 void __iomem
*ioaddr
= tp
->mmio_addr
;
749 int auto_nego
, giga_ctrl
;
751 auto_nego
= mdio_read(ioaddr
, MII_ADVERTISE
);
752 auto_nego
&= ~(ADVERTISE_10HALF
| ADVERTISE_10FULL
|
753 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
754 giga_ctrl
= mdio_read(ioaddr
, MII_CTRL1000
);
755 giga_ctrl
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
757 if (autoneg
== AUTONEG_ENABLE
) {
758 auto_nego
|= (ADVERTISE_10HALF
| ADVERTISE_10FULL
|
759 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
760 giga_ctrl
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
762 if (speed
== SPEED_10
)
763 auto_nego
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
764 else if (speed
== SPEED_100
)
765 auto_nego
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
766 else if (speed
== SPEED_1000
)
767 giga_ctrl
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
769 if (duplex
== DUPLEX_HALF
)
770 auto_nego
&= ~(ADVERTISE_10FULL
| ADVERTISE_100FULL
);
772 if (duplex
== DUPLEX_FULL
)
773 auto_nego
&= ~(ADVERTISE_10HALF
| ADVERTISE_100HALF
);
775 /* This tweak comes straight from Realtek's driver. */
776 if ((speed
== SPEED_100
) && (duplex
== DUPLEX_HALF
) &&
777 (tp
->mac_version
== RTL_GIGA_MAC_VER_13
)) {
778 auto_nego
= ADVERTISE_100HALF
| ADVERTISE_CSMA
;
782 /* The 8100e/8101e do Fast Ethernet only. */
783 if ((tp
->mac_version
== RTL_GIGA_MAC_VER_13
) ||
784 (tp
->mac_version
== RTL_GIGA_MAC_VER_14
) ||
785 (tp
->mac_version
== RTL_GIGA_MAC_VER_15
)) {
786 if ((giga_ctrl
& (ADVERTISE_1000FULL
| ADVERTISE_1000HALF
)) &&
787 netif_msg_link(tp
)) {
788 printk(KERN_INFO
"%s: PHY does not support 1000Mbps.\n",
791 giga_ctrl
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
794 auto_nego
|= ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
;
796 tp
->phy_auto_nego_reg
= auto_nego
;
797 tp
->phy_1000_ctrl_reg
= giga_ctrl
;
799 mdio_write(ioaddr
, MII_ADVERTISE
, auto_nego
);
800 mdio_write(ioaddr
, MII_CTRL1000
, giga_ctrl
);
801 mdio_write(ioaddr
, MII_BMCR
, BMCR_ANENABLE
| BMCR_ANRESTART
);
805 static int rtl8169_set_speed(struct net_device
*dev
,
806 u8 autoneg
, u16 speed
, u8 duplex
)
808 struct rtl8169_private
*tp
= netdev_priv(dev
);
811 ret
= tp
->set_speed(dev
, autoneg
, speed
, duplex
);
813 if (netif_running(dev
) && (tp
->phy_1000_ctrl_reg
& ADVERTISE_1000FULL
))
814 mod_timer(&tp
->timer
, jiffies
+ RTL8169_PHY_TIMEOUT
);
819 static int rtl8169_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
821 struct rtl8169_private
*tp
= netdev_priv(dev
);
825 spin_lock_irqsave(&tp
->lock
, flags
);
826 ret
= rtl8169_set_speed(dev
, cmd
->autoneg
, cmd
->speed
, cmd
->duplex
);
827 spin_unlock_irqrestore(&tp
->lock
, flags
);
832 static u32
rtl8169_get_rx_csum(struct net_device
*dev
)
834 struct rtl8169_private
*tp
= netdev_priv(dev
);
836 return tp
->cp_cmd
& RxChkSum
;
839 static int rtl8169_set_rx_csum(struct net_device
*dev
, u32 data
)
841 struct rtl8169_private
*tp
= netdev_priv(dev
);
842 void __iomem
*ioaddr
= tp
->mmio_addr
;
845 spin_lock_irqsave(&tp
->lock
, flags
);
848 tp
->cp_cmd
|= RxChkSum
;
850 tp
->cp_cmd
&= ~RxChkSum
;
852 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
855 spin_unlock_irqrestore(&tp
->lock
, flags
);
860 #ifdef CONFIG_R8169_VLAN
862 static inline u32
rtl8169_tx_vlan_tag(struct rtl8169_private
*tp
,
865 return (tp
->vlgrp
&& vlan_tx_tag_present(skb
)) ?
866 TxVlanTag
| swab16(vlan_tx_tag_get(skb
)) : 0x00;
869 static void rtl8169_vlan_rx_register(struct net_device
*dev
,
870 struct vlan_group
*grp
)
872 struct rtl8169_private
*tp
= netdev_priv(dev
);
873 void __iomem
*ioaddr
= tp
->mmio_addr
;
876 spin_lock_irqsave(&tp
->lock
, flags
);
879 tp
->cp_cmd
|= RxVlan
;
881 tp
->cp_cmd
&= ~RxVlan
;
882 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
884 spin_unlock_irqrestore(&tp
->lock
, flags
);
887 static void rtl8169_vlan_rx_kill_vid(struct net_device
*dev
, unsigned short vid
)
889 struct rtl8169_private
*tp
= netdev_priv(dev
);
892 spin_lock_irqsave(&tp
->lock
, flags
);
894 tp
->vlgrp
->vlan_devices
[vid
] = NULL
;
895 spin_unlock_irqrestore(&tp
->lock
, flags
);
898 static int rtl8169_rx_vlan_skb(struct rtl8169_private
*tp
, struct RxDesc
*desc
,
901 u32 opts2
= le32_to_cpu(desc
->opts2
);
904 if (tp
->vlgrp
&& (opts2
& RxVlanTag
)) {
905 rtl8169_rx_hwaccel_skb(skb
, tp
->vlgrp
,
906 swab16(opts2
& 0xffff));
914 #else /* !CONFIG_R8169_VLAN */
916 static inline u32
rtl8169_tx_vlan_tag(struct rtl8169_private
*tp
,
922 static int rtl8169_rx_vlan_skb(struct rtl8169_private
*tp
, struct RxDesc
*desc
,
930 static void rtl8169_gset_tbi(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
932 struct rtl8169_private
*tp
= netdev_priv(dev
);
933 void __iomem
*ioaddr
= tp
->mmio_addr
;
937 SUPPORTED_1000baseT_Full
| SUPPORTED_Autoneg
| SUPPORTED_FIBRE
;
938 cmd
->port
= PORT_FIBRE
;
939 cmd
->transceiver
= XCVR_INTERNAL
;
941 status
= RTL_R32(TBICSR
);
942 cmd
->advertising
= (status
& TBINwEnable
) ? ADVERTISED_Autoneg
: 0;
943 cmd
->autoneg
= !!(status
& TBINwEnable
);
945 cmd
->speed
= SPEED_1000
;
946 cmd
->duplex
= DUPLEX_FULL
; /* Always set */
949 static void rtl8169_gset_xmii(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
951 struct rtl8169_private
*tp
= netdev_priv(dev
);
952 void __iomem
*ioaddr
= tp
->mmio_addr
;
955 cmd
->supported
= SUPPORTED_10baseT_Half
|
956 SUPPORTED_10baseT_Full
|
957 SUPPORTED_100baseT_Half
|
958 SUPPORTED_100baseT_Full
|
959 SUPPORTED_1000baseT_Full
|
964 cmd
->advertising
= ADVERTISED_TP
| ADVERTISED_Autoneg
;
966 if (tp
->phy_auto_nego_reg
& ADVERTISE_10HALF
)
967 cmd
->advertising
|= ADVERTISED_10baseT_Half
;
968 if (tp
->phy_auto_nego_reg
& ADVERTISE_10FULL
)
969 cmd
->advertising
|= ADVERTISED_10baseT_Full
;
970 if (tp
->phy_auto_nego_reg
& ADVERTISE_100HALF
)
971 cmd
->advertising
|= ADVERTISED_100baseT_Half
;
972 if (tp
->phy_auto_nego_reg
& ADVERTISE_100FULL
)
973 cmd
->advertising
|= ADVERTISED_100baseT_Full
;
974 if (tp
->phy_1000_ctrl_reg
& ADVERTISE_1000FULL
)
975 cmd
->advertising
|= ADVERTISED_1000baseT_Full
;
977 status
= RTL_R8(PHYstatus
);
979 if (status
& _1000bpsF
)
980 cmd
->speed
= SPEED_1000
;
981 else if (status
& _100bps
)
982 cmd
->speed
= SPEED_100
;
983 else if (status
& _10bps
)
984 cmd
->speed
= SPEED_10
;
986 if (status
& TxFlowCtrl
)
987 cmd
->advertising
|= ADVERTISED_Asym_Pause
;
988 if (status
& RxFlowCtrl
)
989 cmd
->advertising
|= ADVERTISED_Pause
;
991 cmd
->duplex
= ((status
& _1000bpsF
) || (status
& FullDup
)) ?
992 DUPLEX_FULL
: DUPLEX_HALF
;
995 static int rtl8169_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
997 struct rtl8169_private
*tp
= netdev_priv(dev
);
1000 spin_lock_irqsave(&tp
->lock
, flags
);
1002 tp
->get_settings(dev
, cmd
);
1004 spin_unlock_irqrestore(&tp
->lock
, flags
);
1008 static void rtl8169_get_regs(struct net_device
*dev
, struct ethtool_regs
*regs
,
1011 struct rtl8169_private
*tp
= netdev_priv(dev
);
1012 unsigned long flags
;
1014 if (regs
->len
> R8169_REGS_SIZE
)
1015 regs
->len
= R8169_REGS_SIZE
;
1017 spin_lock_irqsave(&tp
->lock
, flags
);
1018 memcpy_fromio(p
, tp
->mmio_addr
, regs
->len
);
1019 spin_unlock_irqrestore(&tp
->lock
, flags
);
1022 static u32
rtl8169_get_msglevel(struct net_device
*dev
)
1024 struct rtl8169_private
*tp
= netdev_priv(dev
);
1026 return tp
->msg_enable
;
1029 static void rtl8169_set_msglevel(struct net_device
*dev
, u32 value
)
1031 struct rtl8169_private
*tp
= netdev_priv(dev
);
1033 tp
->msg_enable
= value
;
1036 static const char rtl8169_gstrings
[][ETH_GSTRING_LEN
] = {
1043 "tx_single_collisions",
1044 "tx_multi_collisions",
1052 struct rtl8169_counters
{
1059 u32 tx_one_collision
;
1060 u32 tx_multi_collision
;
1068 static int rtl8169_get_stats_count(struct net_device
*dev
)
1070 return ARRAY_SIZE(rtl8169_gstrings
);
1073 static void rtl8169_get_ethtool_stats(struct net_device
*dev
,
1074 struct ethtool_stats
*stats
, u64
*data
)
1076 struct rtl8169_private
*tp
= netdev_priv(dev
);
1077 void __iomem
*ioaddr
= tp
->mmio_addr
;
1078 struct rtl8169_counters
*counters
;
1084 counters
= pci_alloc_consistent(tp
->pci_dev
, sizeof(*counters
), &paddr
);
1088 RTL_W32(CounterAddrHigh
, (u64
)paddr
>> 32);
1089 cmd
= (u64
)paddr
& DMA_32BIT_MASK
;
1090 RTL_W32(CounterAddrLow
, cmd
);
1091 RTL_W32(CounterAddrLow
, cmd
| CounterDump
);
1093 while (RTL_R32(CounterAddrLow
) & CounterDump
) {
1094 if (msleep_interruptible(1))
1098 RTL_W32(CounterAddrLow
, 0);
1099 RTL_W32(CounterAddrHigh
, 0);
1101 data
[0] = le64_to_cpu(counters
->tx_packets
);
1102 data
[1] = le64_to_cpu(counters
->rx_packets
);
1103 data
[2] = le64_to_cpu(counters
->tx_errors
);
1104 data
[3] = le32_to_cpu(counters
->rx_errors
);
1105 data
[4] = le16_to_cpu(counters
->rx_missed
);
1106 data
[5] = le16_to_cpu(counters
->align_errors
);
1107 data
[6] = le32_to_cpu(counters
->tx_one_collision
);
1108 data
[7] = le32_to_cpu(counters
->tx_multi_collision
);
1109 data
[8] = le64_to_cpu(counters
->rx_unicast
);
1110 data
[9] = le64_to_cpu(counters
->rx_broadcast
);
1111 data
[10] = le32_to_cpu(counters
->rx_multicast
);
1112 data
[11] = le16_to_cpu(counters
->tx_aborted
);
1113 data
[12] = le16_to_cpu(counters
->tx_underun
);
1115 pci_free_consistent(tp
->pci_dev
, sizeof(*counters
), counters
, paddr
);
1118 static void rtl8169_get_strings(struct net_device
*dev
, u32 stringset
, u8
*data
)
1122 memcpy(data
, *rtl8169_gstrings
, sizeof(rtl8169_gstrings
));
1128 static const struct ethtool_ops rtl8169_ethtool_ops
= {
1129 .get_drvinfo
= rtl8169_get_drvinfo
,
1130 .get_regs_len
= rtl8169_get_regs_len
,
1131 .get_link
= ethtool_op_get_link
,
1132 .get_settings
= rtl8169_get_settings
,
1133 .set_settings
= rtl8169_set_settings
,
1134 .get_msglevel
= rtl8169_get_msglevel
,
1135 .set_msglevel
= rtl8169_set_msglevel
,
1136 .get_rx_csum
= rtl8169_get_rx_csum
,
1137 .set_rx_csum
= rtl8169_set_rx_csum
,
1138 .get_tx_csum
= ethtool_op_get_tx_csum
,
1139 .set_tx_csum
= ethtool_op_set_tx_csum
,
1140 .get_sg
= ethtool_op_get_sg
,
1141 .set_sg
= ethtool_op_set_sg
,
1142 .get_tso
= ethtool_op_get_tso
,
1143 .set_tso
= ethtool_op_set_tso
,
1144 .get_regs
= rtl8169_get_regs
,
1145 .get_wol
= rtl8169_get_wol
,
1146 .set_wol
= rtl8169_set_wol
,
1147 .get_strings
= rtl8169_get_strings
,
1148 .get_stats_count
= rtl8169_get_stats_count
,
1149 .get_ethtool_stats
= rtl8169_get_ethtool_stats
,
1150 .get_perm_addr
= ethtool_op_get_perm_addr
,
1153 static void rtl8169_write_gmii_reg_bit(void __iomem
*ioaddr
, int reg
, int bitnum
,
1158 val
= mdio_read(ioaddr
, reg
);
1159 val
= (bitval
== 1) ?
1160 val
| (bitval
<< bitnum
) : val
& ~(0x0001 << bitnum
);
1161 mdio_write(ioaddr
, reg
, val
& 0xffff);
1164 static void rtl8169_get_mac_version(struct rtl8169_private
*tp
, void __iomem
*ioaddr
)
1170 { 0x38800000, RTL_GIGA_MAC_VER_15
},
1171 { 0x38000000, RTL_GIGA_MAC_VER_12
},
1172 { 0x34000000, RTL_GIGA_MAC_VER_13
},
1173 { 0x30800000, RTL_GIGA_MAC_VER_14
},
1174 { 0x30000000, RTL_GIGA_MAC_VER_11
},
1175 { 0x18000000, RTL_GIGA_MAC_VER_05
},
1176 { 0x10000000, RTL_GIGA_MAC_VER_04
},
1177 { 0x04000000, RTL_GIGA_MAC_VER_03
},
1178 { 0x00800000, RTL_GIGA_MAC_VER_02
},
1179 { 0x00000000, RTL_GIGA_MAC_VER_01
} /* Catch-all */
1183 reg
= RTL_R32(TxConfig
) & 0x7c800000;
1184 while ((reg
& p
->mask
) != p
->mask
)
1186 tp
->mac_version
= p
->mac_version
;
1189 static void rtl8169_print_mac_version(struct rtl8169_private
*tp
)
1191 dprintk("mac_version = 0x%02x\n", tp
->mac_version
);
1194 static void rtl8169_get_phy_version(struct rtl8169_private
*tp
, void __iomem
*ioaddr
)
1201 { 0x000f, 0x0002, RTL_GIGA_PHY_VER_G
},
1202 { 0x000f, 0x0001, RTL_GIGA_PHY_VER_F
},
1203 { 0x000f, 0x0000, RTL_GIGA_PHY_VER_E
},
1204 { 0x0000, 0x0000, RTL_GIGA_PHY_VER_D
} /* Catch-all */
1208 reg
= mdio_read(ioaddr
, MII_PHYSID2
) & 0xffff;
1209 while ((reg
& p
->mask
) != p
->set
)
1211 tp
->phy_version
= p
->phy_version
;
1214 static void rtl8169_print_phy_version(struct rtl8169_private
*tp
)
1221 { RTL_GIGA_PHY_VER_G
, "RTL_GIGA_PHY_VER_G", 0x0002 },
1222 { RTL_GIGA_PHY_VER_F
, "RTL_GIGA_PHY_VER_F", 0x0001 },
1223 { RTL_GIGA_PHY_VER_E
, "RTL_GIGA_PHY_VER_E", 0x0000 },
1224 { RTL_GIGA_PHY_VER_D
, "RTL_GIGA_PHY_VER_D", 0x0000 },
1228 for (p
= phy_print
; p
->msg
; p
++) {
1229 if (tp
->phy_version
== p
->version
) {
1230 dprintk("phy_version == %s (%04x)\n", p
->msg
, p
->reg
);
1234 dprintk("phy_version == Unknown\n");
1237 static void rtl8169_hw_phy_config(struct net_device
*dev
)
1239 struct rtl8169_private
*tp
= netdev_priv(dev
);
1240 void __iomem
*ioaddr
= tp
->mmio_addr
;
1242 u16 regs
[5]; /* Beware of bit-sign propagation */
1243 } phy_magic
[5] = { {
1244 { 0x0000, //w 4 15 12 0
1245 0x00a1, //w 3 15 0 00a1
1246 0x0008, //w 2 15 0 0008
1247 0x1020, //w 1 15 0 1020
1248 0x1000 } },{ //w 0 15 0 1000
1249 { 0x7000, //w 4 15 12 7
1250 0xff41, //w 3 15 0 ff41
1251 0xde60, //w 2 15 0 de60
1252 0x0140, //w 1 15 0 0140
1253 0x0077 } },{ //w 0 15 0 0077
1254 { 0xa000, //w 4 15 12 a
1255 0xdf01, //w 3 15 0 df01
1256 0xdf20, //w 2 15 0 df20
1257 0xff95, //w 1 15 0 ff95
1258 0xfa00 } },{ //w 0 15 0 fa00
1259 { 0xb000, //w 4 15 12 b
1260 0xff41, //w 3 15 0 ff41
1261 0xde20, //w 2 15 0 de20
1262 0x0140, //w 1 15 0 0140
1263 0x00bb } },{ //w 0 15 0 00bb
1264 { 0xf000, //w 4 15 12 f
1265 0xdf01, //w 3 15 0 df01
1266 0xdf20, //w 2 15 0 df20
1267 0xff95, //w 1 15 0 ff95
1268 0xbf00 } //w 0 15 0 bf00
1273 rtl8169_print_mac_version(tp
);
1274 rtl8169_print_phy_version(tp
);
1276 if (tp
->mac_version
<= RTL_GIGA_MAC_VER_01
)
1278 if (tp
->phy_version
>= RTL_GIGA_PHY_VER_H
)
1281 dprintk("MAC version != 0 && PHY version == 0 or 1\n");
1282 dprintk("Do final_reg2.cfg\n");
1286 if (tp
->mac_version
== RTL_GIGA_MAC_VER_04
) {
1287 mdio_write(ioaddr
, 31, 0x0001);
1288 mdio_write(ioaddr
, 9, 0x273a);
1289 mdio_write(ioaddr
, 14, 0x7bfb);
1290 mdio_write(ioaddr
, 27, 0x841e);
1292 mdio_write(ioaddr
, 31, 0x0002);
1293 mdio_write(ioaddr
, 1, 0x90d0);
1294 mdio_write(ioaddr
, 31, 0x0000);
1298 /* phy config for RTL8169s mac_version C chip */
1299 mdio_write(ioaddr
, 31, 0x0001); //w 31 2 0 1
1300 mdio_write(ioaddr
, 21, 0x1000); //w 21 15 0 1000
1301 mdio_write(ioaddr
, 24, 0x65c7); //w 24 15 0 65c7
1302 rtl8169_write_gmii_reg_bit(ioaddr
, 4, 11, 0); //w 4 11 11 0
1304 for (i
= 0; i
< ARRAY_SIZE(phy_magic
); i
++, p
++) {
1307 val
= (mdio_read(ioaddr
, pos
) & 0x0fff) | (p
->regs
[0] & 0xffff);
1308 mdio_write(ioaddr
, pos
, val
);
1310 mdio_write(ioaddr
, pos
, p
->regs
[4 - pos
] & 0xffff);
1311 rtl8169_write_gmii_reg_bit(ioaddr
, 4, 11, 1); //w 4 11 11 1
1312 rtl8169_write_gmii_reg_bit(ioaddr
, 4, 11, 0); //w 4 11 11 0
1314 mdio_write(ioaddr
, 31, 0x0000); //w 31 2 0 0
1317 static void rtl8169_phy_timer(unsigned long __opaque
)
1319 struct net_device
*dev
= (struct net_device
*)__opaque
;
1320 struct rtl8169_private
*tp
= netdev_priv(dev
);
1321 struct timer_list
*timer
= &tp
->timer
;
1322 void __iomem
*ioaddr
= tp
->mmio_addr
;
1323 unsigned long timeout
= RTL8169_PHY_TIMEOUT
;
1325 assert(tp
->mac_version
> RTL_GIGA_MAC_VER_01
);
1326 assert(tp
->phy_version
< RTL_GIGA_PHY_VER_H
);
1328 if (!(tp
->phy_1000_ctrl_reg
& ADVERTISE_1000FULL
))
1331 spin_lock_irq(&tp
->lock
);
1333 if (tp
->phy_reset_pending(ioaddr
)) {
1335 * A busy loop could burn quite a few cycles on nowadays CPU.
1336 * Let's delay the execution of the timer for a few ticks.
1342 if (tp
->link_ok(ioaddr
))
1345 if (netif_msg_link(tp
))
1346 printk(KERN_WARNING
"%s: PHY reset until link up\n", dev
->name
);
1348 tp
->phy_reset_enable(ioaddr
);
1351 mod_timer(timer
, jiffies
+ timeout
);
1353 spin_unlock_irq(&tp
->lock
);
1356 static inline void rtl8169_delete_timer(struct net_device
*dev
)
1358 struct rtl8169_private
*tp
= netdev_priv(dev
);
1359 struct timer_list
*timer
= &tp
->timer
;
1361 if ((tp
->mac_version
<= RTL_GIGA_MAC_VER_01
) ||
1362 (tp
->phy_version
>= RTL_GIGA_PHY_VER_H
))
1365 del_timer_sync(timer
);
1368 static inline void rtl8169_request_timer(struct net_device
*dev
)
1370 struct rtl8169_private
*tp
= netdev_priv(dev
);
1371 struct timer_list
*timer
= &tp
->timer
;
1373 if ((tp
->mac_version
<= RTL_GIGA_MAC_VER_01
) ||
1374 (tp
->phy_version
>= RTL_GIGA_PHY_VER_H
))
1378 timer
->expires
= jiffies
+ RTL8169_PHY_TIMEOUT
;
1379 timer
->data
= (unsigned long)(dev
);
1380 timer
->function
= rtl8169_phy_timer
;
1384 #ifdef CONFIG_NET_POLL_CONTROLLER
1386 * Polling 'interrupt' - used by things like netconsole to send skbs
1387 * without having to re-enable interrupts. It's not called while
1388 * the interrupt routine is executing.
1390 static void rtl8169_netpoll(struct net_device
*dev
)
1392 struct rtl8169_private
*tp
= netdev_priv(dev
);
1393 struct pci_dev
*pdev
= tp
->pci_dev
;
1395 disable_irq(pdev
->irq
);
1396 rtl8169_interrupt(pdev
->irq
, dev
, NULL
);
1397 enable_irq(pdev
->irq
);
1401 static void __rtl8169_set_mac_addr(struct net_device
*dev
, void __iomem
*ioaddr
)
1405 RTL_W8(Cfg9346
, Cfg9346_Unlock
);
1406 for (i
= 0; i
< 2; i
++) {
1409 for (j
= 0; j
< 4; j
++) {
1411 l
|= dev
->dev_addr
[4*i
+ j
];
1413 RTL_W32(MAC0
+ 4*i
, cpu_to_be32(l
));
1415 RTL_W8(Cfg9346
, Cfg9346_Lock
);
1418 static int rtl8169_set_mac_addr(struct net_device
*dev
, void *p
)
1420 struct rtl8169_private
*tp
= netdev_priv(dev
);
1421 struct sockaddr
*addr
= p
;
1423 if (!is_valid_ether_addr(addr
->sa_data
))
1426 memcpy(dev
->dev_addr
, addr
->sa_data
, dev
->addr_len
);
1428 if (netif_running(dev
)) {
1429 spin_lock_irq(&tp
->lock
);
1430 __rtl8169_set_mac_addr(dev
, tp
->mmio_addr
);
1431 spin_unlock_irq(&tp
->lock
);
1436 static void rtl8169_release_board(struct pci_dev
*pdev
, struct net_device
*dev
,
1437 void __iomem
*ioaddr
)
1440 pci_release_regions(pdev
);
1441 pci_disable_device(pdev
);
1445 static void rtl8169_init_phy(struct net_device
*dev
, struct rtl8169_private
*tp
)
1447 void __iomem
*ioaddr
= tp
->mmio_addr
;
1448 static int board_idx
= -1;
1454 rtl8169_hw_phy_config(dev
);
1456 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1459 if (tp
->mac_version
< RTL_GIGA_MAC_VER_03
) {
1460 dprintk("Set PCI Latency=0x40\n");
1461 pci_write_config_byte(tp
->pci_dev
, PCI_LATENCY_TIMER
, 0x40);
1464 if (tp
->mac_version
== RTL_GIGA_MAC_VER_02
) {
1465 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1467 dprintk("Set PHY Reg 0x0bh = 0x00h\n");
1468 mdio_write(ioaddr
, 0x0b, 0x0000); //w 0x0b 15 0 0
1471 rtl8169_link_option(board_idx
, &autoneg
, &speed
, &duplex
);
1473 rtl8169_set_speed(dev
, autoneg
, speed
, duplex
);
1475 if ((RTL_R8(PHYstatus
) & TBI_Enable
) && netif_msg_link(tp
))
1476 printk(KERN_INFO PFX
"%s: TBI auto-negotiating\n", dev
->name
);
1479 static int rtl8169_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
1481 struct rtl8169_private
*tp
= netdev_priv(dev
);
1482 struct mii_ioctl_data
*data
= if_mii(ifr
);
1484 if (!netif_running(dev
))
1489 data
->phy_id
= 32; /* Internal PHY */
1493 data
->val_out
= mdio_read(tp
->mmio_addr
, data
->reg_num
& 0x1f);
1497 if (!capable(CAP_NET_ADMIN
))
1499 mdio_write(tp
->mmio_addr
, data
->reg_num
& 0x1f, data
->val_in
);
1505 static int __devinit
1506 rtl8169_init_one(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
1508 const unsigned int region
= rtl_cfg_info
[ent
->driver_data
].region
;
1509 struct rtl8169_private
*tp
;
1510 struct net_device
*dev
;
1511 void __iomem
*ioaddr
;
1512 unsigned int i
, pm_cap
;
1515 if (netif_msg_drv(&debug
)) {
1516 printk(KERN_INFO
"%s Gigabit Ethernet driver %s loaded\n",
1517 MODULENAME
, RTL8169_VERSION
);
1520 dev
= alloc_etherdev(sizeof (*tp
));
1522 if (netif_msg_drv(&debug
))
1523 dev_err(&pdev
->dev
, "unable to alloc new ethernet\n");
1528 SET_MODULE_OWNER(dev
);
1529 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1530 tp
= netdev_priv(dev
);
1531 tp
->msg_enable
= netif_msg_init(debug
.msg_enable
, R8169_MSG_DEFAULT
);
1533 /* enable device (incl. PCI PM wakeup and hotplug setup) */
1534 rc
= pci_enable_device(pdev
);
1536 if (netif_msg_probe(tp
))
1537 dev_err(&pdev
->dev
, "enable failure\n");
1538 goto err_out_free_dev_1
;
1541 rc
= pci_set_mwi(pdev
);
1543 goto err_out_disable_2
;
1545 /* save power state before pci_enable_device overwrites it */
1546 pm_cap
= pci_find_capability(pdev
, PCI_CAP_ID_PM
);
1548 u16 pwr_command
, acpi_idle_state
;
1550 pci_read_config_word(pdev
, pm_cap
+ PCI_PM_CTRL
, &pwr_command
);
1551 acpi_idle_state
= pwr_command
& PCI_PM_CTRL_STATE_MASK
;
1553 if (netif_msg_probe(tp
)) {
1555 "PowerManagement capability not found.\n");
1559 /* make sure PCI base addr 1 is MMIO */
1560 if (!(pci_resource_flags(pdev
, region
) & IORESOURCE_MEM
)) {
1561 if (netif_msg_probe(tp
)) {
1563 "region #%d not an MMIO resource, aborting\n",
1570 /* check for weird/broken PCI region reporting */
1571 if (pci_resource_len(pdev
, region
) < R8169_REGS_SIZE
) {
1572 if (netif_msg_probe(tp
)) {
1574 "Invalid PCI region size(s), aborting\n");
1580 rc
= pci_request_regions(pdev
, MODULENAME
);
1582 if (netif_msg_probe(tp
))
1583 dev_err(&pdev
->dev
, "could not request regions.\n");
1587 tp
->cp_cmd
= PCIMulRW
| RxChkSum
;
1589 if ((sizeof(dma_addr_t
) > 4) &&
1590 !pci_set_dma_mask(pdev
, DMA_64BIT_MASK
) && use_dac
) {
1591 tp
->cp_cmd
|= PCIDAC
;
1592 dev
->features
|= NETIF_F_HIGHDMA
;
1594 rc
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
1596 if (netif_msg_probe(tp
)) {
1598 "DMA configuration failed.\n");
1600 goto err_out_free_res_4
;
1604 pci_set_master(pdev
);
1606 /* ioremap MMIO region */
1607 ioaddr
= ioremap(pci_resource_start(pdev
, region
), R8169_REGS_SIZE
);
1609 if (netif_msg_probe(tp
))
1610 dev_err(&pdev
->dev
, "cannot remap MMIO, aborting\n");
1612 goto err_out_free_res_4
;
1615 /* Unneeded ? Don't mess with Mrs. Murphy. */
1616 rtl8169_irq_mask_and_ack(ioaddr
);
1618 /* Soft reset the chip. */
1619 RTL_W8(ChipCmd
, CmdReset
);
1621 /* Check that the chip has finished the reset. */
1622 for (i
= 100; i
> 0; i
--) {
1623 if ((RTL_R8(ChipCmd
) & CmdReset
) == 0)
1625 msleep_interruptible(1);
1628 /* Identify chip attached to board */
1629 rtl8169_get_mac_version(tp
, ioaddr
);
1630 rtl8169_get_phy_version(tp
, ioaddr
);
1632 rtl8169_print_mac_version(tp
);
1633 rtl8169_print_phy_version(tp
);
1635 for (i
= ARRAY_SIZE(rtl_chip_info
) - 1; i
>= 0; i
--) {
1636 if (tp
->mac_version
== rtl_chip_info
[i
].mac_version
)
1640 /* Unknown chip: assume array element #0, original RTL-8169 */
1641 if (netif_msg_probe(tp
)) {
1642 dev_printk(KERN_DEBUG
, &pdev
->dev
,
1643 "unknown chip version, assuming %s\n",
1644 rtl_chip_info
[0].name
);
1650 RTL_W8(Cfg9346
, Cfg9346_Unlock
);
1651 RTL_W8(Config1
, RTL_R8(Config1
) | PMEnable
);
1652 RTL_W8(Config5
, RTL_R8(Config5
) & PMEStatus
);
1653 RTL_W8(Cfg9346
, Cfg9346_Lock
);
1655 if (RTL_R8(PHYstatus
) & TBI_Enable
) {
1656 tp
->set_speed
= rtl8169_set_speed_tbi
;
1657 tp
->get_settings
= rtl8169_gset_tbi
;
1658 tp
->phy_reset_enable
= rtl8169_tbi_reset_enable
;
1659 tp
->phy_reset_pending
= rtl8169_tbi_reset_pending
;
1660 tp
->link_ok
= rtl8169_tbi_link_ok
;
1662 tp
->phy_1000_ctrl_reg
= ADVERTISE_1000FULL
; /* Implied by TBI */
1664 tp
->set_speed
= rtl8169_set_speed_xmii
;
1665 tp
->get_settings
= rtl8169_gset_xmii
;
1666 tp
->phy_reset_enable
= rtl8169_xmii_reset_enable
;
1667 tp
->phy_reset_pending
= rtl8169_xmii_reset_pending
;
1668 tp
->link_ok
= rtl8169_xmii_link_ok
;
1670 dev
->do_ioctl
= rtl8169_ioctl
;
1673 /* Get MAC address. FIXME: read EEPROM */
1674 for (i
= 0; i
< MAC_ADDR_LEN
; i
++)
1675 dev
->dev_addr
[i
] = RTL_R8(MAC0
+ i
);
1676 memcpy(dev
->perm_addr
, dev
->dev_addr
, dev
->addr_len
);
1678 dev
->open
= rtl8169_open
;
1679 dev
->hard_start_xmit
= rtl8169_start_xmit
;
1680 dev
->get_stats
= rtl8169_get_stats
;
1681 SET_ETHTOOL_OPS(dev
, &rtl8169_ethtool_ops
);
1682 dev
->stop
= rtl8169_close
;
1683 dev
->tx_timeout
= rtl8169_tx_timeout
;
1684 dev
->set_multicast_list
= rtl8169_set_rx_mode
;
1685 dev
->set_mac_address
= rtl8169_set_mac_addr
;
1686 dev
->watchdog_timeo
= RTL8169_TX_TIMEOUT
;
1687 dev
->irq
= pdev
->irq
;
1688 dev
->base_addr
= (unsigned long) ioaddr
;
1689 dev
->change_mtu
= rtl8169_change_mtu
;
1691 #ifdef CONFIG_R8169_NAPI
1692 dev
->poll
= rtl8169_poll
;
1693 dev
->weight
= R8169_NAPI_WEIGHT
;
1696 #ifdef CONFIG_R8169_VLAN
1697 dev
->features
|= NETIF_F_HW_VLAN_TX
| NETIF_F_HW_VLAN_RX
;
1698 dev
->vlan_rx_register
= rtl8169_vlan_rx_register
;
1699 dev
->vlan_rx_kill_vid
= rtl8169_vlan_rx_kill_vid
;
1702 #ifdef CONFIG_NET_POLL_CONTROLLER
1703 dev
->poll_controller
= rtl8169_netpoll
;
1706 tp
->intr_mask
= 0xffff;
1708 tp
->mmio_addr
= ioaddr
;
1709 tp
->align
= rtl_cfg_info
[ent
->driver_data
].align
;
1711 spin_lock_init(&tp
->lock
);
1713 rc
= register_netdev(dev
);
1715 goto err_out_unmap_5
;
1717 pci_set_drvdata(pdev
, dev
);
1719 if (netif_msg_probe(tp
)) {
1720 printk(KERN_INFO
"%s: %s at 0x%lx, "
1721 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
1724 rtl_chip_info
[tp
->chipset
].name
,
1726 dev
->dev_addr
[0], dev
->dev_addr
[1],
1727 dev
->dev_addr
[2], dev
->dev_addr
[3],
1728 dev
->dev_addr
[4], dev
->dev_addr
[5], dev
->irq
);
1731 rtl8169_init_phy(dev
, tp
);
1739 pci_release_regions(pdev
);
1741 pci_clear_mwi(pdev
);
1743 pci_disable_device(pdev
);
1749 static void __devexit
1750 rtl8169_remove_one(struct pci_dev
*pdev
)
1752 struct net_device
*dev
= pci_get_drvdata(pdev
);
1753 struct rtl8169_private
*tp
= netdev_priv(dev
);
1755 assert(dev
!= NULL
);
1758 unregister_netdev(dev
);
1759 rtl8169_release_board(pdev
, dev
, tp
->mmio_addr
);
1760 pci_set_drvdata(pdev
, NULL
);
1763 static void rtl8169_set_rxbufsize(struct rtl8169_private
*tp
,
1764 struct net_device
*dev
)
1766 unsigned int mtu
= dev
->mtu
;
1768 tp
->rx_buf_sz
= (mtu
> RX_BUF_SIZE
) ? mtu
+ ETH_HLEN
+ 8 : RX_BUF_SIZE
;
1771 static int rtl8169_open(struct net_device
*dev
)
1773 struct rtl8169_private
*tp
= netdev_priv(dev
);
1774 struct pci_dev
*pdev
= tp
->pci_dev
;
1777 rtl8169_set_rxbufsize(tp
, dev
);
1780 request_irq(dev
->irq
, rtl8169_interrupt
, IRQF_SHARED
, dev
->name
, dev
);
1787 * Rx and Tx desscriptors needs 256 bytes alignment.
1788 * pci_alloc_consistent provides more.
1790 tp
->TxDescArray
= pci_alloc_consistent(pdev
, R8169_TX_RING_BYTES
,
1792 if (!tp
->TxDescArray
)
1795 tp
->RxDescArray
= pci_alloc_consistent(pdev
, R8169_RX_RING_BYTES
,
1797 if (!tp
->RxDescArray
)
1800 retval
= rtl8169_init_ring(dev
);
1804 INIT_WORK(&tp
->task
, NULL
, dev
);
1806 rtl8169_hw_start(dev
);
1808 rtl8169_request_timer(dev
);
1810 rtl8169_check_link_status(dev
, tp
, tp
->mmio_addr
);
1815 pci_free_consistent(pdev
, R8169_RX_RING_BYTES
, tp
->RxDescArray
,
1818 pci_free_consistent(pdev
, R8169_TX_RING_BYTES
, tp
->TxDescArray
,
1821 free_irq(dev
->irq
, dev
);
1825 static void rtl8169_hw_reset(void __iomem
*ioaddr
)
1827 /* Disable interrupts */
1828 rtl8169_irq_mask_and_ack(ioaddr
);
1830 /* Reset the chipset */
1831 RTL_W8(ChipCmd
, CmdReset
);
1838 rtl8169_hw_start(struct net_device
*dev
)
1840 struct rtl8169_private
*tp
= netdev_priv(dev
);
1841 void __iomem
*ioaddr
= tp
->mmio_addr
;
1842 struct pci_dev
*pdev
= tp
->pci_dev
;
1845 /* Soft reset the chip. */
1846 RTL_W8(ChipCmd
, CmdReset
);
1848 /* Check that the chip has finished the reset. */
1849 for (i
= 100; i
> 0; i
--) {
1850 if ((RTL_R8(ChipCmd
) & CmdReset
) == 0)
1852 msleep_interruptible(1);
1855 if (tp
->mac_version
== RTL_GIGA_MAC_VER_13
) {
1856 pci_write_config_word(pdev
, 0x68, 0x00);
1857 pci_write_config_word(pdev
, 0x69, 0x08);
1860 /* Undocumented stuff. */
1861 if (tp
->mac_version
== RTL_GIGA_MAC_VER_05
) {
1864 /* Realtek's r1000_n.c driver uses '&& 0x01' here. Well... */
1865 if ((RTL_R8(Config2
) & 0x07) & 0x01)
1866 RTL_W32(0x7c, 0x0007ffff);
1868 RTL_W32(0x7c, 0x0007ff00);
1870 pci_read_config_word(pdev
, PCI_COMMAND
, &cmd
);
1872 pci_write_config_word(pdev
, PCI_COMMAND
, cmd
);
1876 RTL_W8(Cfg9346
, Cfg9346_Unlock
);
1877 RTL_W8(EarlyTxThres
, EarlyTxThld
);
1879 /* Low hurts. Let's disable the filtering. */
1880 RTL_W16(RxMaxSize
, 16383);
1882 /* Set Rx Config register */
1883 i
= rtl8169_rx_config
|
1884 (RTL_R32(RxConfig
) & rtl_chip_info
[tp
->chipset
].RxConfigMask
);
1885 RTL_W32(RxConfig
, i
);
1887 /* Set DMA burst size and Interframe Gap Time */
1888 RTL_W32(TxConfig
, (TX_DMA_BURST
<< TxDMAShift
) |
1889 (InterFrameGap
<< TxInterFrameGapShift
));
1891 tp
->cp_cmd
|= RTL_R16(CPlusCmd
) | PCIMulRW
;
1893 if ((tp
->mac_version
== RTL_GIGA_MAC_VER_02
) ||
1894 (tp
->mac_version
== RTL_GIGA_MAC_VER_03
)) {
1895 dprintk(KERN_INFO PFX
"Set MAC Reg C+CR Offset 0xE0. "
1896 "Bit-3 and bit-14 MUST be 1\n");
1897 tp
->cp_cmd
|= (1 << 14);
1900 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
1903 * Undocumented corner. Supposedly:
1904 * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
1906 RTL_W16(IntrMitigate
, 0x0000);
1909 * Magic spell: some iop3xx ARM board needs the TxDescAddrHigh
1910 * register to be written before TxDescAddrLow to work.
1911 * Switching from MMIO to I/O access fixes the issue as well.
1913 RTL_W32(TxDescStartAddrHigh
, ((u64
) tp
->TxPhyAddr
>> 32));
1914 RTL_W32(TxDescStartAddrLow
, ((u64
) tp
->TxPhyAddr
& DMA_32BIT_MASK
));
1915 RTL_W32(RxDescAddrHigh
, ((u64
) tp
->RxPhyAddr
>> 32));
1916 RTL_W32(RxDescAddrLow
, ((u64
) tp
->RxPhyAddr
& DMA_32BIT_MASK
));
1917 RTL_W8(ChipCmd
, CmdTxEnb
| CmdRxEnb
);
1918 RTL_W8(Cfg9346
, Cfg9346_Lock
);
1920 /* Initially a 10 us delay. Turned it into a PCI commit. - FR */
1923 RTL_W32(RxMissed
, 0);
1925 rtl8169_set_rx_mode(dev
);
1927 /* no early-rx interrupts */
1928 RTL_W16(MultiIntr
, RTL_R16(MultiIntr
) & 0xF000);
1930 /* Enable all known interrupts by setting the interrupt mask. */
1931 RTL_W16(IntrMask
, rtl8169_intr_mask
);
1933 __rtl8169_set_mac_addr(dev
, ioaddr
);
1935 netif_start_queue(dev
);
1938 static int rtl8169_change_mtu(struct net_device
*dev
, int new_mtu
)
1940 struct rtl8169_private
*tp
= netdev_priv(dev
);
1943 if (new_mtu
< ETH_ZLEN
|| new_mtu
> SafeMtu
)
1948 if (!netif_running(dev
))
1953 rtl8169_set_rxbufsize(tp
, dev
);
1955 ret
= rtl8169_init_ring(dev
);
1959 netif_poll_enable(dev
);
1961 rtl8169_hw_start(dev
);
1963 rtl8169_request_timer(dev
);
1969 static inline void rtl8169_make_unusable_by_asic(struct RxDesc
*desc
)
1971 desc
->addr
= 0x0badbadbadbadbadull
;
1972 desc
->opts1
&= ~cpu_to_le32(DescOwn
| RsvdMask
);
1975 static void rtl8169_free_rx_skb(struct rtl8169_private
*tp
,
1976 struct sk_buff
**sk_buff
, struct RxDesc
*desc
)
1978 struct pci_dev
*pdev
= tp
->pci_dev
;
1980 pci_unmap_single(pdev
, le64_to_cpu(desc
->addr
), tp
->rx_buf_sz
,
1981 PCI_DMA_FROMDEVICE
);
1982 dev_kfree_skb(*sk_buff
);
1984 rtl8169_make_unusable_by_asic(desc
);
1987 static inline void rtl8169_mark_to_asic(struct RxDesc
*desc
, u32 rx_buf_sz
)
1989 u32 eor
= le32_to_cpu(desc
->opts1
) & RingEnd
;
1991 desc
->opts1
= cpu_to_le32(DescOwn
| eor
| rx_buf_sz
);
1994 static inline void rtl8169_map_to_asic(struct RxDesc
*desc
, dma_addr_t mapping
,
1997 desc
->addr
= cpu_to_le64(mapping
);
1999 rtl8169_mark_to_asic(desc
, rx_buf_sz
);
2002 static int rtl8169_alloc_rx_skb(struct pci_dev
*pdev
, struct sk_buff
**sk_buff
,
2003 struct RxDesc
*desc
, int rx_buf_sz
,
2006 struct sk_buff
*skb
;
2010 skb
= dev_alloc_skb(rx_buf_sz
+ align
);
2014 skb_reserve(skb
, align
);
2017 mapping
= pci_map_single(pdev
, skb
->data
, rx_buf_sz
,
2018 PCI_DMA_FROMDEVICE
);
2020 rtl8169_map_to_asic(desc
, mapping
, rx_buf_sz
);
2027 rtl8169_make_unusable_by_asic(desc
);
2031 static void rtl8169_rx_clear(struct rtl8169_private
*tp
)
2035 for (i
= 0; i
< NUM_RX_DESC
; i
++) {
2036 if (tp
->Rx_skbuff
[i
]) {
2037 rtl8169_free_rx_skb(tp
, tp
->Rx_skbuff
+ i
,
2038 tp
->RxDescArray
+ i
);
2043 static u32
rtl8169_rx_fill(struct rtl8169_private
*tp
, struct net_device
*dev
,
2048 for (cur
= start
; end
- cur
> 0; cur
++) {
2049 int ret
, i
= cur
% NUM_RX_DESC
;
2051 if (tp
->Rx_skbuff
[i
])
2054 ret
= rtl8169_alloc_rx_skb(tp
->pci_dev
, tp
->Rx_skbuff
+ i
,
2055 tp
->RxDescArray
+ i
, tp
->rx_buf_sz
, tp
->align
);
2062 static inline void rtl8169_mark_as_last_descriptor(struct RxDesc
*desc
)
2064 desc
->opts1
|= cpu_to_le32(RingEnd
);
2067 static void rtl8169_init_ring_indexes(struct rtl8169_private
*tp
)
2069 tp
->dirty_tx
= tp
->dirty_rx
= tp
->cur_tx
= tp
->cur_rx
= 0;
2072 static int rtl8169_init_ring(struct net_device
*dev
)
2074 struct rtl8169_private
*tp
= netdev_priv(dev
);
2076 rtl8169_init_ring_indexes(tp
);
2078 memset(tp
->tx_skb
, 0x0, NUM_TX_DESC
* sizeof(struct ring_info
));
2079 memset(tp
->Rx_skbuff
, 0x0, NUM_RX_DESC
* sizeof(struct sk_buff
*));
2081 if (rtl8169_rx_fill(tp
, dev
, 0, NUM_RX_DESC
) != NUM_RX_DESC
)
2084 rtl8169_mark_as_last_descriptor(tp
->RxDescArray
+ NUM_RX_DESC
- 1);
2089 rtl8169_rx_clear(tp
);
2093 static void rtl8169_unmap_tx_skb(struct pci_dev
*pdev
, struct ring_info
*tx_skb
,
2094 struct TxDesc
*desc
)
2096 unsigned int len
= tx_skb
->len
;
2098 pci_unmap_single(pdev
, le64_to_cpu(desc
->addr
), len
, PCI_DMA_TODEVICE
);
2105 static void rtl8169_tx_clear(struct rtl8169_private
*tp
)
2109 for (i
= tp
->dirty_tx
; i
< tp
->dirty_tx
+ NUM_TX_DESC
; i
++) {
2110 unsigned int entry
= i
% NUM_TX_DESC
;
2111 struct ring_info
*tx_skb
= tp
->tx_skb
+ entry
;
2112 unsigned int len
= tx_skb
->len
;
2115 struct sk_buff
*skb
= tx_skb
->skb
;
2117 rtl8169_unmap_tx_skb(tp
->pci_dev
, tx_skb
,
2118 tp
->TxDescArray
+ entry
);
2123 tp
->stats
.tx_dropped
++;
2126 tp
->cur_tx
= tp
->dirty_tx
= 0;
2129 static void rtl8169_schedule_work(struct net_device
*dev
, void (*task
)(void *))
2131 struct rtl8169_private
*tp
= netdev_priv(dev
);
2133 PREPARE_WORK(&tp
->task
, task
, dev
);
2134 schedule_delayed_work(&tp
->task
, 4);
2137 static void rtl8169_wait_for_quiescence(struct net_device
*dev
)
2139 struct rtl8169_private
*tp
= netdev_priv(dev
);
2140 void __iomem
*ioaddr
= tp
->mmio_addr
;
2142 synchronize_irq(dev
->irq
);
2144 /* Wait for any pending NAPI task to complete */
2145 netif_poll_disable(dev
);
2147 rtl8169_irq_mask_and_ack(ioaddr
);
2149 netif_poll_enable(dev
);
2152 static void rtl8169_reinit_task(void *_data
)
2154 struct net_device
*dev
= _data
;
2157 if (netif_running(dev
)) {
2158 rtl8169_wait_for_quiescence(dev
);
2162 ret
= rtl8169_open(dev
);
2163 if (unlikely(ret
< 0)) {
2164 if (net_ratelimit()) {
2165 struct rtl8169_private
*tp
= netdev_priv(dev
);
2167 if (netif_msg_drv(tp
)) {
2169 "%s: reinit failure (status = %d)."
2170 " Rescheduling.\n", dev
->name
, ret
);
2173 rtl8169_schedule_work(dev
, rtl8169_reinit_task
);
2177 static void rtl8169_reset_task(void *_data
)
2179 struct net_device
*dev
= _data
;
2180 struct rtl8169_private
*tp
= netdev_priv(dev
);
2182 if (!netif_running(dev
))
2185 rtl8169_wait_for_quiescence(dev
);
2187 rtl8169_rx_interrupt(dev
, tp
, tp
->mmio_addr
);
2188 rtl8169_tx_clear(tp
);
2190 if (tp
->dirty_rx
== tp
->cur_rx
) {
2191 rtl8169_init_ring_indexes(tp
);
2192 rtl8169_hw_start(dev
);
2193 netif_wake_queue(dev
);
2195 if (net_ratelimit()) {
2196 struct rtl8169_private
*tp
= netdev_priv(dev
);
2198 if (netif_msg_intr(tp
)) {
2199 printk(PFX KERN_EMERG
2200 "%s: Rx buffers shortage\n", dev
->name
);
2203 rtl8169_schedule_work(dev
, rtl8169_reset_task
);
2207 static void rtl8169_tx_timeout(struct net_device
*dev
)
2209 struct rtl8169_private
*tp
= netdev_priv(dev
);
2211 rtl8169_hw_reset(tp
->mmio_addr
);
2213 /* Let's wait a bit while any (async) irq lands on */
2214 rtl8169_schedule_work(dev
, rtl8169_reset_task
);
2217 static int rtl8169_xmit_frags(struct rtl8169_private
*tp
, struct sk_buff
*skb
,
2220 struct skb_shared_info
*info
= skb_shinfo(skb
);
2221 unsigned int cur_frag
, entry
;
2225 for (cur_frag
= 0; cur_frag
< info
->nr_frags
; cur_frag
++) {
2226 skb_frag_t
*frag
= info
->frags
+ cur_frag
;
2231 entry
= (entry
+ 1) % NUM_TX_DESC
;
2233 txd
= tp
->TxDescArray
+ entry
;
2235 addr
= ((void *) page_address(frag
->page
)) + frag
->page_offset
;
2236 mapping
= pci_map_single(tp
->pci_dev
, addr
, len
, PCI_DMA_TODEVICE
);
2238 /* anti gcc 2.95.3 bugware (sic) */
2239 status
= opts1
| len
| (RingEnd
* !((entry
+ 1) % NUM_TX_DESC
));
2241 txd
->opts1
= cpu_to_le32(status
);
2242 txd
->addr
= cpu_to_le64(mapping
);
2244 tp
->tx_skb
[entry
].len
= len
;
2248 tp
->tx_skb
[entry
].skb
= skb
;
2249 txd
->opts1
|= cpu_to_le32(LastFrag
);
2255 static inline u32
rtl8169_tso_csum(struct sk_buff
*skb
, struct net_device
*dev
)
2257 if (dev
->features
& NETIF_F_TSO
) {
2258 u32 mss
= skb_shinfo(skb
)->gso_size
;
2261 return LargeSend
| ((mss
& MSSMask
) << MSSShift
);
2263 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
2264 const struct iphdr
*ip
= skb
->nh
.iph
;
2266 if (ip
->protocol
== IPPROTO_TCP
)
2267 return IPCS
| TCPCS
;
2268 else if (ip
->protocol
== IPPROTO_UDP
)
2269 return IPCS
| UDPCS
;
2270 WARN_ON(1); /* we need a WARN() */
2275 static int rtl8169_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
2277 struct rtl8169_private
*tp
= netdev_priv(dev
);
2278 unsigned int frags
, entry
= tp
->cur_tx
% NUM_TX_DESC
;
2279 struct TxDesc
*txd
= tp
->TxDescArray
+ entry
;
2280 void __iomem
*ioaddr
= tp
->mmio_addr
;
2284 int ret
= NETDEV_TX_OK
;
2286 if (unlikely(TX_BUFFS_AVAIL(tp
) < skb_shinfo(skb
)->nr_frags
)) {
2287 if (netif_msg_drv(tp
)) {
2289 "%s: BUG! Tx Ring full when queue awake!\n",
2295 if (unlikely(le32_to_cpu(txd
->opts1
) & DescOwn
))
2298 opts1
= DescOwn
| rtl8169_tso_csum(skb
, dev
);
2300 frags
= rtl8169_xmit_frags(tp
, skb
, opts1
);
2302 len
= skb_headlen(skb
);
2307 if (unlikely(len
< ETH_ZLEN
)) {
2308 if (skb_padto(skb
, ETH_ZLEN
))
2309 goto err_update_stats
;
2313 opts1
|= FirstFrag
| LastFrag
;
2314 tp
->tx_skb
[entry
].skb
= skb
;
2317 mapping
= pci_map_single(tp
->pci_dev
, skb
->data
, len
, PCI_DMA_TODEVICE
);
2319 tp
->tx_skb
[entry
].len
= len
;
2320 txd
->addr
= cpu_to_le64(mapping
);
2321 txd
->opts2
= cpu_to_le32(rtl8169_tx_vlan_tag(tp
, skb
));
2325 /* anti gcc 2.95.3 bugware (sic) */
2326 status
= opts1
| len
| (RingEnd
* !((entry
+ 1) % NUM_TX_DESC
));
2327 txd
->opts1
= cpu_to_le32(status
);
2329 dev
->trans_start
= jiffies
;
2331 tp
->cur_tx
+= frags
+ 1;
2335 RTL_W8(TxPoll
, 0x40); /* set polling bit */
2337 if (TX_BUFFS_AVAIL(tp
) < MAX_SKB_FRAGS
) {
2338 netif_stop_queue(dev
);
2340 if (TX_BUFFS_AVAIL(tp
) >= MAX_SKB_FRAGS
)
2341 netif_wake_queue(dev
);
2348 netif_stop_queue(dev
);
2349 ret
= NETDEV_TX_BUSY
;
2351 tp
->stats
.tx_dropped
++;
2355 static void rtl8169_pcierr_interrupt(struct net_device
*dev
)
2357 struct rtl8169_private
*tp
= netdev_priv(dev
);
2358 struct pci_dev
*pdev
= tp
->pci_dev
;
2359 void __iomem
*ioaddr
= tp
->mmio_addr
;
2360 u16 pci_status
, pci_cmd
;
2362 pci_read_config_word(pdev
, PCI_COMMAND
, &pci_cmd
);
2363 pci_read_config_word(pdev
, PCI_STATUS
, &pci_status
);
2365 if (netif_msg_intr(tp
)) {
2367 "%s: PCI error (cmd = 0x%04x, status = 0x%04x).\n",
2368 dev
->name
, pci_cmd
, pci_status
);
2372 * The recovery sequence below admits a very elaborated explanation:
2373 * - it seems to work;
2374 * - I did not see what else could be done.
2376 * Feel free to adjust to your needs.
2378 pci_write_config_word(pdev
, PCI_COMMAND
,
2379 pci_cmd
| PCI_COMMAND_SERR
| PCI_COMMAND_PARITY
);
2381 pci_write_config_word(pdev
, PCI_STATUS
,
2382 pci_status
& (PCI_STATUS_DETECTED_PARITY
|
2383 PCI_STATUS_SIG_SYSTEM_ERROR
| PCI_STATUS_REC_MASTER_ABORT
|
2384 PCI_STATUS_REC_TARGET_ABORT
| PCI_STATUS_SIG_TARGET_ABORT
));
2386 /* The infamous DAC f*ckup only happens at boot time */
2387 if ((tp
->cp_cmd
& PCIDAC
) && !tp
->dirty_rx
&& !tp
->cur_rx
) {
2388 if (netif_msg_intr(tp
))
2389 printk(KERN_INFO
"%s: disabling PCI DAC.\n", dev
->name
);
2390 tp
->cp_cmd
&= ~PCIDAC
;
2391 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
2392 dev
->features
&= ~NETIF_F_HIGHDMA
;
2393 rtl8169_schedule_work(dev
, rtl8169_reinit_task
);
2396 rtl8169_hw_reset(ioaddr
);
2400 rtl8169_tx_interrupt(struct net_device
*dev
, struct rtl8169_private
*tp
,
2401 void __iomem
*ioaddr
)
2403 unsigned int dirty_tx
, tx_left
;
2405 assert(dev
!= NULL
);
2407 assert(ioaddr
!= NULL
);
2409 dirty_tx
= tp
->dirty_tx
;
2411 tx_left
= tp
->cur_tx
- dirty_tx
;
2413 while (tx_left
> 0) {
2414 unsigned int entry
= dirty_tx
% NUM_TX_DESC
;
2415 struct ring_info
*tx_skb
= tp
->tx_skb
+ entry
;
2416 u32 len
= tx_skb
->len
;
2420 status
= le32_to_cpu(tp
->TxDescArray
[entry
].opts1
);
2421 if (status
& DescOwn
)
2424 tp
->stats
.tx_bytes
+= len
;
2425 tp
->stats
.tx_packets
++;
2427 rtl8169_unmap_tx_skb(tp
->pci_dev
, tx_skb
, tp
->TxDescArray
+ entry
);
2429 if (status
& LastFrag
) {
2430 dev_kfree_skb_irq(tx_skb
->skb
);
2437 if (tp
->dirty_tx
!= dirty_tx
) {
2438 tp
->dirty_tx
= dirty_tx
;
2440 if (netif_queue_stopped(dev
) &&
2441 (TX_BUFFS_AVAIL(tp
) >= MAX_SKB_FRAGS
)) {
2442 netif_wake_queue(dev
);
2447 static inline int rtl8169_fragmented_frame(u32 status
)
2449 return (status
& (FirstFrag
| LastFrag
)) != (FirstFrag
| LastFrag
);
2452 static inline void rtl8169_rx_csum(struct sk_buff
*skb
, struct RxDesc
*desc
)
2454 u32 opts1
= le32_to_cpu(desc
->opts1
);
2455 u32 status
= opts1
& RxProtoMask
;
2457 if (((status
== RxProtoTCP
) && !(opts1
& TCPFail
)) ||
2458 ((status
== RxProtoUDP
) && !(opts1
& UDPFail
)) ||
2459 ((status
== RxProtoIP
) && !(opts1
& IPFail
)))
2460 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
2462 skb
->ip_summed
= CHECKSUM_NONE
;
2465 static inline int rtl8169_try_rx_copy(struct sk_buff
**sk_buff
, int pkt_size
,
2466 struct RxDesc
*desc
, int rx_buf_sz
,
2471 if (pkt_size
< rx_copybreak
) {
2472 struct sk_buff
*skb
;
2474 skb
= dev_alloc_skb(pkt_size
+ align
);
2476 skb_reserve(skb
, align
);
2477 eth_copy_and_sum(skb
, sk_buff
[0]->data
, pkt_size
, 0);
2479 rtl8169_mark_to_asic(desc
, rx_buf_sz
);
2487 rtl8169_rx_interrupt(struct net_device
*dev
, struct rtl8169_private
*tp
,
2488 void __iomem
*ioaddr
)
2490 unsigned int cur_rx
, rx_left
;
2491 unsigned int delta
, count
;
2493 assert(dev
!= NULL
);
2495 assert(ioaddr
!= NULL
);
2497 cur_rx
= tp
->cur_rx
;
2498 rx_left
= NUM_RX_DESC
+ tp
->dirty_rx
- cur_rx
;
2499 rx_left
= rtl8169_rx_quota(rx_left
, (u32
) dev
->quota
);
2501 for (; rx_left
> 0; rx_left
--, cur_rx
++) {
2502 unsigned int entry
= cur_rx
% NUM_RX_DESC
;
2503 struct RxDesc
*desc
= tp
->RxDescArray
+ entry
;
2507 status
= le32_to_cpu(desc
->opts1
);
2509 if (status
& DescOwn
)
2511 if (unlikely(status
& RxRES
)) {
2512 if (netif_msg_rx_err(tp
)) {
2514 "%s: Rx ERROR. status = %08x\n",
2517 tp
->stats
.rx_errors
++;
2518 if (status
& (RxRWT
| RxRUNT
))
2519 tp
->stats
.rx_length_errors
++;
2521 tp
->stats
.rx_crc_errors
++;
2522 if (status
& RxFOVF
) {
2523 rtl8169_schedule_work(dev
, rtl8169_reset_task
);
2524 tp
->stats
.rx_fifo_errors
++;
2526 rtl8169_mark_to_asic(desc
, tp
->rx_buf_sz
);
2528 struct sk_buff
*skb
= tp
->Rx_skbuff
[entry
];
2529 int pkt_size
= (status
& 0x00001FFF) - 4;
2530 void (*pci_action
)(struct pci_dev
*, dma_addr_t
,
2531 size_t, int) = pci_dma_sync_single_for_device
;
2534 * The driver does not support incoming fragmented
2535 * frames. They are seen as a symptom of over-mtu
2538 if (unlikely(rtl8169_fragmented_frame(status
))) {
2539 tp
->stats
.rx_dropped
++;
2540 tp
->stats
.rx_length_errors
++;
2541 rtl8169_mark_to_asic(desc
, tp
->rx_buf_sz
);
2545 rtl8169_rx_csum(skb
, desc
);
2547 pci_dma_sync_single_for_cpu(tp
->pci_dev
,
2548 le64_to_cpu(desc
->addr
), tp
->rx_buf_sz
,
2549 PCI_DMA_FROMDEVICE
);
2551 if (rtl8169_try_rx_copy(&skb
, pkt_size
, desc
,
2552 tp
->rx_buf_sz
, tp
->align
)) {
2553 pci_action
= pci_unmap_single
;
2554 tp
->Rx_skbuff
[entry
] = NULL
;
2557 pci_action(tp
->pci_dev
, le64_to_cpu(desc
->addr
),
2558 tp
->rx_buf_sz
, PCI_DMA_FROMDEVICE
);
2561 skb_put(skb
, pkt_size
);
2562 skb
->protocol
= eth_type_trans(skb
, dev
);
2564 if (rtl8169_rx_vlan_skb(tp
, desc
, skb
) < 0)
2565 rtl8169_rx_skb(skb
);
2567 dev
->last_rx
= jiffies
;
2568 tp
->stats
.rx_bytes
+= pkt_size
;
2569 tp
->stats
.rx_packets
++;
2573 count
= cur_rx
- tp
->cur_rx
;
2574 tp
->cur_rx
= cur_rx
;
2576 delta
= rtl8169_rx_fill(tp
, dev
, tp
->dirty_rx
, tp
->cur_rx
);
2577 if (!delta
&& count
&& netif_msg_intr(tp
))
2578 printk(KERN_INFO
"%s: no Rx buffer allocated\n", dev
->name
);
2579 tp
->dirty_rx
+= delta
;
2582 * FIXME: until there is periodic timer to try and refill the ring,
2583 * a temporary shortage may definitely kill the Rx process.
2584 * - disable the asic to try and avoid an overflow and kick it again
2586 * - how do others driver handle this condition (Uh oh...).
2588 if ((tp
->dirty_rx
+ NUM_RX_DESC
== tp
->cur_rx
) && netif_msg_intr(tp
))
2589 printk(KERN_EMERG
"%s: Rx buffers exhausted\n", dev
->name
);
2594 /* The interrupt handler does all of the Rx thread work and cleans up after the Tx thread. */
2596 rtl8169_interrupt(int irq
, void *dev_instance
, struct pt_regs
*regs
)
2598 struct net_device
*dev
= (struct net_device
*) dev_instance
;
2599 struct rtl8169_private
*tp
= netdev_priv(dev
);
2600 int boguscnt
= max_interrupt_work
;
2601 void __iomem
*ioaddr
= tp
->mmio_addr
;
2606 status
= RTL_R16(IntrStatus
);
2608 /* hotplug/major error/no more work/shared irq */
2609 if ((status
== 0xFFFF) || !status
)
2614 if (unlikely(!netif_running(dev
))) {
2615 rtl8169_asic_down(ioaddr
);
2619 status
&= tp
->intr_mask
;
2621 (status
& RxFIFOOver
) ? (status
| RxOverflow
) : status
);
2623 if (!(status
& rtl8169_intr_mask
))
2626 if (unlikely(status
& SYSErr
)) {
2627 rtl8169_pcierr_interrupt(dev
);
2631 if (status
& LinkChg
)
2632 rtl8169_check_link_status(dev
, tp
, ioaddr
);
2634 #ifdef CONFIG_R8169_NAPI
2635 RTL_W16(IntrMask
, rtl8169_intr_mask
& ~rtl8169_napi_event
);
2636 tp
->intr_mask
= ~rtl8169_napi_event
;
2638 if (likely(netif_rx_schedule_prep(dev
)))
2639 __netif_rx_schedule(dev
);
2640 else if (netif_msg_intr(tp
)) {
2641 printk(KERN_INFO
"%s: interrupt %04x taken in poll\n",
2647 if (status
& (RxOK
| RxOverflow
| RxFIFOOver
)) {
2648 rtl8169_rx_interrupt(dev
, tp
, ioaddr
);
2651 if (status
& (TxOK
| TxErr
))
2652 rtl8169_tx_interrupt(dev
, tp
, ioaddr
);
2656 } while (boguscnt
> 0);
2658 if (boguscnt
<= 0) {
2659 if (netif_msg_intr(tp
) && net_ratelimit() ) {
2661 "%s: Too much work at interrupt!\n", dev
->name
);
2663 /* Clear all interrupt sources. */
2664 RTL_W16(IntrStatus
, 0xffff);
2667 return IRQ_RETVAL(handled
);
2670 #ifdef CONFIG_R8169_NAPI
2671 static int rtl8169_poll(struct net_device
*dev
, int *budget
)
2673 unsigned int work_done
, work_to_do
= min(*budget
, dev
->quota
);
2674 struct rtl8169_private
*tp
= netdev_priv(dev
);
2675 void __iomem
*ioaddr
= tp
->mmio_addr
;
2677 work_done
= rtl8169_rx_interrupt(dev
, tp
, ioaddr
);
2678 rtl8169_tx_interrupt(dev
, tp
, ioaddr
);
2680 *budget
-= work_done
;
2681 dev
->quota
-= work_done
;
2683 if (work_done
< work_to_do
) {
2684 netif_rx_complete(dev
);
2685 tp
->intr_mask
= 0xffff;
2687 * 20040426: the barrier is not strictly required but the
2688 * behavior of the irq handler could be less predictable
2689 * without it. Btw, the lack of flush for the posted pci
2690 * write is safe - FR
2693 RTL_W16(IntrMask
, rtl8169_intr_mask
);
2696 return (work_done
>= work_to_do
);
2700 static void rtl8169_down(struct net_device
*dev
)
2702 struct rtl8169_private
*tp
= netdev_priv(dev
);
2703 void __iomem
*ioaddr
= tp
->mmio_addr
;
2704 unsigned int poll_locked
= 0;
2706 rtl8169_delete_timer(dev
);
2708 netif_stop_queue(dev
);
2710 flush_scheduled_work();
2713 spin_lock_irq(&tp
->lock
);
2715 rtl8169_asic_down(ioaddr
);
2717 /* Update the error counts. */
2718 tp
->stats
.rx_missed_errors
+= RTL_R32(RxMissed
);
2719 RTL_W32(RxMissed
, 0);
2721 spin_unlock_irq(&tp
->lock
);
2723 synchronize_irq(dev
->irq
);
2726 netif_poll_disable(dev
);
2730 /* Give a racing hard_start_xmit a few cycles to complete. */
2731 synchronize_sched(); /* FIXME: should this be synchronize_irq()? */
2734 * And now for the 50k$ question: are IRQ disabled or not ?
2736 * Two paths lead here:
2738 * -> netif_running() is available to sync the current code and the
2739 * IRQ handler. See rtl8169_interrupt for details.
2740 * 2) dev->change_mtu
2741 * -> rtl8169_poll can not be issued again and re-enable the
2742 * interruptions. Let's simply issue the IRQ down sequence again.
2744 if (RTL_R16(IntrMask
))
2747 rtl8169_tx_clear(tp
);
2749 rtl8169_rx_clear(tp
);
2752 static int rtl8169_close(struct net_device
*dev
)
2754 struct rtl8169_private
*tp
= netdev_priv(dev
);
2755 struct pci_dev
*pdev
= tp
->pci_dev
;
2759 free_irq(dev
->irq
, dev
);
2761 netif_poll_enable(dev
);
2763 pci_free_consistent(pdev
, R8169_RX_RING_BYTES
, tp
->RxDescArray
,
2765 pci_free_consistent(pdev
, R8169_TX_RING_BYTES
, tp
->TxDescArray
,
2767 tp
->TxDescArray
= NULL
;
2768 tp
->RxDescArray
= NULL
;
2774 rtl8169_set_rx_mode(struct net_device
*dev
)
2776 struct rtl8169_private
*tp
= netdev_priv(dev
);
2777 void __iomem
*ioaddr
= tp
->mmio_addr
;
2778 unsigned long flags
;
2779 u32 mc_filter
[2]; /* Multicast hash filter */
2783 if (dev
->flags
& IFF_PROMISC
) {
2784 /* Unconditionally log net taps. */
2785 if (netif_msg_link(tp
)) {
2786 printk(KERN_NOTICE
"%s: Promiscuous mode enabled.\n",
2790 AcceptBroadcast
| AcceptMulticast
| AcceptMyPhys
|
2792 mc_filter
[1] = mc_filter
[0] = 0xffffffff;
2793 } else if ((dev
->mc_count
> multicast_filter_limit
)
2794 || (dev
->flags
& IFF_ALLMULTI
)) {
2795 /* Too many to filter perfectly -- accept all multicasts. */
2796 rx_mode
= AcceptBroadcast
| AcceptMulticast
| AcceptMyPhys
;
2797 mc_filter
[1] = mc_filter
[0] = 0xffffffff;
2799 struct dev_mc_list
*mclist
;
2800 rx_mode
= AcceptBroadcast
| AcceptMyPhys
;
2801 mc_filter
[1] = mc_filter
[0] = 0;
2802 for (i
= 0, mclist
= dev
->mc_list
; mclist
&& i
< dev
->mc_count
;
2803 i
++, mclist
= mclist
->next
) {
2804 int bit_nr
= ether_crc(ETH_ALEN
, mclist
->dmi_addr
) >> 26;
2805 mc_filter
[bit_nr
>> 5] |= 1 << (bit_nr
& 31);
2806 rx_mode
|= AcceptMulticast
;
2810 spin_lock_irqsave(&tp
->lock
, flags
);
2812 tmp
= rtl8169_rx_config
| rx_mode
|
2813 (RTL_R32(RxConfig
) & rtl_chip_info
[tp
->chipset
].RxConfigMask
);
2815 if ((tp
->mac_version
== RTL_GIGA_MAC_VER_11
) ||
2816 (tp
->mac_version
== RTL_GIGA_MAC_VER_12
) ||
2817 (tp
->mac_version
== RTL_GIGA_MAC_VER_13
) ||
2818 (tp
->mac_version
== RTL_GIGA_MAC_VER_14
) ||
2819 (tp
->mac_version
== RTL_GIGA_MAC_VER_15
)) {
2820 mc_filter
[0] = 0xffffffff;
2821 mc_filter
[1] = 0xffffffff;
2824 RTL_W32(RxConfig
, tmp
);
2825 RTL_W32(MAR0
+ 0, mc_filter
[0]);
2826 RTL_W32(MAR0
+ 4, mc_filter
[1]);
2828 spin_unlock_irqrestore(&tp
->lock
, flags
);
2832 * rtl8169_get_stats - Get rtl8169 read/write statistics
2833 * @dev: The Ethernet Device to get statistics for
2835 * Get TX/RX statistics for rtl8169
2837 static struct net_device_stats
*rtl8169_get_stats(struct net_device
*dev
)
2839 struct rtl8169_private
*tp
= netdev_priv(dev
);
2840 void __iomem
*ioaddr
= tp
->mmio_addr
;
2841 unsigned long flags
;
2843 if (netif_running(dev
)) {
2844 spin_lock_irqsave(&tp
->lock
, flags
);
2845 tp
->stats
.rx_missed_errors
+= RTL_R32(RxMissed
);
2846 RTL_W32(RxMissed
, 0);
2847 spin_unlock_irqrestore(&tp
->lock
, flags
);
2855 static int rtl8169_suspend(struct pci_dev
*pdev
, pm_message_t state
)
2857 struct net_device
*dev
= pci_get_drvdata(pdev
);
2858 struct rtl8169_private
*tp
= netdev_priv(dev
);
2859 void __iomem
*ioaddr
= tp
->mmio_addr
;
2861 if (!netif_running(dev
))
2864 netif_device_detach(dev
);
2865 netif_stop_queue(dev
);
2867 spin_lock_irq(&tp
->lock
);
2869 rtl8169_asic_down(ioaddr
);
2871 tp
->stats
.rx_missed_errors
+= RTL_R32(RxMissed
);
2872 RTL_W32(RxMissed
, 0);
2874 spin_unlock_irq(&tp
->lock
);
2876 pci_save_state(pdev
);
2877 pci_enable_wake(pdev
, pci_choose_state(pdev
, state
), tp
->wol_enabled
);
2878 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
2883 static int rtl8169_resume(struct pci_dev
*pdev
)
2885 struct net_device
*dev
= pci_get_drvdata(pdev
);
2887 if (!netif_running(dev
))
2890 netif_device_attach(dev
);
2892 pci_set_power_state(pdev
, PCI_D0
);
2893 pci_restore_state(pdev
);
2894 pci_enable_wake(pdev
, PCI_D0
, 0);
2896 rtl8169_schedule_work(dev
, rtl8169_reset_task
);
2901 #endif /* CONFIG_PM */
2903 static struct pci_driver rtl8169_pci_driver
= {
2905 .id_table
= rtl8169_pci_tbl
,
2906 .probe
= rtl8169_init_one
,
2907 .remove
= __devexit_p(rtl8169_remove_one
),
2909 .suspend
= rtl8169_suspend
,
2910 .resume
= rtl8169_resume
,
2915 rtl8169_init_module(void)
2917 return pci_register_driver(&rtl8169_pci_driver
);
2921 rtl8169_cleanup_module(void)
2923 pci_unregister_driver(&rtl8169_pci_driver
);
2926 module_init(rtl8169_init_module
);
2927 module_exit(rtl8169_cleanup_module
);