arch/x86/kernel/time_64.c

   1 /*
   2  *  linux/arch/x86-64/kernel/time.c
   3  *
   4  *  "High Precision Event Timer" based timekeeping.
   5  *
   6  *  Copyright (c) 1991,1992,1995  Linus Torvalds
   7  *  Copyright (c) 1994  Alan Modra
   8  *  Copyright (c) 1995  Markus Kuhn
   9  *  Copyright (c) 1996  Ingo Molnar
  10  *  Copyright (c) 1998  Andrea Arcangeli
  11  *  Copyright (c) 2002,2006  Vojtech Pavlik
  12  *  Copyright (c) 2003  Andi Kleen
  13  *  RTC support code taken from arch/i386/kernel/timers/time_hpet.c
  14  */
  15
  16 #include <linux/kernel.h>
  17 #include <linux/sched.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/init.h>
  20 #include <linux/mc146818rtc.h>
  21 #include <linux/time.h>
  22 #include <linux/ioport.h>
  23 #include <linux/module.h>
  24 #include <linux/device.h>
  25 #include <linux/sysdev.h>
  26 #include <linux/bcd.h>
  27 #include <linux/notifier.h>
  28 #include <linux/cpu.h>
  29 #include <linux/kallsyms.h>
  30 #include <linux/acpi.h>
  31 #include <linux/clockchips.h>
  32
  33 #ifdef CONFIG_ACPI
  34 #include <acpi/achware.h>       /* for PM timer frequency */
  35 #include <acpi/acpi_bus.h>
  36 #endif
  37 #include <asm/i8253.h>
  38 #include <asm/pgtable.h>
  39 #include <asm/vsyscall.h>
  40 #include <asm/timex.h>
  41 #include <asm/proto.h>
  42 #include <asm/hpet.h>
  43 #include <asm/sections.h>
  44 #include <linux/hpet.h>
  45 #include <asm/apic.h>
  46 #include <asm/hpet.h>
  47 #include <asm/mpspec.h>
  48 #include <asm/nmi.h>
  49 #include <asm/vgtod.h>
  50
  51 DEFINE_SPINLOCK(rtc_lock);
  52 EXPORT_SYMBOL(rtc_lock);
  53
  54 volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
  55
  56 unsigned long profile_pc(struct pt_regs *regs)
  57 {
  58         unsigned long pc = instruction_pointer(regs);
  59
  60         /* Assume the lock function has either no stack frame or a copy
  61            of eflags from PUSHF
  62            Eflags always has bits 22 and up cleared unlike kernel addresses. */
  63         if (!user_mode(regs) && in_lock_functions(pc)) {
  64                 unsigned long *sp = (unsigned long *)regs->rsp;
  65                 if (sp[0] >> 22)
  66                         return sp[0];
  67                 if (sp[1] >> 22)
  68                         return sp[1];
  69         }
  70         return pc;
  71 }
  72 EXPORT_SYMBOL(profile_pc);
  73
  74 /*
  75  * In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500
  76  * ms after the second nowtime has started, because when nowtime is written
  77  * into the registers of the CMOS clock, it will jump to the next second
  78  * precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data
  79  * sheet for details.
  80  */
  81
  82 static int set_rtc_mmss(unsigned long nowtime)
  83 {
  84         int retval = 0;
  85         int real_seconds, real_minutes, cmos_minutes;
  86         unsigned char control, freq_select;
  87
  88 /*
  89  * IRQs are disabled when we're called from the timer interrupt,
  90  * no need for spin_lock_irqsave()
  91  */
  92
  93         spin_lock(&rtc_lock);
  94
  95 /*
  96  * Tell the clock it's being set and stop it.
  97  */
  98
  99         control = CMOS_READ(RTC_CONTROL);
 100         CMOS_WRITE(control | RTC_SET, RTC_CONTROL);
 101
 102         freq_select = CMOS_READ(RTC_FREQ_SELECT);
 103         CMOS_WRITE(freq_select | RTC_DIV_RESET2, RTC_FREQ_SELECT);
 104
 105         cmos_minutes = CMOS_READ(RTC_MINUTES);
 106                 BCD_TO_BIN(cmos_minutes);
 107
 108 /*
 109  * since we're only adjusting minutes and seconds, don't interfere with hour
 110  * overflow. This avoids messing with unknown time zones but requires your RTC
 111  * not to be off by more than 15 minutes. Since we're calling it only when
 112  * our clock is externally synchronized using NTP, this shouldn't be a problem.
 113  */
 114
 115         real_seconds = nowtime % 60;
 116         real_minutes = nowtime / 60;
 117         if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
 118                 real_minutes += 30;             /* correct for half hour time zone */
 119         real_minutes %= 60;
 120
 121         if (abs(real_minutes - cmos_minutes) >= 30) {
 122                 printk(KERN_WARNING "time.c: can't update CMOS clock "
 123                        "from %d to %d\n", cmos_minutes, real_minutes);
 124                 retval = -1;
 125         } else {
 126                 BIN_TO_BCD(real_seconds);
 127                 BIN_TO_BCD(real_minutes);
 128                 CMOS_WRITE(real_seconds, RTC_SECONDS);
 129                 CMOS_WRITE(real_minutes, RTC_MINUTES);
 130         }
 131
 132 /*
 133  * The following flags have to be released exactly in this order, otherwise the
 134  * DS12887 (popular MC146818A clone with integrated battery and quartz) will
 135  * not reset the oscillator and will not update precisely 500 ms later. You
 136  * won't find this mentioned in the Dallas Semiconductor data sheets, but who
 137  * believes data sheets anyway ... -- Markus Kuhn
 138  */
 139
 140         CMOS_WRITE(control, RTC_CONTROL);
 141         CMOS_WRITE(freq_select, RTC_FREQ_SELECT);
 142
 143         spin_unlock(&rtc_lock);
 144
 145         return retval;
 146 }
 147
 148 int update_persistent_clock(struct timespec now)
 149 {
 150         return set_rtc_mmss(now.tv_sec);
 151 }
 152
 153 void main_timer_handler(void)
 154 {
 155 /*
 156  * Here we are in the timer irq handler. We have irqs locally disabled (so we
 157  * don't need spin_lock_irqsave()) but we don't know if the timer_bh is running
 158  * on the other CPU, so we need a lock. We also need to lock the vsyscall
 159  * variables, because both do_timer() and us change them -arca+vojtech
 160  */
 161
 162         write_seqlock(&xtime_lock);
 163
 164 /*
 165  * Do the timer stuff.
 166  */
 167
 168         do_timer(1);
 169 #ifndef CONFIG_SMP
 170         update_process_times(user_mode(get_irq_regs()));
 171 #endif
 172
 173 /*
 174  * In the SMP case we use the local APIC timer interrupt to do the profiling,
 175  * except when we simulate SMP mode on a uniprocessor system, in that case we
 176  * have to call the local interrupt handler.
 177  */
 178
 179         if (!using_apic_timer)
 180                 smp_local_timer_interrupt();
 181
 182         write_sequnlock(&xtime_lock);
 183 }
 184
 185 static irqreturn_t timer_interrupt(int irq, void *dev_id)
 186 {
 187         if (apic_runs_main_timer > 1)
 188                 return IRQ_HANDLED;
 189         main_timer_handler();
 190         if (using_apic_timer)
 191                 smp_send_timer_broadcast_ipi();
 192         return IRQ_HANDLED;
 193 }
 194
 195 static irqreturn_t timer_event_interrupt(int irq, void *dev_id)
 196 {
 197         add_pda(irq0_irqs, 1);
 198
 199         global_clock_event->event_handler(global_clock_event);
 200
 201         return IRQ_HANDLED;
 202 }
 203
 204 unsigned long read_persistent_clock(void)
 205 {
 206         unsigned int year, mon, day, hour, min, sec;
 207         unsigned long flags;
 208         unsigned century = 0;
 209
 210         spin_lock_irqsave(&rtc_lock, flags);
 211
 212         do {
 213                 sec = CMOS_READ(RTC_SECONDS);
 214                 min = CMOS_READ(RTC_MINUTES);
 215                 hour = CMOS_READ(RTC_HOURS);
 216                 day = CMOS_READ(RTC_DAY_OF_MONTH);
 217                 mon = CMOS_READ(RTC_MONTH);
 218                 year = CMOS_READ(RTC_YEAR);
 219 #ifdef CONFIG_ACPI
 220                 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
 221                                         acpi_gbl_FADT.century)
 222                         century = CMOS_READ(acpi_gbl_FADT.century);
 223 #endif
 224         } while (sec != CMOS_READ(RTC_SECONDS));
 225
 226         spin_unlock_irqrestore(&rtc_lock, flags);
 227
 228         /*
 229          * We know that x86-64 always uses BCD format, no need to check the
 230          * config register.
 231          */
 232
 233         BCD_TO_BIN(sec);
 234         BCD_TO_BIN(min);
 235         BCD_TO_BIN(hour);
 236         BCD_TO_BIN(day);
 237         BCD_TO_BIN(mon);
 238         BCD_TO_BIN(year);
 239
 240         if (century) {
 241                 BCD_TO_BIN(century);
 242                 year += century * 100;
 243                 printk(KERN_INFO "Extended CMOS year: %d\n", century * 100);
 244         } else {
 245                 /*
 246                  * x86-64 systems only exists since 2002.
 247                  * This will work up to Dec 31, 2100
 248                  */
 249                 year += 2000;
 250         }
 251
 252         return mktime(year, mon, day, hour, min, sec);
 253 }
 254
 255 /* calibrate_cpu is used on systems with fixed rate TSCs to determine
 256  * processor frequency */
 257 #define TICK_COUNT 100000000
 258 static unsigned int __init tsc_calibrate_cpu_khz(void)
 259 {
 260         int tsc_start, tsc_now;
 261         int i, no_ctr_free;
 262         unsigned long evntsel3 = 0, pmc3 = 0, pmc_now = 0;
 263         unsigned long flags;
 264
 265         for (i = 0; i < 4; i++)
 266                 if (avail_to_resrv_perfctr_nmi_bit(i))
 267                         break;
 268         no_ctr_free = (i == 4);
 269         if (no_ctr_free) {
 270                 i = 3;
 271                 rdmsrl(MSR_K7_EVNTSEL3, evntsel3);
 272                 wrmsrl(MSR_K7_EVNTSEL3, 0);
 273                 rdmsrl(MSR_K7_PERFCTR3, pmc3);
 274         } else {
 275                 reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i);
 276                 reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
 277         }
 278         local_irq_save(flags);
 279         /* start meauring cycles, incrementing from 0 */
 280         wrmsrl(MSR_K7_PERFCTR0 + i, 0);
 281         wrmsrl(MSR_K7_EVNTSEL0 + i, 1 << 22 | 3 << 16 | 0x76);
 282         rdtscl(tsc_start);
 283         do {
 284                 rdmsrl(MSR_K7_PERFCTR0 + i, pmc_now);
 285                 tsc_now = get_cycles_sync();
 286         } while ((tsc_now - tsc_start) < TICK_COUNT);
 287
 288         local_irq_restore(flags);
 289         if (no_ctr_free) {
 290                 wrmsrl(MSR_K7_EVNTSEL3, 0);
 291                 wrmsrl(MSR_K7_PERFCTR3, pmc3);
 292                 wrmsrl(MSR_K7_EVNTSEL3, evntsel3);
 293         } else {
 294                 release_perfctr_nmi(MSR_K7_PERFCTR0 + i);
 295                 release_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
 296         }
 297
 298         return pmc_now * tsc_khz / (tsc_now - tsc_start);
 299 }
 300
 301 static struct irqaction irq0 = {
 302         .handler        = timer_event_interrupt,
 303         .flags          = IRQF_DISABLED | IRQF_IRQPOLL | IRQF_NOBALANCING,
 304         .mask           = CPU_MASK_NONE,
 305         .name           = "timer"
 306 };
 307
 308 void __init time_init(void)
 309 {
 310         if (!hpet_enable())
 311                 setup_pit_timer();
 312
 313         setup_irq(0, &irq0);
 314
 315         tsc_calibrate();
 316
 317         cpu_khz = tsc_khz;
 318         if (cpu_has(&boot_cpu_data, X86_FEATURE_CONSTANT_TSC) &&
 319                 boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
 320                 boot_cpu_data.x86 == 16)
 321                 cpu_khz = tsc_calibrate_cpu_khz();
 322
 323         if (unsynchronized_tsc())
 324                 mark_tsc_unstable("TSCs unsynchronized");
 325
 326         if (cpu_has(&boot_cpu_data, X86_FEATURE_RDTSCP))
 327                 vgetcpu_mode = VGETCPU_RDTSCP;
 328         else
 329                 vgetcpu_mode = VGETCPU_LSL;
 330
 331         set_cyc2ns_scale(tsc_khz);
 332         printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n",
 333                 cpu_khz / 1000, cpu_khz % 1000);
 334         init_tsc_clocksource();
 335 }