drivers/media/dvb/frontends/cx24123.c

   1 /*
   2     Conexant cx24123/cx24109 - DVB QPSK Satellite demod/tuner driver
   3
   4     Copyright (C) 2005 Steven Toth <stoth@hauppauge.com>
   5
   6     Support for KWorld DVB-S 100 by Vadim Catana <skystar@moldova.cc>
   7
   8     This program is free software; you can redistribute it and/or modify
   9     it under the terms of the GNU General Public License as published by
  10     the Free Software Foundation; either version 2 of the License, or
  11     (at your option) any later version.
  12
  13     This program is distributed in the hope that it will be useful,
  14     but WITHOUT ANY WARRANTY; without even the implied warranty of
  15     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16     GNU General Public License for more details.
  17
  18     You should have received a copy of the GNU General Public License
  19     along with this program; if not, write to the Free Software
  20     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21 */
  22
  23 #include <linux/slab.h>
  24 #include <linux/kernel.h>
  25 #include <linux/module.h>
  26 #include <linux/moduleparam.h>
  27 #include <linux/init.h>
  28
  29 #include "dvb_frontend.h"
  30 #include "cx24123.h"
  31
  32 static int debug;
  33 #define dprintk(args...) \
  34         do { \
  35                 if (debug) printk (KERN_DEBUG "cx24123: " args); \
  36         } while (0)
  37
  38 struct cx24123_state
  39 {
  40         struct i2c_adapter* i2c;
  41         struct dvb_frontend_ops ops;
  42         const struct cx24123_config* config;
  43
  44         struct dvb_frontend frontend;
  45
  46         u32 lastber;
  47         u16 snr;
  48         u8  lnbreg;
  49
  50         /* Some PLL specifics for tuning */
  51         u32 VCAarg;
  52         u32 VGAarg;
  53         u32 bandselectarg;
  54         u32 pllarg;
  55
  56         /* The Demod/Tuner can't easily provide these, we cache them */
  57         u32 currentfreq;
  58         u32 currentsymbolrate;
  59 };
  60
  61 /* Various tuner defaults need to be established for a given symbol rate Sps */
  62 static struct
  63 {
  64         u32 symbolrate_low;
  65         u32 symbolrate_high;
  66         u32 VCAslope;
  67         u32 VCAoffset;
  68         u32 VGA1offset;
  69         u32 VGA2offset;
  70         u32 VCAprogdata;
  71         u32 VGAprogdata;
  72 } cx24123_AGC_vals[] =
  73 {
  74         {
  75                 .symbolrate_low         = 1000000,
  76                 .symbolrate_high        = 4999999,
  77                 .VCAslope               = 0x07,
  78                 .VCAoffset              = 0x0f,
  79                 .VGA1offset             = 0x1f8,
  80                 .VGA2offset             = 0x1f8,
  81                 .VGAprogdata            = (2 << 18) | (0x1f8 << 9) | 0x1f8,
  82                 .VCAprogdata            = (4 << 18) | (0x07 << 9) | 0x07,
  83         },
  84         {
  85                 .symbolrate_low         =  5000000,
  86                 .symbolrate_high        = 14999999,
  87                 .VCAslope               = 0x1f,
  88                 .VCAoffset              = 0x1f,
  89                 .VGA1offset             = 0x1e0,
  90                 .VGA2offset             = 0x180,
  91                 .VGAprogdata            = (2 << 18) | (0x180 << 9) | 0x1e0,
  92                 .VCAprogdata            = (4 << 18) | (0x07 << 9) | 0x1f,
  93         },
  94         {
  95                 .symbolrate_low         = 15000000,
  96                 .symbolrate_high        = 45000000,
  97                 .VCAslope               = 0x3f,
  98                 .VCAoffset              = 0x3f,
  99                 .VGA1offset             = 0x180,
 100                 .VGA2offset             = 0x100,
 101                 .VGAprogdata            = (2 << 18) | (0x100 << 9) | 0x180,
 102                 .VCAprogdata            = (4 << 18) | (0x07 << 9) | 0x3f,
 103         },
 104 };
 105
 106 /*
 107  * Various tuner defaults need to be established for a given frequency kHz.
 108  * fixme: The bounds on the bands do not match the doc in real life.
 109  * fixme: Some of them have been moved, other might need adjustment.
 110  */
 111 static struct
 112 {
 113         u32 freq_low;
 114         u32 freq_high;
 115         u32 bandselect;
 116         u32 VCOdivider;
 117         u32 VCOnumber;
 118         u32 progdata;
 119 } cx24123_bandselect_vals[] =
 120 {
 121         {
 122                 .freq_low       = 950000,
 123                 .freq_high      = 1018999,
 124                 .bandselect     = 0x40,
 125                 .VCOdivider     = 4,
 126                 .VCOnumber      = 7,
 127                 .progdata       = (0 << 18) | (0 << 9) | 0x40,
 128         },
 129         {
 130                 .freq_low       = 1019000,
 131                 .freq_high      = 1074999,
 132                 .bandselect     = 0x80,
 133                 .VCOdivider     = 4,
 134                 .VCOnumber      = 8,
 135                 .progdata       = (0 << 18) | (0 << 9) | 0x80,
 136         },
 137         {
 138                 .freq_low       = 1075000,
 139                 .freq_high      = 1227999,
 140                 .bandselect     = 0x01,
 141                 .VCOdivider     = 2,
 142                 .VCOnumber      = 1,
 143                 .progdata       = (0 << 18) | (1 << 9) | 0x01,
 144         },
 145         {
 146                 .freq_low       = 1228000,
 147                 .freq_high      = 1349999,
 148                 .bandselect     = 0x02,
 149                 .VCOdivider     = 2,
 150                 .VCOnumber      = 2,
 151                 .progdata       = (0 << 18) | (1 << 9) | 0x02,
 152         },
 153         {
 154                 .freq_low       = 1350000,
 155                 .freq_high      = 1481999,
 156                 .bandselect     = 0x04,
 157                 .VCOdivider     = 2,
 158                 .VCOnumber      = 3,
 159                 .progdata       = (0 << 18) | (1 << 9) | 0x04,
 160         },
 161         {
 162                 .freq_low       = 1482000,
 163                 .freq_high      = 1595999,
 164                 .bandselect     = 0x08,
 165                 .VCOdivider     = 2,
 166                 .VCOnumber      = 4,
 167                 .progdata       = (0 << 18) | (1 << 9) | 0x08,
 168         },
 169         {
 170                 .freq_low       = 1596000,
 171                 .freq_high      = 1717999,
 172                 .bandselect     = 0x10,
 173                 .VCOdivider     = 2,
 174                 .VCOnumber      = 5,
 175                 .progdata       = (0 << 18) | (1 << 9) | 0x10,
 176         },
 177         {
 178                 .freq_low       = 1718000,
 179                 .freq_high      = 1855999,
 180                 .bandselect     = 0x20,
 181                 .VCOdivider     = 2,
 182                 .VCOnumber      = 6,
 183                 .progdata       = (0 << 18) | (1 << 9) | 0x20,
 184         },
 185         {
 186                 .freq_low       = 1856000,
 187                 .freq_high      = 2035999,
 188                 .bandselect     = 0x40,
 189                 .VCOdivider     = 2,
 190                 .VCOnumber      = 7,
 191                 .progdata       = (0 << 18) | (1 << 9) | 0x40,
 192         },
 193         {
 194                 .freq_low       = 2036000,
 195                 .freq_high      = 2149999,
 196                 .bandselect     = 0x80,
 197                 .VCOdivider     = 2,
 198                 .VCOnumber      = 8,
 199                 .progdata       = (0 << 18) | (1 << 9) | 0x80,
 200         },
 201 };
 202
 203 static struct {
 204         u8 reg;
 205         u8 data;
 206 } cx24123_regdata[] =
 207 {
 208         {0x00, 0x03}, /* Reset system */
 209         {0x00, 0x00}, /* Clear reset */
 210         {0x01, 0x3b}, /* Apply sensible defaults, from an i2c sniffer */
 211         {0x03, 0x07},
 212         {0x04, 0x10},
 213         {0x05, 0x04},
 214         {0x06, 0x31},
 215         {0x0d, 0x02},
 216         {0x0e, 0x03},
 217         {0x0f, 0xfe},
 218         {0x10, 0x01},
 219         {0x14, 0x01},
 220         {0x15, 0x98},
 221         {0x16, 0x00},
 222         {0x17, 0x01},
 223         {0x1b, 0x05},
 224         {0x1c, 0x80},
 225         {0x1d, 0x00},
 226         {0x1e, 0x00},
 227         {0x20, 0x41},
 228         {0x21, 0x15},
 229         {0x27, 0x14},
 230         {0x28, 0x46},
 231         {0x29, 0x00},
 232         {0x2a, 0xb0},
 233         {0x2b, 0x73},
 234         {0x2c, 0x00},
 235         {0x2d, 0x00},
 236         {0x2e, 0x00},
 237         {0x2f, 0x00},
 238         {0x30, 0x00},
 239         {0x31, 0x00},
 240         {0x32, 0x8c},
 241         {0x33, 0x00},
 242         {0x34, 0x00},
 243         {0x35, 0x03},
 244         {0x36, 0x02},
 245         {0x37, 0x3a},
 246         {0x3a, 0x00},   /* Enable AGC accumulator */
 247         {0x44, 0x00},
 248         {0x45, 0x00},
 249         {0x46, 0x05},
 250         {0x56, 0x41},
 251         {0x57, 0xff},
 252         {0x67, 0x83},
 253 };
 254
 255 static int cx24123_writereg(struct cx24123_state* state, int reg, int data)
 256 {
 257         u8 buf[] = { reg, data };
 258         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
 259         int err;
 260
 261         if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
 262                 printk("%s: writereg error(err == %i, reg == 0x%02x,"
 263                          " data == 0x%02x)\n", __FUNCTION__, err, reg, data);
 264                 return -EREMOTEIO;
 265         }
 266
 267         return 0;
 268 }
 269
 270 static int cx24123_writelnbreg(struct cx24123_state* state, int reg, int data)
 271 {
 272         u8 buf[] = { reg, data };
 273         /* fixme: put the intersil addr int the config */
 274         struct i2c_msg msg = { .addr = 0x08, .flags = 0, .buf = buf, .len = 2 };
 275         int err;
 276
 277         if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
 278                 printk("%s: writelnbreg error (err == %i, reg == 0x%02x,"
 279                          " data == 0x%02x)\n", __FUNCTION__, err, reg, data);
 280                 return -EREMOTEIO;
 281         }
 282
 283         /* cache the write, no way to read back */
 284         state->lnbreg = data;
 285
 286         return 0;
 287 }
 288
 289 static int cx24123_readreg(struct cx24123_state* state, u8 reg)
 290 {
 291         int ret;
 292         u8 b0[] = { reg };
 293         u8 b1[] = { 0 };
 294         struct i2c_msg msg[] = {
 295                 { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
 296                 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 }
 297         };
 298
 299         ret = i2c_transfer(state->i2c, msg, 2);
 300
 301         if (ret != 2) {
 302                 printk("%s: reg=0x%x (error=%d)\n", __FUNCTION__, reg, ret);
 303                 return ret;
 304         }
 305
 306         return b1[0];
 307 }
 308
 309 static int cx24123_readlnbreg(struct cx24123_state* state, u8 reg)
 310 {
 311         return state->lnbreg;
 312 }
 313
 314 static int cx24123_set_inversion(struct cx24123_state* state, fe_spectral_inversion_t inversion)
 315 {
 316         switch (inversion) {
 317         case INVERSION_OFF:
 318                 cx24123_writereg(state, 0x0e, cx24123_readreg(state, 0x0e) & 0x7f);
 319                 cx24123_writereg(state, 0x10, cx24123_readreg(state, 0x10) | 0x80);
 320                 break;
 321         case INVERSION_ON:
 322                 cx24123_writereg(state, 0x0e, cx24123_readreg(state, 0x0e) | 0x80);
 323                 cx24123_writereg(state, 0x10, cx24123_readreg(state, 0x10) | 0x80);
 324                 break;
 325         case INVERSION_AUTO:
 326                 cx24123_writereg(state, 0x10, cx24123_readreg(state, 0x10) & 0x7f);
 327                 break;
 328         default:
 329                 return -EINVAL;
 330         }
 331
 332         return 0;
 333 }
 334
 335 static int cx24123_get_inversion(struct cx24123_state* state, fe_spectral_inversion_t *inversion)
 336 {
 337         u8 val;
 338
 339         val = cx24123_readreg(state, 0x1b) >> 7;
 340
 341         if (val == 0)
 342                 *inversion = INVERSION_OFF;
 343         else
 344                 *inversion = INVERSION_ON;
 345
 346         return 0;
 347 }
 348
 349 static int cx24123_set_fec(struct cx24123_state* state, fe_code_rate_t fec)
 350 {
 351         if ( (fec < FEC_NONE) || (fec > FEC_AUTO) )
 352                 fec = FEC_AUTO;
 353
 354         /* Hardware has 5/11 and 3/5 but are never unused */
 355         switch (fec) {
 356         case FEC_NONE:
 357                 return cx24123_writereg(state, 0x0f, 0x01);
 358         case FEC_1_2:
 359                 return cx24123_writereg(state, 0x0f, 0x02);
 360         case FEC_2_3:
 361                 return cx24123_writereg(state, 0x0f, 0x04);
 362         case FEC_3_4:
 363                 return cx24123_writereg(state, 0x0f, 0x08);
 364         case FEC_5_6:
 365                 return cx24123_writereg(state, 0x0f, 0x20);
 366         case FEC_7_8:
 367                 return cx24123_writereg(state, 0x0f, 0x80);
 368         case FEC_AUTO:
 369                 return cx24123_writereg(state, 0x0f, 0xae);
 370         default:
 371                 return -EOPNOTSUPP;
 372         }
 373 }
 374
 375 static int cx24123_get_fec(struct cx24123_state* state, fe_code_rate_t *fec)
 376 {
 377         int ret;
 378         u8 val;
 379
 380         ret = cx24123_readreg (state, 0x1b);
 381         if (ret < 0)
 382                 return ret;
 383         val = ret & 0x07;
 384         switch (val) {
 385         case 1:
 386                 *fec = FEC_1_2;
 387                 break;
 388         case 3:
 389                 *fec = FEC_2_3;
 390                 break;
 391         case 4:
 392                 *fec = FEC_3_4;
 393                 break;
 394         case 5:
 395                 *fec = FEC_4_5;
 396                 break;
 397         case 6:
 398                 *fec = FEC_5_6;
 399                 break;
 400         case 7:
 401                 *fec = FEC_7_8;
 402                 break;
 403         case 2: /* *fec = FEC_3_5; break; */
 404         case 0: /* *fec = FEC_5_11; break; */
 405                 *fec = FEC_AUTO;
 406                 break;
 407         default:
 408                 *fec = FEC_NONE; // can't happen
 409         }
 410
 411         return 0;
 412 }
 413
 414 /* fixme: Symbol rates < 3MSps may not work because of precision loss */
 415 static int cx24123_set_symbolrate(struct cx24123_state* state, u32 srate)
 416 {
 417         u32 val;
 418
 419         val = (srate / 1185) * 100;
 420
 421         /* Compensate for scaling up, by removing 17 symbols per 1Msps */
 422         val = val - (17 * (srate / 1000000));
 423
 424         cx24123_writereg(state, 0x08, (val >> 16) & 0xff );
 425         cx24123_writereg(state, 0x09, (val >>  8) & 0xff );
 426         cx24123_writereg(state, 0x0a, (val      ) & 0xff );
 427
 428         return 0;
 429 }
 430
 431 /*
 432  * Based on the required frequency and symbolrate, the tuner AGC has to be configured
 433  * and the correct band selected. Calculate those values
 434  */
 435 static int cx24123_pll_calculate(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
 436 {
 437         struct cx24123_state *state = fe->demodulator_priv;
 438         u32 ndiv = 0, adiv = 0, vco_div = 0;
 439         int i = 0;
 440
 441         /* Defaults for low freq, low rate */
 442         state->VCAarg = cx24123_AGC_vals[0].VCAprogdata;
 443         state->VGAarg = cx24123_AGC_vals[0].VGAprogdata;
 444         state->bandselectarg = cx24123_bandselect_vals[0].progdata;
 445         vco_div = cx24123_bandselect_vals[0].VCOdivider;
 446
 447         /* For the given symbolerate, determine the VCA and VGA programming bits */
 448         for (i = 0; i < sizeof(cx24123_AGC_vals) / sizeof(cx24123_AGC_vals[0]); i++)
 449         {
 450                 if ((cx24123_AGC_vals[i].symbolrate_low <= p->u.qpsk.symbol_rate) &&
 451                                 (cx24123_AGC_vals[i].symbolrate_high >= p->u.qpsk.symbol_rate) ) {
 452                         state->VCAarg = cx24123_AGC_vals[i].VCAprogdata;
 453                         state->VGAarg = cx24123_AGC_vals[i].VGAprogdata;
 454                 }
 455         }
 456
 457         /* For the given frequency, determine the bandselect programming bits */
 458         for (i = 0; i < sizeof(cx24123_bandselect_vals) / sizeof(cx24123_bandselect_vals[0]); i++)
 459         {
 460                 if ((cx24123_bandselect_vals[i].freq_low <= p->frequency) &&
 461                                 (cx24123_bandselect_vals[i].freq_high >= p->frequency) ) {
 462                         state->bandselectarg = cx24123_bandselect_vals[i].progdata;
 463                         vco_div = cx24123_bandselect_vals[i].VCOdivider;
 464                 }
 465         }
 466
 467         /* Determine the N/A dividers for the requested lband freq (in kHz). */
 468         /* Note: 10111 (kHz) is the Crystal Freq and divider of 10. */
 469         ndiv = ( ((p->frequency * vco_div) / (10111 / 10) / 2) / 32) & 0x1ff;
 470         adiv = ( ((p->frequency * vco_div) / (10111 / 10) / 2) % 32) & 0x1f;
 471
 472         if (adiv == 0)
 473                 adiv++;
 474
 475         /* determine the correct pll frequency values. */
 476         /* Command 11, refdiv 11, cpump polarity 1, cpump current 3mA 10. */
 477         state->pllarg = (3 << 19) | (3 << 17) | (1 << 16) | (2 << 14);
 478         state->pllarg |= (ndiv << 5) | adiv;
 479
 480         return 0;
 481 }
 482
 483 /*
 484  * Tuner data is 21 bits long, must be left-aligned in data.
 485  * Tuner cx24109 is written through a dedicated 3wire interface on the demod chip.
 486  */
 487 static int cx24123_pll_writereg(struct dvb_frontend* fe, struct dvb_frontend_parameters *p, u32 data)
 488 {
 489         struct cx24123_state *state = fe->demodulator_priv;
 490
 491         u8 timeout = 0;
 492
 493         /* align the 21 bytes into to bit23 boundary */
 494         data = data << 3;
 495
 496         /* Reset the demod pll word length to 0x15 bits */
 497         cx24123_writereg(state, 0x21, 0x15);
 498
 499         timeout = 0;
 500         /* write the msb 8 bits, wait for the send to be completed */
 501         cx24123_writereg(state, 0x22, (data >> 16) & 0xff);
 502         while ( ( cx24123_readreg(state, 0x20) & 0x40 ) == 0 )
 503         {
 504                 /* Safety - No reason why the write should not complete, and we never get here, avoid hang */
 505                 if (timeout++ >= 4) {
 506                         printk("%s:  demodulator is no longer responding, aborting.\n",__FUNCTION__);
 507                         return -EREMOTEIO;
 508                 }
 509                 msleep(500);
 510         }
 511
 512         timeout = 0;
 513         /* send another 8 bytes, wait for the send to be completed */
 514         cx24123_writereg(state, 0x22, (data>>8) & 0xff );
 515         while ( (cx24123_readreg(state, 0x20) & 0x40 ) == 0 )
 516         {
 517                 /* Safety - No reason why the write should not complete, and we never get here, avoid hang */
 518                 if (timeout++ >= 4) {
 519                         printk("%s:  demodulator is not responding, possibly hung, aborting.\n",__FUNCTION__);
 520                         return -EREMOTEIO;
 521                 }
 522                 msleep(500);
 523         }
 524
 525         timeout = 0;
 526         /* send the lower 5 bits of this byte, padded with 3 LBB, wait for the send to be completed */
 527         cx24123_writereg(state, 0x22, (data) & 0xff );
 528         while ((cx24123_readreg(state, 0x20) & 0x80))
 529         {
 530                 /* Safety - No reason why the write should not complete, and we never get here, avoid hang */
 531                 if (timeout++ >= 4) {
 532                         printk("%s:  demodulator is not responding, possibly hung, aborting.\n",__FUNCTION__);
 533                         return -EREMOTEIO;
 534                 }
 535                 msleep(500);
 536         }
 537
 538         /* Trigger the demod to configure the tuner */
 539         cx24123_writereg(state, 0x20, cx24123_readreg(state, 0x20) | 2);
 540         cx24123_writereg(state, 0x20, cx24123_readreg(state, 0x20) & 0xfd);
 541
 542         return 0;
 543 }
 544
 545 static int cx24123_pll_tune(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
 546 {
 547         struct cx24123_state *state = fe->demodulator_priv;
 548
 549         if (cx24123_pll_calculate(fe, p) != 0) {
 550                 printk("%s: cx24123_pll_calcutate failed\n",__FUNCTION__);
 551                 return -EINVAL;
 552         }
 553
 554         /* Write the new VCO/VGA */
 555         cx24123_pll_writereg(fe, p, state->VCAarg);
 556         cx24123_pll_writereg(fe, p, state->VGAarg);
 557
 558         /* Write the new bandselect and pll args */
 559         cx24123_pll_writereg(fe, p, state->bandselectarg);
 560         cx24123_pll_writereg(fe, p, state->pllarg);
 561
 562         return 0;
 563 }
 564
 565 static int cx24123_initfe(struct dvb_frontend* fe)
 566 {
 567         struct cx24123_state *state = fe->demodulator_priv;
 568         int i;
 569
 570         /* Configure the demod to a good set of defaults */
 571         for (i = 0; i < sizeof(cx24123_regdata) / sizeof(cx24123_regdata[0]); i++)
 572                 cx24123_writereg(state, cx24123_regdata[i].reg, cx24123_regdata[i].data);
 573
 574         if (state->config->pll_init)
 575                 state->config->pll_init(fe);
 576
 577         /* Configure the LNB for 14V */
 578         if (state->config->use_isl6421)
 579                 cx24123_writelnbreg(state, 0x0, 0x2a);
 580
 581         return 0;
 582 }
 583
 584 static int cx24123_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
 585 {
 586         struct cx24123_state *state = fe->demodulator_priv;
 587         u8 val;
 588
 589         switch (state->config->use_isl6421) {
 590
 591         case 1:
 592
 593                 val = cx24123_readlnbreg(state, 0x0);
 594
 595                 switch (voltage) {
 596                 case SEC_VOLTAGE_13:
 597                         return cx24123_writelnbreg(state, 0x0, val & 0x32); /* V 13v */
 598                 case SEC_VOLTAGE_18:
 599                         return cx24123_writelnbreg(state, 0x0, val | 0x04); /* H 18v */
 600                 case SEC_VOLTAGE_OFF:
 601                         return cx24123_writelnbreg(state, 0x0, val & 0x30);
 602                 default:
 603                         return -EINVAL;
 604                 };
 605
 606         case 0:
 607
 608                 val = cx24123_readreg(state, 0x29);
 609
 610                 switch (voltage) {
 611                 case SEC_VOLTAGE_13:
 612                         dprintk("%s: setting voltage 13V\n", __FUNCTION__);
 613                         if (state->config->enable_lnb_voltage)
 614                                 state->config->enable_lnb_voltage(fe, 1);
 615                         return cx24123_writereg(state, 0x29, val | 0x80);
 616                 case SEC_VOLTAGE_18:
 617                         dprintk("%s: setting voltage 18V\n", __FUNCTION__);
 618                         if (state->config->enable_lnb_voltage)
 619                                 state->config->enable_lnb_voltage(fe, 1);
 620                         return cx24123_writereg(state, 0x29, val & 0x7f);
 621                 case SEC_VOLTAGE_OFF:
 622                         dprintk("%s: setting voltage off\n", __FUNCTION__);
 623                         if (state->config->enable_lnb_voltage)
 624                                 state->config->enable_lnb_voltage(fe, 0);
 625                         return 0;
 626                 default:
 627                         return -EINVAL;
 628                 };
 629         }
 630
 631         return 0;
 632 }
 633
 634 static int cx24123_send_diseqc_msg(struct dvb_frontend* fe,
 635                                    struct dvb_diseqc_master_cmd *cmd)
 636 {
 637         /* fixme: Implement diseqc */
 638         printk("%s: No support yet\n",__FUNCTION__);
 639
 640         return -ENOTSUPP;
 641 }
 642
 643 static int cx24123_read_status(struct dvb_frontend* fe, fe_status_t* status)
 644 {
 645         struct cx24123_state *state = fe->demodulator_priv;
 646
 647         int sync = cx24123_readreg(state, 0x14);
 648         int lock = cx24123_readreg(state, 0x20);
 649
 650         *status = 0;
 651         if (lock & 0x01)
 652                 *status |= FE_HAS_CARRIER | FE_HAS_SIGNAL;
 653         if (sync & 0x04)
 654                 *status |= FE_HAS_VITERBI;
 655         if (sync & 0x08)
 656                 *status |= FE_HAS_CARRIER;
 657         if (sync & 0x80)
 658                 *status |= FE_HAS_SYNC | FE_HAS_LOCK;
 659
 660         return 0;
 661 }
 662
 663 /*
 664  * Configured to return the measurement of errors in blocks, because no UCBLOCKS value
 665  * is available, so this value doubles up to satisfy both measurements
 666  */
 667 static int cx24123_read_ber(struct dvb_frontend* fe, u32* ber)
 668 {
 669         struct cx24123_state *state = fe->demodulator_priv;
 670
 671         state->lastber =
 672                 ((cx24123_readreg(state, 0x1c) & 0x3f) << 16) |
 673                 (cx24123_readreg(state, 0x1d) << 8 |
 674                 cx24123_readreg(state, 0x1e));
 675
 676         /* Do the signal quality processing here, it's derived from the BER. */
 677         /* Scale the BER from a 24bit to a SNR 16 bit where higher = better */
 678         if (state->lastber < 5000)
 679                 state->snr = 655*100;
 680         else if ( (state->lastber >=   5000) && (state->lastber <  55000) )
 681                 state->snr = 655*90;
 682         else if ( (state->lastber >=  55000) && (state->lastber < 150000) )
 683                 state->snr = 655*80;
 684         else if ( (state->lastber >= 150000) && (state->lastber < 250000) )
 685                 state->snr = 655*70;
 686         else if ( (state->lastber >= 250000) && (state->lastber < 450000) )
 687                 state->snr = 655*65;
 688         else
 689                 state->snr = 0;
 690
 691         *ber = state->lastber;
 692
 693         return 0;
 694 }
 695
 696 static int cx24123_read_signal_strength(struct dvb_frontend* fe, u16* signal_strength)
 697 {
 698         struct cx24123_state *state = fe->demodulator_priv;
 699         *signal_strength = cx24123_readreg(state, 0x3b) << 8; /* larger = better */
 700
 701         return 0;
 702 }
 703
 704 static int cx24123_read_snr(struct dvb_frontend* fe, u16* snr)
 705 {
 706         struct cx24123_state *state = fe->demodulator_priv;
 707         *snr = state->snr;
 708
 709         return 0;
 710 }
 711
 712 static int cx24123_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 713 {
 714         struct cx24123_state *state = fe->demodulator_priv;
 715         *ucblocks = state->lastber;
 716
 717         return 0;
 718 }
 719
 720 static int cx24123_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
 721 {
 722         struct cx24123_state *state = fe->demodulator_priv;
 723
 724         if (state->config->set_ts_params)
 725                 state->config->set_ts_params(fe, 0);
 726
 727         state->currentfreq=p->frequency;
 728         state->currentsymbolrate = p->u.qpsk.symbol_rate;
 729
 730         cx24123_set_inversion(state, p->inversion);
 731         cx24123_set_fec(state, p->u.qpsk.fec_inner);
 732         cx24123_set_symbolrate(state, p->u.qpsk.symbol_rate);
 733         cx24123_pll_tune(fe, p);
 734
 735         /* Enable automatic aquisition and reset cycle */
 736         cx24123_writereg(state, 0x03, (cx24123_readreg(state, 0x03) | 0x07));
 737         cx24123_writereg(state, 0x00, 0x10);
 738         cx24123_writereg(state, 0x00, 0);
 739
 740         return 0;
 741 }
 742
 743 static int cx24123_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
 744 {
 745         struct cx24123_state *state = fe->demodulator_priv;
 746
 747         if (cx24123_get_inversion(state, &p->inversion) != 0) {
 748                 printk("%s: Failed to get inversion status\n",__FUNCTION__);
 749                 return -EREMOTEIO;
 750         }
 751         if (cx24123_get_fec(state, &p->u.qpsk.fec_inner) != 0) {
 752                 printk("%s: Failed to get fec status\n",__FUNCTION__);
 753                 return -EREMOTEIO;
 754         }
 755         p->frequency = state->currentfreq;
 756         p->u.qpsk.symbol_rate = state->currentsymbolrate;
 757
 758         return 0;
 759 }
 760
 761 static int cx24123_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
 762 {
 763         struct cx24123_state *state = fe->demodulator_priv;
 764         u8 val;
 765
 766         switch (state->config->use_isl6421) {
 767         case 1:
 768
 769                 val = cx24123_readlnbreg(state, 0x0);
 770
 771                 switch (tone) {
 772                 case SEC_TONE_ON:
 773                         return cx24123_writelnbreg(state, 0x0, val | 0x10);
 774                 case SEC_TONE_OFF:
 775                         return cx24123_writelnbreg(state, 0x0, val & 0x2f);
 776                 default:
 777                         printk("%s: CASE reached default with tone=%d\n", __FUNCTION__, tone);
 778                         return -EINVAL;
 779                 }
 780
 781         case 0:
 782
 783                 val = cx24123_readreg(state, 0x29);
 784
 785                 switch (tone) {
 786                 case SEC_TONE_ON:
 787                         dprintk("%s: setting tone on\n", __FUNCTION__);
 788                         return cx24123_writereg(state, 0x29, val | 0x10);
 789                 case SEC_TONE_OFF:
 790                         dprintk("%s: setting tone off\n",__FUNCTION__);
 791                         return cx24123_writereg(state, 0x29, val & 0xef);
 792                 default:
 793                         printk("%s: CASE reached default with tone=%d\n", __FUNCTION__, tone);
 794                         return -EINVAL;
 795                 }
 796         }
 797
 798         return 0;
 799 }
 800
 801 static void cx24123_release(struct dvb_frontend* fe)
 802 {
 803         struct cx24123_state* state = fe->demodulator_priv;
 804         dprintk("%s\n",__FUNCTION__);
 805         kfree(state);
 806 }
 807
 808 static struct dvb_frontend_ops cx24123_ops;
 809
 810 struct dvb_frontend* cx24123_attach(const struct cx24123_config* config,
 811                                     struct i2c_adapter* i2c)
 812 {
 813         struct cx24123_state* state = NULL;
 814         int ret;
 815
 816         dprintk("%s\n",__FUNCTION__);
 817
 818         /* allocate memory for the internal state */
 819         state = kmalloc(sizeof(struct cx24123_state), GFP_KERNEL);
 820         if (state == NULL) {
 821                 printk("Unable to kmalloc\n");
 822                 goto error;
 823         }
 824
 825         /* setup the state */
 826         state->config = config;
 827         state->i2c = i2c;
 828         memcpy(&state->ops, &cx24123_ops, sizeof(struct dvb_frontend_ops));
 829         state->lastber = 0;
 830         state->snr = 0;
 831         state->lnbreg = 0;
 832         state->VCAarg = 0;
 833         state->VGAarg = 0;
 834         state->bandselectarg = 0;
 835         state->pllarg = 0;
 836         state->currentfreq = 0;
 837         state->currentsymbolrate = 0;
 838
 839         /* check if the demod is there */
 840         ret = cx24123_readreg(state, 0x00);
 841         if ((ret != 0xd1) && (ret != 0xe1)) {
 842                 printk("Version != d1 or e1\n");
 843                 goto error;
 844         }
 845
 846         /* create dvb_frontend */
 847         state->frontend.ops = &state->ops;
 848         state->frontend.demodulator_priv = state;
 849         return &state->frontend;
 850
 851 error:
 852         kfree(state);
 853
 854         return NULL;
 855 }
 856
 857 static struct dvb_frontend_ops cx24123_ops = {
 858
 859         .info = {
 860                 .name = "Conexant CX24123/CX24109",
 861                 .type = FE_QPSK,
 862                 .frequency_min = 950000,
 863                 .frequency_max = 2150000,
 864                 .frequency_stepsize = 1011, /* kHz for QPSK frontends */
 865                 .frequency_tolerance = 29500,
 866                 .symbol_rate_min = 1000000,
 867                 .symbol_rate_max = 45000000,
 868                 .caps = FE_CAN_INVERSION_AUTO |
 869                         FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
 870                         FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
 871                         FE_CAN_QPSK | FE_CAN_RECOVER
 872         },
 873
 874         .release = cx24123_release,
 875
 876         .init = cx24123_initfe,
 877         .set_frontend = cx24123_set_frontend,
 878         .get_frontend = cx24123_get_frontend,
 879         .read_status = cx24123_read_status,
 880         .read_ber = cx24123_read_ber,
 881         .read_signal_strength = cx24123_read_signal_strength,
 882         .read_snr = cx24123_read_snr,
 883         .read_ucblocks = cx24123_read_ucblocks,
 884         .diseqc_send_master_cmd = cx24123_send_diseqc_msg,
 885         .set_tone = cx24123_set_tone,
 886         .set_voltage = cx24123_set_voltage,
 887 };
 888
 889 module_param(debug, int, 0644);
 890 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
 891
 892 MODULE_DESCRIPTION("DVB Frontend module for Conexant cx24123/cx24109 hardware");
 893 MODULE_AUTHOR("Steven Toth");
 894 MODULE_LICENSE("GPL");
 895
 896 EXPORT_SYMBOL(cx24123_attach);