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[POWERPC] CPM_UART: cpm_uart_set_termios should take ktermios, not termios
[linux-2.6/linux-loongson.git] / drivers / serial / cpm_uart / cpm_uart_core.c
blobb63ff8dd7304d8efd19d174a4ef9201d652ae6ae
1 /*
2 * linux/drivers/serial/cpm_uart.c
3 *
4 * Driver for CPM (SCC/SMC) serial ports; core driver
5 *
6 * Based on arch/ppc/cpm2_io/uart.c by Dan Malek
7 * Based on ppc8xx.c by Thomas Gleixner
8 * Based on drivers/serial/amba.c by Russell King
9 *
10 * Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2)
11 * Pantelis Antoniou (panto@intracom.gr) (CPM1)
12 *
13 * Copyright (C) 2004 Freescale Semiconductor, Inc.
14 * (C) 2004 Intracom, S.A.
15 * (C) 2005-2006 MontaVista Software, Inc.
16 * Vitaly Bordug <vbordug@ru.mvista.com>
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
31 *
32 */
33
34 #include <linux/module.h>
35 #include <linux/tty.h>
36 #include <linux/ioport.h>
37 #include <linux/init.h>
38 #include <linux/serial.h>
39 #include <linux/console.h>
40 #include <linux/sysrq.h>
41 #include <linux/device.h>
42 #include <linux/bootmem.h>
43 #include <linux/dma-mapping.h>
44 #include <linux/fs_uart_pd.h>
45
46 #include <asm/io.h>
47 #include <asm/irq.h>
48 #include <asm/delay.h>
49 #include <asm/fs_pd.h>
50
51 #if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
52 #define SUPPORT_SYSRQ
53 #endif
54
55 #include <linux/serial_core.h>
56 #include <linux/kernel.h>
57
58 #include "cpm_uart.h"
59
60 /***********************************************************************/
61
62 /* Track which ports are configured as uarts */
63 int cpm_uart_port_map[UART_NR];
64 /* How many ports did we config as uarts */
65 int cpm_uart_nr = 0;
66
67 /**************************************************************/
68
69 static int cpm_uart_tx_pump(struct uart_port *port);
70 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo);
71 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo);
72 static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
73
74 /**************************************************************/
75
76
77 /* Place-holder for board-specific stuff */
78 struct platform_device* __attribute__ ((weak)) __init
79 early_uart_get_pdev(int index)
80 {
81 return NULL;
82 }
83
84
85 static void cpm_uart_count(void)
86 {
87 cpm_uart_nr = 0;
88 #ifdef CONFIG_SERIAL_CPM_SMC1
89 cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1;
90 #endif
91 #ifdef CONFIG_SERIAL_CPM_SMC2
92 cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2;
93 #endif
94 #ifdef CONFIG_SERIAL_CPM_SCC1
95 cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1;
96 #endif
97 #ifdef CONFIG_SERIAL_CPM_SCC2
98 cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2;
99 #endif
100 #ifdef CONFIG_SERIAL_CPM_SCC3
101 cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3;
102 #endif
103 #ifdef CONFIG_SERIAL_CPM_SCC4
104 cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4;
105 #endif
106 }
107
108 /* Get UART number by its id */
109 static int cpm_uart_id2nr(int id)
110 {
111 int i;
112 if (id < UART_NR) {
113 for (i=0; i<UART_NR; i++) {
114 if (cpm_uart_port_map[i] == id)
115 return i;
116 }
117 }
118
119 /* not found or invalid argument */
120 return -1;
121 }
122
123 /*
124 * Check, if transmit buffers are processed
125 */
126 static unsigned int cpm_uart_tx_empty(struct uart_port *port)
127 {
128 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
129 volatile cbd_t *bdp = pinfo->tx_bd_base;
130 int ret = 0;
131
132 while (1) {
133 if (bdp->cbd_sc & BD_SC_READY)
134 break;
135
136 if (bdp->cbd_sc & BD_SC_WRAP) {
137 ret = TIOCSER_TEMT;
138 break;
139 }
140 bdp++;
141 }
142
143 pr_debug("CPM uart[%d]:tx_empty: %d\n", port->line, ret);
144
145 return ret;
146 }
147
148 static void cpm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
149 {
150 /* Whee. Do nothing. */
151 }
152
153 static unsigned int cpm_uart_get_mctrl(struct uart_port *port)
154 {
155 /* Whee. Do nothing. */
156 return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
157 }
158
159 /*
160 * Stop transmitter
161 */
162 static void cpm_uart_stop_tx(struct uart_port *port)
163 {
164 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
165 volatile smc_t *smcp = pinfo->smcp;
166 volatile scc_t *sccp = pinfo->sccp;
167
168 pr_debug("CPM uart[%d]:stop tx\n", port->line);
169
170 if (IS_SMC(pinfo))
171 smcp->smc_smcm &= ~SMCM_TX;
172 else
173 sccp->scc_sccm &= ~UART_SCCM_TX;
174 }
175
176 /*
177 * Start transmitter
178 */
179 static void cpm_uart_start_tx(struct uart_port *port)
180 {
181 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
182 volatile smc_t *smcp = pinfo->smcp;
183 volatile scc_t *sccp = pinfo->sccp;
184
185 pr_debug("CPM uart[%d]:start tx\n", port->line);
186
187 if (IS_SMC(pinfo)) {
188 if (smcp->smc_smcm & SMCM_TX)
189 return;
190 } else {
191 if (sccp->scc_sccm & UART_SCCM_TX)
192 return;
193 }
194
195 if (cpm_uart_tx_pump(port) != 0) {
196 if (IS_SMC(pinfo)) {
197 smcp->smc_smcm |= SMCM_TX;
198 } else {
199 sccp->scc_sccm |= UART_SCCM_TX;
200 }
201 }
202 }
203
204 /*
205 * Stop receiver
206 */
207 static void cpm_uart_stop_rx(struct uart_port *port)
208 {
209 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
210 volatile smc_t *smcp = pinfo->smcp;
211 volatile scc_t *sccp = pinfo->sccp;
212
213 pr_debug("CPM uart[%d]:stop rx\n", port->line);
214
215 if (IS_SMC(pinfo))
216 smcp->smc_smcm &= ~SMCM_RX;
217 else
218 sccp->scc_sccm &= ~UART_SCCM_RX;
219 }
220
221 /*
222 * Enable Modem status interrupts
223 */
224 static void cpm_uart_enable_ms(struct uart_port *port)
225 {
226 pr_debug("CPM uart[%d]:enable ms\n", port->line);
227 }
228
229 /*
230 * Generate a break.
231 */
232 static void cpm_uart_break_ctl(struct uart_port *port, int break_state)
233 {
234 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
235 int line = pinfo - cpm_uart_ports;
236
237 pr_debug("CPM uart[%d]:break ctrl, break_state: %d\n", port->line,
238 break_state);
239
240 if (break_state)
241 cpm_line_cr_cmd(line, CPM_CR_STOP_TX);
242 else
243 cpm_line_cr_cmd(line, CPM_CR_RESTART_TX);
244 }
245
246 /*
247 * Transmit characters, refill buffer descriptor, if possible
248 */
249 static void cpm_uart_int_tx(struct uart_port *port)
250 {
251 pr_debug("CPM uart[%d]:TX INT\n", port->line);
252
253 cpm_uart_tx_pump(port);
254 }
255
256 /*
257 * Receive characters
258 */
259 static void cpm_uart_int_rx(struct uart_port *port)
260 {
261 int i;
262 unsigned char ch, *cp;
263 struct tty_struct *tty = port->info->tty;
264 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
265 volatile cbd_t *bdp;
266 u16 status;
267 unsigned int flg;
268
269 pr_debug("CPM uart[%d]:RX INT\n", port->line);
270
271 /* Just loop through the closed BDs and copy the characters into
272 * the buffer.
273 */
274 bdp = pinfo->rx_cur;
275 for (;;) {
276 /* get status */
277 status = bdp->cbd_sc;
278 /* If this one is empty, return happy */
279 if (status & BD_SC_EMPTY)
280 break;
281
282 /* get number of characters, and check spce in flip-buffer */
283 i = bdp->cbd_datlen;
284
285 /* If we have not enough room in tty flip buffer, then we try
286 * later, which will be the next rx-interrupt or a timeout
287 */
288 if(tty_buffer_request_room(tty, i) < i) {
289 printk(KERN_WARNING "No room in flip buffer\n");
290 return;
291 }
292
293 /* get pointer */
294 cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
295
296 /* loop through the buffer */
297 while (i-- > 0) {
298 ch = *cp++;
299 port->icount.rx++;
300 flg = TTY_NORMAL;
301
302 if (status &
303 (BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV))
304 goto handle_error;
305 if (uart_handle_sysrq_char(port, ch))
306 continue;
307
308 error_return:
309 tty_insert_flip_char(tty, ch, flg);
310
311 } /* End while (i--) */
312
313 /* This BD is ready to be used again. Clear status. get next */
314 bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV | BD_SC_ID);
315 bdp->cbd_sc |= BD_SC_EMPTY;
316
317 if (bdp->cbd_sc & BD_SC_WRAP)
318 bdp = pinfo->rx_bd_base;
319 else
320 bdp++;
321
322 } /* End for (;;) */
323
324 /* Write back buffer pointer */
325 pinfo->rx_cur = (volatile cbd_t *) bdp;
326
327 /* activate BH processing */
328 tty_flip_buffer_push(tty);
329
330 return;
331
332 /* Error processing */
333
334 handle_error:
335 /* Statistics */
336 if (status & BD_SC_BR)
337 port->icount.brk++;
338 if (status & BD_SC_PR)
339 port->icount.parity++;
340 if (status & BD_SC_FR)
341 port->icount.frame++;
342 if (status & BD_SC_OV)
343 port->icount.overrun++;
344
345 /* Mask out ignored conditions */
346 status &= port->read_status_mask;
347
348 /* Handle the remaining ones */
349 if (status & BD_SC_BR)
350 flg = TTY_BREAK;
351 else if (status & BD_SC_PR)
352 flg = TTY_PARITY;
353 else if (status & BD_SC_FR)
354 flg = TTY_FRAME;
355
356 /* overrun does not affect the current character ! */
357 if (status & BD_SC_OV) {
358 ch = 0;
359 flg = TTY_OVERRUN;
360 /* We skip this buffer */
361 /* CHECK: Is really nothing senseful there */
362 /* ASSUMPTION: it contains nothing valid */
363 i = 0;
364 }
365 #ifdef SUPPORT_SYSRQ
366 port->sysrq = 0;
367 #endif
368 goto error_return;
369 }
370
371 /*
372 * Asynchron mode interrupt handler
373 */
374 static irqreturn_t cpm_uart_int(int irq, void *data)
375 {
376 u8 events;
377 struct uart_port *port = (struct uart_port *)data;
378 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
379 volatile smc_t *smcp = pinfo->smcp;
380 volatile scc_t *sccp = pinfo->sccp;
381
382 pr_debug("CPM uart[%d]:IRQ\n", port->line);
383
384 if (IS_SMC(pinfo)) {
385 events = smcp->smc_smce;
386 smcp->smc_smce = events;
387 if (events & SMCM_BRKE)
388 uart_handle_break(port);
389 if (events & SMCM_RX)
390 cpm_uart_int_rx(port);
391 if (events & SMCM_TX)
392 cpm_uart_int_tx(port);
393 } else {
394 events = sccp->scc_scce;
395 sccp->scc_scce = events;
396 if (events & UART_SCCM_BRKE)
397 uart_handle_break(port);
398 if (events & UART_SCCM_RX)
399 cpm_uart_int_rx(port);
400 if (events & UART_SCCM_TX)
401 cpm_uart_int_tx(port);
402 }
403 return (events) ? IRQ_HANDLED : IRQ_NONE;
404 }
405
406 static int cpm_uart_startup(struct uart_port *port)
407 {
408 int retval;
409 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
410 int line = pinfo - cpm_uart_ports;
411
412 pr_debug("CPM uart[%d]:startup\n", port->line);
413
414 /* Install interrupt handler. */
415 retval = request_irq(port->irq, cpm_uart_int, 0, "cpm_uart", port);
416 if (retval)
417 return retval;
418
419 /* Startup rx-int */
420 if (IS_SMC(pinfo)) {
421 pinfo->smcp->smc_smcm |= SMCM_RX;
422 pinfo->smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
423 } else {
424 pinfo->sccp->scc_sccm |= UART_SCCM_RX;
425 pinfo->sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
426 }
427
428 if (!(pinfo->flags & FLAG_CONSOLE))
429 cpm_line_cr_cmd(line,CPM_CR_INIT_TRX);
430 return 0;
431 }
432
433 inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo)
434 {
435 set_current_state(TASK_UNINTERRUPTIBLE);
436 schedule_timeout(pinfo->wait_closing);
437 }
438
439 /*
440 * Shutdown the uart
441 */
442 static void cpm_uart_shutdown(struct uart_port *port)
443 {
444 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
445 int line = pinfo - cpm_uart_ports;
446
447 pr_debug("CPM uart[%d]:shutdown\n", port->line);
448
449 /* free interrupt handler */
450 free_irq(port->irq, port);
451
452 /* If the port is not the console, disable Rx and Tx. */
453 if (!(pinfo->flags & FLAG_CONSOLE)) {
454 /* Wait for all the BDs marked sent */
455 while(!cpm_uart_tx_empty(port)) {
456 set_current_state(TASK_UNINTERRUPTIBLE);
457 schedule_timeout(2);
458 }
459
460 if (pinfo->wait_closing)
461 cpm_uart_wait_until_send(pinfo);
462
463 /* Stop uarts */
464 if (IS_SMC(pinfo)) {
465 volatile smc_t *smcp = pinfo->smcp;
466 smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
467 smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
468 } else {
469 volatile scc_t *sccp = pinfo->sccp;
470 sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
471 sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
472 }
473
474 /* Shut them really down and reinit buffer descriptors */
475 if (IS_SMC(pinfo))
476 cpm_line_cr_cmd(line, CPM_CR_STOP_TX);
477 else
478 cpm_line_cr_cmd(line, CPM_CR_GRA_STOP_TX);
479
480 cpm_uart_initbd(pinfo);
481 }
482 }
483
484 static void cpm_uart_set_termios(struct uart_port *port,
485 struct ktermios *termios,
486 struct ktermios *old)
487 {
488 int baud;
489 unsigned long flags;
490 u16 cval, scval, prev_mode;
491 int bits, sbits;
492 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
493 volatile smc_t *smcp = pinfo->smcp;
494 volatile scc_t *sccp = pinfo->sccp;
495
496 pr_debug("CPM uart[%d]:set_termios\n", port->line);
497
498 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
499
500 /* Character length programmed into the mode register is the
501 * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
502 * 1 or 2 stop bits, minus 1.
503 * The value 'bits' counts this for us.
504 */
505 cval = 0;
506 scval = 0;
507
508 /* byte size */
509 switch (termios->c_cflag & CSIZE) {
510 case CS5:
511 bits = 5;
512 break;
513 case CS6:
514 bits = 6;
515 break;
516 case CS7:
517 bits = 7;
518 break;
519 case CS8:
520 bits = 8;
521 break;
522 /* Never happens, but GCC is too dumb to figure it out */
523 default:
524 bits = 8;
525 break;
526 }
527 sbits = bits - 5;
528
529 if (termios->c_cflag & CSTOPB) {
530 cval |= SMCMR_SL; /* Two stops */
531 scval |= SCU_PSMR_SL;
532 bits++;
533 }
534
535 if (termios->c_cflag & PARENB) {
536 cval |= SMCMR_PEN;
537 scval |= SCU_PSMR_PEN;
538 bits++;
539 if (!(termios->c_cflag & PARODD)) {
540 cval |= SMCMR_PM_EVEN;
541 scval |= (SCU_PSMR_REVP | SCU_PSMR_TEVP);
542 }
543 }
544
545 /*
546 * Set up parity check flag
547 */
548 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
549
550 port->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
551 if (termios->c_iflag & INPCK)
552 port->read_status_mask |= BD_SC_FR | BD_SC_PR;
553 if ((termios->c_iflag & BRKINT) || (termios->c_iflag & PARMRK))
554 port->read_status_mask |= BD_SC_BR;
555
556 /*
557 * Characters to ignore
558 */
559 port->ignore_status_mask = 0;
560 if (termios->c_iflag & IGNPAR)
561 port->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
562 if (termios->c_iflag & IGNBRK) {
563 port->ignore_status_mask |= BD_SC_BR;
564 /*
565 * If we're ignore parity and break indicators, ignore
566 * overruns too. (For real raw support).
567 */
568 if (termios->c_iflag & IGNPAR)
569 port->ignore_status_mask |= BD_SC_OV;
570 }
571 /*
572 * !!! ignore all characters if CREAD is not set
573 */
574 if ((termios->c_cflag & CREAD) == 0)
575 port->read_status_mask &= ~BD_SC_EMPTY;
576
577 spin_lock_irqsave(&port->lock, flags);
578
579 /* Start bit has not been added (so don't, because we would just
580 * subtract it later), and we need to add one for the number of
581 * stops bits (there is always at least one).
582 */
583 bits++;
584 if (IS_SMC(pinfo)) {
585 /* Set the mode register. We want to keep a copy of the
586 * enables, because we want to put them back if they were
587 * present.
588 */
589 prev_mode = smcp->smc_smcmr;
590 smcp->smc_smcmr = smcr_mk_clen(bits) | cval | SMCMR_SM_UART;
591 smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
592 } else {
593 sccp->scc_psmr = (sbits << 12) | scval;
594 }
595
596 cpm_set_brg(pinfo->brg - 1, baud);
597 spin_unlock_irqrestore(&port->lock, flags);
598
599 }
600
601 static const char *cpm_uart_type(struct uart_port *port)
602 {
603 pr_debug("CPM uart[%d]:uart_type\n", port->line);
604
605 return port->type == PORT_CPM ? "CPM UART" : NULL;
606 }
607
608 /*
609 * verify the new serial_struct (for TIOCSSERIAL).
610 */
611 static int cpm_uart_verify_port(struct uart_port *port,
612 struct serial_struct *ser)
613 {
614 int ret = 0;
615
616 pr_debug("CPM uart[%d]:verify_port\n", port->line);
617
618 if (ser->type != PORT_UNKNOWN && ser->type != PORT_CPM)
619 ret = -EINVAL;
620 if (ser->irq < 0 || ser->irq >= NR_IRQS)
621 ret = -EINVAL;
622 if (ser->baud_base < 9600)
623 ret = -EINVAL;
624 return ret;
625 }
626
627 /*
628 * Transmit characters, refill buffer descriptor, if possible
629 */
630 static int cpm_uart_tx_pump(struct uart_port *port)
631 {
632 volatile cbd_t *bdp;
633 unsigned char *p;
634 int count;
635 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
636 struct circ_buf *xmit = &port->info->xmit;
637
638 /* Handle xon/xoff */
639 if (port->x_char) {
640 /* Pick next descriptor and fill from buffer */
641 bdp = pinfo->tx_cur;
642
643 p = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
644
645 *p++ = port->x_char;
646 bdp->cbd_datlen = 1;
647 bdp->cbd_sc |= BD_SC_READY;
648 /* Get next BD. */
649 if (bdp->cbd_sc & BD_SC_WRAP)
650 bdp = pinfo->tx_bd_base;
651 else
652 bdp++;
653 pinfo->tx_cur = bdp;
654
655 port->icount.tx++;
656 port->x_char = 0;
657 return 1;
658 }
659
660 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
661 cpm_uart_stop_tx(port);
662 return 0;
663 }
664
665 /* Pick next descriptor and fill from buffer */
666 bdp = pinfo->tx_cur;
667
668 while (!(bdp->cbd_sc & BD_SC_READY) && (xmit->tail != xmit->head)) {
669 count = 0;
670 p = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
671 while (count < pinfo->tx_fifosize) {
672 *p++ = xmit->buf[xmit->tail];
673 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
674 port->icount.tx++;
675 count++;
676 if (xmit->head == xmit->tail)
677 break;
678 }
679 bdp->cbd_datlen = count;
680 bdp->cbd_sc |= BD_SC_READY;
681 __asm__("eieio");
682 /* Get next BD. */
683 if (bdp->cbd_sc & BD_SC_WRAP)
684 bdp = pinfo->tx_bd_base;
685 else
686 bdp++;
687 }
688 pinfo->tx_cur = bdp;
689
690 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
691 uart_write_wakeup(port);
692
693 if (uart_circ_empty(xmit)) {
694 cpm_uart_stop_tx(port);
695 return 0;
696 }
697
698 return 1;
699 }
700
701 /*
702 * init buffer descriptors
703 */
704 static void cpm_uart_initbd(struct uart_cpm_port *pinfo)
705 {
706 int i;
707 u8 *mem_addr;
708 volatile cbd_t *bdp;
709
710 pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line);
711
712 /* Set the physical address of the host memory
713 * buffers in the buffer descriptors, and the
714 * virtual address for us to work with.
715 */
716 mem_addr = pinfo->mem_addr;
717 bdp = pinfo->rx_cur = pinfo->rx_bd_base;
718 for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) {
719 bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo);
720 bdp->cbd_sc = BD_SC_EMPTY | BD_SC_INTRPT;
721 mem_addr += pinfo->rx_fifosize;
722 }
723
724 bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo);
725 bdp->cbd_sc = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;
726
727 /* Set the physical address of the host memory
728 * buffers in the buffer descriptors, and the
729 * virtual address for us to work with.
730 */
731 mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize);
732 bdp = pinfo->tx_cur = pinfo->tx_bd_base;
733 for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) {
734 bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo);
735 bdp->cbd_sc = BD_SC_INTRPT;
736 mem_addr += pinfo->tx_fifosize;
737 }
738
739 bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo);
740 bdp->cbd_sc = BD_SC_WRAP | BD_SC_INTRPT;
741 }
742
743 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
744 {
745 int line = pinfo - cpm_uart_ports;
746 volatile scc_t *scp;
747 volatile scc_uart_t *sup;
748
749 pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line);
750
751 scp = pinfo->sccp;
752 sup = pinfo->sccup;
753
754 /* Store address */
755 pinfo->sccup->scc_genscc.scc_rbase = (unsigned char *)pinfo->rx_bd_base - DPRAM_BASE;
756 pinfo->sccup->scc_genscc.scc_tbase = (unsigned char *)pinfo->tx_bd_base - DPRAM_BASE;
757
758 /* Set up the uart parameters in the
759 * parameter ram.
760 */
761
762 cpm_set_scc_fcr(sup);
763
764 sup->scc_genscc.scc_mrblr = pinfo->rx_fifosize;
765 sup->scc_maxidl = pinfo->rx_fifosize;
766 sup->scc_brkcr = 1;
767 sup->scc_parec = 0;
768 sup->scc_frmec = 0;
769 sup->scc_nosec = 0;
770 sup->scc_brkec = 0;
771 sup->scc_uaddr1 = 0;
772 sup->scc_uaddr2 = 0;
773 sup->scc_toseq = 0;
774 sup->scc_char1 = 0x8000;
775 sup->scc_char2 = 0x8000;
776 sup->scc_char3 = 0x8000;
777 sup->scc_char4 = 0x8000;
778 sup->scc_char5 = 0x8000;
779 sup->scc_char6 = 0x8000;
780 sup->scc_char7 = 0x8000;
781 sup->scc_char8 = 0x8000;
782 sup->scc_rccm = 0xc0ff;
783
784 /* Send the CPM an initialize command.
785 */
786 cpm_line_cr_cmd(line, CPM_CR_INIT_TRX);
787
788 /* Set UART mode, 8 bit, no parity, one stop.
789 * Enable receive and transmit.
790 */
791 scp->scc_gsmrh = 0;
792 scp->scc_gsmrl =
793 (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
794
795 /* Enable rx interrupts and clear all pending events. */
796 scp->scc_sccm = 0;
797 scp->scc_scce = 0xffff;
798 scp->scc_dsr = 0x7e7e;
799 scp->scc_psmr = 0x3000;
800
801 scp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
802 }
803
804 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
805 {
806 int line = pinfo - cpm_uart_ports;
807 volatile smc_t *sp;
808 volatile smc_uart_t *up;
809
810 pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line);
811
812 sp = pinfo->smcp;
813 up = pinfo->smcup;
814
815 /* Store address */
816 pinfo->smcup->smc_rbase = (u_char *)pinfo->rx_bd_base - DPRAM_BASE;
817 pinfo->smcup->smc_tbase = (u_char *)pinfo->tx_bd_base - DPRAM_BASE;
818
819 /*
820 * In case SMC1 is being relocated...
821 */
822 #if defined (CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
823 up->smc_rbptr = pinfo->smcup->smc_rbase;
824 up->smc_tbptr = pinfo->smcup->smc_tbase;
825 up->smc_rstate = 0;
826 up->smc_tstate = 0;
827 up->smc_brkcr = 1; /* number of break chars */
828 up->smc_brkec = 0;
829 #endif
830
831 /* Set up the uart parameters in the
832 * parameter ram.
833 */
834 cpm_set_smc_fcr(up);
835
836 /* Using idle charater time requires some additional tuning. */
837 up->smc_mrblr = pinfo->rx_fifosize;
838 up->smc_maxidl = pinfo->rx_fifosize;
839 up->smc_brklen = 0;
840 up->smc_brkec = 0;
841 up->smc_brkcr = 1;
842
843 cpm_line_cr_cmd(line, CPM_CR_INIT_TRX);
844
845 /* Set UART mode, 8 bit, no parity, one stop.
846 * Enable receive and transmit.
847 */
848 sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
849
850 /* Enable only rx interrupts clear all pending events. */
851 sp->smc_smcm = 0;
852 sp->smc_smce = 0xff;
853
854 sp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
855 }
856
857 /*
858 * Initialize port. This is called from early_console stuff
859 * so we have to be careful here !
860 */
861 static int cpm_uart_request_port(struct uart_port *port)
862 {
863 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
864 int ret;
865
866 pr_debug("CPM uart[%d]:request port\n", port->line);
867
868 if (pinfo->flags & FLAG_CONSOLE)
869 return 0;
870
871 if (IS_SMC(pinfo)) {
872 pinfo->smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
873 pinfo->smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
874 } else {
875 pinfo->sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
876 pinfo->sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
877 }
878
879 ret = cpm_uart_allocbuf(pinfo, 0);
880
881 if (ret)
882 return ret;
883
884 cpm_uart_initbd(pinfo);
885 if (IS_SMC(pinfo))
886 cpm_uart_init_smc(pinfo);
887 else
888 cpm_uart_init_scc(pinfo);
889
890 return 0;
891 }
892
893 static void cpm_uart_release_port(struct uart_port *port)
894 {
895 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
896
897 if (!(pinfo->flags & FLAG_CONSOLE))
898 cpm_uart_freebuf(pinfo);
899 }
900
901 /*
902 * Configure/autoconfigure the port.
903 */
904 static void cpm_uart_config_port(struct uart_port *port, int flags)
905 {
906 pr_debug("CPM uart[%d]:config_port\n", port->line);
907
908 if (flags & UART_CONFIG_TYPE) {
909 port->type = PORT_CPM;
910 cpm_uart_request_port(port);
911 }
912 }
913 static struct uart_ops cpm_uart_pops = {
914 .tx_empty = cpm_uart_tx_empty,
915 .set_mctrl = cpm_uart_set_mctrl,
916 .get_mctrl = cpm_uart_get_mctrl,
917 .stop_tx = cpm_uart_stop_tx,
918 .start_tx = cpm_uart_start_tx,
919 .stop_rx = cpm_uart_stop_rx,
920 .enable_ms = cpm_uart_enable_ms,
921 .break_ctl = cpm_uart_break_ctl,
922 .startup = cpm_uart_startup,
923 .shutdown = cpm_uart_shutdown,
924 .set_termios = cpm_uart_set_termios,
925 .type = cpm_uart_type,
926 .release_port = cpm_uart_release_port,
927 .request_port = cpm_uart_request_port,
928 .config_port = cpm_uart_config_port,
929 .verify_port = cpm_uart_verify_port,
930 };
931
932 struct uart_cpm_port cpm_uart_ports[UART_NR] = {
933 [UART_SMC1] = {
934 .port = {
935 .irq = SMC1_IRQ,
936 .ops = &cpm_uart_pops,
937 .iotype = UPIO_MEM,
938 .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SMC1].port.lock),
939 },
940 .flags = FLAG_SMC,
941 .tx_nrfifos = TX_NUM_FIFO,
942 .tx_fifosize = TX_BUF_SIZE,
943 .rx_nrfifos = RX_NUM_FIFO,
944 .rx_fifosize = RX_BUF_SIZE,
945 .set_lineif = smc1_lineif,
946 },
947 [UART_SMC2] = {
948 .port = {
949 .irq = SMC2_IRQ,
950 .ops = &cpm_uart_pops,
951 .iotype = UPIO_MEM,
952 .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SMC2].port.lock),
953 },
954 .flags = FLAG_SMC,
955 .tx_nrfifos = TX_NUM_FIFO,
956 .tx_fifosize = TX_BUF_SIZE,
957 .rx_nrfifos = RX_NUM_FIFO,
958 .rx_fifosize = RX_BUF_SIZE,
959 .set_lineif = smc2_lineif,
960 #ifdef CONFIG_SERIAL_CPM_ALT_SMC2
961 .is_portb = 1,
962 #endif
963 },
964 [UART_SCC1] = {
965 .port = {
966 .irq = SCC1_IRQ,
967 .ops = &cpm_uart_pops,
968 .iotype = UPIO_MEM,
969 .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC1].port.lock),
970 },
971 .tx_nrfifos = TX_NUM_FIFO,
972 .tx_fifosize = TX_BUF_SIZE,
973 .rx_nrfifos = RX_NUM_FIFO,
974 .rx_fifosize = RX_BUF_SIZE,
975 .set_lineif = scc1_lineif,
976 .wait_closing = SCC_WAIT_CLOSING,
977 },
978 [UART_SCC2] = {
979 .port = {
980 .irq = SCC2_IRQ,
981 .ops = &cpm_uart_pops,
982 .iotype = UPIO_MEM,
983 .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC2].port.lock),
984 },
985 .tx_nrfifos = TX_NUM_FIFO,
986 .tx_fifosize = TX_BUF_SIZE,
987 .rx_nrfifos = RX_NUM_FIFO,
988 .rx_fifosize = RX_BUF_SIZE,
989 .set_lineif = scc2_lineif,
990 .wait_closing = SCC_WAIT_CLOSING,
991 },
992 [UART_SCC3] = {
993 .port = {
994 .irq = SCC3_IRQ,
995 .ops = &cpm_uart_pops,
996 .iotype = UPIO_MEM,
997 .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC3].port.lock),
998 },
999 .tx_nrfifos = TX_NUM_FIFO,
1000 .tx_fifosize = TX_BUF_SIZE,
1001 .rx_nrfifos = RX_NUM_FIFO,
1002 .rx_fifosize = RX_BUF_SIZE,
1003 .set_lineif = scc3_lineif,
1004 .wait_closing = SCC_WAIT_CLOSING,
1005 },
1006 [UART_SCC4] = {
1007 .port = {
1008 .irq = SCC4_IRQ,
1009 .ops = &cpm_uart_pops,
1010 .iotype = UPIO_MEM,
1011 .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC4].port.lock),
1012 },
1013 .tx_nrfifos = TX_NUM_FIFO,
1014 .tx_fifosize = TX_BUF_SIZE,
1015 .rx_nrfifos = RX_NUM_FIFO,
1016 .rx_fifosize = RX_BUF_SIZE,
1017 .set_lineif = scc4_lineif,
1018 .wait_closing = SCC_WAIT_CLOSING,
1019 },
1020 };
1021
1022 int cpm_uart_drv_get_platform_data(struct platform_device *pdev, int is_con)
1023 {
1024 struct resource *r;
1025 struct fs_uart_platform_info *pdata = pdev->dev.platform_data;
1026 int idx; /* It is UART_SMCx or UART_SCCx index */
1027 struct uart_cpm_port *pinfo;
1028 int line;
1029 u32 mem, pram;
1030
1031 idx = pdata->fs_no = fs_uart_get_id(pdata);
1032
1033 line = cpm_uart_id2nr(idx);
1034 if(line < 0) {
1035 printk(KERN_ERR"%s(): port %d is not registered", __FUNCTION__, idx);
1036 return -EINVAL;
1037 }
1038
1039 pinfo = (struct uart_cpm_port *) &cpm_uart_ports[idx];
1040
1041 pinfo->brg = pdata->brg;
1042
1043 if (!is_con) {
1044 pinfo->port.line = line;
1045 pinfo->port.flags = UPF_BOOT_AUTOCONF;
1046 }
1047
1048 if (!(r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs")))
1049 return -EINVAL;
1050 mem = (u32)ioremap(r->start, r->end - r->start + 1);
1051
1052 if (!(r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pram")))
1053 return -EINVAL;
1054 pram = (u32)ioremap(r->start, r->end - r->start + 1);
1055
1056 if(idx > fsid_smc2_uart) {
1057 pinfo->sccp = (scc_t *)mem;
1058 pinfo->sccup = (scc_uart_t *)pram;
1059 } else {
1060 pinfo->smcp = (smc_t *)mem;
1061 pinfo->smcup = (smc_uart_t *)pram;
1062 }
1063 pinfo->tx_nrfifos = pdata->tx_num_fifo;
1064 pinfo->tx_fifosize = pdata->tx_buf_size;
1065
1066 pinfo->rx_nrfifos = pdata->rx_num_fifo;
1067 pinfo->rx_fifosize = pdata->rx_buf_size;
1068
1069 pinfo->port.uartclk = pdata->uart_clk;
1070 pinfo->port.mapbase = (unsigned long)mem;
1071 pinfo->port.irq = platform_get_irq(pdev, 0);
1072
1073 return 0;
1074 }
1075
1076 #ifdef CONFIG_SERIAL_CPM_CONSOLE
1077 /*
1078 * Print a string to the serial port trying not to disturb
1079 * any possible real use of the port...
1080 *
1081 * Note that this is called with interrupts already disabled
1082 */
1083 static void cpm_uart_console_write(struct console *co, const char *s,
1084 u_int count)
1085 {
1086 struct uart_cpm_port *pinfo =
1087 &cpm_uart_ports[cpm_uart_port_map[co->index]];
1088 unsigned int i;
1089 volatile cbd_t *bdp, *bdbase;
1090 volatile unsigned char *cp;
1091
1092 /* Get the address of the host memory buffer.
1093 */
1094 bdp = pinfo->tx_cur;
1095 bdbase = pinfo->tx_bd_base;
1096
1097 /*
1098 * Now, do each character. This is not as bad as it looks
1099 * since this is a holding FIFO and not a transmitting FIFO.
1100 * We could add the complexity of filling the entire transmit
1101 * buffer, but we would just wait longer between accesses......
1102 */
1103 for (i = 0; i < count; i++, s++) {
1104 /* Wait for transmitter fifo to empty.
1105 * Ready indicates output is ready, and xmt is doing
1106 * that, not that it is ready for us to send.
1107 */
1108 while ((bdp->cbd_sc & BD_SC_READY) != 0)
1109 ;
1110
1111 /* Send the character out.
1112 * If the buffer address is in the CPM DPRAM, don't
1113 * convert it.
1114 */
1115 cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
1116
1117 *cp = *s;
1118
1119 bdp->cbd_datlen = 1;
1120 bdp->cbd_sc |= BD_SC_READY;
1121
1122 if (bdp->cbd_sc & BD_SC_WRAP)
1123 bdp = bdbase;
1124 else
1125 bdp++;
1126
1127 /* if a LF, also do CR... */
1128 if (*s == 10) {
1129 while ((bdp->cbd_sc & BD_SC_READY) != 0)
1130 ;
1131
1132 cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
1133
1134 *cp = 13;
1135 bdp->cbd_datlen = 1;
1136 bdp->cbd_sc |= BD_SC_READY;
1137
1138 if (bdp->cbd_sc & BD_SC_WRAP)
1139 bdp = bdbase;
1140 else
1141 bdp++;
1142 }
1143 }
1144
1145 /*
1146 * Finally, Wait for transmitter & holding register to empty
1147 * and restore the IER
1148 */
1149 while ((bdp->cbd_sc & BD_SC_READY) != 0)
1150 ;
1151
1152 pinfo->tx_cur = (volatile cbd_t *) bdp;
1153 }
1154
1155
1156 static int __init cpm_uart_console_setup(struct console *co, char *options)
1157 {
1158 struct uart_port *port;
1159 struct uart_cpm_port *pinfo;
1160 int baud = 38400;
1161 int bits = 8;
1162 int parity = 'n';
1163 int flow = 'n';
1164 int ret;
1165
1166 struct fs_uart_platform_info *pdata;
1167 struct platform_device* pdev = early_uart_get_pdev(co->index);
1168
1169 if (!pdev) {
1170 pr_info("cpm_uart: console: compat mode\n");
1171 /* compatibility - will be cleaned up */
1172 cpm_uart_init_portdesc();
1173 }
1174
1175 port =
1176 (struct uart_port *)&cpm_uart_ports[cpm_uart_port_map[co->index]];
1177 pinfo = (struct uart_cpm_port *)port;
1178 if (!pdev) {
1179 if (pinfo->set_lineif)
1180 pinfo->set_lineif(pinfo);
1181 } else {
1182 pdata = pdev->dev.platform_data;
1183 if (pdata)
1184 if (pdata->init_ioports)
1185 pdata->init_ioports(pdata);
1186
1187 cpm_uart_drv_get_platform_data(pdev, 1);
1188 }
1189
1190 pinfo->flags |= FLAG_CONSOLE;
1191
1192 if (options) {
1193 uart_parse_options(options, &baud, &parity, &bits, &flow);
1194 } else {
1195 if ((baud = uart_baudrate()) == -1)
1196 baud = 9600;
1197 }
1198
1199 if (IS_SMC(pinfo)) {
1200 pinfo->smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
1201 pinfo->smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
1202 } else {
1203 pinfo->sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
1204 pinfo->sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
1205 }
1206
1207 ret = cpm_uart_allocbuf(pinfo, 1);
1208
1209 if (ret)
1210 return ret;
1211
1212 cpm_uart_initbd(pinfo);
1213
1214 if (IS_SMC(pinfo))
1215 cpm_uart_init_smc(pinfo);
1216 else
1217 cpm_uart_init_scc(pinfo);
1218
1219 uart_set_options(port, co, baud, parity, bits, flow);
1220
1221 return 0;
1222 }
1223
1224 static struct uart_driver cpm_reg;
1225 static struct console cpm_scc_uart_console = {
1226 .name = "ttyCPM",
1227 .write = cpm_uart_console_write,
1228 .device = uart_console_device,
1229 .setup = cpm_uart_console_setup,
1230 .flags = CON_PRINTBUFFER,
1231 .index = -1,
1232 .data = &cpm_reg,
1233 };
1234
1235 int __init cpm_uart_console_init(void)
1236 {
1237 register_console(&cpm_scc_uart_console);
1238 return 0;
1239 }
1240
1241 console_initcall(cpm_uart_console_init);
1242
1243 #define CPM_UART_CONSOLE &cpm_scc_uart_console
1244 #else
1245 #define CPM_UART_CONSOLE NULL
1246 #endif
1247
1248 static struct uart_driver cpm_reg = {
1249 .owner = THIS_MODULE,
1250 .driver_name = "ttyCPM",
1251 .dev_name = "ttyCPM",
1252 .major = SERIAL_CPM_MAJOR,
1253 .minor = SERIAL_CPM_MINOR,
1254 .cons = CPM_UART_CONSOLE,
1255 };
1256 static int cpm_uart_drv_probe(struct device *dev)
1257 {
1258 struct platform_device *pdev = to_platform_device(dev);
1259 struct fs_uart_platform_info *pdata;
1260 int ret = -ENODEV;
1261
1262 if(!pdev) {
1263 printk(KERN_ERR"CPM UART: platform data missing!\n");
1264 return ret;
1265 }
1266
1267 pdata = pdev->dev.platform_data;
1268
1269 if ((ret = cpm_uart_drv_get_platform_data(pdev, 0)))
1270 return ret;
1271
1272 pr_debug("cpm_uart_drv_probe: Adding CPM UART %d\n", cpm_uart_id2nr(pdata->fs_no));
1273
1274 if (pdata->init_ioports)
1275 pdata->init_ioports(pdata);
1276
1277 ret = uart_add_one_port(&cpm_reg, &cpm_uart_ports[pdata->fs_no].port);
1278
1279 return ret;
1280 }
1281
1282 static int cpm_uart_drv_remove(struct device *dev)
1283 {
1284 struct platform_device *pdev = to_platform_device(dev);
1285 struct fs_uart_platform_info *pdata = pdev->dev.platform_data;
1286
1287 pr_debug("cpm_uart_drv_remove: Removing CPM UART %d\n",
1288 cpm_uart_id2nr(pdata->fs_no));
1289
1290 uart_remove_one_port(&cpm_reg, &cpm_uart_ports[pdata->fs_no].port);
1291 return 0;
1292 }
1293
1294 static struct device_driver cpm_smc_uart_driver = {
1295 .name = "fsl-cpm-smc:uart",
1296 .bus = &platform_bus_type,
1297 .probe = cpm_uart_drv_probe,
1298 .remove = cpm_uart_drv_remove,
1299 };
1300
1301 static struct device_driver cpm_scc_uart_driver = {
1302 .name = "fsl-cpm-scc:uart",
1303 .bus = &platform_bus_type,
1304 .probe = cpm_uart_drv_probe,
1305 .remove = cpm_uart_drv_remove,
1306 };
1307
1308 /*
1309 This is supposed to match uart devices on platform bus,
1310 */
1311 static int match_is_uart (struct device* dev, void* data)
1312 {
1313 struct platform_device* pdev = container_of(dev, struct platform_device, dev);
1314 int ret = 0;
1315 /* this was setfunc as uart */
1316 if(strstr(pdev->name,":uart")) {
1317 ret = 1;
1318 }
1319 return ret;
1320 }
1321
1322
1323 static int cpm_uart_init(void) {
1324
1325 int ret;
1326 int i;
1327 struct device *dev;
1328 printk(KERN_INFO "Serial: CPM driver $Revision: 0.02 $\n");
1329
1330 /* lookup the bus for uart devices */
1331 dev = bus_find_device(&platform_bus_type, NULL, 0, match_is_uart);
1332
1333 /* There are devices on the bus - all should be OK */
1334 if (dev) {
1335 cpm_uart_count();
1336 cpm_reg.nr = cpm_uart_nr;
1337
1338 if (!(ret = uart_register_driver(&cpm_reg))) {
1339 if ((ret = driver_register(&cpm_smc_uart_driver))) {
1340 uart_unregister_driver(&cpm_reg);
1341 return ret;
1342 }
1343 if ((ret = driver_register(&cpm_scc_uart_driver))) {
1344 driver_unregister(&cpm_scc_uart_driver);
1345 uart_unregister_driver(&cpm_reg);
1346 }
1347 }
1348 } else {
1349 /* No capable platform devices found - falling back to legacy mode */
1350 pr_info("cpm_uart: WARNING: no UART devices found on platform bus!\n");
1351 pr_info(
1352 "cpm_uart: the driver will guess configuration, but this mode is no longer supported.\n");
1353
1354 /* Don't run this again, if the console driver did it already */
1355 if (cpm_uart_nr == 0)
1356 cpm_uart_init_portdesc();
1357
1358 cpm_reg.nr = cpm_uart_nr;
1359 ret = uart_register_driver(&cpm_reg);
1360
1361 if (ret)
1362 return ret;
1363
1364 for (i = 0; i < cpm_uart_nr; i++) {
1365 int con = cpm_uart_port_map[i];
1366 cpm_uart_ports[con].port.line = i;
1367 cpm_uart_ports[con].port.flags = UPF_BOOT_AUTOCONF;
1368 if (cpm_uart_ports[con].set_lineif)
1369 cpm_uart_ports[con].set_lineif(&cpm_uart_ports[con]);
1370 uart_add_one_port(&cpm_reg, &cpm_uart_ports[con].port);
1371 }
1372
1373 }
1374 return ret;
1375 }
1376
1377 static void __exit cpm_uart_exit(void)
1378 {
1379 driver_unregister(&cpm_scc_uart_driver);
1380 driver_unregister(&cpm_smc_uart_driver);
1381 uart_unregister_driver(&cpm_reg);
1382 }
1383
1384 module_init(cpm_uart_init);
1385 module_exit(cpm_uart_exit);
1386
1387 MODULE_AUTHOR("Kumar Gala/Antoniou Pantelis");
1388 MODULE_DESCRIPTION("CPM SCC/SMC port driver $Revision: 0.01 $");
1389 MODULE_LICENSE("GPL");
1390 MODULE_ALIAS_CHARDEV(SERIAL_CPM_MAJOR, SERIAL_CPM_MINOR);
linux kernel for loongson