2 * SiS AGPGART routines.
5 #include <linux/module.h>
7 #include <linux/init.h>
8 #include <linux/agp_backend.h>
9 #include <linux/delay.h>
12 #define SIS_ATTBASE 0x90
13 #define SIS_APSIZE 0x94
14 #define SIS_TLBCNTRL 0x97
15 #define SIS_TLBFLUSH 0x98
17 static int __devinitdata agp_sis_force_delay
= 0;
18 static int __devinitdata agp_sis_agp_spec
= -1;
20 static int sis_fetch_size(void)
24 struct aper_size_info_8
*values
;
26 pci_read_config_byte(agp_bridge
->dev
, SIS_APSIZE
, &temp_size
);
27 values
= A_SIZE_8(agp_bridge
->driver
->aperture_sizes
);
28 for (i
= 0; i
< agp_bridge
->driver
->num_aperture_sizes
; i
++) {
29 if ((temp_size
== values
[i
].size_value
) ||
30 ((temp_size
& ~(0x07)) ==
31 (values
[i
].size_value
& ~(0x07)))) {
32 agp_bridge
->previous_size
=
33 agp_bridge
->current_size
= (void *) (values
+ i
);
35 agp_bridge
->aperture_size_idx
= i
;
36 return values
[i
].size
;
43 static void sis_tlbflush(struct agp_memory
*mem
)
45 pci_write_config_byte(agp_bridge
->dev
, SIS_TLBFLUSH
, 0x02);
48 static int sis_configure(void)
51 struct aper_size_info_8
*current_size
;
53 current_size
= A_SIZE_8(agp_bridge
->current_size
);
54 pci_write_config_byte(agp_bridge
->dev
, SIS_TLBCNTRL
, 0x05);
55 pci_read_config_dword(agp_bridge
->dev
, AGP_APBASE
, &temp
);
56 agp_bridge
->gart_bus_addr
= (temp
& PCI_BASE_ADDRESS_MEM_MASK
);
57 pci_write_config_dword(agp_bridge
->dev
, SIS_ATTBASE
,
58 agp_bridge
->gatt_bus_addr
);
59 pci_write_config_byte(agp_bridge
->dev
, SIS_APSIZE
,
60 current_size
->size_value
);
64 static void sis_cleanup(void)
66 struct aper_size_info_8
*previous_size
;
68 previous_size
= A_SIZE_8(agp_bridge
->previous_size
);
69 pci_write_config_byte(agp_bridge
->dev
, SIS_APSIZE
,
70 (previous_size
->size_value
& ~(0x03)));
73 static void sis_delayed_enable(struct agp_bridge_data
*bridge
, u32 mode
)
75 struct pci_dev
*device
= NULL
;
79 printk(KERN_INFO PFX
"Found an AGP %d.%d compliant device at %s.\n",
80 agp_bridge
->major_version
,
81 agp_bridge
->minor_version
,
82 pci_name(agp_bridge
->dev
));
84 pci_read_config_dword(agp_bridge
->dev
, agp_bridge
->capndx
+ PCI_AGP_STATUS
, &command
);
85 command
= agp_collect_device_status(bridge
, mode
, command
);
86 command
|= AGPSTAT_AGP_ENABLE
;
87 rate
= (command
& 0x7) << 2;
89 for_each_pci_dev(device
) {
90 u8 agp
= pci_find_capability(device
, PCI_CAP_ID_AGP
);
94 printk(KERN_INFO PFX
"Putting AGP V3 device at %s into %dx mode\n",
95 pci_name(device
), rate
);
97 pci_write_config_dword(device
, agp
+ PCI_AGP_COMMAND
, command
);
100 * Weird: on some sis chipsets any rate change in the target
101 * command register triggers a 5ms screwup during which the master
102 * cannot be configured
104 if (device
->device
== bridge
->dev
->device
) {
105 printk(KERN_INFO PFX
"SiS delay workaround: giving bridge time to recover.\n");
111 static const struct aper_size_info_8 sis_generic_sizes
[7] =
122 static struct agp_bridge_driver sis_driver
= {
123 .owner
= THIS_MODULE
,
124 .aperture_sizes
= sis_generic_sizes
,
125 .size_type
= U8_APER_SIZE
,
126 .num_aperture_sizes
= 7,
127 .configure
= sis_configure
,
128 .fetch_size
= sis_fetch_size
,
129 .cleanup
= sis_cleanup
,
130 .tlb_flush
= sis_tlbflush
,
131 .mask_memory
= agp_generic_mask_memory
,
133 .agp_enable
= agp_generic_enable
,
134 .cache_flush
= global_cache_flush
,
135 .create_gatt_table
= agp_generic_create_gatt_table
,
136 .free_gatt_table
= agp_generic_free_gatt_table
,
137 .insert_memory
= agp_generic_insert_memory
,
138 .remove_memory
= agp_generic_remove_memory
,
139 .alloc_by_type
= agp_generic_alloc_by_type
,
140 .free_by_type
= agp_generic_free_by_type
,
141 .agp_alloc_page
= agp_generic_alloc_page
,
142 .agp_destroy_page
= agp_generic_destroy_page
,
143 .agp_type_to_mask_type
= agp_generic_type_to_mask_type
,
146 // chipsets that require the 'delay hack'
147 static int sis_broken_chipsets
[] __devinitdata
= {
148 PCI_DEVICE_ID_SI_648
,
149 PCI_DEVICE_ID_SI_746
,
153 static void __devinit
sis_get_driver(struct agp_bridge_data
*bridge
)
157 for (i
=0; sis_broken_chipsets
[i
]!=0; ++i
)
158 if (bridge
->dev
->device
==sis_broken_chipsets
[i
])
161 if (sis_broken_chipsets
[i
] || agp_sis_force_delay
)
162 sis_driver
.agp_enable
=sis_delayed_enable
;
164 // sis chipsets that indicate less than agp3.5
165 // are not actually fully agp3 compliant
166 if ((agp_bridge
->major_version
== 3 && agp_bridge
->minor_version
>= 5
167 && agp_sis_agp_spec
!=0) || agp_sis_agp_spec
==1) {
168 sis_driver
.aperture_sizes
= agp3_generic_sizes
;
169 sis_driver
.size_type
= U16_APER_SIZE
;
170 sis_driver
.num_aperture_sizes
= AGP_GENERIC_SIZES_ENTRIES
;
171 sis_driver
.configure
= agp3_generic_configure
;
172 sis_driver
.fetch_size
= agp3_generic_fetch_size
;
173 sis_driver
.cleanup
= agp3_generic_cleanup
;
174 sis_driver
.tlb_flush
= agp3_generic_tlbflush
;
179 static int __devinit
agp_sis_probe(struct pci_dev
*pdev
,
180 const struct pci_device_id
*ent
)
182 struct agp_bridge_data
*bridge
;
185 cap_ptr
= pci_find_capability(pdev
, PCI_CAP_ID_AGP
);
190 printk(KERN_INFO PFX
"Detected SiS chipset - id:%i\n", pdev
->device
);
191 bridge
= agp_alloc_bridge();
195 bridge
->driver
= &sis_driver
;
197 bridge
->capndx
= cap_ptr
;
199 get_agp_version(bridge
);
201 /* Fill in the mode register */
202 pci_read_config_dword(pdev
, bridge
->capndx
+PCI_AGP_STATUS
, &bridge
->mode
);
203 sis_get_driver(bridge
);
205 pci_set_drvdata(pdev
, bridge
);
206 return agp_add_bridge(bridge
);
209 static void __devexit
agp_sis_remove(struct pci_dev
*pdev
)
211 struct agp_bridge_data
*bridge
= pci_get_drvdata(pdev
);
213 agp_remove_bridge(bridge
);
214 agp_put_bridge(bridge
);
219 static int agp_sis_suspend(struct pci_dev
*pdev
, pm_message_t state
)
221 pci_save_state(pdev
);
222 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
227 static int agp_sis_resume(struct pci_dev
*pdev
)
229 pci_set_power_state(pdev
, PCI_D0
);
230 pci_restore_state(pdev
);
232 return sis_driver
.configure();
235 #endif /* CONFIG_PM */
237 static struct pci_device_id agp_sis_pci_table
[] = {
239 .class = (PCI_CLASS_BRIDGE_HOST
<< 8),
241 .vendor
= PCI_VENDOR_ID_SI
,
242 .device
= PCI_DEVICE_ID_SI_5591_AGP
,
243 .subvendor
= PCI_ANY_ID
,
244 .subdevice
= PCI_ANY_ID
,
247 .class = (PCI_CLASS_BRIDGE_HOST
<< 8),
249 .vendor
= PCI_VENDOR_ID_SI
,
250 .device
= PCI_DEVICE_ID_SI_530
,
251 .subvendor
= PCI_ANY_ID
,
252 .subdevice
= PCI_ANY_ID
,
255 .class = (PCI_CLASS_BRIDGE_HOST
<< 8),
257 .vendor
= PCI_VENDOR_ID_SI
,
258 .device
= PCI_DEVICE_ID_SI_540
,
259 .subvendor
= PCI_ANY_ID
,
260 .subdevice
= PCI_ANY_ID
,
263 .class = (PCI_CLASS_BRIDGE_HOST
<< 8),
265 .vendor
= PCI_VENDOR_ID_SI
,
266 .device
= PCI_DEVICE_ID_SI_550
,
267 .subvendor
= PCI_ANY_ID
,
268 .subdevice
= PCI_ANY_ID
,
271 .class = (PCI_CLASS_BRIDGE_HOST
<< 8),
273 .vendor
= PCI_VENDOR_ID_SI
,
274 .device
= PCI_DEVICE_ID_SI_620
,
275 .subvendor
= PCI_ANY_ID
,
276 .subdevice
= PCI_ANY_ID
,
279 .class = (PCI_CLASS_BRIDGE_HOST
<< 8),
281 .vendor
= PCI_VENDOR_ID_SI
,
282 .device
= PCI_DEVICE_ID_SI_630
,
283 .subvendor
= PCI_ANY_ID
,
284 .subdevice
= PCI_ANY_ID
,
287 .class = (PCI_CLASS_BRIDGE_HOST
<< 8),
289 .vendor
= PCI_VENDOR_ID_SI
,
290 .device
= PCI_DEVICE_ID_SI_635
,
291 .subvendor
= PCI_ANY_ID
,
292 .subdevice
= PCI_ANY_ID
,
295 .class = (PCI_CLASS_BRIDGE_HOST
<< 8),
297 .vendor
= PCI_VENDOR_ID_SI
,
298 .device
= PCI_DEVICE_ID_SI_645
,
299 .subvendor
= PCI_ANY_ID
,
300 .subdevice
= PCI_ANY_ID
,
303 .class = (PCI_CLASS_BRIDGE_HOST
<< 8),
305 .vendor
= PCI_VENDOR_ID_SI
,
306 .device
= PCI_DEVICE_ID_SI_646
,
307 .subvendor
= PCI_ANY_ID
,
308 .subdevice
= PCI_ANY_ID
,
311 .class = (PCI_CLASS_BRIDGE_HOST
<< 8),
313 .vendor
= PCI_VENDOR_ID_SI
,
314 .device
= PCI_DEVICE_ID_SI_648
,
315 .subvendor
= PCI_ANY_ID
,
316 .subdevice
= PCI_ANY_ID
,
319 .class = (PCI_CLASS_BRIDGE_HOST
<< 8),
321 .vendor
= PCI_VENDOR_ID_SI
,
322 .device
= PCI_DEVICE_ID_SI_650
,
323 .subvendor
= PCI_ANY_ID
,
324 .subdevice
= PCI_ANY_ID
,
327 .class = (PCI_CLASS_BRIDGE_HOST
<< 8),
329 .vendor
= PCI_VENDOR_ID_SI
,
330 .device
= PCI_DEVICE_ID_SI_651
,
331 .subvendor
= PCI_ANY_ID
,
332 .subdevice
= PCI_ANY_ID
,
335 .class = (PCI_CLASS_BRIDGE_HOST
<< 8),
337 .vendor
= PCI_VENDOR_ID_SI
,
338 .device
= PCI_DEVICE_ID_SI_655
,
339 .subvendor
= PCI_ANY_ID
,
340 .subdevice
= PCI_ANY_ID
,
343 .class = (PCI_CLASS_BRIDGE_HOST
<< 8),
345 .vendor
= PCI_VENDOR_ID_SI
,
346 .device
= PCI_DEVICE_ID_SI_661
,
347 .subvendor
= PCI_ANY_ID
,
348 .subdevice
= PCI_ANY_ID
,
351 .class = (PCI_CLASS_BRIDGE_HOST
<< 8),
353 .vendor
= PCI_VENDOR_ID_SI
,
354 .device
= PCI_DEVICE_ID_SI_730
,
355 .subvendor
= PCI_ANY_ID
,
356 .subdevice
= PCI_ANY_ID
,
359 .class = (PCI_CLASS_BRIDGE_HOST
<< 8),
361 .vendor
= PCI_VENDOR_ID_SI
,
362 .device
= PCI_DEVICE_ID_SI_735
,
363 .subvendor
= PCI_ANY_ID
,
364 .subdevice
= PCI_ANY_ID
,
367 .class = (PCI_CLASS_BRIDGE_HOST
<< 8),
369 .vendor
= PCI_VENDOR_ID_SI
,
370 .device
= PCI_DEVICE_ID_SI_740
,
371 .subvendor
= PCI_ANY_ID
,
372 .subdevice
= PCI_ANY_ID
,
375 .class = (PCI_CLASS_BRIDGE_HOST
<< 8),
377 .vendor
= PCI_VENDOR_ID_SI
,
378 .device
= PCI_DEVICE_ID_SI_741
,
379 .subvendor
= PCI_ANY_ID
,
380 .subdevice
= PCI_ANY_ID
,
383 .class = (PCI_CLASS_BRIDGE_HOST
<< 8),
385 .vendor
= PCI_VENDOR_ID_SI
,
386 .device
= PCI_DEVICE_ID_SI_745
,
387 .subvendor
= PCI_ANY_ID
,
388 .subdevice
= PCI_ANY_ID
,
391 .class = (PCI_CLASS_BRIDGE_HOST
<< 8),
393 .vendor
= PCI_VENDOR_ID_SI
,
394 .device
= PCI_DEVICE_ID_SI_746
,
395 .subvendor
= PCI_ANY_ID
,
396 .subdevice
= PCI_ANY_ID
,
399 .class = (PCI_CLASS_BRIDGE_HOST
<< 8),
401 .vendor
= PCI_VENDOR_ID_SI
,
402 .device
= PCI_DEVICE_ID_SI_760
,
403 .subvendor
= PCI_ANY_ID
,
404 .subdevice
= PCI_ANY_ID
,
409 MODULE_DEVICE_TABLE(pci
, agp_sis_pci_table
);
411 static struct pci_driver agp_sis_pci_driver
= {
412 .name
= "agpgart-sis",
413 .id_table
= agp_sis_pci_table
,
414 .probe
= agp_sis_probe
,
415 .remove
= agp_sis_remove
,
417 .suspend
= agp_sis_suspend
,
418 .resume
= agp_sis_resume
,
422 static int __init
agp_sis_init(void)
426 return pci_register_driver(&agp_sis_pci_driver
);
429 static void __exit
agp_sis_cleanup(void)
431 pci_unregister_driver(&agp_sis_pci_driver
);
434 module_init(agp_sis_init
);
435 module_exit(agp_sis_cleanup
);
437 module_param(agp_sis_force_delay
, bool, 0);
438 MODULE_PARM_DESC(agp_sis_force_delay
,"forces sis delay hack");
439 module_param(agp_sis_agp_spec
, int, 0);
440 MODULE_PARM_DESC(agp_sis_agp_spec
,"0=force sis init, 1=force generic agp3 init, default: autodetect");
441 MODULE_LICENSE("GPL and additional rights");