arch/powerpc/platforms/cell/spu_base.c

   1 /*
   2  * Low-level SPU handling
   3  *
   4  * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
   5  *
   6  * Author: Arnd Bergmann <arndb@de.ibm.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2, or (at your option)
  11  * any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #undef DEBUG
  24
  25 #include <linux/interrupt.h>
  26 #include <linux/list.h>
  27 #include <linux/module.h>
  28 #include <linux/ptrace.h>
  29 #include <linux/slab.h>
  30 #include <linux/wait.h>
  31 #include <linux/mm.h>
  32 #include <linux/io.h>
  33 #include <linux/mutex.h>
  34 #include <asm/spu.h>
  35 #include <asm/spu_priv1.h>
  36 #include <asm/xmon.h>
  37
  38 const struct spu_management_ops *spu_management_ops;
  39 EXPORT_SYMBOL_GPL(spu_management_ops);
  40
  41 const struct spu_priv1_ops *spu_priv1_ops;
  42
  43 static struct list_head spu_list[MAX_NUMNODES];
  44 static LIST_HEAD(spu_full_list);
  45 static DEFINE_MUTEX(spu_mutex);
  46 static DEFINE_SPINLOCK(spu_list_lock);
  47
  48 EXPORT_SYMBOL_GPL(spu_priv1_ops);
  49
  50 void spu_invalidate_slbs(struct spu *spu)
  51 {
  52         struct spu_priv2 __iomem *priv2 = spu->priv2;
  53
  54         if (spu_mfc_sr1_get(spu) & MFC_STATE1_RELOCATE_MASK)
  55                 out_be64(&priv2->slb_invalidate_all_W, 0UL);
  56 }
  57 EXPORT_SYMBOL_GPL(spu_invalidate_slbs);
  58
  59 /* This is called by the MM core when a segment size is changed, to
  60  * request a flush of all the SPEs using a given mm
  61  */
  62 void spu_flush_all_slbs(struct mm_struct *mm)
  63 {
  64         struct spu *spu;
  65         unsigned long flags;
  66
  67         spin_lock_irqsave(&spu_list_lock, flags);
  68         list_for_each_entry(spu, &spu_full_list, full_list) {
  69                 if (spu->mm == mm)
  70                         spu_invalidate_slbs(spu);
  71         }
  72         spin_unlock_irqrestore(&spu_list_lock, flags);
  73 }
  74
  75 /* The hack below stinks... try to do something better one of
  76  * these days... Does it even work properly with NR_CPUS == 1 ?
  77  */
  78 static inline void mm_needs_global_tlbie(struct mm_struct *mm)
  79 {
  80         int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1;
  81
  82         /* Global TLBIE broadcast required with SPEs. */
  83         __cpus_setall(&mm->cpu_vm_mask, nr);
  84 }
  85
  86 void spu_associate_mm(struct spu *spu, struct mm_struct *mm)
  87 {
  88         unsigned long flags;
  89
  90         spin_lock_irqsave(&spu_list_lock, flags);
  91         spu->mm = mm;
  92         spin_unlock_irqrestore(&spu_list_lock, flags);
  93         if (mm)
  94                 mm_needs_global_tlbie(mm);
  95 }
  96 EXPORT_SYMBOL_GPL(spu_associate_mm);
  97
  98 static int __spu_trap_invalid_dma(struct spu *spu)
  99 {
 100         pr_debug("%s\n", __FUNCTION__);
 101         spu->dma_callback(spu, SPE_EVENT_INVALID_DMA);
 102         return 0;
 103 }
 104
 105 static int __spu_trap_dma_align(struct spu *spu)
 106 {
 107         pr_debug("%s\n", __FUNCTION__);
 108         spu->dma_callback(spu, SPE_EVENT_DMA_ALIGNMENT);
 109         return 0;
 110 }
 111
 112 static int __spu_trap_error(struct spu *spu)
 113 {
 114         pr_debug("%s\n", __FUNCTION__);
 115         spu->dma_callback(spu, SPE_EVENT_SPE_ERROR);
 116         return 0;
 117 }
 118
 119 static void spu_restart_dma(struct spu *spu)
 120 {
 121         struct spu_priv2 __iomem *priv2 = spu->priv2;
 122
 123         if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
 124                 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
 125 }
 126
 127 static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
 128 {
 129         struct spu_priv2 __iomem *priv2 = spu->priv2;
 130         struct mm_struct *mm = spu->mm;
 131         u64 esid, vsid, llp;
 132         int psize;
 133
 134         pr_debug("%s\n", __FUNCTION__);
 135
 136         if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
 137                 /* SLBs are pre-loaded for context switch, so
 138                  * we should never get here!
 139                  */
 140                 printk("%s: invalid access during switch!\n", __func__);
 141                 return 1;
 142         }
 143         esid = (ea & ESID_MASK) | SLB_ESID_V;
 144
 145         switch(REGION_ID(ea)) {
 146         case USER_REGION_ID:
 147 #ifdef CONFIG_HUGETLB_PAGE
 148                 if (in_hugepage_area(mm->context, ea))
 149                         psize = mmu_huge_psize;
 150                 else
 151 #endif
 152                         psize = mm->context.user_psize;
 153                 vsid = (get_vsid(mm->context.id, ea) << SLB_VSID_SHIFT) |
 154                                 SLB_VSID_USER;
 155                 break;
 156         case VMALLOC_REGION_ID:
 157                 if (ea < VMALLOC_END)
 158                         psize = mmu_vmalloc_psize;
 159                 else
 160                         psize = mmu_io_psize;
 161                 vsid = (get_kernel_vsid(ea) << SLB_VSID_SHIFT) |
 162                         SLB_VSID_KERNEL;
 163                 break;
 164         case KERNEL_REGION_ID:
 165                 psize = mmu_linear_psize;
 166                 vsid = (get_kernel_vsid(ea) << SLB_VSID_SHIFT) |
 167                         SLB_VSID_KERNEL;
 168                 break;
 169         default:
 170                 /* Future: support kernel segments so that drivers
 171                  * can use SPUs.
 172                  */
 173                 pr_debug("invalid region access at %016lx\n", ea);
 174                 return 1;
 175         }
 176         llp = mmu_psize_defs[psize].sllp;
 177
 178         out_be64(&priv2->slb_index_W, spu->slb_replace);
 179         out_be64(&priv2->slb_vsid_RW, vsid | llp);
 180         out_be64(&priv2->slb_esid_RW, esid);
 181
 182         spu->slb_replace++;
 183         if (spu->slb_replace >= 8)
 184                 spu->slb_replace = 0;
 185
 186         spu_restart_dma(spu);
 187
 188         return 0;
 189 }
 190
 191 extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); //XXX
 192 static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
 193 {
 194         pr_debug("%s, %lx, %lx\n", __FUNCTION__, dsisr, ea);
 195
 196         /* Handle kernel space hash faults immediately.
 197            User hash faults need to be deferred to process context. */
 198         if ((dsisr & MFC_DSISR_PTE_NOT_FOUND)
 199             && REGION_ID(ea) != USER_REGION_ID
 200             && hash_page(ea, _PAGE_PRESENT, 0x300) == 0) {
 201                 spu_restart_dma(spu);
 202                 return 0;
 203         }
 204
 205         if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
 206                 printk("%s: invalid access during switch!\n", __func__);
 207                 return 1;
 208         }
 209
 210         spu->dar = ea;
 211         spu->dsisr = dsisr;
 212         mb();
 213         spu->stop_callback(spu);
 214         return 0;
 215 }
 216
 217 static irqreturn_t
 218 spu_irq_class_0(int irq, void *data)
 219 {
 220         struct spu *spu;
 221
 222         spu = data;
 223         spu->class_0_pending = 1;
 224         spu->stop_callback(spu);
 225
 226         return IRQ_HANDLED;
 227 }
 228
 229 int
 230 spu_irq_class_0_bottom(struct spu *spu)
 231 {
 232         unsigned long stat, mask;
 233         unsigned long flags;
 234
 235         spu->class_0_pending = 0;
 236
 237         spin_lock_irqsave(&spu->register_lock, flags);
 238         mask = spu_int_mask_get(spu, 0);
 239         stat = spu_int_stat_get(spu, 0);
 240
 241         stat &= mask;
 242
 243         if (stat & 1) /* invalid DMA alignment */
 244                 __spu_trap_dma_align(spu);
 245
 246         if (stat & 2) /* invalid MFC DMA */
 247                 __spu_trap_invalid_dma(spu);
 248
 249         if (stat & 4) /* error on SPU */
 250                 __spu_trap_error(spu);
 251
 252         spu_int_stat_clear(spu, 0, stat);
 253         spin_unlock_irqrestore(&spu->register_lock, flags);
 254
 255         return (stat & 0x7) ? -EIO : 0;
 256 }
 257 EXPORT_SYMBOL_GPL(spu_irq_class_0_bottom);
 258
 259 static irqreturn_t
 260 spu_irq_class_1(int irq, void *data)
 261 {
 262         struct spu *spu;
 263         unsigned long stat, mask, dar, dsisr;
 264
 265         spu = data;
 266
 267         /* atomically read & clear class1 status. */
 268         spin_lock(&spu->register_lock);
 269         mask  = spu_int_mask_get(spu, 1);
 270         stat  = spu_int_stat_get(spu, 1) & mask;
 271         dar   = spu_mfc_dar_get(spu);
 272         dsisr = spu_mfc_dsisr_get(spu);
 273         if (stat & 2) /* mapping fault */
 274                 spu_mfc_dsisr_set(spu, 0ul);
 275         spu_int_stat_clear(spu, 1, stat);
 276         spin_unlock(&spu->register_lock);
 277         pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__, mask, stat,
 278                         dar, dsisr);
 279
 280         if (stat & 1) /* segment fault */
 281                 __spu_trap_data_seg(spu, dar);
 282
 283         if (stat & 2) { /* mapping fault */
 284                 __spu_trap_data_map(spu, dar, dsisr);
 285         }
 286
 287         if (stat & 4) /* ls compare & suspend on get */
 288                 ;
 289
 290         if (stat & 8) /* ls compare & suspend on put */
 291                 ;
 292
 293         return stat ? IRQ_HANDLED : IRQ_NONE;
 294 }
 295
 296 static irqreturn_t
 297 spu_irq_class_2(int irq, void *data)
 298 {
 299         struct spu *spu;
 300         unsigned long stat;
 301         unsigned long mask;
 302
 303         spu = data;
 304         spin_lock(&spu->register_lock);
 305         stat = spu_int_stat_get(spu, 2);
 306         mask = spu_int_mask_get(spu, 2);
 307         /* ignore interrupts we're not waiting for */
 308         stat &= mask;
 309         /*
 310          * mailbox interrupts (0x1 and 0x10) are level triggered.
 311          * mask them now before acknowledging.
 312          */
 313         if (stat & 0x11)
 314                 spu_int_mask_and(spu, 2, ~(stat & 0x11));
 315         /* acknowledge all interrupts before the callbacks */
 316         spu_int_stat_clear(spu, 2, stat);
 317         spin_unlock(&spu->register_lock);
 318
 319         pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask);
 320
 321         if (stat & 1)  /* PPC core mailbox */
 322                 spu->ibox_callback(spu);
 323
 324         if (stat & 2) /* SPU stop-and-signal */
 325                 spu->stop_callback(spu);
 326
 327         if (stat & 4) /* SPU halted */
 328                 spu->stop_callback(spu);
 329
 330         if (stat & 8) /* DMA tag group complete */
 331                 spu->mfc_callback(spu);
 332
 333         if (stat & 0x10) /* SPU mailbox threshold */
 334                 spu->wbox_callback(spu);
 335
 336         return stat ? IRQ_HANDLED : IRQ_NONE;
 337 }
 338
 339 static int spu_request_irqs(struct spu *spu)
 340 {
 341         int ret = 0;
 342
 343         if (spu->irqs[0] != NO_IRQ) {
 344                 snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0",
 345                          spu->number);
 346                 ret = request_irq(spu->irqs[0], spu_irq_class_0,
 347                                   IRQF_DISABLED,
 348                                   spu->irq_c0, spu);
 349                 if (ret)
 350                         goto bail0;
 351         }
 352         if (spu->irqs[1] != NO_IRQ) {
 353                 snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1",
 354                          spu->number);
 355                 ret = request_irq(spu->irqs[1], spu_irq_class_1,
 356                                   IRQF_DISABLED,
 357                                   spu->irq_c1, spu);
 358                 if (ret)
 359                         goto bail1;
 360         }
 361         if (spu->irqs[2] != NO_IRQ) {
 362                 snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2",
 363                          spu->number);
 364                 ret = request_irq(spu->irqs[2], spu_irq_class_2,
 365                                   IRQF_DISABLED,
 366                                   spu->irq_c2, spu);
 367                 if (ret)
 368                         goto bail2;
 369         }
 370         return 0;
 371
 372 bail2:
 373         if (spu->irqs[1] != NO_IRQ)
 374                 free_irq(spu->irqs[1], spu);
 375 bail1:
 376         if (spu->irqs[0] != NO_IRQ)
 377                 free_irq(spu->irqs[0], spu);
 378 bail0:
 379         return ret;
 380 }
 381
 382 static void spu_free_irqs(struct spu *spu)
 383 {
 384         if (spu->irqs[0] != NO_IRQ)
 385                 free_irq(spu->irqs[0], spu);
 386         if (spu->irqs[1] != NO_IRQ)
 387                 free_irq(spu->irqs[1], spu);
 388         if (spu->irqs[2] != NO_IRQ)
 389                 free_irq(spu->irqs[2], spu);
 390 }
 391
 392 static void spu_init_channels(struct spu *spu)
 393 {
 394         static const struct {
 395                  unsigned channel;
 396                  unsigned count;
 397         } zero_list[] = {
 398                 { 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, },
 399                 { 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, },
 400         }, count_list[] = {
 401                 { 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, },
 402                 { 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, },
 403                 { 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, },
 404         };
 405         struct spu_priv2 __iomem *priv2;
 406         int i;
 407
 408         priv2 = spu->priv2;
 409
 410         /* initialize all channel data to zero */
 411         for (i = 0; i < ARRAY_SIZE(zero_list); i++) {
 412                 int count;
 413
 414                 out_be64(&priv2->spu_chnlcntptr_RW, zero_list[i].channel);
 415                 for (count = 0; count < zero_list[i].count; count++)
 416                         out_be64(&priv2->spu_chnldata_RW, 0);
 417         }
 418
 419         /* initialize channel counts to meaningful values */
 420         for (i = 0; i < ARRAY_SIZE(count_list); i++) {
 421                 out_be64(&priv2->spu_chnlcntptr_RW, count_list[i].channel);
 422                 out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count);
 423         }
 424 }
 425
 426 struct spu *spu_alloc_node(int node)
 427 {
 428         struct spu *spu = NULL;
 429
 430         mutex_lock(&spu_mutex);
 431         if (!list_empty(&spu_list[node])) {
 432                 spu = list_entry(spu_list[node].next, struct spu, list);
 433                 list_del_init(&spu->list);
 434                 pr_debug("Got SPU %d %d\n", spu->number, spu->node);
 435         }
 436         mutex_unlock(&spu_mutex);
 437
 438         if (spu)
 439                 spu_init_channels(spu);
 440         return spu;
 441 }
 442 EXPORT_SYMBOL_GPL(spu_alloc_node);
 443
 444 struct spu *spu_alloc(void)
 445 {
 446         struct spu *spu = NULL;
 447         int node;
 448
 449         for (node = 0; node < MAX_NUMNODES; node++) {
 450                 spu = spu_alloc_node(node);
 451                 if (spu)
 452                         break;
 453         }
 454
 455         return spu;
 456 }
 457
 458 void spu_free(struct spu *spu)
 459 {
 460         mutex_lock(&spu_mutex);
 461         list_add_tail(&spu->list, &spu_list[spu->node]);
 462         mutex_unlock(&spu_mutex);
 463 }
 464 EXPORT_SYMBOL_GPL(spu_free);
 465
 466 struct sysdev_class spu_sysdev_class = {
 467         set_kset_name("spu")
 468 };
 469
 470 int spu_add_sysdev_attr(struct sysdev_attribute *attr)
 471 {
 472         struct spu *spu;
 473         mutex_lock(&spu_mutex);
 474
 475         list_for_each_entry(spu, &spu_full_list, full_list)
 476                 sysdev_create_file(&spu->sysdev, attr);
 477
 478         mutex_unlock(&spu_mutex);
 479         return 0;
 480 }
 481 EXPORT_SYMBOL_GPL(spu_add_sysdev_attr);
 482
 483 int spu_add_sysdev_attr_group(struct attribute_group *attrs)
 484 {
 485         struct spu *spu;
 486         mutex_lock(&spu_mutex);
 487
 488         list_for_each_entry(spu, &spu_full_list, full_list)
 489                 sysfs_create_group(&spu->sysdev.kobj, attrs);
 490
 491         mutex_unlock(&spu_mutex);
 492         return 0;
 493 }
 494 EXPORT_SYMBOL_GPL(spu_add_sysdev_attr_group);
 495
 496
 497 void spu_remove_sysdev_attr(struct sysdev_attribute *attr)
 498 {
 499         struct spu *spu;
 500         mutex_lock(&spu_mutex);
 501
 502         list_for_each_entry(spu, &spu_full_list, full_list)
 503                 sysdev_remove_file(&spu->sysdev, attr);
 504
 505         mutex_unlock(&spu_mutex);
 506 }
 507 EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr);
 508
 509 void spu_remove_sysdev_attr_group(struct attribute_group *attrs)
 510 {
 511         struct spu *spu;
 512         mutex_lock(&spu_mutex);
 513
 514         list_for_each_entry(spu, &spu_full_list, full_list)
 515                 sysfs_remove_group(&spu->sysdev.kobj, attrs);
 516
 517         mutex_unlock(&spu_mutex);
 518 }
 519 EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr_group);
 520
 521 static int spu_create_sysdev(struct spu *spu)
 522 {
 523         int ret;
 524
 525         spu->sysdev.id = spu->number;
 526         spu->sysdev.cls = &spu_sysdev_class;
 527         ret = sysdev_register(&spu->sysdev);
 528         if (ret) {
 529                 printk(KERN_ERR "Can't register SPU %d with sysfs\n",
 530                                 spu->number);
 531                 return ret;
 532         }
 533
 534         sysfs_add_device_to_node(&spu->sysdev, spu->node);
 535
 536         return 0;
 537 }
 538
 539 static int __init create_spu(void *data)
 540 {
 541         struct spu *spu;
 542         int ret;
 543         static int number;
 544         unsigned long flags;
 545
 546         ret = -ENOMEM;
 547         spu = kzalloc(sizeof (*spu), GFP_KERNEL);
 548         if (!spu)
 549                 goto out;
 550
 551         spin_lock_init(&spu->register_lock);
 552         mutex_lock(&spu_mutex);
 553         spu->number = number++;
 554         mutex_unlock(&spu_mutex);
 555
 556         ret = spu_create_spu(spu, data);
 557
 558         if (ret)
 559                 goto out_free;
 560
 561         spu_mfc_sdr_setup(spu);
 562         spu_mfc_sr1_set(spu, 0x33);
 563         ret = spu_request_irqs(spu);
 564         if (ret)
 565                 goto out_destroy;
 566
 567         ret = spu_create_sysdev(spu);
 568         if (ret)
 569                 goto out_free_irqs;
 570
 571         mutex_lock(&spu_mutex);
 572         spin_lock_irqsave(&spu_list_lock, flags);
 573         list_add(&spu->list, &spu_list[spu->node]);
 574         list_add(&spu->full_list, &spu_full_list);
 575         spin_unlock_irqrestore(&spu_list_lock, flags);
 576         mutex_unlock(&spu_mutex);
 577
 578         goto out;
 579
 580 out_free_irqs:
 581         spu_free_irqs(spu);
 582 out_destroy:
 583         spu_destroy_spu(spu);
 584 out_free:
 585         kfree(spu);
 586 out:
 587         return ret;
 588 }
 589
 590 static int __init init_spu_base(void)
 591 {
 592         int i, ret = 0;
 593
 594         for (i = 0; i < MAX_NUMNODES; i++)
 595                 INIT_LIST_HEAD(&spu_list[i]);
 596
 597         if (!spu_management_ops)
 598                 goto out;
 599
 600         /* create sysdev class for spus */
 601         ret = sysdev_class_register(&spu_sysdev_class);
 602         if (ret)
 603                 goto out;
 604
 605         ret = spu_enumerate_spus(create_spu);
 606
 607         if (ret) {
 608                 printk(KERN_WARNING "%s: Error initializing spus\n",
 609                         __FUNCTION__);
 610                 goto out_unregister_sysdev_class;
 611         }
 612
 613         xmon_register_spus(&spu_full_list);
 614
 615         return 0;
 616
 617  out_unregister_sysdev_class:
 618         sysdev_class_unregister(&spu_sysdev_class);
 619  out:
 620
 621         return ret;
 622 }
 623 module_init(init_spu_base);
 624
 625 MODULE_LICENSE("GPL");
 626 MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>");