perf, x86: Add a key to simplify template lookup in Pentium-4 PMU
commitf34edbc1cdb0f8f83d94e1d668dd6e41abf0defb
authorLin Ming <ming.m.lin@intel.com>
Thu, 18 Mar 2010 10:33:07 +0000 (18 18:33 +0800)
committerIngo Molnar <mingo@elte.hu>
Thu, 18 Mar 2010 16:03:51 +0000 (18 17:03 +0100)
treed57803bcc891a748551429d2feafec2df8007367
parent55632770d7298835645489828af87f854c47749c
perf, x86: Add a key to simplify template lookup in Pentium-4 PMU

Currently, we use opcode(Event and Event-Selector) + emask to
look up template in p4_templates.

But cache events (L1-dcache-load-misses, LLC-load-misses, etc)
use the same event(P4_REPLAY_EVENT) to do the counting, ie, they
have the same opcode and emask. So we can not use current lookup
mechanism to find the template for cache events.

This patch introduces a "key", which is the index into
p4_templates. The low 12 bits of CCCR are reserved, so we can
hide the "key" in the low 12 bits of hwc->config.

We extract the key from hwc->config and then quickly find the
template.

Signed-off-by: Lin Ming <ming.m.lin@intel.com>
Reviewed-by: Cyrill Gorcunov <gorcunov@openvz.org>
Cc: Peter Zijlstra <peterz@infradead.org>
LKML-Reference: <1268908387.13901.127.camel@minggr.sh.intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
arch/x86/include/asm/perf_event_p4.h
arch/x86/kernel/cpu/perf_event_p4.c