2 * Critical Link MityOMAP-L138 SoM
4 * Copyright (C) 2010 Critical Link LLC - http://www.criticallink.com
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of
8 * any kind, whether express or implied.
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/console.h>
14 #include <linux/platform_device.h>
15 #include <linux/mtd/partitions.h>
16 #include <linux/regulator/machine.h>
17 #include <linux/i2c.h>
18 #include <linux/i2c/at24.h>
19 #include <linux/etherdevice.h>
21 #include <asm/mach-types.h>
22 #include <asm/mach/arch.h>
23 #include <mach/common.h>
24 #include <mach/cp_intc.h>
25 #include <mach/da8xx.h>
26 #include <mach/nand.h>
29 #define MITYOMAPL138_PHY_ID "0:03"
31 #define FACTORY_CONFIG_MAGIC 0x012C0138
32 #define FACTORY_CONFIG_VERSION 0x00010001
34 /* Data Held in On-Board I2C device */
35 struct factory_config
{
45 static struct factory_config factory_config
;
47 static void read_factory_config(struct memory_accessor
*a
, void *context
)
50 struct davinci_soc_info
*soc_info
= &davinci_soc_info
;
52 ret
= a
->read(a
, (char *)&factory_config
, 0, sizeof(factory_config
));
53 if (ret
!= sizeof(struct factory_config
)) {
54 pr_warning("MityOMAPL138: Read Factory Config Failed: %d\n",
59 if (factory_config
.magic
!= FACTORY_CONFIG_MAGIC
) {
60 pr_warning("MityOMAPL138: Factory Config Magic Wrong (%X)\n",
61 factory_config
.magic
);
65 if (factory_config
.version
!= FACTORY_CONFIG_VERSION
) {
66 pr_warning("MityOMAPL138: Factory Config Version Wrong (%X)\n",
67 factory_config
.version
);
71 pr_info("MityOMAPL138: Found MAC = %pM\n", factory_config
.mac
);
72 pr_info("MityOMAPL138: Part Number = %s\n", factory_config
.partnum
);
73 if (is_valid_ether_addr(factory_config
.mac
))
74 memcpy(soc_info
->emac_pdata
->mac_addr
,
75 factory_config
.mac
, ETH_ALEN
);
77 pr_warning("MityOMAPL138: Invalid MAC found "
78 "in factory config block\n");
81 static struct at24_platform_data mityomapl138_fd_chip
= {
84 .flags
= AT24_FLAG_READONLY
| AT24_FLAG_IRUGO
,
85 .setup
= read_factory_config
,
89 static struct davinci_i2c_platform_data mityomap_i2c_0_pdata
= {
90 .bus_freq
= 100, /* kHz */
91 .bus_delay
= 0, /* usec */
94 /* TPS65023 voltage regulator support */
96 static struct regulator_consumer_supply tps65023_dcdc1_consumers
[] = {
103 static struct regulator_consumer_supply tps65023_dcdc2_consumers
[] = {
105 .supply
= "usb0_vdda18",
108 .supply
= "usb1_vdda18",
111 .supply
= "ddr_dvdd18",
114 .supply
= "sata_vddr",
119 static struct regulator_consumer_supply tps65023_dcdc3_consumers
[] = {
121 .supply
= "sata_vdd",
124 .supply
= "usb_cvdd",
127 .supply
= "pll0_vdda",
130 .supply
= "pll1_vdda",
134 /* 1.8V Aux LDO, not used */
135 static struct regulator_consumer_supply tps65023_ldo1_consumers
[] = {
137 .supply
= "1.8v_aux",
141 /* FPGA VCC Aux (2.5 or 3.3) LDO */
142 static struct regulator_consumer_supply tps65023_ldo2_consumers
[] = {
148 static struct regulator_init_data tps65023_regulator_data
[] = {
154 .valid_ops_mask
= REGULATOR_CHANGE_VOLTAGE
|
155 REGULATOR_CHANGE_STATUS
,
158 .num_consumer_supplies
= ARRAY_SIZE(tps65023_dcdc1_consumers
),
159 .consumer_supplies
= tps65023_dcdc1_consumers
,
166 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
169 .num_consumer_supplies
= ARRAY_SIZE(tps65023_dcdc2_consumers
),
170 .consumer_supplies
= tps65023_dcdc2_consumers
,
177 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
180 .num_consumer_supplies
= ARRAY_SIZE(tps65023_dcdc3_consumers
),
181 .consumer_supplies
= tps65023_dcdc3_consumers
,
188 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
191 .num_consumer_supplies
= ARRAY_SIZE(tps65023_ldo1_consumers
),
192 .consumer_supplies
= tps65023_ldo1_consumers
,
199 .valid_ops_mask
= REGULATOR_CHANGE_VOLTAGE
|
200 REGULATOR_CHANGE_STATUS
,
203 .num_consumer_supplies
= ARRAY_SIZE(tps65023_ldo2_consumers
),
204 .consumer_supplies
= tps65023_ldo2_consumers
,
208 static struct i2c_board_info __initdata mityomap_tps65023_info
[] = {
210 I2C_BOARD_INFO("tps65023", 0x48),
211 .platform_data
= &tps65023_regulator_data
[0],
214 I2C_BOARD_INFO("24c02", 0x50),
215 .platform_data
= &mityomapl138_fd_chip
,
219 static int __init
pmic_tps65023_init(void)
221 return i2c_register_board_info(1, mityomap_tps65023_info
,
222 ARRAY_SIZE(mityomap_tps65023_info
));
226 * MityDSP-L138 includes a 256 MByte large-page NAND flash
229 static struct mtd_partition mityomapl138_nandflash_partition
[] = {
234 .mask_flags
= 0, /* MTD_WRITEABLE, */
238 .offset
= MTDPART_OFS_APPEND
,
239 .size
= MTDPART_SIZ_FULL
,
244 static struct davinci_nand_pdata mityomapl138_nandflash_data
= {
245 .parts
= mityomapl138_nandflash_partition
,
246 .nr_parts
= ARRAY_SIZE(mityomapl138_nandflash_partition
),
247 .ecc_mode
= NAND_ECC_HW
,
248 .options
= NAND_USE_FLASH_BBT
| NAND_BUSWIDTH_16
,
249 .ecc_bits
= 1, /* 4 bit mode is not supported with 16 bit NAND */
252 static struct resource mityomapl138_nandflash_resource
[] = {
254 .start
= DA8XX_AEMIF_CS3_BASE
,
255 .end
= DA8XX_AEMIF_CS3_BASE
+ SZ_512K
+ 2 * SZ_1K
- 1,
256 .flags
= IORESOURCE_MEM
,
259 .start
= DA8XX_AEMIF_CTL_BASE
,
260 .end
= DA8XX_AEMIF_CTL_BASE
+ SZ_32K
- 1,
261 .flags
= IORESOURCE_MEM
,
265 static struct platform_device mityomapl138_nandflash_device
= {
266 .name
= "davinci_nand",
269 .platform_data
= &mityomapl138_nandflash_data
,
271 .num_resources
= ARRAY_SIZE(mityomapl138_nandflash_resource
),
272 .resource
= mityomapl138_nandflash_resource
,
275 static struct platform_device
*mityomapl138_devices
[] __initdata
= {
276 &mityomapl138_nandflash_device
,
279 static void __init
mityomapl138_setup_nand(void)
281 platform_add_devices(mityomapl138_devices
,
282 ARRAY_SIZE(mityomapl138_devices
));
285 static struct davinci_uart_config mityomapl138_uart_config __initdata
= {
286 .enabled_uarts
= 0x7,
289 static const short mityomap_mii_pins
[] = {
290 DA850_MII_TXEN
, DA850_MII_TXCLK
, DA850_MII_COL
, DA850_MII_TXD_3
,
291 DA850_MII_TXD_2
, DA850_MII_TXD_1
, DA850_MII_TXD_0
, DA850_MII_RXER
,
292 DA850_MII_CRS
, DA850_MII_RXCLK
, DA850_MII_RXDV
, DA850_MII_RXD_3
,
293 DA850_MII_RXD_2
, DA850_MII_RXD_1
, DA850_MII_RXD_0
, DA850_MDIO_CLK
,
298 static const short mityomap_rmii_pins
[] = {
299 DA850_RMII_TXD_0
, DA850_RMII_TXD_1
, DA850_RMII_TXEN
,
300 DA850_RMII_CRS_DV
, DA850_RMII_RXD_0
, DA850_RMII_RXD_1
,
301 DA850_RMII_RXER
, DA850_RMII_MHZ_50_CLK
, DA850_MDIO_CLK
,
306 static void __init
mityomapl138_config_emac(void)
308 void __iomem
*cfg_chip3_base
;
311 struct davinci_soc_info
*soc_info
= &davinci_soc_info
;
313 soc_info
->emac_pdata
->rmii_en
= 0; /* hardcoded for now */
315 cfg_chip3_base
= DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG
);
316 val
= __raw_readl(cfg_chip3_base
);
318 if (soc_info
->emac_pdata
->rmii_en
) {
320 ret
= davinci_cfg_reg_list(mityomap_rmii_pins
);
321 pr_info("RMII PHY configured\n");
324 ret
= davinci_cfg_reg_list(mityomap_mii_pins
);
325 pr_info("MII PHY configured\n");
329 pr_warning("mii/rmii mux setup failed: %d\n", ret
);
333 /* configure the CFGCHIP3 register for RMII or MII */
334 __raw_writel(val
, cfg_chip3_base
);
336 soc_info
->emac_pdata
->phy_id
= MITYOMAPL138_PHY_ID
;
338 ret
= da8xx_register_emac();
340 pr_warning("emac registration failed: %d\n", ret
);
343 static struct davinci_pm_config da850_pm_pdata
= {
347 static struct platform_device da850_pm_device
= {
348 .name
= "pm-davinci",
350 .platform_data
= &da850_pm_pdata
,
355 static void __init
mityomapl138_init(void)
359 /* for now, no special EDMA channels are reserved */
360 ret
= da850_register_edma(NULL
);
362 pr_warning("edma registration failed: %d\n", ret
);
364 ret
= da8xx_register_watchdog();
366 pr_warning("watchdog registration failed: %d\n", ret
);
368 davinci_serial_init(&mityomapl138_uart_config
);
370 ret
= da8xx_register_i2c(0, &mityomap_i2c_0_pdata
);
372 pr_warning("i2c0 registration failed: %d\n", ret
);
374 ret
= pmic_tps65023_init();
376 pr_warning("TPS65023 PMIC init failed: %d\n", ret
);
378 mityomapl138_setup_nand();
380 mityomapl138_config_emac();
382 ret
= da8xx_register_rtc();
384 pr_warning("rtc setup failed: %d\n", ret
);
386 ret
= da850_register_cpufreq("pll0_sysclk3");
388 pr_warning("cpufreq registration failed: %d\n", ret
);
390 ret
= da8xx_register_cpuidle();
392 pr_warning("cpuidle registration failed: %d\n", ret
);
394 ret
= da850_register_pm(&da850_pm_device
);
396 pr_warning("da850_evm_init: suspend registration failed: %d\n",
400 #ifdef CONFIG_SERIAL_8250_CONSOLE
401 static int __init
mityomapl138_console_init(void)
403 if (!machine_is_mityomapl138())
406 return add_preferred_console("ttyS", 1, "115200");
408 console_initcall(mityomapl138_console_init
);
411 static void __init
mityomapl138_map_io(void)
416 MACHINE_START(MITYOMAPL138
, "MityDSP-L138/MityARM-1808")
417 .boot_params
= (DA8XX_DDR_BASE
+ 0x100),
418 .map_io
= mityomapl138_map_io
,
419 .init_irq
= cp_intc_init
,
420 .timer
= &davinci_timer
,
421 .init_machine
= mityomapl138_init
,