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ath9k: unify edma and non-edma tx code, improve tx fifo handling
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / ath / ath9k / ath9k.h
blob41e7f383e89bd861d3d890920243962f16c5792b
1 /*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #ifndef ATH9K_H
18 #define ATH9K_H
19
20 #include <linux/etherdevice.h>
21 #include <linux/device.h>
22 #include <linux/leds.h>
23 #include <linux/completion.h>
24
25 #include "debug.h"
26 #include "common.h"
27
28 /*
29 * Header for the ath9k.ko driver core *only* -- hw code nor any other driver
30 * should rely on this file or its contents.
31 */
32
33 struct ath_node;
34
35 /* Macro to expand scalars to 64-bit objects */
36
37 #define ito64(x) (sizeof(x) == 1) ? \
38 (((unsigned long long int)(x)) & (0xff)) : \
39 (sizeof(x) == 2) ? \
40 (((unsigned long long int)(x)) & 0xffff) : \
41 ((sizeof(x) == 4) ? \
42 (((unsigned long long int)(x)) & 0xffffffff) : \
43 (unsigned long long int)(x))
44
45 /* increment with wrap-around */
46 #define INCR(_l, _sz) do { \
47 (_l)++; \
48 (_l) &= ((_sz) - 1); \
49 } while (0)
50
51 /* decrement with wrap-around */
52 #define DECR(_l, _sz) do { \
53 (_l)--; \
54 (_l) &= ((_sz) - 1); \
55 } while (0)
56
57 #define A_MAX(a, b) ((a) > (b) ? (a) : (b))
58
59 #define TSF_TO_TU(_h,_l) \
60 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
61
62 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
63
64 struct ath_config {
65 u16 txpowlimit;
66 u8 cabqReadytime;
67 };
68
69 /*************************/
70 /* Descriptor Management */
71 /*************************/
72
73 #define ATH_TXBUF_RESET(_bf) do { \
74 (_bf)->bf_stale = false; \
75 (_bf)->bf_lastbf = NULL; \
76 (_bf)->bf_next = NULL; \
77 memset(&((_bf)->bf_state), 0, \
78 sizeof(struct ath_buf_state)); \
79 } while (0)
80
81 #define ATH_RXBUF_RESET(_bf) do { \
82 (_bf)->bf_stale = false; \
83 } while (0)
84
85 /**
86 * enum buffer_type - Buffer type flags
87 *
88 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
89 * @BUF_AGGR: Indicates whether the buffer can be aggregated
90 * (used in aggregation scheduling)
91 * @BUF_XRETRY: To denote excessive retries of the buffer
92 */
93 enum buffer_type {
94 BUF_AMPDU = BIT(0),
95 BUF_AGGR = BIT(1),
96 BUF_XRETRY = BIT(2),
97 };
98
99 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
100 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
101 #define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY)
102
103 #define ATH_TXSTATUS_RING_SIZE 64
104
105 struct ath_descdma {
106 void *dd_desc;
107 dma_addr_t dd_desc_paddr;
108 u32 dd_desc_len;
109 struct ath_buf *dd_bufptr;
110 };
111
112 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
113 struct list_head *head, const char *name,
114 int nbuf, int ndesc, bool is_tx);
115 void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
116 struct list_head *head);
117
118 /***********/
119 /* RX / TX */
120 /***********/
121
122 #define ATH_RXBUF 512
123 #define ATH_TXBUF 512
124 #define ATH_TXBUF_RESERVE 5
125 #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
126 #define ATH_TXMAXTRY 13
127
128 #define TID_TO_WME_AC(_tid) \
129 ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \
130 (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \
131 (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \
132 WME_AC_VO)
133
134 #define ATH_AGGR_DELIM_SZ 4
135 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
136 /* number of delimiters for encryption padding */
137 #define ATH_AGGR_ENCRYPTDELIM 10
138 /* minimum h/w qdepth to be sustained to maximize aggregation */
139 #define ATH_AGGR_MIN_QDEPTH 2
140 #define ATH_AMPDU_SUBFRAME_DEFAULT 32
141
142 #define IEEE80211_SEQ_SEQ_SHIFT 4
143 #define IEEE80211_SEQ_MAX 4096
144 #define IEEE80211_WEP_IVLEN 3
145 #define IEEE80211_WEP_KIDLEN 1
146 #define IEEE80211_WEP_CRCLEN 4
147 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \
148 (IEEE80211_WEP_IVLEN + \
149 IEEE80211_WEP_KIDLEN + \
150 IEEE80211_WEP_CRCLEN))
151
152 /* return whether a bit at index _n in bitmap _bm is set
153 * _sz is the size of the bitmap */
154 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
155 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
156
157 /* return block-ack bitmap index given sequence and starting sequence */
158 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
159
160 /* returns delimiter padding required given the packet length */
161 #define ATH_AGGR_GET_NDELIM(_len) \
162 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \
163 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
164
165 #define BAW_WITHIN(_start, _bawsz, _seqno) \
166 ((((_seqno) - (_start)) & 4095) < (_bawsz))
167
168 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
169
170 #define ATH_TX_COMPLETE_POLL_INT 1000
171
172 enum ATH_AGGR_STATUS {
173 ATH_AGGR_DONE,
174 ATH_AGGR_BAW_CLOSED,
175 ATH_AGGR_LIMITED,
176 };
177
178 #define ATH_TXFIFO_DEPTH 8
179 struct ath_txq {
180 int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */
181 u32 axq_qnum; /* ath9k hardware queue number */
182 void *axq_link;
183 struct list_head axq_q;
184 spinlock_t axq_lock;
185 u32 axq_depth;
186 u32 axq_ampdu_depth;
187 bool stopped;
188 bool axq_tx_inprogress;
189 struct list_head axq_acq;
190 struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
191 u8 txq_headidx;
192 u8 txq_tailidx;
193 int pending_frames;
194 };
195
196 struct ath_atx_ac {
197 struct ath_txq *txq;
198 int sched;
199 struct list_head list;
200 struct list_head tid_q;
201 bool clear_ps_filter;
202 };
203
204 struct ath_frame_info {
205 int framelen;
206 u32 keyix;
207 enum ath9k_key_type keytype;
208 u8 retries;
209 u16 seqno;
210 };
211
212 struct ath_buf_state {
213 u8 bf_type;
214 u8 bfs_paprd;
215 unsigned long bfs_paprd_timestamp;
216 enum ath9k_internal_frame_type bfs_ftype;
217 };
218
219 struct ath_buf {
220 struct list_head list;
221 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
222 an aggregate) */
223 struct ath_buf *bf_next; /* next subframe in the aggregate */
224 struct sk_buff *bf_mpdu; /* enclosing frame structure */
225 void *bf_desc; /* virtual addr of desc */
226 dma_addr_t bf_daddr; /* physical addr of desc */
227 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */
228 bool bf_stale;
229 u16 bf_flags;
230 struct ath_buf_state bf_state;
231 };
232
233 struct ath_atx_tid {
234 struct list_head list;
235 struct list_head buf_q;
236 struct ath_node *an;
237 struct ath_atx_ac *ac;
238 unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)];
239 u16 seq_start;
240 u16 seq_next;
241 u16 baw_size;
242 int tidno;
243 int baw_head; /* first un-acked tx buffer */
244 int baw_tail; /* next unused tx buffer slot */
245 int sched;
246 int paused;
247 u8 state;
248 };
249
250 struct ath_node {
251 #ifdef CONFIG_ATH9K_DEBUGFS
252 struct list_head list; /* for sc->nodes */
253 struct ieee80211_sta *sta; /* station struct we're part of */
254 #endif
255 struct ath_atx_tid tid[WME_NUM_TID];
256 struct ath_atx_ac ac[WME_NUM_AC];
257 int ps_key;
258
259 u16 maxampdu;
260 u8 mpdudensity;
261
262 bool sleeping;
263 };
264
265 #define AGGR_CLEANUP BIT(1)
266 #define AGGR_ADDBA_COMPLETE BIT(2)
267 #define AGGR_ADDBA_PROGRESS BIT(3)
268
269 struct ath_tx_control {
270 struct ath_txq *txq;
271 struct ath_node *an;
272 int if_id;
273 enum ath9k_internal_frame_type frame_type;
274 u8 paprd;
275 };
276
277 #define ATH_TX_ERROR 0x01
278 #define ATH_TX_XRETRY 0x02
279 #define ATH_TX_BAR 0x04
280
281 /**
282 * @txq_map: Index is mac80211 queue number. This is
283 * not necessarily the same as the hardware queue number
284 * (axq_qnum).
285 */
286 struct ath_tx {
287 u16 seq_no;
288 u32 txqsetup;
289 spinlock_t txbuflock;
290 struct list_head txbuf;
291 struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
292 struct ath_descdma txdma;
293 struct ath_txq *txq_map[WME_NUM_AC];
294 };
295
296 struct ath_rx_edma {
297 struct sk_buff_head rx_fifo;
298 struct sk_buff_head rx_buffers;
299 u32 rx_fifo_hwsize;
300 };
301
302 struct ath_rx {
303 u8 defant;
304 u8 rxotherant;
305 u32 *rxlink;
306 unsigned int rxfilter;
307 spinlock_t rxbuflock;
308 struct list_head rxbuf;
309 struct ath_descdma rxdma;
310 struct ath_buf *rx_bufptr;
311 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
312
313 struct sk_buff *frag;
314 };
315
316 int ath_startrecv(struct ath_softc *sc);
317 bool ath_stoprecv(struct ath_softc *sc);
318 void ath_flushrecv(struct ath_softc *sc);
319 u32 ath_calcrxfilter(struct ath_softc *sc);
320 int ath_rx_init(struct ath_softc *sc, int nbufs);
321 void ath_rx_cleanup(struct ath_softc *sc);
322 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
323 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
324 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
325 bool ath_drain_all_txq(struct ath_softc *sc, bool retry_tx);
326 void ath_draintxq(struct ath_softc *sc,
327 struct ath_txq *txq, bool retry_tx);
328 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
329 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
330 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
331 int ath_tx_init(struct ath_softc *sc, int nbufs);
332 void ath_tx_cleanup(struct ath_softc *sc);
333 int ath_txq_update(struct ath_softc *sc, int qnum,
334 struct ath9k_tx_queue_info *q);
335 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
336 struct ath_tx_control *txctl);
337 void ath_tx_tasklet(struct ath_softc *sc);
338 void ath_tx_edma_tasklet(struct ath_softc *sc);
339 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
340 u16 tid, u16 *ssn);
341 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
342 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
343
344 void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an);
345 bool ath_tx_aggr_sleep(struct ath_softc *sc, struct ath_node *an);
346
347 /********/
348 /* VIFs */
349 /********/
350
351 struct ath_vif {
352 int av_bslot;
353 bool is_bslot_active, primary_sta_vif;
354 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
355 struct ath_buf *av_bcbuf;
356 };
357
358 /*******************/
359 /* Beacon Handling */
360 /*******************/
361
362 /*
363 * Regardless of the number of beacons we stagger, (i.e. regardless of the
364 * number of BSSIDs) if a given beacon does not go out even after waiting this
365 * number of beacon intervals, the game's up.
366 */
367 #define BSTUCK_THRESH 9
368 #define ATH_BCBUF 4
369 #define ATH_DEFAULT_BINTVAL 100 /* TU */
370 #define ATH_DEFAULT_BMISS_LIMIT 10
371 #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024)
372
373 struct ath_beacon_config {
374 int beacon_interval;
375 u16 listen_interval;
376 u16 dtim_period;
377 u16 bmiss_timeout;
378 u8 dtim_count;
379 };
380
381 struct ath_beacon {
382 enum {
383 OK, /* no change needed */
384 UPDATE, /* update pending */
385 COMMIT /* beacon sent, commit change */
386 } updateslot; /* slot time update fsm */
387
388 u32 beaconq;
389 u32 bmisscnt;
390 u32 ast_be_xmit;
391 u32 bc_tstamp;
392 struct ieee80211_vif *bslot[ATH_BCBUF];
393 int slottime;
394 int slotupdate;
395 struct ath9k_tx_queue_info beacon_qi;
396 struct ath_descdma bdma;
397 struct ath_txq *cabq;
398 struct list_head bbuf;
399
400 bool tx_processed;
401 bool tx_last;
402 };
403
404 void ath_beacon_tasklet(unsigned long data);
405 void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
406 int ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_vif *vif);
407 void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
408 int ath_beaconq_config(struct ath_softc *sc);
409 void ath_set_beacon(struct ath_softc *sc);
410 void ath9k_set_beaconing_status(struct ath_softc *sc, bool status);
411
412 /*******/
413 /* ANI */
414 /*******/
415
416 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
417 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
418 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */
419 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */
420 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */
421 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
422 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
423
424 #define ATH_PAPRD_TIMEOUT 100 /* msecs */
425
426 void ath_hw_check(struct work_struct *work);
427 void ath_hw_pll_work(struct work_struct *work);
428 void ath_paprd_calibrate(struct work_struct *work);
429 void ath_ani_calibrate(unsigned long data);
430
431 /**********/
432 /* BTCOEX */
433 /**********/
434
435 struct ath_btcoex {
436 bool hw_timer_enabled;
437 spinlock_t btcoex_lock;
438 struct timer_list period_timer; /* Timer for BT period */
439 u32 bt_priority_cnt;
440 unsigned long bt_priority_time;
441 int bt_stomp_type; /* Types of BT stomping */
442 u32 btcoex_no_stomp; /* in usec */
443 u32 btcoex_period; /* in usec */
444 u32 btscan_no_stomp; /* in usec */
445 struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */
446 };
447
448 int ath_init_btcoex_timer(struct ath_softc *sc);
449 void ath9k_btcoex_timer_resume(struct ath_softc *sc);
450 void ath9k_btcoex_timer_pause(struct ath_softc *sc);
451
452 /********************/
453 /* LED Control */
454 /********************/
455
456 #define ATH_LED_PIN_DEF 1
457 #define ATH_LED_PIN_9287 8
458 #define ATH_LED_PIN_9300 10
459 #define ATH_LED_PIN_9485 6
460
461 #ifdef CONFIG_MAC80211_LEDS
462 void ath_init_leds(struct ath_softc *sc);
463 void ath_deinit_leds(struct ath_softc *sc);
464 #else
465 static inline void ath_init_leds(struct ath_softc *sc)
466 {
467 }
468
469 static inline void ath_deinit_leds(struct ath_softc *sc)
470 {
471 }
472 #endif
473
474
475 /* Antenna diversity/combining */
476 #define ATH_ANT_RX_CURRENT_SHIFT 4
477 #define ATH_ANT_RX_MAIN_SHIFT 2
478 #define ATH_ANT_RX_MASK 0x3
479
480 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50
481 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100
482 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200
483 #define ATH_ANT_DIV_COMB_INIT_COUNT 95
484 #define ATH_ANT_DIV_COMB_MAX_COUNT 100
485 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30
486 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20
487
488 #define ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA -1
489 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4
490 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2
491 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2
492
493 enum ath9k_ant_div_comb_lna_conf {
494 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2,
495 ATH_ANT_DIV_COMB_LNA2,
496 ATH_ANT_DIV_COMB_LNA1,
497 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2,
498 };
499
500 struct ath_ant_comb {
501 u16 count;
502 u16 total_pkt_count;
503 bool scan;
504 bool scan_not_start;
505 int main_total_rssi;
506 int alt_total_rssi;
507 int alt_recv_cnt;
508 int main_recv_cnt;
509 int rssi_lna1;
510 int rssi_lna2;
511 int rssi_add;
512 int rssi_sub;
513 int rssi_first;
514 int rssi_second;
515 int rssi_third;
516 bool alt_good;
517 int quick_scan_cnt;
518 int main_conf;
519 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf;
520 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf;
521 int first_bias;
522 int second_bias;
523 bool first_ratio;
524 bool second_ratio;
525 unsigned long scan_start_time;
526 };
527
528 /********************/
529 /* Main driver core */
530 /********************/
531
532 /*
533 * Default cache line size, in bytes.
534 * Used when PCI device not fully initialized by bootrom/BIOS
535 */
536 #define DEFAULT_CACHELINE 32
537 #define ATH_REGCLASSIDS_MAX 10
538 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
539 #define ATH_MAX_SW_RETRIES 10
540 #define ATH_CHAN_MAX 255
541
542 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
543 #define ATH_RATE_DUMMY_MARKER 0
544
545 #define SC_OP_INVALID BIT(0)
546 #define SC_OP_BEACONS BIT(1)
547 #define SC_OP_RXAGGR BIT(2)
548 #define SC_OP_TXAGGR BIT(3)
549 #define SC_OP_OFFCHANNEL BIT(4)
550 #define SC_OP_PREAMBLE_SHORT BIT(5)
551 #define SC_OP_PROTECT_ENABLE BIT(6)
552 #define SC_OP_RXFLUSH BIT(7)
553 #define SC_OP_LED_ASSOCIATED BIT(8)
554 #define SC_OP_LED_ON BIT(9)
555 #define SC_OP_TSF_RESET BIT(11)
556 #define SC_OP_BT_PRIORITY_DETECTED BIT(12)
557 #define SC_OP_BT_SCAN BIT(13)
558 #define SC_OP_ANI_RUN BIT(14)
559 #define SC_OP_ENABLE_APM BIT(15)
560 #define SC_OP_PRIM_STA_VIF BIT(16)
561
562 /* Powersave flags */
563 #define PS_WAIT_FOR_BEACON BIT(0)
564 #define PS_WAIT_FOR_CAB BIT(1)
565 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2)
566 #define PS_WAIT_FOR_TX_ACK BIT(3)
567 #define PS_BEACON_SYNC BIT(4)
568 #define PS_TSFOOR_SYNC BIT(5)
569
570 struct ath_rate_table;
571
572 struct ath9k_vif_iter_data {
573 const u8 *hw_macaddr; /* phy's hardware address, set
574 * before starting iteration for
575 * valid bssid mask.
576 */
577 u8 mask[ETH_ALEN]; /* bssid mask */
578 int naps; /* number of AP vifs */
579 int nmeshes; /* number of mesh vifs */
580 int nstations; /* number of station vifs */
581 int nwds; /* number of nwd vifs */
582 int nadhocs; /* number of adhoc vifs */
583 int nothers; /* number of vifs not specified above. */
584 };
585
586 struct ath_softc {
587 struct ieee80211_hw *hw;
588 struct device *dev;
589
590 int chan_idx;
591 int chan_is_ht;
592 struct survey_info *cur_survey;
593 struct survey_info survey[ATH9K_NUM_CHANNELS];
594
595 struct tasklet_struct intr_tq;
596 struct tasklet_struct bcon_tasklet;
597 struct ath_hw *sc_ah;
598 void __iomem *mem;
599 int irq;
600 spinlock_t sc_serial_rw;
601 spinlock_t sc_pm_lock;
602 spinlock_t sc_pcu_lock;
603 struct mutex mutex;
604 struct work_struct paprd_work;
605 struct work_struct hw_check_work;
606 struct completion paprd_complete;
607
608 unsigned int hw_busy_count;
609
610 u32 intrstatus;
611 u32 sc_flags; /* SC_OP_* */
612 u16 ps_flags; /* PS_* */
613 u16 curtxpow;
614 bool ps_enabled;
615 bool ps_idle;
616 short nbcnvifs;
617 short nvifs;
618 unsigned long ps_usecount;
619
620 struct ath_config config;
621 struct ath_rx rx;
622 struct ath_tx tx;
623 struct ath_beacon beacon;
624 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
625
626 #ifdef CONFIG_MAC80211_LEDS
627 bool led_registered;
628 char led_name[32];
629 struct led_classdev led_cdev;
630 #endif
631
632 struct ath9k_hw_cal_data caldata;
633 int last_rssi;
634
635 #ifdef CONFIG_ATH9K_DEBUGFS
636 struct ath9k_debug debug;
637 spinlock_t nodes_lock;
638 struct list_head nodes; /* basically, stations */
639 unsigned int tx_complete_poll_work_seen;
640 #endif
641 struct ath_beacon_config cur_beacon_conf;
642 struct delayed_work tx_complete_work;
643 struct delayed_work hw_pll_work;
644 struct ath_btcoex btcoex;
645
646 struct ath_descdma txsdma;
647
648 struct ath_ant_comb ant_comb;
649 };
650
651 void ath9k_tasklet(unsigned long data);
652 int ath_reset(struct ath_softc *sc, bool retry_tx);
653 int ath_cabq_update(struct ath_softc *);
654
655 static inline void ath_read_cachesize(struct ath_common *common, int *csz)
656 {
657 common->bus_ops->read_cachesize(common, csz);
658 }
659
660 extern struct ieee80211_ops ath9k_ops;
661 extern int ath9k_modparam_nohwcrypt;
662 extern int led_blink;
663 extern bool is_ath9k_unloaded;
664
665 irqreturn_t ath_isr(int irq, void *dev);
666 void ath9k_init_crypto(struct ath_softc *sc);
667 int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
668 const struct ath_bus_ops *bus_ops);
669 void ath9k_deinit_device(struct ath_softc *sc);
670 void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
671 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
672 struct ath9k_channel *hchan);
673
674 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw);
675 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw);
676 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode);
677 bool ath9k_uses_beacons(int type);
678
679 #ifdef CONFIG_ATH9K_PCI
680 int ath_pci_init(void);
681 void ath_pci_exit(void);
682 #else
683 static inline int ath_pci_init(void) { return 0; };
684 static inline void ath_pci_exit(void) {};
685 #endif
686
687 #ifdef CONFIG_ATH9K_AHB
688 int ath_ahb_init(void);
689 void ath_ahb_exit(void);
690 #else
691 static inline int ath_ahb_init(void) { return 0; };
692 static inline void ath_ahb_exit(void) {};
693 #endif
694
695 void ath9k_ps_wakeup(struct ath_softc *sc);
696 void ath9k_ps_restore(struct ath_softc *sc);
697
698 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
699
700 void ath_start_rfkill_poll(struct ath_softc *sc);
701 extern void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
702 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
703 struct ieee80211_vif *vif,
704 struct ath9k_vif_iter_data *iter_data);
705
706
707 #endif /* ATH9K_H */
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree