2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <linux/hash.h>
47 #include <trace/events/kvm.h>
49 #define CREATE_TRACE_POINTS
52 #include <asm/debugreg.h>
59 #include <asm/pvclock.h>
60 #include <asm/div64.h>
62 #define MAX_IO_MSRS 256
63 #define CR0_RESERVED_BITS \
64 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
65 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
66 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
67 #define CR4_RESERVED_BITS \
68 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
69 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
70 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
72 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
74 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
76 #define KVM_MAX_MCE_BANKS 32
77 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
80 * - enable syscall per default because its emulated by KVM
81 * - enable LME and LMA per default on 64 bit KVM
84 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffafeULL
;
86 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffffeULL
;
89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
92 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
93 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
94 struct kvm_cpuid_entry2 __user
*entries
);
96 struct kvm_x86_ops
*kvm_x86_ops
;
97 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
100 module_param_named(ignore_msrs
, ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
102 #define KVM_NR_SHARED_MSRS 16
104 struct kvm_shared_msrs_global
{
106 u32 msrs
[KVM_NR_SHARED_MSRS
];
109 struct kvm_shared_msrs
{
110 struct user_return_notifier urn
;
112 struct kvm_shared_msr_values
{
115 } values
[KVM_NR_SHARED_MSRS
];
118 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
119 static DEFINE_PER_CPU(struct kvm_shared_msrs
, shared_msrs
);
121 struct kvm_stats_debugfs_item debugfs_entries
[] = {
122 { "pf_fixed", VCPU_STAT(pf_fixed
) },
123 { "pf_guest", VCPU_STAT(pf_guest
) },
124 { "tlb_flush", VCPU_STAT(tlb_flush
) },
125 { "invlpg", VCPU_STAT(invlpg
) },
126 { "exits", VCPU_STAT(exits
) },
127 { "io_exits", VCPU_STAT(io_exits
) },
128 { "mmio_exits", VCPU_STAT(mmio_exits
) },
129 { "signal_exits", VCPU_STAT(signal_exits
) },
130 { "irq_window", VCPU_STAT(irq_window_exits
) },
131 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
132 { "halt_exits", VCPU_STAT(halt_exits
) },
133 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
134 { "hypercalls", VCPU_STAT(hypercalls
) },
135 { "request_irq", VCPU_STAT(request_irq_exits
) },
136 { "irq_exits", VCPU_STAT(irq_exits
) },
137 { "host_state_reload", VCPU_STAT(host_state_reload
) },
138 { "efer_reload", VCPU_STAT(efer_reload
) },
139 { "fpu_reload", VCPU_STAT(fpu_reload
) },
140 { "insn_emulation", VCPU_STAT(insn_emulation
) },
141 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
142 { "irq_injections", VCPU_STAT(irq_injections
) },
143 { "nmi_injections", VCPU_STAT(nmi_injections
) },
144 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
145 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
146 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
147 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
148 { "mmu_flooded", VM_STAT(mmu_flooded
) },
149 { "mmu_recycled", VM_STAT(mmu_recycled
) },
150 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
151 { "mmu_unsync", VM_STAT(mmu_unsync
) },
152 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
153 { "largepages", VM_STAT(lpages
) },
157 u64 __read_mostly host_xcr0
;
159 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
162 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
163 vcpu
->arch
.apf
.gfns
[i
] = ~0;
166 static void kvm_on_user_return(struct user_return_notifier
*urn
)
169 struct kvm_shared_msrs
*locals
170 = container_of(urn
, struct kvm_shared_msrs
, urn
);
171 struct kvm_shared_msr_values
*values
;
173 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
174 values
= &locals
->values
[slot
];
175 if (values
->host
!= values
->curr
) {
176 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
177 values
->curr
= values
->host
;
180 locals
->registered
= false;
181 user_return_notifier_unregister(urn
);
184 static void shared_msr_update(unsigned slot
, u32 msr
)
186 struct kvm_shared_msrs
*smsr
;
189 smsr
= &__get_cpu_var(shared_msrs
);
190 /* only read, and nobody should modify it at this time,
191 * so don't need lock */
192 if (slot
>= shared_msrs_global
.nr
) {
193 printk(KERN_ERR
"kvm: invalid MSR slot!");
196 rdmsrl_safe(msr
, &value
);
197 smsr
->values
[slot
].host
= value
;
198 smsr
->values
[slot
].curr
= value
;
201 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
203 if (slot
>= shared_msrs_global
.nr
)
204 shared_msrs_global
.nr
= slot
+ 1;
205 shared_msrs_global
.msrs
[slot
] = msr
;
206 /* we need ensured the shared_msr_global have been updated */
209 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
211 static void kvm_shared_msr_cpu_online(void)
215 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
216 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
219 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
221 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
223 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
225 smsr
->values
[slot
].curr
= value
;
226 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
227 if (!smsr
->registered
) {
228 smsr
->urn
.on_user_return
= kvm_on_user_return
;
229 user_return_notifier_register(&smsr
->urn
);
230 smsr
->registered
= true;
233 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
235 static void drop_user_return_notifiers(void *ignore
)
237 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
239 if (smsr
->registered
)
240 kvm_on_user_return(&smsr
->urn
);
243 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
245 if (irqchip_in_kernel(vcpu
->kvm
))
246 return vcpu
->arch
.apic_base
;
248 return vcpu
->arch
.apic_base
;
250 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
252 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
254 /* TODO: reserve bits check */
255 if (irqchip_in_kernel(vcpu
->kvm
))
256 kvm_lapic_set_base(vcpu
, data
);
258 vcpu
->arch
.apic_base
= data
;
260 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
262 #define EXCPT_BENIGN 0
263 #define EXCPT_CONTRIBUTORY 1
266 static int exception_class(int vector
)
276 return EXCPT_CONTRIBUTORY
;
283 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
284 unsigned nr
, bool has_error
, u32 error_code
,
290 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
292 if (!vcpu
->arch
.exception
.pending
) {
294 vcpu
->arch
.exception
.pending
= true;
295 vcpu
->arch
.exception
.has_error_code
= has_error
;
296 vcpu
->arch
.exception
.nr
= nr
;
297 vcpu
->arch
.exception
.error_code
= error_code
;
298 vcpu
->arch
.exception
.reinject
= reinject
;
302 /* to check exception */
303 prev_nr
= vcpu
->arch
.exception
.nr
;
304 if (prev_nr
== DF_VECTOR
) {
305 /* triple fault -> shutdown */
306 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
309 class1
= exception_class(prev_nr
);
310 class2
= exception_class(nr
);
311 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
312 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
313 /* generate double fault per SDM Table 5-5 */
314 vcpu
->arch
.exception
.pending
= true;
315 vcpu
->arch
.exception
.has_error_code
= true;
316 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
317 vcpu
->arch
.exception
.error_code
= 0;
319 /* replace previous exception with a new one in a hope
320 that instruction re-execution will regenerate lost
325 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
327 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
329 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
331 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
333 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
335 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
337 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
339 ++vcpu
->stat
.pf_guest
;
340 vcpu
->arch
.cr2
= fault
->address
;
341 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
344 void kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
346 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
347 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
349 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
352 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
354 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
355 vcpu
->arch
.nmi_pending
= 1;
357 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
359 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
361 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
363 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
365 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
367 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
369 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
372 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
373 * a #GP and return false.
375 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
377 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
379 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
382 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
385 * This function will be used to read from the physical memory of the currently
386 * running guest. The difference to kvm_read_guest_page is that this function
387 * can read from guest physical or from the guest's guest physical memory.
389 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
390 gfn_t ngfn
, void *data
, int offset
, int len
,
396 ngpa
= gfn_to_gpa(ngfn
);
397 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
);
398 if (real_gfn
== UNMAPPED_GVA
)
401 real_gfn
= gpa_to_gfn(real_gfn
);
403 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
405 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
407 int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
408 void *data
, int offset
, int len
, u32 access
)
410 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
411 data
, offset
, len
, access
);
415 * Load the pae pdptrs. Return true is they are all valid.
417 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
419 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
420 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
423 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
425 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
426 offset
* sizeof(u64
), sizeof(pdpte
),
427 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
432 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
433 if (is_present_gpte(pdpte
[i
]) &&
434 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
441 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
442 __set_bit(VCPU_EXREG_PDPTR
,
443 (unsigned long *)&vcpu
->arch
.regs_avail
);
444 __set_bit(VCPU_EXREG_PDPTR
,
445 (unsigned long *)&vcpu
->arch
.regs_dirty
);
450 EXPORT_SYMBOL_GPL(load_pdptrs
);
452 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
454 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
460 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
463 if (!test_bit(VCPU_EXREG_PDPTR
,
464 (unsigned long *)&vcpu
->arch
.regs_avail
))
467 gfn
= (vcpu
->arch
.cr3
& ~31u) >> PAGE_SHIFT
;
468 offset
= (vcpu
->arch
.cr3
& ~31u) & (PAGE_SIZE
- 1);
469 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
470 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
473 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
479 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
481 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
482 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
483 X86_CR0_CD
| X86_CR0_NW
;
488 if (cr0
& 0xffffffff00000000UL
)
492 cr0
&= ~CR0_RESERVED_BITS
;
494 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
497 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
500 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
502 if ((vcpu
->arch
.efer
& EFER_LME
)) {
507 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
512 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
517 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
519 if ((cr0
^ old_cr0
) & X86_CR0_PG
)
520 kvm_clear_async_pf_completion_queue(vcpu
);
522 if ((cr0
^ old_cr0
) & update_bits
)
523 kvm_mmu_reset_context(vcpu
);
526 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
528 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
530 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
532 EXPORT_SYMBOL_GPL(kvm_lmsw
);
534 int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
538 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
539 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
542 if (kvm_x86_ops
->get_cpl(vcpu
) != 0)
544 if (!(xcr0
& XSTATE_FP
))
546 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
548 if (xcr0
& ~host_xcr0
)
550 vcpu
->arch
.xcr0
= xcr0
;
551 vcpu
->guest_xcr0_loaded
= 0;
555 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
557 if (__kvm_set_xcr(vcpu
, index
, xcr
)) {
558 kvm_inject_gp(vcpu
, 0);
563 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
565 static bool guest_cpuid_has_xsave(struct kvm_vcpu
*vcpu
)
567 struct kvm_cpuid_entry2
*best
;
569 best
= kvm_find_cpuid_entry(vcpu
, 1, 0);
570 return best
&& (best
->ecx
& bit(X86_FEATURE_XSAVE
));
573 static void update_cpuid(struct kvm_vcpu
*vcpu
)
575 struct kvm_cpuid_entry2
*best
;
577 best
= kvm_find_cpuid_entry(vcpu
, 1, 0);
581 /* Update OSXSAVE bit */
582 if (cpu_has_xsave
&& best
->function
== 0x1) {
583 best
->ecx
&= ~(bit(X86_FEATURE_OSXSAVE
));
584 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
))
585 best
->ecx
|= bit(X86_FEATURE_OSXSAVE
);
589 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
591 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
592 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
;
594 if (cr4
& CR4_RESERVED_BITS
)
597 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
600 if (is_long_mode(vcpu
)) {
601 if (!(cr4
& X86_CR4_PAE
))
603 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
604 && ((cr4
^ old_cr4
) & pdptr_bits
)
605 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, vcpu
->arch
.cr3
))
608 if (cr4
& X86_CR4_VMXE
)
611 kvm_x86_ops
->set_cr4(vcpu
, cr4
);
613 if ((cr4
^ old_cr4
) & pdptr_bits
)
614 kvm_mmu_reset_context(vcpu
);
616 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
621 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
623 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
625 if (cr3
== vcpu
->arch
.cr3
&& !pdptrs_changed(vcpu
)) {
626 kvm_mmu_sync_roots(vcpu
);
627 kvm_mmu_flush_tlb(vcpu
);
631 if (is_long_mode(vcpu
)) {
632 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
636 if (cr3
& CR3_PAE_RESERVED_BITS
)
638 if (is_paging(vcpu
) &&
639 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
643 * We don't check reserved bits in nonpae mode, because
644 * this isn't enforced, and VMware depends on this.
649 * Does the new cr3 value map to physical memory? (Note, we
650 * catch an invalid cr3 even in real-mode, because it would
651 * cause trouble later on when we turn on paging anyway.)
653 * A real CPU would silently accept an invalid cr3 and would
654 * attempt to use it - with largely undefined (and often hard
655 * to debug) behavior on the guest side.
657 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
659 vcpu
->arch
.cr3
= cr3
;
660 vcpu
->arch
.mmu
.new_cr3(vcpu
);
663 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
665 int __kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
667 if (cr8
& CR8_RESERVED_BITS
)
669 if (irqchip_in_kernel(vcpu
->kvm
))
670 kvm_lapic_set_tpr(vcpu
, cr8
);
672 vcpu
->arch
.cr8
= cr8
;
676 void kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
678 if (__kvm_set_cr8(vcpu
, cr8
))
679 kvm_inject_gp(vcpu
, 0);
681 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
683 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
685 if (irqchip_in_kernel(vcpu
->kvm
))
686 return kvm_lapic_get_cr8(vcpu
);
688 return vcpu
->arch
.cr8
;
690 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
692 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
696 vcpu
->arch
.db
[dr
] = val
;
697 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
698 vcpu
->arch
.eff_db
[dr
] = val
;
701 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
705 if (val
& 0xffffffff00000000ULL
)
707 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | DR6_FIXED_1
;
710 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
714 if (val
& 0xffffffff00000000ULL
)
716 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
717 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
718 kvm_x86_ops
->set_dr7(vcpu
, vcpu
->arch
.dr7
);
719 vcpu
->arch
.switch_db_regs
= (val
& DR7_BP_EN_MASK
);
727 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
731 res
= __kvm_set_dr(vcpu
, dr
, val
);
733 kvm_queue_exception(vcpu
, UD_VECTOR
);
735 kvm_inject_gp(vcpu
, 0);
739 EXPORT_SYMBOL_GPL(kvm_set_dr
);
741 static int _kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
745 *val
= vcpu
->arch
.db
[dr
];
748 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
752 *val
= vcpu
->arch
.dr6
;
755 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
759 *val
= vcpu
->arch
.dr7
;
766 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
768 if (_kvm_get_dr(vcpu
, dr
, val
)) {
769 kvm_queue_exception(vcpu
, UD_VECTOR
);
774 EXPORT_SYMBOL_GPL(kvm_get_dr
);
777 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
778 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
780 * This list is modified at module load time to reflect the
781 * capabilities of the host cpu. This capabilities test skips MSRs that are
782 * kvm-specific. Those are put in the beginning of the list.
785 #define KVM_SAVE_MSRS_BEGIN 8
786 static u32 msrs_to_save
[] = {
787 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
788 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
789 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
790 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
,
791 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
794 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
796 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
799 static unsigned num_msrs_to_save
;
801 static u32 emulated_msrs
[] = {
802 MSR_IA32_MISC_ENABLE
,
807 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
809 u64 old_efer
= vcpu
->arch
.efer
;
811 if (efer
& efer_reserved_bits
)
815 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
818 if (efer
& EFER_FFXSR
) {
819 struct kvm_cpuid_entry2
*feat
;
821 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
822 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
826 if (efer
& EFER_SVME
) {
827 struct kvm_cpuid_entry2
*feat
;
829 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
830 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
835 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
837 kvm_x86_ops
->set_efer(vcpu
, efer
);
839 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
841 /* Update reserved bits */
842 if ((efer
^ old_efer
) & EFER_NX
)
843 kvm_mmu_reset_context(vcpu
);
848 void kvm_enable_efer_bits(u64 mask
)
850 efer_reserved_bits
&= ~mask
;
852 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
856 * Writes msr value into into the appropriate "register".
857 * Returns 0 on success, non-0 otherwise.
858 * Assumes vcpu_load() was already called.
860 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
862 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
866 * Adapt set_msr() to msr_io()'s calling convention
868 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
870 return kvm_set_msr(vcpu
, index
, *data
);
873 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
877 struct pvclock_wall_clock wc
;
878 struct timespec boot
;
883 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
888 ++version
; /* first time write, random junk */
892 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
895 * The guest calculates current wall clock time by adding
896 * system time (updated by kvm_guest_time_update below) to the
897 * wall clock specified here. guest system time equals host
898 * system time for us, thus we must fill in host boot time here.
902 wc
.sec
= boot
.tv_sec
;
903 wc
.nsec
= boot
.tv_nsec
;
904 wc
.version
= version
;
906 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
909 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
912 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
914 uint32_t quotient
, remainder
;
916 /* Don't try to replace with do_div(), this one calculates
917 * "(dividend << 32) / divisor" */
919 : "=a" (quotient
), "=d" (remainder
)
920 : "0" (0), "1" (dividend
), "r" (divisor
) );
924 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
925 s8
*pshift
, u32
*pmultiplier
)
932 tps64
= base_khz
* 1000LL;
933 scaled64
= scaled_khz
* 1000LL;
934 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
939 tps32
= (uint32_t)tps64
;
940 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
941 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
949 *pmultiplier
= div_frac(scaled64
, tps32
);
951 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
952 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
955 static inline u64
get_kernel_ns(void)
959 WARN_ON(preemptible());
961 monotonic_to_bootbased(&ts
);
962 return timespec_to_ns(&ts
);
965 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
966 unsigned long max_tsc_khz
;
968 static inline int kvm_tsc_changes_freq(void)
971 int ret
= !boot_cpu_has(X86_FEATURE_CONSTANT_TSC
) &&
972 cpufreq_quick_get(cpu
) != 0;
977 static inline u64
nsec_to_cycles(u64 nsec
)
981 WARN_ON(preemptible());
982 if (kvm_tsc_changes_freq())
983 printk_once(KERN_WARNING
984 "kvm: unreliable cycle conversion on adjustable rate TSC\n");
985 ret
= nsec
* __get_cpu_var(cpu_tsc_khz
);
986 do_div(ret
, USEC_PER_SEC
);
990 static void kvm_arch_set_tsc_khz(struct kvm
*kvm
, u32 this_tsc_khz
)
992 /* Compute a scale to convert nanoseconds in TSC cycles */
993 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
994 &kvm
->arch
.virtual_tsc_shift
,
995 &kvm
->arch
.virtual_tsc_mult
);
996 kvm
->arch
.virtual_tsc_khz
= this_tsc_khz
;
999 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1001 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.last_tsc_nsec
,
1002 vcpu
->kvm
->arch
.virtual_tsc_mult
,
1003 vcpu
->kvm
->arch
.virtual_tsc_shift
);
1004 tsc
+= vcpu
->arch
.last_tsc_write
;
1008 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
1010 struct kvm
*kvm
= vcpu
->kvm
;
1011 u64 offset
, ns
, elapsed
;
1012 unsigned long flags
;
1015 spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1016 offset
= data
- native_read_tsc();
1017 ns
= get_kernel_ns();
1018 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1019 sdiff
= data
- kvm
->arch
.last_tsc_write
;
1024 * Special case: close write to TSC within 5 seconds of
1025 * another CPU is interpreted as an attempt to synchronize
1026 * The 5 seconds is to accomodate host load / swapping as
1027 * well as any reset of TSC during the boot process.
1029 * In that case, for a reliable TSC, we can match TSC offsets,
1030 * or make a best guest using elapsed value.
1032 if (sdiff
< nsec_to_cycles(5ULL * NSEC_PER_SEC
) &&
1033 elapsed
< 5ULL * NSEC_PER_SEC
) {
1034 if (!check_tsc_unstable()) {
1035 offset
= kvm
->arch
.last_tsc_offset
;
1036 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1038 u64 delta
= nsec_to_cycles(elapsed
);
1040 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1042 ns
= kvm
->arch
.last_tsc_nsec
;
1044 kvm
->arch
.last_tsc_nsec
= ns
;
1045 kvm
->arch
.last_tsc_write
= data
;
1046 kvm
->arch
.last_tsc_offset
= offset
;
1047 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1048 spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1050 /* Reset of TSC must disable overshoot protection below */
1051 vcpu
->arch
.hv_clock
.tsc_timestamp
= 0;
1052 vcpu
->arch
.last_tsc_write
= data
;
1053 vcpu
->arch
.last_tsc_nsec
= ns
;
1055 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1057 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1059 unsigned long flags
;
1060 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1062 unsigned long this_tsc_khz
;
1063 s64 kernel_ns
, max_kernel_ns
;
1066 /* Keep irq disabled to prevent changes to the clock */
1067 local_irq_save(flags
);
1068 kvm_get_msr(v
, MSR_IA32_TSC
, &tsc_timestamp
);
1069 kernel_ns
= get_kernel_ns();
1070 this_tsc_khz
= __get_cpu_var(cpu_tsc_khz
);
1072 if (unlikely(this_tsc_khz
== 0)) {
1073 local_irq_restore(flags
);
1074 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1079 * We may have to catch up the TSC to match elapsed wall clock
1080 * time for two reasons, even if kvmclock is used.
1081 * 1) CPU could have been running below the maximum TSC rate
1082 * 2) Broken TSC compensation resets the base at each VCPU
1083 * entry to avoid unknown leaps of TSC even when running
1084 * again on the same CPU. This may cause apparent elapsed
1085 * time to disappear, and the guest to stand still or run
1088 if (vcpu
->tsc_catchup
) {
1089 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1090 if (tsc
> tsc_timestamp
) {
1091 kvm_x86_ops
->adjust_tsc_offset(v
, tsc
- tsc_timestamp
);
1092 tsc_timestamp
= tsc
;
1096 local_irq_restore(flags
);
1098 if (!vcpu
->time_page
)
1102 * Time as measured by the TSC may go backwards when resetting the base
1103 * tsc_timestamp. The reason for this is that the TSC resolution is
1104 * higher than the resolution of the other clock scales. Thus, many
1105 * possible measurments of the TSC correspond to one measurement of any
1106 * other clock, and so a spread of values is possible. This is not a
1107 * problem for the computation of the nanosecond clock; with TSC rates
1108 * around 1GHZ, there can only be a few cycles which correspond to one
1109 * nanosecond value, and any path through this code will inevitably
1110 * take longer than that. However, with the kernel_ns value itself,
1111 * the precision may be much lower, down to HZ granularity. If the
1112 * first sampling of TSC against kernel_ns ends in the low part of the
1113 * range, and the second in the high end of the range, we can get:
1115 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1117 * As the sampling errors potentially range in the thousands of cycles,
1118 * it is possible such a time value has already been observed by the
1119 * guest. To protect against this, we must compute the system time as
1120 * observed by the guest and ensure the new system time is greater.
1123 if (vcpu
->hv_clock
.tsc_timestamp
&& vcpu
->last_guest_tsc
) {
1124 max_kernel_ns
= vcpu
->last_guest_tsc
-
1125 vcpu
->hv_clock
.tsc_timestamp
;
1126 max_kernel_ns
= pvclock_scale_delta(max_kernel_ns
,
1127 vcpu
->hv_clock
.tsc_to_system_mul
,
1128 vcpu
->hv_clock
.tsc_shift
);
1129 max_kernel_ns
+= vcpu
->last_kernel_ns
;
1132 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1133 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1134 &vcpu
->hv_clock
.tsc_shift
,
1135 &vcpu
->hv_clock
.tsc_to_system_mul
);
1136 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1139 if (max_kernel_ns
> kernel_ns
)
1140 kernel_ns
= max_kernel_ns
;
1142 /* With all the info we got, fill in the values */
1143 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1144 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1145 vcpu
->last_kernel_ns
= kernel_ns
;
1146 vcpu
->last_guest_tsc
= tsc_timestamp
;
1147 vcpu
->hv_clock
.flags
= 0;
1150 * The interface expects us to write an even number signaling that the
1151 * update is finished. Since the guest won't see the intermediate
1152 * state, we just increase by 2 at the end.
1154 vcpu
->hv_clock
.version
+= 2;
1156 shared_kaddr
= kmap_atomic(vcpu
->time_page
, KM_USER0
);
1158 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
1159 sizeof(vcpu
->hv_clock
));
1161 kunmap_atomic(shared_kaddr
, KM_USER0
);
1163 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
1167 static bool msr_mtrr_valid(unsigned msr
)
1170 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1171 case MSR_MTRRfix64K_00000
:
1172 case MSR_MTRRfix16K_80000
:
1173 case MSR_MTRRfix16K_A0000
:
1174 case MSR_MTRRfix4K_C0000
:
1175 case MSR_MTRRfix4K_C8000
:
1176 case MSR_MTRRfix4K_D0000
:
1177 case MSR_MTRRfix4K_D8000
:
1178 case MSR_MTRRfix4K_E0000
:
1179 case MSR_MTRRfix4K_E8000
:
1180 case MSR_MTRRfix4K_F0000
:
1181 case MSR_MTRRfix4K_F8000
:
1182 case MSR_MTRRdefType
:
1183 case MSR_IA32_CR_PAT
:
1191 static bool valid_pat_type(unsigned t
)
1193 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1196 static bool valid_mtrr_type(unsigned t
)
1198 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1201 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1205 if (!msr_mtrr_valid(msr
))
1208 if (msr
== MSR_IA32_CR_PAT
) {
1209 for (i
= 0; i
< 8; i
++)
1210 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1213 } else if (msr
== MSR_MTRRdefType
) {
1216 return valid_mtrr_type(data
& 0xff);
1217 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1218 for (i
= 0; i
< 8 ; i
++)
1219 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1224 /* variable MTRRs */
1225 return valid_mtrr_type(data
& 0xff);
1228 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1230 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1232 if (!mtrr_valid(vcpu
, msr
, data
))
1235 if (msr
== MSR_MTRRdefType
) {
1236 vcpu
->arch
.mtrr_state
.def_type
= data
;
1237 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1238 } else if (msr
== MSR_MTRRfix64K_00000
)
1240 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1241 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1242 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1243 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1244 else if (msr
== MSR_IA32_CR_PAT
)
1245 vcpu
->arch
.pat
= data
;
1246 else { /* Variable MTRRs */
1247 int idx
, is_mtrr_mask
;
1250 idx
= (msr
- 0x200) / 2;
1251 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1254 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1257 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1261 kvm_mmu_reset_context(vcpu
);
1265 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1267 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1268 unsigned bank_num
= mcg_cap
& 0xff;
1271 case MSR_IA32_MCG_STATUS
:
1272 vcpu
->arch
.mcg_status
= data
;
1274 case MSR_IA32_MCG_CTL
:
1275 if (!(mcg_cap
& MCG_CTL_P
))
1277 if (data
!= 0 && data
!= ~(u64
)0)
1279 vcpu
->arch
.mcg_ctl
= data
;
1282 if (msr
>= MSR_IA32_MC0_CTL
&&
1283 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1284 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1285 /* only 0 or all 1s can be written to IA32_MCi_CTL
1286 * some Linux kernels though clear bit 10 in bank 4 to
1287 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1288 * this to avoid an uncatched #GP in the guest
1290 if ((offset
& 0x3) == 0 &&
1291 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1293 vcpu
->arch
.mce_banks
[offset
] = data
;
1301 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1303 struct kvm
*kvm
= vcpu
->kvm
;
1304 int lm
= is_long_mode(vcpu
);
1305 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1306 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1307 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1308 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1309 u32 page_num
= data
& ~PAGE_MASK
;
1310 u64 page_addr
= data
& PAGE_MASK
;
1315 if (page_num
>= blob_size
)
1318 page
= kzalloc(PAGE_SIZE
, GFP_KERNEL
);
1322 if (copy_from_user(page
, blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
))
1324 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1333 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1335 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1338 static bool kvm_hv_msr_partition_wide(u32 msr
)
1342 case HV_X64_MSR_GUEST_OS_ID
:
1343 case HV_X64_MSR_HYPERCALL
:
1351 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1353 struct kvm
*kvm
= vcpu
->kvm
;
1356 case HV_X64_MSR_GUEST_OS_ID
:
1357 kvm
->arch
.hv_guest_os_id
= data
;
1358 /* setting guest os id to zero disables hypercall page */
1359 if (!kvm
->arch
.hv_guest_os_id
)
1360 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1362 case HV_X64_MSR_HYPERCALL
: {
1367 /* if guest os id is not set hypercall should remain disabled */
1368 if (!kvm
->arch
.hv_guest_os_id
)
1370 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1371 kvm
->arch
.hv_hypercall
= data
;
1374 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1375 addr
= gfn_to_hva(kvm
, gfn
);
1376 if (kvm_is_error_hva(addr
))
1378 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1379 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1380 if (copy_to_user((void __user
*)addr
, instructions
, 4))
1382 kvm
->arch
.hv_hypercall
= data
;
1386 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1387 "data 0x%llx\n", msr
, data
);
1393 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1396 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1399 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1400 vcpu
->arch
.hv_vapic
= data
;
1403 addr
= gfn_to_hva(vcpu
->kvm
, data
>>
1404 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
);
1405 if (kvm_is_error_hva(addr
))
1407 if (clear_user((void __user
*)addr
, PAGE_SIZE
))
1409 vcpu
->arch
.hv_vapic
= data
;
1412 case HV_X64_MSR_EOI
:
1413 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1414 case HV_X64_MSR_ICR
:
1415 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1416 case HV_X64_MSR_TPR
:
1417 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1419 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1420 "data 0x%llx\n", msr
, data
);
1427 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1429 gpa_t gpa
= data
& ~0x3f;
1431 /* Bits 2:5 are resrved, Should be zero */
1435 vcpu
->arch
.apf
.msr_val
= data
;
1437 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
1438 kvm_clear_async_pf_completion_queue(vcpu
);
1439 kvm_async_pf_hash_reset(vcpu
);
1443 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
))
1446 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
1447 kvm_async_pf_wakeup_all(vcpu
);
1451 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1455 return set_efer(vcpu
, data
);
1457 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1458 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
1460 pr_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1465 case MSR_FAM10H_MMIO_CONF_BASE
:
1467 pr_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1472 case MSR_AMD64_NB_CFG
:
1474 case MSR_IA32_DEBUGCTLMSR
:
1476 /* We support the non-activated case already */
1478 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1479 /* Values other than LBR and BTF are vendor-specific,
1480 thus reserved and should throw a #GP */
1483 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1486 case MSR_IA32_UCODE_REV
:
1487 case MSR_IA32_UCODE_WRITE
:
1488 case MSR_VM_HSAVE_PA
:
1489 case MSR_AMD64_PATCH_LOADER
:
1491 case 0x200 ... 0x2ff:
1492 return set_msr_mtrr(vcpu
, msr
, data
);
1493 case MSR_IA32_APICBASE
:
1494 kvm_set_apic_base(vcpu
, data
);
1496 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1497 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1498 case MSR_IA32_MISC_ENABLE
:
1499 vcpu
->arch
.ia32_misc_enable_msr
= data
;
1501 case MSR_KVM_WALL_CLOCK_NEW
:
1502 case MSR_KVM_WALL_CLOCK
:
1503 vcpu
->kvm
->arch
.wall_clock
= data
;
1504 kvm_write_wall_clock(vcpu
->kvm
, data
);
1506 case MSR_KVM_SYSTEM_TIME_NEW
:
1507 case MSR_KVM_SYSTEM_TIME
: {
1508 if (vcpu
->arch
.time_page
) {
1509 kvm_release_page_dirty(vcpu
->arch
.time_page
);
1510 vcpu
->arch
.time_page
= NULL
;
1513 vcpu
->arch
.time
= data
;
1514 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1516 /* we verify if the enable bit is set... */
1520 /* ...but clean it before doing the actual write */
1521 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
1523 vcpu
->arch
.time_page
=
1524 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
1526 if (is_error_page(vcpu
->arch
.time_page
)) {
1527 kvm_release_page_clean(vcpu
->arch
.time_page
);
1528 vcpu
->arch
.time_page
= NULL
;
1532 case MSR_KVM_ASYNC_PF_EN
:
1533 if (kvm_pv_enable_async_pf(vcpu
, data
))
1536 case MSR_IA32_MCG_CTL
:
1537 case MSR_IA32_MCG_STATUS
:
1538 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1539 return set_msr_mce(vcpu
, msr
, data
);
1541 /* Performance counters are not protected by a CPUID bit,
1542 * so we should check all of them in the generic path for the sake of
1543 * cross vendor migration.
1544 * Writing a zero into the event select MSRs disables them,
1545 * which we perfectly emulate ;-). Any other value should be at least
1546 * reported, some guests depend on them.
1548 case MSR_P6_EVNTSEL0
:
1549 case MSR_P6_EVNTSEL1
:
1550 case MSR_K7_EVNTSEL0
:
1551 case MSR_K7_EVNTSEL1
:
1552 case MSR_K7_EVNTSEL2
:
1553 case MSR_K7_EVNTSEL3
:
1555 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1556 "0x%x data 0x%llx\n", msr
, data
);
1558 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1559 * so we ignore writes to make it happy.
1561 case MSR_P6_PERFCTR0
:
1562 case MSR_P6_PERFCTR1
:
1563 case MSR_K7_PERFCTR0
:
1564 case MSR_K7_PERFCTR1
:
1565 case MSR_K7_PERFCTR2
:
1566 case MSR_K7_PERFCTR3
:
1567 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1568 "0x%x data 0x%llx\n", msr
, data
);
1570 case MSR_K7_CLK_CTL
:
1572 * Ignore all writes to this no longer documented MSR.
1573 * Writes are only relevant for old K7 processors,
1574 * all pre-dating SVM, but a recommended workaround from
1575 * AMD for these chips. It is possible to speicify the
1576 * affected processor models on the command line, hence
1577 * the need to ignore the workaround.
1580 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1581 if (kvm_hv_msr_partition_wide(msr
)) {
1583 mutex_lock(&vcpu
->kvm
->lock
);
1584 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
1585 mutex_unlock(&vcpu
->kvm
->lock
);
1588 return set_msr_hyperv(vcpu
, msr
, data
);
1591 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
1592 return xen_hvm_config(vcpu
, data
);
1594 pr_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
1598 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
1605 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
1609 * Reads an msr value (of 'msr_index') into 'pdata'.
1610 * Returns 0 on success, non-0 otherwise.
1611 * Assumes vcpu_load() was already called.
1613 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
1615 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
1618 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1620 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1622 if (!msr_mtrr_valid(msr
))
1625 if (msr
== MSR_MTRRdefType
)
1626 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
1627 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
1628 else if (msr
== MSR_MTRRfix64K_00000
)
1630 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1631 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
1632 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1633 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
1634 else if (msr
== MSR_IA32_CR_PAT
)
1635 *pdata
= vcpu
->arch
.pat
;
1636 else { /* Variable MTRRs */
1637 int idx
, is_mtrr_mask
;
1640 idx
= (msr
- 0x200) / 2;
1641 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1644 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1647 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1654 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1657 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1658 unsigned bank_num
= mcg_cap
& 0xff;
1661 case MSR_IA32_P5_MC_ADDR
:
1662 case MSR_IA32_P5_MC_TYPE
:
1665 case MSR_IA32_MCG_CAP
:
1666 data
= vcpu
->arch
.mcg_cap
;
1668 case MSR_IA32_MCG_CTL
:
1669 if (!(mcg_cap
& MCG_CTL_P
))
1671 data
= vcpu
->arch
.mcg_ctl
;
1673 case MSR_IA32_MCG_STATUS
:
1674 data
= vcpu
->arch
.mcg_status
;
1677 if (msr
>= MSR_IA32_MC0_CTL
&&
1678 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1679 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1680 data
= vcpu
->arch
.mce_banks
[offset
];
1689 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1692 struct kvm
*kvm
= vcpu
->kvm
;
1695 case HV_X64_MSR_GUEST_OS_ID
:
1696 data
= kvm
->arch
.hv_guest_os_id
;
1698 case HV_X64_MSR_HYPERCALL
:
1699 data
= kvm
->arch
.hv_hypercall
;
1702 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1710 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1715 case HV_X64_MSR_VP_INDEX
: {
1718 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
)
1723 case HV_X64_MSR_EOI
:
1724 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
1725 case HV_X64_MSR_ICR
:
1726 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
1727 case HV_X64_MSR_TPR
:
1728 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
1730 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1737 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1742 case MSR_IA32_PLATFORM_ID
:
1743 case MSR_IA32_UCODE_REV
:
1744 case MSR_IA32_EBL_CR_POWERON
:
1745 case MSR_IA32_DEBUGCTLMSR
:
1746 case MSR_IA32_LASTBRANCHFROMIP
:
1747 case MSR_IA32_LASTBRANCHTOIP
:
1748 case MSR_IA32_LASTINTFROMIP
:
1749 case MSR_IA32_LASTINTTOIP
:
1752 case MSR_VM_HSAVE_PA
:
1753 case MSR_P6_PERFCTR0
:
1754 case MSR_P6_PERFCTR1
:
1755 case MSR_P6_EVNTSEL0
:
1756 case MSR_P6_EVNTSEL1
:
1757 case MSR_K7_EVNTSEL0
:
1758 case MSR_K7_PERFCTR0
:
1759 case MSR_K8_INT_PENDING_MSG
:
1760 case MSR_AMD64_NB_CFG
:
1761 case MSR_FAM10H_MMIO_CONF_BASE
:
1765 data
= 0x500 | KVM_NR_VAR_MTRR
;
1767 case 0x200 ... 0x2ff:
1768 return get_msr_mtrr(vcpu
, msr
, pdata
);
1769 case 0xcd: /* fsb frequency */
1773 * MSR_EBC_FREQUENCY_ID
1774 * Conservative value valid for even the basic CPU models.
1775 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1776 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1777 * and 266MHz for model 3, or 4. Set Core Clock
1778 * Frequency to System Bus Frequency Ratio to 1 (bits
1779 * 31:24) even though these are only valid for CPU
1780 * models > 2, however guests may end up dividing or
1781 * multiplying by zero otherwise.
1783 case MSR_EBC_FREQUENCY_ID
:
1786 case MSR_IA32_APICBASE
:
1787 data
= kvm_get_apic_base(vcpu
);
1789 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1790 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1792 case MSR_IA32_MISC_ENABLE
:
1793 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1795 case MSR_IA32_PERF_STATUS
:
1796 /* TSC increment by tick */
1798 /* CPU multiplier */
1799 data
|= (((uint64_t)4ULL) << 40);
1802 data
= vcpu
->arch
.efer
;
1804 case MSR_KVM_WALL_CLOCK
:
1805 case MSR_KVM_WALL_CLOCK_NEW
:
1806 data
= vcpu
->kvm
->arch
.wall_clock
;
1808 case MSR_KVM_SYSTEM_TIME
:
1809 case MSR_KVM_SYSTEM_TIME_NEW
:
1810 data
= vcpu
->arch
.time
;
1812 case MSR_KVM_ASYNC_PF_EN
:
1813 data
= vcpu
->arch
.apf
.msr_val
;
1815 case MSR_IA32_P5_MC_ADDR
:
1816 case MSR_IA32_P5_MC_TYPE
:
1817 case MSR_IA32_MCG_CAP
:
1818 case MSR_IA32_MCG_CTL
:
1819 case MSR_IA32_MCG_STATUS
:
1820 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1821 return get_msr_mce(vcpu
, msr
, pdata
);
1822 case MSR_K7_CLK_CTL
:
1824 * Provide expected ramp-up count for K7. All other
1825 * are set to zero, indicating minimum divisors for
1828 * This prevents guest kernels on AMD host with CPU
1829 * type 6, model 8 and higher from exploding due to
1830 * the rdmsr failing.
1834 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1835 if (kvm_hv_msr_partition_wide(msr
)) {
1837 mutex_lock(&vcpu
->kvm
->lock
);
1838 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
1839 mutex_unlock(&vcpu
->kvm
->lock
);
1842 return get_msr_hyperv(vcpu
, msr
, pdata
);
1846 pr_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
1849 pr_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
1857 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
1860 * Read or write a bunch of msrs. All parameters are kernel addresses.
1862 * @return number of msrs set successfully.
1864 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
1865 struct kvm_msr_entry
*entries
,
1866 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1867 unsigned index
, u64
*data
))
1871 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
1872 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
1873 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
1875 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
1881 * Read or write a bunch of msrs. Parameters are user addresses.
1883 * @return number of msrs set successfully.
1885 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
1886 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1887 unsigned index
, u64
*data
),
1890 struct kvm_msrs msrs
;
1891 struct kvm_msr_entry
*entries
;
1896 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
1900 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
1904 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
1905 entries
= kmalloc(size
, GFP_KERNEL
);
1910 if (copy_from_user(entries
, user_msrs
->entries
, size
))
1913 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
1918 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
1929 int kvm_dev_ioctl_check_extension(long ext
)
1934 case KVM_CAP_IRQCHIP
:
1936 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
1937 case KVM_CAP_SET_TSS_ADDR
:
1938 case KVM_CAP_EXT_CPUID
:
1939 case KVM_CAP_CLOCKSOURCE
:
1941 case KVM_CAP_NOP_IO_DELAY
:
1942 case KVM_CAP_MP_STATE
:
1943 case KVM_CAP_SYNC_MMU
:
1944 case KVM_CAP_REINJECT_CONTROL
:
1945 case KVM_CAP_IRQ_INJECT_STATUS
:
1946 case KVM_CAP_ASSIGN_DEV_IRQ
:
1948 case KVM_CAP_IOEVENTFD
:
1950 case KVM_CAP_PIT_STATE2
:
1951 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
1952 case KVM_CAP_XEN_HVM
:
1953 case KVM_CAP_ADJUST_CLOCK
:
1954 case KVM_CAP_VCPU_EVENTS
:
1955 case KVM_CAP_HYPERV
:
1956 case KVM_CAP_HYPERV_VAPIC
:
1957 case KVM_CAP_HYPERV_SPIN
:
1958 case KVM_CAP_PCI_SEGMENT
:
1959 case KVM_CAP_DEBUGREGS
:
1960 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
1962 case KVM_CAP_ASYNC_PF
:
1965 case KVM_CAP_COALESCED_MMIO
:
1966 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
1969 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
1971 case KVM_CAP_NR_VCPUS
:
1974 case KVM_CAP_NR_MEMSLOTS
:
1975 r
= KVM_MEMORY_SLOTS
;
1977 case KVM_CAP_PV_MMU
: /* obsolete */
1984 r
= KVM_MAX_MCE_BANKS
;
1997 long kvm_arch_dev_ioctl(struct file
*filp
,
1998 unsigned int ioctl
, unsigned long arg
)
2000 void __user
*argp
= (void __user
*)arg
;
2004 case KVM_GET_MSR_INDEX_LIST
: {
2005 struct kvm_msr_list __user
*user_msr_list
= argp
;
2006 struct kvm_msr_list msr_list
;
2010 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2013 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
2014 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2017 if (n
< msr_list
.nmsrs
)
2020 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2021 num_msrs_to_save
* sizeof(u32
)))
2023 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2025 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
2030 case KVM_GET_SUPPORTED_CPUID
: {
2031 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2032 struct kvm_cpuid2 cpuid
;
2035 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2037 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
2038 cpuid_arg
->entries
);
2043 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2048 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2051 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2053 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2065 static void wbinvd_ipi(void *garbage
)
2070 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2072 return vcpu
->kvm
->arch
.iommu_domain
&&
2073 !(vcpu
->kvm
->arch
.iommu_flags
& KVM_IOMMU_CACHE_COHERENCY
);
2076 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2078 /* Address WBINVD may be executed by guest */
2079 if (need_emulate_wbinvd(vcpu
)) {
2080 if (kvm_x86_ops
->has_wbinvd_exit())
2081 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2082 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2083 smp_call_function_single(vcpu
->cpu
,
2084 wbinvd_ipi
, NULL
, 1);
2087 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2088 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2089 /* Make sure TSC doesn't go backwards */
2090 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2091 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2093 mark_tsc_unstable("KVM discovered backwards TSC");
2094 if (check_tsc_unstable()) {
2095 kvm_x86_ops
->adjust_tsc_offset(vcpu
, -tsc_delta
);
2096 vcpu
->arch
.tsc_catchup
= 1;
2097 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2099 if (vcpu
->cpu
!= cpu
)
2100 kvm_migrate_timers(vcpu
);
2105 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2107 kvm_x86_ops
->vcpu_put(vcpu
);
2108 kvm_put_guest_fpu(vcpu
);
2109 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2112 static int is_efer_nx(void)
2114 unsigned long long efer
= 0;
2116 rdmsrl_safe(MSR_EFER
, &efer
);
2117 return efer
& EFER_NX
;
2120 static void cpuid_fix_nx_cap(struct kvm_vcpu
*vcpu
)
2123 struct kvm_cpuid_entry2
*e
, *entry
;
2126 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
2127 e
= &vcpu
->arch
.cpuid_entries
[i
];
2128 if (e
->function
== 0x80000001) {
2133 if (entry
&& (entry
->edx
& (1 << 20)) && !is_efer_nx()) {
2134 entry
->edx
&= ~(1 << 20);
2135 printk(KERN_INFO
"kvm: guest NX capability removed\n");
2139 /* when an old userspace process fills a new kernel module */
2140 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu
*vcpu
,
2141 struct kvm_cpuid
*cpuid
,
2142 struct kvm_cpuid_entry __user
*entries
)
2145 struct kvm_cpuid_entry
*cpuid_entries
;
2148 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2151 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry
) * cpuid
->nent
);
2155 if (copy_from_user(cpuid_entries
, entries
,
2156 cpuid
->nent
* sizeof(struct kvm_cpuid_entry
)))
2158 for (i
= 0; i
< cpuid
->nent
; i
++) {
2159 vcpu
->arch
.cpuid_entries
[i
].function
= cpuid_entries
[i
].function
;
2160 vcpu
->arch
.cpuid_entries
[i
].eax
= cpuid_entries
[i
].eax
;
2161 vcpu
->arch
.cpuid_entries
[i
].ebx
= cpuid_entries
[i
].ebx
;
2162 vcpu
->arch
.cpuid_entries
[i
].ecx
= cpuid_entries
[i
].ecx
;
2163 vcpu
->arch
.cpuid_entries
[i
].edx
= cpuid_entries
[i
].edx
;
2164 vcpu
->arch
.cpuid_entries
[i
].index
= 0;
2165 vcpu
->arch
.cpuid_entries
[i
].flags
= 0;
2166 vcpu
->arch
.cpuid_entries
[i
].padding
[0] = 0;
2167 vcpu
->arch
.cpuid_entries
[i
].padding
[1] = 0;
2168 vcpu
->arch
.cpuid_entries
[i
].padding
[2] = 0;
2170 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
2171 cpuid_fix_nx_cap(vcpu
);
2173 kvm_apic_set_version(vcpu
);
2174 kvm_x86_ops
->cpuid_update(vcpu
);
2178 vfree(cpuid_entries
);
2183 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu
*vcpu
,
2184 struct kvm_cpuid2
*cpuid
,
2185 struct kvm_cpuid_entry2 __user
*entries
)
2190 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2193 if (copy_from_user(&vcpu
->arch
.cpuid_entries
, entries
,
2194 cpuid
->nent
* sizeof(struct kvm_cpuid_entry2
)))
2196 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
2197 kvm_apic_set_version(vcpu
);
2198 kvm_x86_ops
->cpuid_update(vcpu
);
2206 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu
*vcpu
,
2207 struct kvm_cpuid2
*cpuid
,
2208 struct kvm_cpuid_entry2 __user
*entries
)
2213 if (cpuid
->nent
< vcpu
->arch
.cpuid_nent
)
2216 if (copy_to_user(entries
, &vcpu
->arch
.cpuid_entries
,
2217 vcpu
->arch
.cpuid_nent
* sizeof(struct kvm_cpuid_entry2
)))
2222 cpuid
->nent
= vcpu
->arch
.cpuid_nent
;
2226 static void cpuid_mask(u32
*word
, int wordnum
)
2228 *word
&= boot_cpu_data
.x86_capability
[wordnum
];
2231 static void do_cpuid_1_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
2234 entry
->function
= function
;
2235 entry
->index
= index
;
2236 cpuid_count(entry
->function
, entry
->index
,
2237 &entry
->eax
, &entry
->ebx
, &entry
->ecx
, &entry
->edx
);
2241 #define F(x) bit(X86_FEATURE_##x)
2243 static void do_cpuid_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
2244 u32 index
, int *nent
, int maxnent
)
2246 unsigned f_nx
= is_efer_nx() ? F(NX
) : 0;
2247 #ifdef CONFIG_X86_64
2248 unsigned f_gbpages
= (kvm_x86_ops
->get_lpage_level() == PT_PDPE_LEVEL
)
2250 unsigned f_lm
= F(LM
);
2252 unsigned f_gbpages
= 0;
2255 unsigned f_rdtscp
= kvm_x86_ops
->rdtscp_supported() ? F(RDTSCP
) : 0;
2258 const u32 kvm_supported_word0_x86_features
=
2259 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
2260 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
2261 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SEP
) |
2262 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
2263 F(PAT
) | F(PSE36
) | 0 /* PSN */ | F(CLFLSH
) |
2264 0 /* Reserved, DS, ACPI */ | F(MMX
) |
2265 F(FXSR
) | F(XMM
) | F(XMM2
) | F(SELFSNOOP
) |
2266 0 /* HTT, TM, Reserved, PBE */;
2267 /* cpuid 0x80000001.edx */
2268 const u32 kvm_supported_word1_x86_features
=
2269 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
2270 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
2271 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SYSCALL
) |
2272 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
2273 F(PAT
) | F(PSE36
) | 0 /* Reserved */ |
2274 f_nx
| 0 /* Reserved */ | F(MMXEXT
) | F(MMX
) |
2275 F(FXSR
) | F(FXSR_OPT
) | f_gbpages
| f_rdtscp
|
2276 0 /* Reserved */ | f_lm
| F(3DNOWEXT
) | F(3DNOW
);
2278 const u32 kvm_supported_word4_x86_features
=
2279 F(XMM3
) | F(PCLMULQDQ
) | 0 /* DTES64, MONITOR */ |
2280 0 /* DS-CPL, VMX, SMX, EST */ |
2281 0 /* TM2 */ | F(SSSE3
) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2282 0 /* Reserved */ | F(CX16
) | 0 /* xTPR Update, PDCM */ |
2283 0 /* Reserved, DCA */ | F(XMM4_1
) |
2284 F(XMM4_2
) | F(X2APIC
) | F(MOVBE
) | F(POPCNT
) |
2285 0 /* Reserved*/ | F(AES
) | F(XSAVE
) | 0 /* OSXSAVE */ | F(AVX
) |
2287 /* cpuid 0x80000001.ecx */
2288 const u32 kvm_supported_word6_x86_features
=
2289 F(LAHF_LM
) | F(CMP_LEGACY
) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2290 F(CR8_LEGACY
) | F(ABM
) | F(SSE4A
) | F(MISALIGNSSE
) |
2291 F(3DNOWPREFETCH
) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP
) |
2292 0 /* SKINIT, WDT, LWP */ | F(FMA4
) | F(TBM
);
2294 /* all calls to cpuid_count() should be made on the same cpu */
2296 do_cpuid_1_ent(entry
, function
, index
);
2301 entry
->eax
= min(entry
->eax
, (u32
)0xd);
2304 entry
->edx
&= kvm_supported_word0_x86_features
;
2305 cpuid_mask(&entry
->edx
, 0);
2306 entry
->ecx
&= kvm_supported_word4_x86_features
;
2307 cpuid_mask(&entry
->ecx
, 4);
2308 /* we support x2apic emulation even if host does not support
2309 * it since we emulate x2apic in software */
2310 entry
->ecx
|= F(X2APIC
);
2312 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2313 * may return different values. This forces us to get_cpu() before
2314 * issuing the first command, and also to emulate this annoying behavior
2315 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2317 int t
, times
= entry
->eax
& 0xff;
2319 entry
->flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
2320 entry
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
2321 for (t
= 1; t
< times
&& *nent
< maxnent
; ++t
) {
2322 do_cpuid_1_ent(&entry
[t
], function
, 0);
2323 entry
[t
].flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
2328 /* function 4 and 0xb have additional index. */
2332 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2333 /* read more entries until cache_type is zero */
2334 for (i
= 1; *nent
< maxnent
; ++i
) {
2335 cache_type
= entry
[i
- 1].eax
& 0x1f;
2338 do_cpuid_1_ent(&entry
[i
], function
, i
);
2340 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2348 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2349 /* read more entries until level_type is zero */
2350 for (i
= 1; *nent
< maxnent
; ++i
) {
2351 level_type
= entry
[i
- 1].ecx
& 0xff00;
2354 do_cpuid_1_ent(&entry
[i
], function
, i
);
2356 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2364 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2365 for (i
= 1; *nent
< maxnent
; ++i
) {
2366 if (entry
[i
- 1].eax
== 0 && i
!= 2)
2368 do_cpuid_1_ent(&entry
[i
], function
, i
);
2370 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2375 case KVM_CPUID_SIGNATURE
: {
2376 char signature
[12] = "KVMKVMKVM\0\0";
2377 u32
*sigptr
= (u32
*)signature
;
2379 entry
->ebx
= sigptr
[0];
2380 entry
->ecx
= sigptr
[1];
2381 entry
->edx
= sigptr
[2];
2384 case KVM_CPUID_FEATURES
:
2385 entry
->eax
= (1 << KVM_FEATURE_CLOCKSOURCE
) |
2386 (1 << KVM_FEATURE_NOP_IO_DELAY
) |
2387 (1 << KVM_FEATURE_CLOCKSOURCE2
) |
2388 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT
);
2394 entry
->eax
= min(entry
->eax
, 0x8000001a);
2397 entry
->edx
&= kvm_supported_word1_x86_features
;
2398 cpuid_mask(&entry
->edx
, 1);
2399 entry
->ecx
&= kvm_supported_word6_x86_features
;
2400 cpuid_mask(&entry
->ecx
, 6);
2404 kvm_x86_ops
->set_supported_cpuid(function
, entry
);
2411 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
2412 struct kvm_cpuid_entry2 __user
*entries
)
2414 struct kvm_cpuid_entry2
*cpuid_entries
;
2415 int limit
, nent
= 0, r
= -E2BIG
;
2418 if (cpuid
->nent
< 1)
2420 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2421 cpuid
->nent
= KVM_MAX_CPUID_ENTRIES
;
2423 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry2
) * cpuid
->nent
);
2427 do_cpuid_ent(&cpuid_entries
[0], 0, 0, &nent
, cpuid
->nent
);
2428 limit
= cpuid_entries
[0].eax
;
2429 for (func
= 1; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
2430 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
2431 &nent
, cpuid
->nent
);
2433 if (nent
>= cpuid
->nent
)
2436 do_cpuid_ent(&cpuid_entries
[nent
], 0x80000000, 0, &nent
, cpuid
->nent
);
2437 limit
= cpuid_entries
[nent
- 1].eax
;
2438 for (func
= 0x80000001; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
2439 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
2440 &nent
, cpuid
->nent
);
2445 if (nent
>= cpuid
->nent
)
2448 do_cpuid_ent(&cpuid_entries
[nent
], KVM_CPUID_SIGNATURE
, 0, &nent
,
2452 if (nent
>= cpuid
->nent
)
2455 do_cpuid_ent(&cpuid_entries
[nent
], KVM_CPUID_FEATURES
, 0, &nent
,
2459 if (nent
>= cpuid
->nent
)
2463 if (copy_to_user(entries
, cpuid_entries
,
2464 nent
* sizeof(struct kvm_cpuid_entry2
)))
2470 vfree(cpuid_entries
);
2475 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2476 struct kvm_lapic_state
*s
)
2478 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2483 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2484 struct kvm_lapic_state
*s
)
2486 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
2487 kvm_apic_post_state_restore(vcpu
);
2488 update_cr8_intercept(vcpu
);
2493 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2494 struct kvm_interrupt
*irq
)
2496 if (irq
->irq
< 0 || irq
->irq
>= 256)
2498 if (irqchip_in_kernel(vcpu
->kvm
))
2501 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2502 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2507 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2509 kvm_inject_nmi(vcpu
);
2514 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2515 struct kvm_tpr_access_ctl
*tac
)
2519 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2523 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2527 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2530 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2532 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2535 vcpu
->arch
.mcg_cap
= mcg_cap
;
2536 /* Init IA32_MCG_CTL to all 1s */
2537 if (mcg_cap
& MCG_CTL_P
)
2538 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2539 /* Init IA32_MCi_CTL to all 1s */
2540 for (bank
= 0; bank
< bank_num
; bank
++)
2541 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2546 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2547 struct kvm_x86_mce
*mce
)
2549 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2550 unsigned bank_num
= mcg_cap
& 0xff;
2551 u64
*banks
= vcpu
->arch
.mce_banks
;
2553 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2556 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2557 * reporting is disabled
2559 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2560 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2562 banks
+= 4 * mce
->bank
;
2564 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2565 * reporting is disabled for the bank
2567 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2569 if (mce
->status
& MCI_STATUS_UC
) {
2570 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2571 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2572 printk(KERN_DEBUG
"kvm: set_mce: "
2573 "injects mce exception while "
2574 "previous one is in progress!\n");
2575 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2578 if (banks
[1] & MCI_STATUS_VAL
)
2579 mce
->status
|= MCI_STATUS_OVER
;
2580 banks
[2] = mce
->addr
;
2581 banks
[3] = mce
->misc
;
2582 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2583 banks
[1] = mce
->status
;
2584 kvm_queue_exception(vcpu
, MC_VECTOR
);
2585 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2586 || !(banks
[1] & MCI_STATUS_UC
)) {
2587 if (banks
[1] & MCI_STATUS_VAL
)
2588 mce
->status
|= MCI_STATUS_OVER
;
2589 banks
[2] = mce
->addr
;
2590 banks
[3] = mce
->misc
;
2591 banks
[1] = mce
->status
;
2593 banks
[1] |= MCI_STATUS_OVER
;
2597 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2598 struct kvm_vcpu_events
*events
)
2600 events
->exception
.injected
=
2601 vcpu
->arch
.exception
.pending
&&
2602 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2603 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2604 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2605 events
->exception
.pad
= 0;
2606 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2608 events
->interrupt
.injected
=
2609 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2610 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2611 events
->interrupt
.soft
= 0;
2612 events
->interrupt
.shadow
=
2613 kvm_x86_ops
->get_interrupt_shadow(vcpu
,
2614 KVM_X86_SHADOW_INT_MOV_SS
| KVM_X86_SHADOW_INT_STI
);
2616 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2617 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
;
2618 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2619 events
->nmi
.pad
= 0;
2621 events
->sipi_vector
= vcpu
->arch
.sipi_vector
;
2623 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2624 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2625 | KVM_VCPUEVENT_VALID_SHADOW
);
2626 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
2629 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2630 struct kvm_vcpu_events
*events
)
2632 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2633 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2634 | KVM_VCPUEVENT_VALID_SHADOW
))
2637 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2638 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2639 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2640 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2642 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2643 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2644 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2645 if (vcpu
->arch
.interrupt
.pending
&& irqchip_in_kernel(vcpu
->kvm
))
2646 kvm_pic_clear_isr_ack(vcpu
->kvm
);
2647 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2648 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2649 events
->interrupt
.shadow
);
2651 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2652 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2653 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2654 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2656 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
)
2657 vcpu
->arch
.sipi_vector
= events
->sipi_vector
;
2659 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2664 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
2665 struct kvm_debugregs
*dbgregs
)
2667 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
2668 dbgregs
->dr6
= vcpu
->arch
.dr6
;
2669 dbgregs
->dr7
= vcpu
->arch
.dr7
;
2671 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
2674 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
2675 struct kvm_debugregs
*dbgregs
)
2680 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
2681 vcpu
->arch
.dr6
= dbgregs
->dr6
;
2682 vcpu
->arch
.dr7
= dbgregs
->dr7
;
2687 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
2688 struct kvm_xsave
*guest_xsave
)
2691 memcpy(guest_xsave
->region
,
2692 &vcpu
->arch
.guest_fpu
.state
->xsave
,
2695 memcpy(guest_xsave
->region
,
2696 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
2697 sizeof(struct i387_fxsave_struct
));
2698 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
2703 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
2704 struct kvm_xsave
*guest_xsave
)
2707 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
2710 memcpy(&vcpu
->arch
.guest_fpu
.state
->xsave
,
2711 guest_xsave
->region
, xstate_size
);
2713 if (xstate_bv
& ~XSTATE_FPSSE
)
2715 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
2716 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
2721 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
2722 struct kvm_xcrs
*guest_xcrs
)
2724 if (!cpu_has_xsave
) {
2725 guest_xcrs
->nr_xcrs
= 0;
2729 guest_xcrs
->nr_xcrs
= 1;
2730 guest_xcrs
->flags
= 0;
2731 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
2732 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
2735 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
2736 struct kvm_xcrs
*guest_xcrs
)
2743 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
2746 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
2747 /* Only support XCR0 currently */
2748 if (guest_xcrs
->xcrs
[0].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
2749 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
2750 guest_xcrs
->xcrs
[0].value
);
2758 long kvm_arch_vcpu_ioctl(struct file
*filp
,
2759 unsigned int ioctl
, unsigned long arg
)
2761 struct kvm_vcpu
*vcpu
= filp
->private_data
;
2762 void __user
*argp
= (void __user
*)arg
;
2765 struct kvm_lapic_state
*lapic
;
2766 struct kvm_xsave
*xsave
;
2767 struct kvm_xcrs
*xcrs
;
2773 case KVM_GET_LAPIC
: {
2775 if (!vcpu
->arch
.apic
)
2777 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2782 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
2786 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
2791 case KVM_SET_LAPIC
: {
2793 if (!vcpu
->arch
.apic
)
2795 u
.lapic
= kmalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2800 if (copy_from_user(u
.lapic
, argp
, sizeof(struct kvm_lapic_state
)))
2802 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
2808 case KVM_INTERRUPT
: {
2809 struct kvm_interrupt irq
;
2812 if (copy_from_user(&irq
, argp
, sizeof irq
))
2814 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
2821 r
= kvm_vcpu_ioctl_nmi(vcpu
);
2827 case KVM_SET_CPUID
: {
2828 struct kvm_cpuid __user
*cpuid_arg
= argp
;
2829 struct kvm_cpuid cpuid
;
2832 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2834 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
2839 case KVM_SET_CPUID2
: {
2840 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2841 struct kvm_cpuid2 cpuid
;
2844 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2846 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
2847 cpuid_arg
->entries
);
2852 case KVM_GET_CPUID2
: {
2853 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2854 struct kvm_cpuid2 cpuid
;
2857 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2859 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
2860 cpuid_arg
->entries
);
2864 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2870 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
2873 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
2875 case KVM_TPR_ACCESS_REPORTING
: {
2876 struct kvm_tpr_access_ctl tac
;
2879 if (copy_from_user(&tac
, argp
, sizeof tac
))
2881 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
2885 if (copy_to_user(argp
, &tac
, sizeof tac
))
2890 case KVM_SET_VAPIC_ADDR
: {
2891 struct kvm_vapic_addr va
;
2894 if (!irqchip_in_kernel(vcpu
->kvm
))
2897 if (copy_from_user(&va
, argp
, sizeof va
))
2900 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
2903 case KVM_X86_SETUP_MCE
: {
2907 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
2909 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
2912 case KVM_X86_SET_MCE
: {
2913 struct kvm_x86_mce mce
;
2916 if (copy_from_user(&mce
, argp
, sizeof mce
))
2918 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
2921 case KVM_GET_VCPU_EVENTS
: {
2922 struct kvm_vcpu_events events
;
2924 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
2927 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
2932 case KVM_SET_VCPU_EVENTS
: {
2933 struct kvm_vcpu_events events
;
2936 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
2939 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
2942 case KVM_GET_DEBUGREGS
: {
2943 struct kvm_debugregs dbgregs
;
2945 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
2948 if (copy_to_user(argp
, &dbgregs
,
2949 sizeof(struct kvm_debugregs
)))
2954 case KVM_SET_DEBUGREGS
: {
2955 struct kvm_debugregs dbgregs
;
2958 if (copy_from_user(&dbgregs
, argp
,
2959 sizeof(struct kvm_debugregs
)))
2962 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
2965 case KVM_GET_XSAVE
: {
2966 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
2971 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
2974 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
2979 case KVM_SET_XSAVE
: {
2980 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
2986 if (copy_from_user(u
.xsave
, argp
, sizeof(struct kvm_xsave
)))
2989 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
2992 case KVM_GET_XCRS
: {
2993 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
2998 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3001 if (copy_to_user(argp
, u
.xcrs
,
3002 sizeof(struct kvm_xcrs
)))
3007 case KVM_SET_XCRS
: {
3008 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3014 if (copy_from_user(u
.xcrs
, argp
,
3015 sizeof(struct kvm_xcrs
)))
3018 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3029 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3033 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3035 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3039 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3042 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3046 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3047 u32 kvm_nr_mmu_pages
)
3049 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3052 mutex_lock(&kvm
->slots_lock
);
3053 spin_lock(&kvm
->mmu_lock
);
3055 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3056 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3058 spin_unlock(&kvm
->mmu_lock
);
3059 mutex_unlock(&kvm
->slots_lock
);
3063 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3065 return kvm
->arch
.n_max_mmu_pages
;
3068 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3073 switch (chip
->chip_id
) {
3074 case KVM_IRQCHIP_PIC_MASTER
:
3075 memcpy(&chip
->chip
.pic
,
3076 &pic_irqchip(kvm
)->pics
[0],
3077 sizeof(struct kvm_pic_state
));
3079 case KVM_IRQCHIP_PIC_SLAVE
:
3080 memcpy(&chip
->chip
.pic
,
3081 &pic_irqchip(kvm
)->pics
[1],
3082 sizeof(struct kvm_pic_state
));
3084 case KVM_IRQCHIP_IOAPIC
:
3085 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3094 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3099 switch (chip
->chip_id
) {
3100 case KVM_IRQCHIP_PIC_MASTER
:
3101 spin_lock(&pic_irqchip(kvm
)->lock
);
3102 memcpy(&pic_irqchip(kvm
)->pics
[0],
3104 sizeof(struct kvm_pic_state
));
3105 spin_unlock(&pic_irqchip(kvm
)->lock
);
3107 case KVM_IRQCHIP_PIC_SLAVE
:
3108 spin_lock(&pic_irqchip(kvm
)->lock
);
3109 memcpy(&pic_irqchip(kvm
)->pics
[1],
3111 sizeof(struct kvm_pic_state
));
3112 spin_unlock(&pic_irqchip(kvm
)->lock
);
3114 case KVM_IRQCHIP_IOAPIC
:
3115 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3121 kvm_pic_update_irq(pic_irqchip(kvm
));
3125 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3129 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3130 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3131 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3135 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3139 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3140 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3141 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3142 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3146 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3150 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3151 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3152 sizeof(ps
->channels
));
3153 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3154 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3155 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3159 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3161 int r
= 0, start
= 0;
3162 u32 prev_legacy
, cur_legacy
;
3163 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3164 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3165 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3166 if (!prev_legacy
&& cur_legacy
)
3168 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3169 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3170 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3171 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3172 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3176 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3177 struct kvm_reinject_control
*control
)
3179 if (!kvm
->arch
.vpit
)
3181 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3182 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
3183 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3188 * Get (and clear) the dirty memory log for a memory slot.
3190 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
,
3191 struct kvm_dirty_log
*log
)
3194 struct kvm_memory_slot
*memslot
;
3196 unsigned long is_dirty
= 0;
3198 mutex_lock(&kvm
->slots_lock
);
3201 if (log
->slot
>= KVM_MEMORY_SLOTS
)
3204 memslot
= &kvm
->memslots
->memslots
[log
->slot
];
3206 if (!memslot
->dirty_bitmap
)
3209 n
= kvm_dirty_bitmap_bytes(memslot
);
3211 for (i
= 0; !is_dirty
&& i
< n
/sizeof(long); i
++)
3212 is_dirty
= memslot
->dirty_bitmap
[i
];
3214 /* If nothing is dirty, don't bother messing with page tables. */
3216 struct kvm_memslots
*slots
, *old_slots
;
3217 unsigned long *dirty_bitmap
;
3219 dirty_bitmap
= memslot
->dirty_bitmap_head
;
3220 if (memslot
->dirty_bitmap
== dirty_bitmap
)
3221 dirty_bitmap
+= n
/ sizeof(long);
3222 memset(dirty_bitmap
, 0, n
);
3225 slots
= kzalloc(sizeof(struct kvm_memslots
), GFP_KERNEL
);
3228 memcpy(slots
, kvm
->memslots
, sizeof(struct kvm_memslots
));
3229 slots
->memslots
[log
->slot
].dirty_bitmap
= dirty_bitmap
;
3230 slots
->generation
++;
3232 old_slots
= kvm
->memslots
;
3233 rcu_assign_pointer(kvm
->memslots
, slots
);
3234 synchronize_srcu_expedited(&kvm
->srcu
);
3235 dirty_bitmap
= old_slots
->memslots
[log
->slot
].dirty_bitmap
;
3238 spin_lock(&kvm
->mmu_lock
);
3239 kvm_mmu_slot_remove_write_access(kvm
, log
->slot
);
3240 spin_unlock(&kvm
->mmu_lock
);
3243 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap
, n
))
3247 if (clear_user(log
->dirty_bitmap
, n
))
3253 mutex_unlock(&kvm
->slots_lock
);
3257 long kvm_arch_vm_ioctl(struct file
*filp
,
3258 unsigned int ioctl
, unsigned long arg
)
3260 struct kvm
*kvm
= filp
->private_data
;
3261 void __user
*argp
= (void __user
*)arg
;
3264 * This union makes it completely explicit to gcc-3.x
3265 * that these two variables' stack usage should be
3266 * combined, not added together.
3269 struct kvm_pit_state ps
;
3270 struct kvm_pit_state2 ps2
;
3271 struct kvm_pit_config pit_config
;
3275 case KVM_SET_TSS_ADDR
:
3276 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3280 case KVM_SET_IDENTITY_MAP_ADDR
: {
3284 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3286 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3291 case KVM_SET_NR_MMU_PAGES
:
3292 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3296 case KVM_GET_NR_MMU_PAGES
:
3297 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3299 case KVM_CREATE_IRQCHIP
: {
3300 struct kvm_pic
*vpic
;
3302 mutex_lock(&kvm
->lock
);
3305 goto create_irqchip_unlock
;
3307 vpic
= kvm_create_pic(kvm
);
3309 r
= kvm_ioapic_init(kvm
);
3311 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3314 goto create_irqchip_unlock
;
3317 goto create_irqchip_unlock
;
3319 kvm
->arch
.vpic
= vpic
;
3321 r
= kvm_setup_default_irq_routing(kvm
);
3323 mutex_lock(&kvm
->irq_lock
);
3324 kvm_ioapic_destroy(kvm
);
3325 kvm_destroy_pic(kvm
);
3326 mutex_unlock(&kvm
->irq_lock
);
3328 create_irqchip_unlock
:
3329 mutex_unlock(&kvm
->lock
);
3332 case KVM_CREATE_PIT
:
3333 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3335 case KVM_CREATE_PIT2
:
3337 if (copy_from_user(&u
.pit_config
, argp
,
3338 sizeof(struct kvm_pit_config
)))
3341 mutex_lock(&kvm
->slots_lock
);
3344 goto create_pit_unlock
;
3346 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3350 mutex_unlock(&kvm
->slots_lock
);
3352 case KVM_IRQ_LINE_STATUS
:
3353 case KVM_IRQ_LINE
: {
3354 struct kvm_irq_level irq_event
;
3357 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
3360 if (irqchip_in_kernel(kvm
)) {
3362 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3363 irq_event
.irq
, irq_event
.level
);
3364 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
3366 irq_event
.status
= status
;
3367 if (copy_to_user(argp
, &irq_event
,
3375 case KVM_GET_IRQCHIP
: {
3376 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3377 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
3383 if (copy_from_user(chip
, argp
, sizeof *chip
))
3384 goto get_irqchip_out
;
3386 if (!irqchip_in_kernel(kvm
))
3387 goto get_irqchip_out
;
3388 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3390 goto get_irqchip_out
;
3392 if (copy_to_user(argp
, chip
, sizeof *chip
))
3393 goto get_irqchip_out
;
3401 case KVM_SET_IRQCHIP
: {
3402 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3403 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
3409 if (copy_from_user(chip
, argp
, sizeof *chip
))
3410 goto set_irqchip_out
;
3412 if (!irqchip_in_kernel(kvm
))
3413 goto set_irqchip_out
;
3414 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3416 goto set_irqchip_out
;
3426 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3429 if (!kvm
->arch
.vpit
)
3431 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3435 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3442 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3445 if (!kvm
->arch
.vpit
)
3447 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3453 case KVM_GET_PIT2
: {
3455 if (!kvm
->arch
.vpit
)
3457 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3461 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3466 case KVM_SET_PIT2
: {
3468 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3471 if (!kvm
->arch
.vpit
)
3473 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3479 case KVM_REINJECT_CONTROL
: {
3480 struct kvm_reinject_control control
;
3482 if (copy_from_user(&control
, argp
, sizeof(control
)))
3484 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3490 case KVM_XEN_HVM_CONFIG
: {
3492 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3493 sizeof(struct kvm_xen_hvm_config
)))
3496 if (kvm
->arch
.xen_hvm_config
.flags
)
3501 case KVM_SET_CLOCK
: {
3502 struct kvm_clock_data user_ns
;
3507 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3515 local_irq_disable();
3516 now_ns
= get_kernel_ns();
3517 delta
= user_ns
.clock
- now_ns
;
3519 kvm
->arch
.kvmclock_offset
= delta
;
3522 case KVM_GET_CLOCK
: {
3523 struct kvm_clock_data user_ns
;
3526 local_irq_disable();
3527 now_ns
= get_kernel_ns();
3528 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3531 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
3534 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3547 static void kvm_init_msr_list(void)
3552 /* skip the first msrs in the list. KVM-specific */
3553 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3554 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3557 msrs_to_save
[j
] = msrs_to_save
[i
];
3560 num_msrs_to_save
= j
;
3563 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3566 if (vcpu
->arch
.apic
&&
3567 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
3570 return kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, len
, v
);
3573 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3575 if (vcpu
->arch
.apic
&&
3576 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
3579 return kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, len
, v
);
3582 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3583 struct kvm_segment
*var
, int seg
)
3585 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3588 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3589 struct kvm_segment
*var
, int seg
)
3591 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3594 static gpa_t
translate_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3599 static gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3602 struct x86_exception exception
;
3604 BUG_ON(!mmu_is_nested(vcpu
));
3606 /* NPT walks are always user-walks */
3607 access
|= PFERR_USER_MASK
;
3608 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, &exception
);
3613 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
3614 struct x86_exception
*exception
)
3616 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3617 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3620 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
3621 struct x86_exception
*exception
)
3623 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3624 access
|= PFERR_FETCH_MASK
;
3625 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3628 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
3629 struct x86_exception
*exception
)
3631 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3632 access
|= PFERR_WRITE_MASK
;
3633 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3636 /* uses this to access any guest's mapped memory without checking CPL */
3637 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
3638 struct x86_exception
*exception
)
3640 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
3643 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
3644 struct kvm_vcpu
*vcpu
, u32 access
,
3645 struct x86_exception
*exception
)
3648 int r
= X86EMUL_CONTINUE
;
3651 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
3653 unsigned offset
= addr
& (PAGE_SIZE
-1);
3654 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3657 if (gpa
== UNMAPPED_GVA
)
3658 return X86EMUL_PROPAGATE_FAULT
;
3659 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
3661 r
= X86EMUL_IO_NEEDED
;
3673 /* used for instruction fetching */
3674 static int kvm_fetch_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
3675 struct kvm_vcpu
*vcpu
,
3676 struct x86_exception
*exception
)
3678 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3679 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
,
3680 access
| PFERR_FETCH_MASK
,
3684 static int kvm_read_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
3685 struct kvm_vcpu
*vcpu
,
3686 struct x86_exception
*exception
)
3688 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3689 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
3693 static int kvm_read_guest_virt_system(gva_t addr
, void *val
, unsigned int bytes
,
3694 struct kvm_vcpu
*vcpu
,
3695 struct x86_exception
*exception
)
3697 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
3700 static int kvm_write_guest_virt_system(gva_t addr
, void *val
,
3702 struct kvm_vcpu
*vcpu
,
3703 struct x86_exception
*exception
)
3706 int r
= X86EMUL_CONTINUE
;
3709 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
3712 unsigned offset
= addr
& (PAGE_SIZE
-1);
3713 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3716 if (gpa
== UNMAPPED_GVA
)
3717 return X86EMUL_PROPAGATE_FAULT
;
3718 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
3720 r
= X86EMUL_IO_NEEDED
;
3732 static int emulator_read_emulated(unsigned long addr
,
3735 struct x86_exception
*exception
,
3736 struct kvm_vcpu
*vcpu
)
3740 if (vcpu
->mmio_read_completed
) {
3741 memcpy(val
, vcpu
->mmio_data
, bytes
);
3742 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
3743 vcpu
->mmio_phys_addr
, *(u64
*)val
);
3744 vcpu
->mmio_read_completed
= 0;
3745 return X86EMUL_CONTINUE
;
3748 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, addr
, exception
);
3750 if (gpa
== UNMAPPED_GVA
)
3751 return X86EMUL_PROPAGATE_FAULT
;
3753 /* For APIC access vmexit */
3754 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3757 if (kvm_read_guest_virt(addr
, val
, bytes
, vcpu
, exception
)
3758 == X86EMUL_CONTINUE
)
3759 return X86EMUL_CONTINUE
;
3763 * Is this MMIO handled locally?
3765 if (!vcpu_mmio_read(vcpu
, gpa
, bytes
, val
)) {
3766 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
, gpa
, *(u64
*)val
);
3767 return X86EMUL_CONTINUE
;
3770 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
3772 vcpu
->mmio_needed
= 1;
3773 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
3774 vcpu
->run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
= gpa
;
3775 vcpu
->run
->mmio
.len
= vcpu
->mmio_size
= bytes
;
3776 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= 0;
3778 return X86EMUL_IO_NEEDED
;
3781 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3782 const void *val
, int bytes
)
3786 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
3789 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
3793 static int emulator_write_emulated_onepage(unsigned long addr
,
3796 struct x86_exception
*exception
,
3797 struct kvm_vcpu
*vcpu
)
3801 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, exception
);
3803 if (gpa
== UNMAPPED_GVA
)
3804 return X86EMUL_PROPAGATE_FAULT
;
3806 /* For APIC access vmexit */
3807 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3810 if (emulator_write_phys(vcpu
, gpa
, val
, bytes
))
3811 return X86EMUL_CONTINUE
;
3814 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
3816 * Is this MMIO handled locally?
3818 if (!vcpu_mmio_write(vcpu
, gpa
, bytes
, val
))
3819 return X86EMUL_CONTINUE
;
3821 vcpu
->mmio_needed
= 1;
3822 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
3823 vcpu
->run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
= gpa
;
3824 vcpu
->run
->mmio
.len
= vcpu
->mmio_size
= bytes
;
3825 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= 1;
3826 memcpy(vcpu
->run
->mmio
.data
, val
, bytes
);
3828 return X86EMUL_CONTINUE
;
3831 int emulator_write_emulated(unsigned long addr
,
3834 struct x86_exception
*exception
,
3835 struct kvm_vcpu
*vcpu
)
3837 /* Crossing a page boundary? */
3838 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
3841 now
= -addr
& ~PAGE_MASK
;
3842 rc
= emulator_write_emulated_onepage(addr
, val
, now
, exception
,
3844 if (rc
!= X86EMUL_CONTINUE
)
3850 return emulator_write_emulated_onepage(addr
, val
, bytes
, exception
,
3854 #define CMPXCHG_TYPE(t, ptr, old, new) \
3855 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3857 #ifdef CONFIG_X86_64
3858 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3860 # define CMPXCHG64(ptr, old, new) \
3861 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3864 static int emulator_cmpxchg_emulated(unsigned long addr
,
3868 struct x86_exception
*exception
,
3869 struct kvm_vcpu
*vcpu
)
3876 /* guests cmpxchg8b have to be emulated atomically */
3877 if (bytes
> 8 || (bytes
& (bytes
- 1)))
3880 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
3882 if (gpa
== UNMAPPED_GVA
||
3883 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3886 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
3889 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
3890 if (is_error_page(page
)) {
3891 kvm_release_page_clean(page
);
3895 kaddr
= kmap_atomic(page
, KM_USER0
);
3896 kaddr
+= offset_in_page(gpa
);
3899 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
3902 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
3905 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
3908 exchanged
= CMPXCHG64(kaddr
, old
, new);
3913 kunmap_atomic(kaddr
, KM_USER0
);
3914 kvm_release_page_dirty(page
);
3917 return X86EMUL_CMPXCHG_FAILED
;
3919 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
, 1);
3921 return X86EMUL_CONTINUE
;
3924 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
3926 return emulator_write_emulated(addr
, new, bytes
, exception
, vcpu
);
3929 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
3931 /* TODO: String I/O for in kernel device */
3934 if (vcpu
->arch
.pio
.in
)
3935 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
3936 vcpu
->arch
.pio
.size
, pd
);
3938 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
3939 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
3945 static int emulator_pio_in_emulated(int size
, unsigned short port
, void *val
,
3946 unsigned int count
, struct kvm_vcpu
*vcpu
)
3948 if (vcpu
->arch
.pio
.count
)
3951 trace_kvm_pio(0, port
, size
, 1);
3953 vcpu
->arch
.pio
.port
= port
;
3954 vcpu
->arch
.pio
.in
= 1;
3955 vcpu
->arch
.pio
.count
= count
;
3956 vcpu
->arch
.pio
.size
= size
;
3958 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
3960 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
3961 vcpu
->arch
.pio
.count
= 0;
3965 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3966 vcpu
->run
->io
.direction
= KVM_EXIT_IO_IN
;
3967 vcpu
->run
->io
.size
= size
;
3968 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3969 vcpu
->run
->io
.count
= count
;
3970 vcpu
->run
->io
.port
= port
;
3975 static int emulator_pio_out_emulated(int size
, unsigned short port
,
3976 const void *val
, unsigned int count
,
3977 struct kvm_vcpu
*vcpu
)
3979 trace_kvm_pio(1, port
, size
, 1);
3981 vcpu
->arch
.pio
.port
= port
;
3982 vcpu
->arch
.pio
.in
= 0;
3983 vcpu
->arch
.pio
.count
= count
;
3984 vcpu
->arch
.pio
.size
= size
;
3986 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
3988 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
3989 vcpu
->arch
.pio
.count
= 0;
3993 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3994 vcpu
->run
->io
.direction
= KVM_EXIT_IO_OUT
;
3995 vcpu
->run
->io
.size
= size
;
3996 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3997 vcpu
->run
->io
.count
= count
;
3998 vcpu
->run
->io
.port
= port
;
4003 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4005 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4008 int emulate_invlpg(struct kvm_vcpu
*vcpu
, gva_t address
)
4010 kvm_mmu_invlpg(vcpu
, address
);
4011 return X86EMUL_CONTINUE
;
4014 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4016 if (!need_emulate_wbinvd(vcpu
))
4017 return X86EMUL_CONTINUE
;
4019 if (kvm_x86_ops
->has_wbinvd_exit()) {
4020 int cpu
= get_cpu();
4022 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4023 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4024 wbinvd_ipi
, NULL
, 1);
4026 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4029 return X86EMUL_CONTINUE
;
4031 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4033 int emulate_clts(struct kvm_vcpu
*vcpu
)
4035 kvm_x86_ops
->set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~X86_CR0_TS
));
4036 kvm_x86_ops
->fpu_activate(vcpu
);
4037 return X86EMUL_CONTINUE
;
4040 int emulator_get_dr(int dr
, unsigned long *dest
, struct kvm_vcpu
*vcpu
)
4042 return _kvm_get_dr(vcpu
, dr
, dest
);
4045 int emulator_set_dr(int dr
, unsigned long value
, struct kvm_vcpu
*vcpu
)
4048 return __kvm_set_dr(vcpu
, dr
, value
);
4051 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4053 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4056 static unsigned long emulator_get_cr(int cr
, struct kvm_vcpu
*vcpu
)
4058 unsigned long value
;
4062 value
= kvm_read_cr0(vcpu
);
4065 value
= vcpu
->arch
.cr2
;
4068 value
= vcpu
->arch
.cr3
;
4071 value
= kvm_read_cr4(vcpu
);
4074 value
= kvm_get_cr8(vcpu
);
4077 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
4084 static int emulator_set_cr(int cr
, unsigned long val
, struct kvm_vcpu
*vcpu
)
4090 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4093 vcpu
->arch
.cr2
= val
;
4096 res
= kvm_set_cr3(vcpu
, val
);
4099 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4102 res
= __kvm_set_cr8(vcpu
, val
& 0xfUL
);
4105 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
4112 static int emulator_get_cpl(struct kvm_vcpu
*vcpu
)
4114 return kvm_x86_ops
->get_cpl(vcpu
);
4117 static void emulator_get_gdt(struct desc_ptr
*dt
, struct kvm_vcpu
*vcpu
)
4119 kvm_x86_ops
->get_gdt(vcpu
, dt
);
4122 static void emulator_get_idt(struct desc_ptr
*dt
, struct kvm_vcpu
*vcpu
)
4124 kvm_x86_ops
->get_idt(vcpu
, dt
);
4127 static unsigned long emulator_get_cached_segment_base(int seg
,
4128 struct kvm_vcpu
*vcpu
)
4130 return get_segment_base(vcpu
, seg
);
4133 static bool emulator_get_cached_descriptor(struct desc_struct
*desc
, int seg
,
4134 struct kvm_vcpu
*vcpu
)
4136 struct kvm_segment var
;
4138 kvm_get_segment(vcpu
, &var
, seg
);
4145 set_desc_limit(desc
, var
.limit
);
4146 set_desc_base(desc
, (unsigned long)var
.base
);
4147 desc
->type
= var
.type
;
4149 desc
->dpl
= var
.dpl
;
4150 desc
->p
= var
.present
;
4151 desc
->avl
= var
.avl
;
4159 static void emulator_set_cached_descriptor(struct desc_struct
*desc
, int seg
,
4160 struct kvm_vcpu
*vcpu
)
4162 struct kvm_segment var
;
4164 /* needed to preserve selector */
4165 kvm_get_segment(vcpu
, &var
, seg
);
4167 var
.base
= get_desc_base(desc
);
4168 var
.limit
= get_desc_limit(desc
);
4170 var
.limit
= (var
.limit
<< 12) | 0xfff;
4171 var
.type
= desc
->type
;
4172 var
.present
= desc
->p
;
4173 var
.dpl
= desc
->dpl
;
4178 var
.avl
= desc
->avl
;
4179 var
.present
= desc
->p
;
4180 var
.unusable
= !var
.present
;
4183 kvm_set_segment(vcpu
, &var
, seg
);
4187 static u16
emulator_get_segment_selector(int seg
, struct kvm_vcpu
*vcpu
)
4189 struct kvm_segment kvm_seg
;
4191 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4192 return kvm_seg
.selector
;
4195 static void emulator_set_segment_selector(u16 sel
, int seg
,
4196 struct kvm_vcpu
*vcpu
)
4198 struct kvm_segment kvm_seg
;
4200 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4201 kvm_seg
.selector
= sel
;
4202 kvm_set_segment(vcpu
, &kvm_seg
, seg
);
4205 static struct x86_emulate_ops emulate_ops
= {
4206 .read_std
= kvm_read_guest_virt_system
,
4207 .write_std
= kvm_write_guest_virt_system
,
4208 .fetch
= kvm_fetch_guest_virt
,
4209 .read_emulated
= emulator_read_emulated
,
4210 .write_emulated
= emulator_write_emulated
,
4211 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4212 .pio_in_emulated
= emulator_pio_in_emulated
,
4213 .pio_out_emulated
= emulator_pio_out_emulated
,
4214 .get_cached_descriptor
= emulator_get_cached_descriptor
,
4215 .set_cached_descriptor
= emulator_set_cached_descriptor
,
4216 .get_segment_selector
= emulator_get_segment_selector
,
4217 .set_segment_selector
= emulator_set_segment_selector
,
4218 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4219 .get_gdt
= emulator_get_gdt
,
4220 .get_idt
= emulator_get_idt
,
4221 .get_cr
= emulator_get_cr
,
4222 .set_cr
= emulator_set_cr
,
4223 .cpl
= emulator_get_cpl
,
4224 .get_dr
= emulator_get_dr
,
4225 .set_dr
= emulator_set_dr
,
4226 .set_msr
= kvm_set_msr
,
4227 .get_msr
= kvm_get_msr
,
4230 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
4232 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4233 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4234 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
4235 vcpu
->arch
.regs_dirty
= ~0;
4238 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4240 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
, mask
);
4242 * an sti; sti; sequence only disable interrupts for the first
4243 * instruction. So, if the last instruction, be it emulated or
4244 * not, left the system with the INT_STI flag enabled, it
4245 * means that the last instruction is an sti. We should not
4246 * leave the flag on in this case. The same goes for mov ss
4248 if (!(int_shadow
& mask
))
4249 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4252 static void inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4254 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4255 if (ctxt
->exception
.vector
== PF_VECTOR
)
4256 kvm_propagate_fault(vcpu
, &ctxt
->exception
);
4257 else if (ctxt
->exception
.error_code_valid
)
4258 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
4259 ctxt
->exception
.error_code
);
4261 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
4264 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4266 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4269 cache_all_regs(vcpu
);
4271 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4273 vcpu
->arch
.emulate_ctxt
.vcpu
= vcpu
;
4274 vcpu
->arch
.emulate_ctxt
.eflags
= kvm_x86_ops
->get_rflags(vcpu
);
4275 vcpu
->arch
.emulate_ctxt
.eip
= kvm_rip_read(vcpu
);
4276 vcpu
->arch
.emulate_ctxt
.mode
=
4277 (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4278 (vcpu
->arch
.emulate_ctxt
.eflags
& X86_EFLAGS_VM
)
4279 ? X86EMUL_MODE_VM86
: cs_l
4280 ? X86EMUL_MODE_PROT64
: cs_db
4281 ? X86EMUL_MODE_PROT32
: X86EMUL_MODE_PROT16
;
4282 memset(c
, 0, sizeof(struct decode_cache
));
4283 memcpy(c
->regs
, vcpu
->arch
.regs
, sizeof c
->regs
);
4286 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
)
4288 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4291 init_emulate_ctxt(vcpu
);
4293 vcpu
->arch
.emulate_ctxt
.decode
.op_bytes
= 2;
4294 vcpu
->arch
.emulate_ctxt
.decode
.ad_bytes
= 2;
4295 vcpu
->arch
.emulate_ctxt
.decode
.eip
= vcpu
->arch
.emulate_ctxt
.eip
;
4296 ret
= emulate_int_real(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
, irq
);
4298 if (ret
!= X86EMUL_CONTINUE
)
4299 return EMULATE_FAIL
;
4301 vcpu
->arch
.emulate_ctxt
.eip
= c
->eip
;
4302 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
4303 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
4304 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
4306 if (irq
== NMI_VECTOR
)
4307 vcpu
->arch
.nmi_pending
= false;
4309 vcpu
->arch
.interrupt
.pending
= false;
4311 return EMULATE_DONE
;
4313 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
4315 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4317 int r
= EMULATE_DONE
;
4319 ++vcpu
->stat
.insn_emulation_fail
;
4320 trace_kvm_emulate_insn_failed(vcpu
);
4321 if (!is_guest_mode(vcpu
)) {
4322 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
4323 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
4324 vcpu
->run
->internal
.ndata
= 0;
4327 kvm_queue_exception(vcpu
, UD_VECTOR
);
4332 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t gva
)
4340 * if emulation was due to access to shadowed page table
4341 * and it failed try to unshadow page and re-entetr the
4342 * guest to let CPU execute the instruction.
4344 if (kvm_mmu_unprotect_page_virt(vcpu
, gva
))
4347 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, gva
, NULL
);
4349 if (gpa
== UNMAPPED_GVA
)
4350 return true; /* let cpu generate fault */
4352 if (!kvm_is_error_hva(gfn_to_hva(vcpu
->kvm
, gpa
>> PAGE_SHIFT
)))
4358 int emulate_instruction(struct kvm_vcpu
*vcpu
,
4364 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4366 kvm_clear_exception_queue(vcpu
);
4367 vcpu
->arch
.mmio_fault_cr2
= cr2
;
4369 * TODO: fix emulate.c to use guest_read/write_register
4370 * instead of direct ->regs accesses, can save hundred cycles
4371 * on Intel for instructions that don't read/change RSP, for
4374 cache_all_regs(vcpu
);
4376 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
4377 init_emulate_ctxt(vcpu
);
4378 vcpu
->arch
.emulate_ctxt
.interruptibility
= 0;
4379 vcpu
->arch
.emulate_ctxt
.have_exception
= false;
4380 vcpu
->arch
.emulate_ctxt
.perm_ok
= false;
4382 r
= x86_decode_insn(&vcpu
->arch
.emulate_ctxt
);
4383 if (r
== X86EMUL_PROPAGATE_FAULT
)
4386 trace_kvm_emulate_insn_start(vcpu
);
4388 /* Only allow emulation of specific instructions on #UD
4389 * (namely VMMCALL, sysenter, sysexit, syscall)*/
4390 if (emulation_type
& EMULTYPE_TRAP_UD
) {
4392 return EMULATE_FAIL
;
4394 case 0x01: /* VMMCALL */
4395 if (c
->modrm_mod
!= 3 || c
->modrm_rm
!= 1)
4396 return EMULATE_FAIL
;
4398 case 0x34: /* sysenter */
4399 case 0x35: /* sysexit */
4400 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
4401 return EMULATE_FAIL
;
4403 case 0x05: /* syscall */
4404 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
4405 return EMULATE_FAIL
;
4408 return EMULATE_FAIL
;
4411 if (!(c
->modrm_reg
== 0 || c
->modrm_reg
== 3))
4412 return EMULATE_FAIL
;
4415 ++vcpu
->stat
.insn_emulation
;
4417 if (reexecute_instruction(vcpu
, cr2
))
4418 return EMULATE_DONE
;
4419 if (emulation_type
& EMULTYPE_SKIP
)
4420 return EMULATE_FAIL
;
4421 return handle_emulation_failure(vcpu
);
4425 if (emulation_type
& EMULTYPE_SKIP
) {
4426 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.decode
.eip
);
4427 return EMULATE_DONE
;
4430 /* this is needed for vmware backdor interface to work since it
4431 changes registers values during IO operation */
4432 memcpy(c
->regs
, vcpu
->arch
.regs
, sizeof c
->regs
);
4435 r
= x86_emulate_insn(&vcpu
->arch
.emulate_ctxt
);
4437 if (r
== EMULATION_FAILED
) {
4438 if (reexecute_instruction(vcpu
, cr2
))
4439 return EMULATE_DONE
;
4441 return handle_emulation_failure(vcpu
);
4445 if (vcpu
->arch
.emulate_ctxt
.have_exception
) {
4446 inject_emulated_exception(vcpu
);
4448 } else if (vcpu
->arch
.pio
.count
) {
4449 if (!vcpu
->arch
.pio
.in
)
4450 vcpu
->arch
.pio
.count
= 0;
4451 r
= EMULATE_DO_MMIO
;
4452 } else if (vcpu
->mmio_needed
) {
4453 if (vcpu
->mmio_is_write
)
4454 vcpu
->mmio_needed
= 0;
4455 r
= EMULATE_DO_MMIO
;
4456 } else if (r
== EMULATION_RESTART
)
4461 toggle_interruptibility(vcpu
, vcpu
->arch
.emulate_ctxt
.interruptibility
);
4462 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
4463 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4464 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
4465 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
4469 EXPORT_SYMBOL_GPL(emulate_instruction
);
4471 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
4473 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4474 int ret
= emulator_pio_out_emulated(size
, port
, &val
, 1, vcpu
);
4475 /* do not return to emulator after return from userspace */
4476 vcpu
->arch
.pio
.count
= 0;
4479 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
4481 static void tsc_bad(void *info
)
4483 __get_cpu_var(cpu_tsc_khz
) = 0;
4486 static void tsc_khz_changed(void *data
)
4488 struct cpufreq_freqs
*freq
= data
;
4489 unsigned long khz
= 0;
4493 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4494 khz
= cpufreq_quick_get(raw_smp_processor_id());
4497 __get_cpu_var(cpu_tsc_khz
) = khz
;
4500 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
4503 struct cpufreq_freqs
*freq
= data
;
4505 struct kvm_vcpu
*vcpu
;
4506 int i
, send_ipi
= 0;
4509 * We allow guests to temporarily run on slowing clocks,
4510 * provided we notify them after, or to run on accelerating
4511 * clocks, provided we notify them before. Thus time never
4514 * However, we have a problem. We can't atomically update
4515 * the frequency of a given CPU from this function; it is
4516 * merely a notifier, which can be called from any CPU.
4517 * Changing the TSC frequency at arbitrary points in time
4518 * requires a recomputation of local variables related to
4519 * the TSC for each VCPU. We must flag these local variables
4520 * to be updated and be sure the update takes place with the
4521 * new frequency before any guests proceed.
4523 * Unfortunately, the combination of hotplug CPU and frequency
4524 * change creates an intractable locking scenario; the order
4525 * of when these callouts happen is undefined with respect to
4526 * CPU hotplug, and they can race with each other. As such,
4527 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4528 * undefined; you can actually have a CPU frequency change take
4529 * place in between the computation of X and the setting of the
4530 * variable. To protect against this problem, all updates of
4531 * the per_cpu tsc_khz variable are done in an interrupt
4532 * protected IPI, and all callers wishing to update the value
4533 * must wait for a synchronous IPI to complete (which is trivial
4534 * if the caller is on the CPU already). This establishes the
4535 * necessary total order on variable updates.
4537 * Note that because a guest time update may take place
4538 * anytime after the setting of the VCPU's request bit, the
4539 * correct TSC value must be set before the request. However,
4540 * to ensure the update actually makes it to any guest which
4541 * starts running in hardware virtualization between the set
4542 * and the acquisition of the spinlock, we must also ping the
4543 * CPU after setting the request bit.
4547 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
4549 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
4552 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4554 spin_lock(&kvm_lock
);
4555 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
4556 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
4557 if (vcpu
->cpu
!= freq
->cpu
)
4559 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4560 if (vcpu
->cpu
!= smp_processor_id())
4564 spin_unlock(&kvm_lock
);
4566 if (freq
->old
< freq
->new && send_ipi
) {
4568 * We upscale the frequency. Must make the guest
4569 * doesn't see old kvmclock values while running with
4570 * the new frequency, otherwise we risk the guest sees
4571 * time go backwards.
4573 * In case we update the frequency for another cpu
4574 * (which might be in guest context) send an interrupt
4575 * to kick the cpu out of guest context. Next time
4576 * guest context is entered kvmclock will be updated,
4577 * so the guest will not see stale values.
4579 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4584 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
4585 .notifier_call
= kvmclock_cpufreq_notifier
4588 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
4589 unsigned long action
, void *hcpu
)
4591 unsigned int cpu
= (unsigned long)hcpu
;
4595 case CPU_DOWN_FAILED
:
4596 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4598 case CPU_DOWN_PREPARE
:
4599 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
4605 static struct notifier_block kvmclock_cpu_notifier_block
= {
4606 .notifier_call
= kvmclock_cpu_notifier
,
4607 .priority
= -INT_MAX
4610 static void kvm_timer_init(void)
4614 max_tsc_khz
= tsc_khz
;
4615 register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4616 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
4617 #ifdef CONFIG_CPU_FREQ
4618 struct cpufreq_policy policy
;
4619 memset(&policy
, 0, sizeof(policy
));
4621 cpufreq_get_policy(&policy
, cpu
);
4622 if (policy
.cpuinfo
.max_freq
)
4623 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
4626 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
4627 CPUFREQ_TRANSITION_NOTIFIER
);
4629 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
4630 for_each_online_cpu(cpu
)
4631 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4634 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
4636 static int kvm_is_in_guest(void)
4638 return percpu_read(current_vcpu
) != NULL
;
4641 static int kvm_is_user_mode(void)
4645 if (percpu_read(current_vcpu
))
4646 user_mode
= kvm_x86_ops
->get_cpl(percpu_read(current_vcpu
));
4648 return user_mode
!= 0;
4651 static unsigned long kvm_get_guest_ip(void)
4653 unsigned long ip
= 0;
4655 if (percpu_read(current_vcpu
))
4656 ip
= kvm_rip_read(percpu_read(current_vcpu
));
4661 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
4662 .is_in_guest
= kvm_is_in_guest
,
4663 .is_user_mode
= kvm_is_user_mode
,
4664 .get_guest_ip
= kvm_get_guest_ip
,
4667 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
4669 percpu_write(current_vcpu
, vcpu
);
4671 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
4673 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
4675 percpu_write(current_vcpu
, NULL
);
4677 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
4679 int kvm_arch_init(void *opaque
)
4682 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
4685 printk(KERN_ERR
"kvm: already loaded the other module\n");
4690 if (!ops
->cpu_has_kvm_support()) {
4691 printk(KERN_ERR
"kvm: no hardware support\n");
4695 if (ops
->disabled_by_bios()) {
4696 printk(KERN_ERR
"kvm: disabled by bios\n");
4701 r
= kvm_mmu_module_init();
4705 kvm_init_msr_list();
4708 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4709 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
4710 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
4714 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
4717 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
4725 void kvm_arch_exit(void)
4727 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
4729 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4730 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
4731 CPUFREQ_TRANSITION_NOTIFIER
);
4732 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4734 kvm_mmu_module_exit();
4737 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
4739 ++vcpu
->stat
.halt_exits
;
4740 if (irqchip_in_kernel(vcpu
->kvm
)) {
4741 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
4744 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
4748 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
4750 static inline gpa_t
hc_gpa(struct kvm_vcpu
*vcpu
, unsigned long a0
,
4753 if (is_long_mode(vcpu
))
4756 return a0
| ((gpa_t
)a1
<< 32);
4759 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
4761 u64 param
, ingpa
, outgpa
, ret
;
4762 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
4763 bool fast
, longmode
;
4767 * hypercall generates UD from non zero cpl and real mode
4770 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
4771 kvm_queue_exception(vcpu
, UD_VECTOR
);
4775 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4776 longmode
= is_long_mode(vcpu
) && cs_l
== 1;
4779 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
4780 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
4781 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
4782 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
4783 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
4784 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
4786 #ifdef CONFIG_X86_64
4788 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4789 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4790 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
4794 code
= param
& 0xffff;
4795 fast
= (param
>> 16) & 0x1;
4796 rep_cnt
= (param
>> 32) & 0xfff;
4797 rep_idx
= (param
>> 48) & 0xfff;
4799 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
4802 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
4803 kvm_vcpu_on_spin(vcpu
);
4806 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
4810 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
4812 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
4814 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
4815 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
4821 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
4823 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
4826 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
4827 return kvm_hv_hypercall(vcpu
);
4829 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4830 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4831 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4832 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4833 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4835 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
4837 if (!is_long_mode(vcpu
)) {
4845 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
4851 case KVM_HC_VAPIC_POLL_IRQ
:
4855 r
= kvm_pv_mmu_op(vcpu
, a0
, hc_gpa(vcpu
, a1
, a2
), &ret
);
4862 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
4863 ++vcpu
->stat
.hypercalls
;
4866 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
4868 int kvm_fix_hypercall(struct kvm_vcpu
*vcpu
)
4870 char instruction
[3];
4871 unsigned long rip
= kvm_rip_read(vcpu
);
4874 * Blow out the MMU to ensure that no other VCPU has an active mapping
4875 * to ensure that the updated hypercall appears atomically across all
4878 kvm_mmu_zap_all(vcpu
->kvm
);
4880 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
4882 return emulator_write_emulated(rip
, instruction
, 3, NULL
, vcpu
);
4885 void realmode_lgdt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
4887 struct desc_ptr dt
= { limit
, base
};
4889 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
4892 void realmode_lidt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
4894 struct desc_ptr dt
= { limit
, base
};
4896 kvm_x86_ops
->set_idt(vcpu
, &dt
);
4899 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu
*vcpu
, int i
)
4901 struct kvm_cpuid_entry2
*e
= &vcpu
->arch
.cpuid_entries
[i
];
4902 int j
, nent
= vcpu
->arch
.cpuid_nent
;
4904 e
->flags
&= ~KVM_CPUID_FLAG_STATE_READ_NEXT
;
4905 /* when no next entry is found, the current entry[i] is reselected */
4906 for (j
= i
+ 1; ; j
= (j
+ 1) % nent
) {
4907 struct kvm_cpuid_entry2
*ej
= &vcpu
->arch
.cpuid_entries
[j
];
4908 if (ej
->function
== e
->function
) {
4909 ej
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
4913 return 0; /* silence gcc, even though control never reaches here */
4916 /* find an entry with matching function, matching index (if needed), and that
4917 * should be read next (if it's stateful) */
4918 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2
*e
,
4919 u32 function
, u32 index
)
4921 if (e
->function
!= function
)
4923 if ((e
->flags
& KVM_CPUID_FLAG_SIGNIFCANT_INDEX
) && e
->index
!= index
)
4925 if ((e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
) &&
4926 !(e
->flags
& KVM_CPUID_FLAG_STATE_READ_NEXT
))
4931 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
4932 u32 function
, u32 index
)
4935 struct kvm_cpuid_entry2
*best
= NULL
;
4937 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
4938 struct kvm_cpuid_entry2
*e
;
4940 e
= &vcpu
->arch
.cpuid_entries
[i
];
4941 if (is_matching_cpuid_entry(e
, function
, index
)) {
4942 if (e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
)
4943 move_to_next_stateful_cpuid_entry(vcpu
, i
);
4948 * Both basic or both extended?
4950 if (((e
->function
^ function
) & 0x80000000) == 0)
4951 if (!best
|| e
->function
> best
->function
)
4956 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry
);
4958 int cpuid_maxphyaddr(struct kvm_vcpu
*vcpu
)
4960 struct kvm_cpuid_entry2
*best
;
4962 best
= kvm_find_cpuid_entry(vcpu
, 0x80000000, 0);
4963 if (!best
|| best
->eax
< 0x80000008)
4965 best
= kvm_find_cpuid_entry(vcpu
, 0x80000008, 0);
4967 return best
->eax
& 0xff;
4972 void kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
)
4974 u32 function
, index
;
4975 struct kvm_cpuid_entry2
*best
;
4977 function
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4978 index
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4979 kvm_register_write(vcpu
, VCPU_REGS_RAX
, 0);
4980 kvm_register_write(vcpu
, VCPU_REGS_RBX
, 0);
4981 kvm_register_write(vcpu
, VCPU_REGS_RCX
, 0);
4982 kvm_register_write(vcpu
, VCPU_REGS_RDX
, 0);
4983 best
= kvm_find_cpuid_entry(vcpu
, function
, index
);
4985 kvm_register_write(vcpu
, VCPU_REGS_RAX
, best
->eax
);
4986 kvm_register_write(vcpu
, VCPU_REGS_RBX
, best
->ebx
);
4987 kvm_register_write(vcpu
, VCPU_REGS_RCX
, best
->ecx
);
4988 kvm_register_write(vcpu
, VCPU_REGS_RDX
, best
->edx
);
4990 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
4991 trace_kvm_cpuid(function
,
4992 kvm_register_read(vcpu
, VCPU_REGS_RAX
),
4993 kvm_register_read(vcpu
, VCPU_REGS_RBX
),
4994 kvm_register_read(vcpu
, VCPU_REGS_RCX
),
4995 kvm_register_read(vcpu
, VCPU_REGS_RDX
));
4997 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid
);
5000 * Check if userspace requested an interrupt window, and that the
5001 * interrupt window is open.
5003 * No need to exit to userspace if we already have an interrupt queued.
5005 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5007 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
5008 vcpu
->run
->request_interrupt_window
&&
5009 kvm_arch_interrupt_allowed(vcpu
));
5012 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5014 struct kvm_run
*kvm_run
= vcpu
->run
;
5016 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
5017 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
5018 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
5019 if (irqchip_in_kernel(vcpu
->kvm
))
5020 kvm_run
->ready_for_interrupt_injection
= 1;
5022 kvm_run
->ready_for_interrupt_injection
=
5023 kvm_arch_interrupt_allowed(vcpu
) &&
5024 !kvm_cpu_has_interrupt(vcpu
) &&
5025 !kvm_event_needs_reinjection(vcpu
);
5028 static void vapic_enter(struct kvm_vcpu
*vcpu
)
5030 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5033 if (!apic
|| !apic
->vapic_addr
)
5036 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5038 vcpu
->arch
.apic
->vapic_page
= page
;
5041 static void vapic_exit(struct kvm_vcpu
*vcpu
)
5043 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5046 if (!apic
|| !apic
->vapic_addr
)
5049 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5050 kvm_release_page_dirty(apic
->vapic_page
);
5051 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5052 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5055 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5059 if (!kvm_x86_ops
->update_cr8_intercept
)
5062 if (!vcpu
->arch
.apic
)
5065 if (!vcpu
->arch
.apic
->vapic_addr
)
5066 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
5073 tpr
= kvm_lapic_get_cr8(vcpu
);
5075 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
5078 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
5080 /* try to reinject previous events if any */
5081 if (vcpu
->arch
.exception
.pending
) {
5082 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
5083 vcpu
->arch
.exception
.has_error_code
,
5084 vcpu
->arch
.exception
.error_code
);
5085 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
5086 vcpu
->arch
.exception
.has_error_code
,
5087 vcpu
->arch
.exception
.error_code
,
5088 vcpu
->arch
.exception
.reinject
);
5092 if (vcpu
->arch
.nmi_injected
) {
5093 kvm_x86_ops
->set_nmi(vcpu
);
5097 if (vcpu
->arch
.interrupt
.pending
) {
5098 kvm_x86_ops
->set_irq(vcpu
);
5102 /* try to inject new event if pending */
5103 if (vcpu
->arch
.nmi_pending
) {
5104 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
5105 vcpu
->arch
.nmi_pending
= false;
5106 vcpu
->arch
.nmi_injected
= true;
5107 kvm_x86_ops
->set_nmi(vcpu
);
5109 } else if (kvm_cpu_has_interrupt(vcpu
)) {
5110 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
5111 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
5113 kvm_x86_ops
->set_irq(vcpu
);
5118 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
5120 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
5121 !vcpu
->guest_xcr0_loaded
) {
5122 /* kvm_set_xcr() also depends on this */
5123 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
5124 vcpu
->guest_xcr0_loaded
= 1;
5128 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
5130 if (vcpu
->guest_xcr0_loaded
) {
5131 if (vcpu
->arch
.xcr0
!= host_xcr0
)
5132 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
5133 vcpu
->guest_xcr0_loaded
= 0;
5137 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
5140 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
5141 vcpu
->run
->request_interrupt_window
;
5143 if (vcpu
->requests
) {
5144 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
5145 kvm_mmu_unload(vcpu
);
5146 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
5147 __kvm_migrate_timers(vcpu
);
5148 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
5149 r
= kvm_guest_time_update(vcpu
);
5153 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
5154 kvm_mmu_sync_roots(vcpu
);
5155 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
5156 kvm_x86_ops
->tlb_flush(vcpu
);
5157 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
5158 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
5162 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
5163 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
5167 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
5168 vcpu
->fpu_active
= 0;
5169 kvm_x86_ops
->fpu_deactivate(vcpu
);
5171 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
5172 /* Page is swapped out. Do synthetic halt */
5173 vcpu
->arch
.apf
.halted
= true;
5179 r
= kvm_mmu_reload(vcpu
);
5183 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
5184 inject_pending_event(vcpu
);
5186 /* enable NMI/IRQ window open exits if needed */
5187 if (vcpu
->arch
.nmi_pending
)
5188 kvm_x86_ops
->enable_nmi_window(vcpu
);
5189 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
5190 kvm_x86_ops
->enable_irq_window(vcpu
);
5192 if (kvm_lapic_enabled(vcpu
)) {
5193 update_cr8_intercept(vcpu
);
5194 kvm_lapic_sync_to_vapic(vcpu
);
5200 kvm_x86_ops
->prepare_guest_switch(vcpu
);
5201 if (vcpu
->fpu_active
)
5202 kvm_load_guest_fpu(vcpu
);
5203 kvm_load_guest_xcr0(vcpu
);
5205 atomic_set(&vcpu
->guest_mode
, 1);
5208 local_irq_disable();
5210 if (!atomic_read(&vcpu
->guest_mode
) || vcpu
->requests
5211 || need_resched() || signal_pending(current
)) {
5212 atomic_set(&vcpu
->guest_mode
, 0);
5216 kvm_x86_ops
->cancel_injection(vcpu
);
5221 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5225 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
5227 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
5228 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
5229 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
5230 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
5233 trace_kvm_entry(vcpu
->vcpu_id
);
5234 kvm_x86_ops
->run(vcpu
);
5237 * If the guest has used debug registers, at least dr7
5238 * will be disabled while returning to the host.
5239 * If we don't have active breakpoints in the host, we don't
5240 * care about the messed up debug address registers. But if
5241 * we have some of them active, restore the old state.
5243 if (hw_breakpoint_active())
5244 hw_breakpoint_restore();
5246 kvm_get_msr(vcpu
, MSR_IA32_TSC
, &vcpu
->arch
.last_guest_tsc
);
5248 atomic_set(&vcpu
->guest_mode
, 0);
5255 * We must have an instruction between local_irq_enable() and
5256 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5257 * the interrupt shadow. The stat.exits increment will do nicely.
5258 * But we need to prevent reordering, hence this barrier():
5266 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5269 * Profile KVM exit RIPs:
5271 if (unlikely(prof_on
== KVM_PROFILING
)) {
5272 unsigned long rip
= kvm_rip_read(vcpu
);
5273 profile_hit(KVM_PROFILING
, (void *)rip
);
5277 kvm_lapic_sync_from_vapic(vcpu
);
5279 r
= kvm_x86_ops
->handle_exit(vcpu
);
5285 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
5288 struct kvm
*kvm
= vcpu
->kvm
;
5290 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
5291 pr_debug("vcpu %d received sipi with vector # %x\n",
5292 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
5293 kvm_lapic_reset(vcpu
);
5294 r
= kvm_arch_vcpu_reset(vcpu
);
5297 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5300 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5305 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
5306 !vcpu
->arch
.apf
.halted
)
5307 r
= vcpu_enter_guest(vcpu
);
5309 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5310 kvm_vcpu_block(vcpu
);
5311 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5312 if (kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
5314 switch(vcpu
->arch
.mp_state
) {
5315 case KVM_MP_STATE_HALTED
:
5316 vcpu
->arch
.mp_state
=
5317 KVM_MP_STATE_RUNNABLE
;
5318 case KVM_MP_STATE_RUNNABLE
:
5319 vcpu
->arch
.apf
.halted
= false;
5321 case KVM_MP_STATE_SIPI_RECEIVED
:
5332 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
5333 if (kvm_cpu_has_pending_timer(vcpu
))
5334 kvm_inject_pending_timer_irqs(vcpu
);
5336 if (dm_request_for_irq_injection(vcpu
)) {
5338 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5339 ++vcpu
->stat
.request_irq_exits
;
5342 kvm_check_async_pf_completion(vcpu
);
5344 if (signal_pending(current
)) {
5346 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5347 ++vcpu
->stat
.signal_exits
;
5349 if (need_resched()) {
5350 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5352 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5356 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5363 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
5368 if (vcpu
->sigset_active
)
5369 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
5371 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
5372 kvm_vcpu_block(vcpu
);
5373 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
5378 /* re-sync apic's tpr */
5379 if (!irqchip_in_kernel(vcpu
->kvm
))
5380 kvm_set_cr8(vcpu
, kvm_run
->cr8
);
5382 if (vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
) {
5383 if (vcpu
->mmio_needed
) {
5384 memcpy(vcpu
->mmio_data
, kvm_run
->mmio
.data
, 8);
5385 vcpu
->mmio_read_completed
= 1;
5386 vcpu
->mmio_needed
= 0;
5388 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5389 r
= emulate_instruction(vcpu
, 0, 0, EMULTYPE_NO_DECODE
);
5390 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5391 if (r
!= EMULATE_DONE
) {
5396 if (kvm_run
->exit_reason
== KVM_EXIT_HYPERCALL
)
5397 kvm_register_write(vcpu
, VCPU_REGS_RAX
,
5398 kvm_run
->hypercall
.ret
);
5400 r
= __vcpu_run(vcpu
);
5403 post_kvm_run_save(vcpu
);
5404 if (vcpu
->sigset_active
)
5405 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
5410 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5412 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5413 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5414 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5415 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5416 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5417 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
5418 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
5419 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
5420 #ifdef CONFIG_X86_64
5421 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5422 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
5423 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
5424 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
5425 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
5426 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
5427 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
5428 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
5431 regs
->rip
= kvm_rip_read(vcpu
);
5432 regs
->rflags
= kvm_get_rflags(vcpu
);
5437 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5439 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
5440 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
5441 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
5442 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
5443 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
5444 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
5445 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
5446 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
5447 #ifdef CONFIG_X86_64
5448 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
5449 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
5450 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
5451 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
5452 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
5453 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
5454 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
5455 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
5458 kvm_rip_write(vcpu
, regs
->rip
);
5459 kvm_set_rflags(vcpu
, regs
->rflags
);
5461 vcpu
->arch
.exception
.pending
= false;
5463 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5468 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
5470 struct kvm_segment cs
;
5472 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
5476 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
5478 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
5479 struct kvm_sregs
*sregs
)
5483 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5484 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5485 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5486 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5487 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5488 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5490 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5491 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5493 kvm_x86_ops
->get_idt(vcpu
, &dt
);
5494 sregs
->idt
.limit
= dt
.size
;
5495 sregs
->idt
.base
= dt
.address
;
5496 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
5497 sregs
->gdt
.limit
= dt
.size
;
5498 sregs
->gdt
.base
= dt
.address
;
5500 sregs
->cr0
= kvm_read_cr0(vcpu
);
5501 sregs
->cr2
= vcpu
->arch
.cr2
;
5502 sregs
->cr3
= vcpu
->arch
.cr3
;
5503 sregs
->cr4
= kvm_read_cr4(vcpu
);
5504 sregs
->cr8
= kvm_get_cr8(vcpu
);
5505 sregs
->efer
= vcpu
->arch
.efer
;
5506 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
5508 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
5510 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
5511 set_bit(vcpu
->arch
.interrupt
.nr
,
5512 (unsigned long *)sregs
->interrupt_bitmap
);
5517 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
5518 struct kvm_mp_state
*mp_state
)
5520 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
5524 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
5525 struct kvm_mp_state
*mp_state
)
5527 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
5528 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5532 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int reason
,
5533 bool has_error_code
, u32 error_code
)
5535 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
5538 init_emulate_ctxt(vcpu
);
5540 ret
= emulator_task_switch(&vcpu
->arch
.emulate_ctxt
,
5541 tss_selector
, reason
, has_error_code
,
5545 return EMULATE_FAIL
;
5547 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
5548 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
5549 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
5550 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5551 return EMULATE_DONE
;
5553 EXPORT_SYMBOL_GPL(kvm_task_switch
);
5555 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
5556 struct kvm_sregs
*sregs
)
5558 int mmu_reset_needed
= 0;
5559 int pending_vec
, max_bits
;
5562 dt
.size
= sregs
->idt
.limit
;
5563 dt
.address
= sregs
->idt
.base
;
5564 kvm_x86_ops
->set_idt(vcpu
, &dt
);
5565 dt
.size
= sregs
->gdt
.limit
;
5566 dt
.address
= sregs
->gdt
.base
;
5567 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
5569 vcpu
->arch
.cr2
= sregs
->cr2
;
5570 mmu_reset_needed
|= vcpu
->arch
.cr3
!= sregs
->cr3
;
5571 vcpu
->arch
.cr3
= sregs
->cr3
;
5573 kvm_set_cr8(vcpu
, sregs
->cr8
);
5575 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
5576 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
5577 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
5579 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
5580 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
5581 vcpu
->arch
.cr0
= sregs
->cr0
;
5583 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
5584 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
5585 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
5587 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
5588 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, vcpu
->arch
.cr3
);
5589 mmu_reset_needed
= 1;
5592 if (mmu_reset_needed
)
5593 kvm_mmu_reset_context(vcpu
);
5595 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
5596 pending_vec
= find_first_bit(
5597 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
5598 if (pending_vec
< max_bits
) {
5599 kvm_queue_interrupt(vcpu
, pending_vec
, false);
5600 pr_debug("Set back pending irq %d\n", pending_vec
);
5601 if (irqchip_in_kernel(vcpu
->kvm
))
5602 kvm_pic_clear_isr_ack(vcpu
->kvm
);
5605 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5606 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5607 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5608 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5609 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5610 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5612 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5613 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5615 update_cr8_intercept(vcpu
);
5617 /* Older userspace won't unhalt the vcpu on reset. */
5618 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
5619 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
5621 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5623 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5628 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
5629 struct kvm_guest_debug
*dbg
)
5631 unsigned long rflags
;
5634 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
5636 if (vcpu
->arch
.exception
.pending
)
5638 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
5639 kvm_queue_exception(vcpu
, DB_VECTOR
);
5641 kvm_queue_exception(vcpu
, BP_VECTOR
);
5645 * Read rflags as long as potentially injected trace flags are still
5648 rflags
= kvm_get_rflags(vcpu
);
5650 vcpu
->guest_debug
= dbg
->control
;
5651 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
5652 vcpu
->guest_debug
= 0;
5654 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
5655 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
5656 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
5657 vcpu
->arch
.switch_db_regs
=
5658 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
5660 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
5661 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
5662 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
5665 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
5666 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
5667 get_segment_base(vcpu
, VCPU_SREG_CS
);
5670 * Trigger an rflags update that will inject or remove the trace
5673 kvm_set_rflags(vcpu
, rflags
);
5675 kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
5685 * Translate a guest virtual address to a guest physical address.
5687 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
5688 struct kvm_translation
*tr
)
5690 unsigned long vaddr
= tr
->linear_address
;
5694 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5695 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
5696 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5697 tr
->physical_address
= gpa
;
5698 tr
->valid
= gpa
!= UNMAPPED_GVA
;
5705 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5707 struct i387_fxsave_struct
*fxsave
=
5708 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
5710 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
5711 fpu
->fcw
= fxsave
->cwd
;
5712 fpu
->fsw
= fxsave
->swd
;
5713 fpu
->ftwx
= fxsave
->twd
;
5714 fpu
->last_opcode
= fxsave
->fop
;
5715 fpu
->last_ip
= fxsave
->rip
;
5716 fpu
->last_dp
= fxsave
->rdp
;
5717 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
5722 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5724 struct i387_fxsave_struct
*fxsave
=
5725 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
5727 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
5728 fxsave
->cwd
= fpu
->fcw
;
5729 fxsave
->swd
= fpu
->fsw
;
5730 fxsave
->twd
= fpu
->ftwx
;
5731 fxsave
->fop
= fpu
->last_opcode
;
5732 fxsave
->rip
= fpu
->last_ip
;
5733 fxsave
->rdp
= fpu
->last_dp
;
5734 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
5739 int fx_init(struct kvm_vcpu
*vcpu
)
5743 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
5747 fpu_finit(&vcpu
->arch
.guest_fpu
);
5750 * Ensure guest xcr0 is valid for loading
5752 vcpu
->arch
.xcr0
= XSTATE_FP
;
5754 vcpu
->arch
.cr0
|= X86_CR0_ET
;
5758 EXPORT_SYMBOL_GPL(fx_init
);
5760 static void fx_free(struct kvm_vcpu
*vcpu
)
5762 fpu_free(&vcpu
->arch
.guest_fpu
);
5765 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
5767 if (vcpu
->guest_fpu_loaded
)
5771 * Restore all possible states in the guest,
5772 * and assume host would use all available bits.
5773 * Guest xcr0 would be loaded later.
5775 kvm_put_guest_xcr0(vcpu
);
5776 vcpu
->guest_fpu_loaded
= 1;
5777 unlazy_fpu(current
);
5778 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
5782 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
5784 kvm_put_guest_xcr0(vcpu
);
5786 if (!vcpu
->guest_fpu_loaded
)
5789 vcpu
->guest_fpu_loaded
= 0;
5790 fpu_save_init(&vcpu
->arch
.guest_fpu
);
5791 ++vcpu
->stat
.fpu_reload
;
5792 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
5796 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
5798 if (vcpu
->arch
.time_page
) {
5799 kvm_release_page_dirty(vcpu
->arch
.time_page
);
5800 vcpu
->arch
.time_page
= NULL
;
5803 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
5805 kvm_x86_ops
->vcpu_free(vcpu
);
5808 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
5811 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
5812 printk_once(KERN_WARNING
5813 "kvm: SMP vm created on host with unstable TSC; "
5814 "guest TSC will not be reliable\n");
5815 return kvm_x86_ops
->vcpu_create(kvm
, id
);
5818 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
5822 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
5824 r
= kvm_arch_vcpu_reset(vcpu
);
5826 r
= kvm_mmu_setup(vcpu
);
5833 kvm_x86_ops
->vcpu_free(vcpu
);
5837 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
5839 vcpu
->arch
.apf
.msr_val
= 0;
5842 kvm_mmu_unload(vcpu
);
5846 kvm_x86_ops
->vcpu_free(vcpu
);
5849 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
5851 vcpu
->arch
.nmi_pending
= false;
5852 vcpu
->arch
.nmi_injected
= false;
5854 vcpu
->arch
.switch_db_regs
= 0;
5855 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
5856 vcpu
->arch
.dr6
= DR6_FIXED_1
;
5857 vcpu
->arch
.dr7
= DR7_FIXED_1
;
5859 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5860 vcpu
->arch
.apf
.msr_val
= 0;
5862 kvm_clear_async_pf_completion_queue(vcpu
);
5863 kvm_async_pf_hash_reset(vcpu
);
5864 vcpu
->arch
.apf
.halted
= false;
5866 return kvm_x86_ops
->vcpu_reset(vcpu
);
5869 int kvm_arch_hardware_enable(void *garbage
)
5872 struct kvm_vcpu
*vcpu
;
5875 kvm_shared_msr_cpu_online();
5876 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5877 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5878 if (vcpu
->cpu
== smp_processor_id())
5879 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5880 return kvm_x86_ops
->hardware_enable(garbage
);
5883 void kvm_arch_hardware_disable(void *garbage
)
5885 kvm_x86_ops
->hardware_disable(garbage
);
5886 drop_user_return_notifiers(garbage
);
5889 int kvm_arch_hardware_setup(void)
5891 return kvm_x86_ops
->hardware_setup();
5894 void kvm_arch_hardware_unsetup(void)
5896 kvm_x86_ops
->hardware_unsetup();
5899 void kvm_arch_check_processor_compat(void *rtn
)
5901 kvm_x86_ops
->check_processor_compatibility(rtn
);
5904 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
5910 BUG_ON(vcpu
->kvm
== NULL
);
5913 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
5914 vcpu
->arch
.walk_mmu
= &vcpu
->arch
.mmu
;
5915 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
5916 vcpu
->arch
.mmu
.translate_gpa
= translate_gpa
;
5917 vcpu
->arch
.nested_mmu
.translate_gpa
= translate_nested_gpa
;
5918 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
5919 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5921 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
5923 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
5928 vcpu
->arch
.pio_data
= page_address(page
);
5930 if (!kvm
->arch
.virtual_tsc_khz
)
5931 kvm_arch_set_tsc_khz(kvm
, max_tsc_khz
);
5933 r
= kvm_mmu_create(vcpu
);
5935 goto fail_free_pio_data
;
5937 if (irqchip_in_kernel(kvm
)) {
5938 r
= kvm_create_lapic(vcpu
);
5940 goto fail_mmu_destroy
;
5943 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
5945 if (!vcpu
->arch
.mce_banks
) {
5947 goto fail_free_lapic
;
5949 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
5951 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
))
5952 goto fail_free_mce_banks
;
5954 kvm_async_pf_hash_reset(vcpu
);
5957 fail_free_mce_banks
:
5958 kfree(vcpu
->arch
.mce_banks
);
5960 kvm_free_lapic(vcpu
);
5962 kvm_mmu_destroy(vcpu
);
5964 free_page((unsigned long)vcpu
->arch
.pio_data
);
5969 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
5973 kfree(vcpu
->arch
.mce_banks
);
5974 kvm_free_lapic(vcpu
);
5975 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5976 kvm_mmu_destroy(vcpu
);
5977 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5978 free_page((unsigned long)vcpu
->arch
.pio_data
);
5981 int kvm_arch_init_vm(struct kvm
*kvm
)
5983 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
5984 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
5986 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5987 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
5989 spin_lock_init(&kvm
->arch
.tsc_write_lock
);
5994 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
5997 kvm_mmu_unload(vcpu
);
6001 static void kvm_free_vcpus(struct kvm
*kvm
)
6004 struct kvm_vcpu
*vcpu
;
6007 * Unpin any mmu pages first.
6009 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6010 kvm_clear_async_pf_completion_queue(vcpu
);
6011 kvm_unload_vcpu_mmu(vcpu
);
6013 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6014 kvm_arch_vcpu_free(vcpu
);
6016 mutex_lock(&kvm
->lock
);
6017 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
6018 kvm
->vcpus
[i
] = NULL
;
6020 atomic_set(&kvm
->online_vcpus
, 0);
6021 mutex_unlock(&kvm
->lock
);
6024 void kvm_arch_sync_events(struct kvm
*kvm
)
6026 kvm_free_all_assigned_devices(kvm
);
6030 void kvm_arch_destroy_vm(struct kvm
*kvm
)
6032 kvm_iommu_unmap_guest(kvm
);
6033 kfree(kvm
->arch
.vpic
);
6034 kfree(kvm
->arch
.vioapic
);
6035 kvm_free_vcpus(kvm
);
6036 if (kvm
->arch
.apic_access_page
)
6037 put_page(kvm
->arch
.apic_access_page
);
6038 if (kvm
->arch
.ept_identity_pagetable
)
6039 put_page(kvm
->arch
.ept_identity_pagetable
);
6042 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
6043 struct kvm_memory_slot
*memslot
,
6044 struct kvm_memory_slot old
,
6045 struct kvm_userspace_memory_region
*mem
,
6048 int npages
= memslot
->npages
;
6049 int map_flags
= MAP_PRIVATE
| MAP_ANONYMOUS
;
6051 /* Prevent internal slot pages from being moved by fork()/COW. */
6052 if (memslot
->id
>= KVM_MEMORY_SLOTS
)
6053 map_flags
= MAP_SHARED
| MAP_ANONYMOUS
;
6055 /*To keep backward compatibility with older userspace,
6056 *x86 needs to hanlde !user_alloc case.
6059 if (npages
&& !old
.rmap
) {
6060 unsigned long userspace_addr
;
6062 down_write(¤t
->mm
->mmap_sem
);
6063 userspace_addr
= do_mmap(NULL
, 0,
6065 PROT_READ
| PROT_WRITE
,
6068 up_write(¤t
->mm
->mmap_sem
);
6070 if (IS_ERR((void *)userspace_addr
))
6071 return PTR_ERR((void *)userspace_addr
);
6073 memslot
->userspace_addr
= userspace_addr
;
6081 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
6082 struct kvm_userspace_memory_region
*mem
,
6083 struct kvm_memory_slot old
,
6087 int npages
= mem
->memory_size
>> PAGE_SHIFT
;
6089 if (!user_alloc
&& !old
.user_alloc
&& old
.rmap
&& !npages
) {
6092 down_write(¤t
->mm
->mmap_sem
);
6093 ret
= do_munmap(current
->mm
, old
.userspace_addr
,
6094 old
.npages
* PAGE_SIZE
);
6095 up_write(¤t
->mm
->mmap_sem
);
6098 "kvm_vm_ioctl_set_memory_region: "
6099 "failed to munmap memory\n");
6102 spin_lock(&kvm
->mmu_lock
);
6103 if (!kvm
->arch
.n_requested_mmu_pages
) {
6104 unsigned int nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
6105 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
6108 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
6109 spin_unlock(&kvm
->mmu_lock
);
6112 void kvm_arch_flush_shadow(struct kvm
*kvm
)
6114 kvm_mmu_zap_all(kvm
);
6115 kvm_reload_remote_mmus(kvm
);
6118 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
6120 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6121 !vcpu
->arch
.apf
.halted
)
6122 || !list_empty_careful(&vcpu
->async_pf
.done
)
6123 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
6124 || vcpu
->arch
.nmi_pending
||
6125 (kvm_arch_interrupt_allowed(vcpu
) &&
6126 kvm_cpu_has_interrupt(vcpu
));
6129 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
)
6132 int cpu
= vcpu
->cpu
;
6134 if (waitqueue_active(&vcpu
->wq
)) {
6135 wake_up_interruptible(&vcpu
->wq
);
6136 ++vcpu
->stat
.halt_wakeup
;
6140 if (cpu
!= me
&& (unsigned)cpu
< nr_cpu_ids
&& cpu_online(cpu
))
6141 if (atomic_xchg(&vcpu
->guest_mode
, 0))
6142 smp_send_reschedule(cpu
);
6146 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
6148 return kvm_x86_ops
->interrupt_allowed(vcpu
);
6151 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
6153 unsigned long current_rip
= kvm_rip_read(vcpu
) +
6154 get_segment_base(vcpu
, VCPU_SREG_CS
);
6156 return current_rip
== linear_rip
;
6158 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
6160 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
6162 unsigned long rflags
;
6164 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
6165 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6166 rflags
&= ~X86_EFLAGS_TF
;
6169 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
6171 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
6173 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
6174 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
6175 rflags
|= X86_EFLAGS_TF
;
6176 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
6177 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6179 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
6181 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
6185 if (!vcpu
->arch
.mmu
.direct_map
|| !work
->arch
.direct_map
||
6186 is_error_page(work
->page
))
6189 r
= kvm_mmu_reload(vcpu
);
6193 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
6196 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
6198 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
6201 static inline u32
kvm_async_pf_next_probe(u32 key
)
6203 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
6206 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6208 u32 key
= kvm_async_pf_hash_fn(gfn
);
6210 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
6211 key
= kvm_async_pf_next_probe(key
);
6213 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
6216 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6219 u32 key
= kvm_async_pf_hash_fn(gfn
);
6221 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
6222 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
6223 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
6224 key
= kvm_async_pf_next_probe(key
);
6229 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6231 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
6234 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6238 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
6240 vcpu
->arch
.apf
.gfns
[i
] = ~0;
6242 j
= kvm_async_pf_next_probe(j
);
6243 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
6245 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
6247 * k lies cyclically in ]i,j]
6249 * |....j i.k.| or |.k..j i...|
6251 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
6252 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
6257 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
6260 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
6264 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
6265 struct kvm_async_pf
*work
)
6267 struct x86_exception fault
;
6269 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
6270 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
6272 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
6273 (vcpu
->arch
.apf
.send_user_only
&&
6274 kvm_x86_ops
->get_cpl(vcpu
) == 0))
6275 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
6276 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
6277 fault
.vector
= PF_VECTOR
;
6278 fault
.error_code_valid
= true;
6279 fault
.error_code
= 0;
6280 fault
.nested_page_fault
= false;
6281 fault
.address
= work
->arch
.token
;
6282 kvm_inject_page_fault(vcpu
, &fault
);
6286 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
6287 struct kvm_async_pf
*work
)
6289 struct x86_exception fault
;
6291 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
6292 if (is_error_page(work
->page
))
6293 work
->arch
.token
= ~0; /* broadcast wakeup */
6295 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
6297 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
6298 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
6299 fault
.vector
= PF_VECTOR
;
6300 fault
.error_code_valid
= true;
6301 fault
.error_code
= 0;
6302 fault
.nested_page_fault
= false;
6303 fault
.address
= work
->arch
.token
;
6304 kvm_inject_page_fault(vcpu
, &fault
);
6306 vcpu
->arch
.apf
.halted
= false;
6309 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
6311 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
6314 return !kvm_event_needs_reinjection(vcpu
) &&
6315 kvm_x86_ops
->interrupt_allowed(vcpu
);
6318 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
6319 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
6320 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
6321 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
6322 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
6323 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
6324 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
6325 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
6326 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
6327 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
6328 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
6329 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);