drivers:misc:ti-st: remove rfkill dependency
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / usb / smsc95xx.c
blob47a6c870b51fae361b39de950ee4a523ced52475
1 /***************************************************************************
3 * Copyright (C) 2007-2008 SMSC
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 *****************************************************************************/
21 #include <linux/module.h>
22 #include <linux/kmod.h>
23 #include <linux/init.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/ethtool.h>
27 #include <linux/mii.h>
28 #include <linux/usb.h>
29 #include <linux/crc32.h>
30 #include <linux/usb/usbnet.h>
31 #include <linux/slab.h>
32 #include "smsc95xx.h"
34 #define SMSC_CHIPNAME "smsc95xx"
35 #define SMSC_DRIVER_VERSION "1.0.4"
36 #define HS_USB_PKT_SIZE (512)
37 #define FS_USB_PKT_SIZE (64)
38 #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
39 #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
40 #define DEFAULT_BULK_IN_DELAY (0x00002000)
41 #define MAX_SINGLE_PACKET_SIZE (2048)
42 #define LAN95XX_EEPROM_MAGIC (0x9500)
43 #define EEPROM_MAC_OFFSET (0x01)
44 #define DEFAULT_TX_CSUM_ENABLE (true)
45 #define DEFAULT_RX_CSUM_ENABLE (true)
46 #define SMSC95XX_INTERNAL_PHY_ID (1)
47 #define SMSC95XX_TX_OVERHEAD (8)
48 #define SMSC95XX_TX_OVERHEAD_CSUM (12)
50 struct smsc95xx_priv {
51 u32 mac_cr;
52 u32 hash_hi;
53 u32 hash_lo;
54 spinlock_t mac_cr_lock;
55 bool use_tx_csum;
56 bool use_rx_csum;
59 struct usb_context {
60 struct usb_ctrlrequest req;
61 struct usbnet *dev;
64 static int turbo_mode = true;
65 module_param(turbo_mode, bool, 0644);
66 MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
68 static int smsc95xx_read_reg(struct usbnet *dev, u32 index, u32 *data)
70 u32 *buf = kmalloc(4, GFP_KERNEL);
71 int ret;
73 BUG_ON(!dev);
75 if (!buf)
76 return -ENOMEM;
78 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
79 USB_VENDOR_REQUEST_READ_REGISTER,
80 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
81 00, index, buf, 4, USB_CTRL_GET_TIMEOUT);
83 if (unlikely(ret < 0))
84 netdev_warn(dev->net, "Failed to read register index 0x%08x\n", index);
86 le32_to_cpus(buf);
87 *data = *buf;
88 kfree(buf);
90 return ret;
93 static int smsc95xx_write_reg(struct usbnet *dev, u32 index, u32 data)
95 u32 *buf = kmalloc(4, GFP_KERNEL);
96 int ret;
98 BUG_ON(!dev);
100 if (!buf)
101 return -ENOMEM;
103 *buf = data;
104 cpu_to_le32s(buf);
106 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
107 USB_VENDOR_REQUEST_WRITE_REGISTER,
108 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
109 00, index, buf, 4, USB_CTRL_SET_TIMEOUT);
111 if (unlikely(ret < 0))
112 netdev_warn(dev->net, "Failed to write register index 0x%08x\n", index);
114 kfree(buf);
116 return ret;
119 /* Loop until the read is completed with timeout
120 * called with phy_mutex held */
121 static int smsc95xx_phy_wait_not_busy(struct usbnet *dev)
123 unsigned long start_time = jiffies;
124 u32 val;
126 do {
127 smsc95xx_read_reg(dev, MII_ADDR, &val);
128 if (!(val & MII_BUSY_))
129 return 0;
130 } while (!time_after(jiffies, start_time + HZ));
132 return -EIO;
135 static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
137 struct usbnet *dev = netdev_priv(netdev);
138 u32 val, addr;
140 mutex_lock(&dev->phy_mutex);
142 /* confirm MII not busy */
143 if (smsc95xx_phy_wait_not_busy(dev)) {
144 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n");
145 mutex_unlock(&dev->phy_mutex);
146 return -EIO;
149 /* set the address, index & direction (read from PHY) */
150 phy_id &= dev->mii.phy_id_mask;
151 idx &= dev->mii.reg_num_mask;
152 addr = (phy_id << 11) | (idx << 6) | MII_READ_;
153 smsc95xx_write_reg(dev, MII_ADDR, addr);
155 if (smsc95xx_phy_wait_not_busy(dev)) {
156 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx);
157 mutex_unlock(&dev->phy_mutex);
158 return -EIO;
161 smsc95xx_read_reg(dev, MII_DATA, &val);
163 mutex_unlock(&dev->phy_mutex);
165 return (u16)(val & 0xFFFF);
168 static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
169 int regval)
171 struct usbnet *dev = netdev_priv(netdev);
172 u32 val, addr;
174 mutex_lock(&dev->phy_mutex);
176 /* confirm MII not busy */
177 if (smsc95xx_phy_wait_not_busy(dev)) {
178 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n");
179 mutex_unlock(&dev->phy_mutex);
180 return;
183 val = regval;
184 smsc95xx_write_reg(dev, MII_DATA, val);
186 /* set the address, index & direction (write to PHY) */
187 phy_id &= dev->mii.phy_id_mask;
188 idx &= dev->mii.reg_num_mask;
189 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_;
190 smsc95xx_write_reg(dev, MII_ADDR, addr);
192 if (smsc95xx_phy_wait_not_busy(dev))
193 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx);
195 mutex_unlock(&dev->phy_mutex);
198 static int smsc95xx_wait_eeprom(struct usbnet *dev)
200 unsigned long start_time = jiffies;
201 u32 val;
203 do {
204 smsc95xx_read_reg(dev, E2P_CMD, &val);
205 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
206 break;
207 udelay(40);
208 } while (!time_after(jiffies, start_time + HZ));
210 if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
211 netdev_warn(dev->net, "EEPROM read operation timeout\n");
212 return -EIO;
215 return 0;
218 static int smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
220 unsigned long start_time = jiffies;
221 u32 val;
223 do {
224 smsc95xx_read_reg(dev, E2P_CMD, &val);
226 if (!(val & E2P_CMD_BUSY_))
227 return 0;
229 udelay(40);
230 } while (!time_after(jiffies, start_time + HZ));
232 netdev_warn(dev->net, "EEPROM is busy\n");
233 return -EIO;
236 static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
237 u8 *data)
239 u32 val;
240 int i, ret;
242 BUG_ON(!dev);
243 BUG_ON(!data);
245 ret = smsc95xx_eeprom_confirm_not_busy(dev);
246 if (ret)
247 return ret;
249 for (i = 0; i < length; i++) {
250 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
251 smsc95xx_write_reg(dev, E2P_CMD, val);
253 ret = smsc95xx_wait_eeprom(dev);
254 if (ret < 0)
255 return ret;
257 smsc95xx_read_reg(dev, E2P_DATA, &val);
259 data[i] = val & 0xFF;
260 offset++;
263 return 0;
266 static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
267 u8 *data)
269 u32 val;
270 int i, ret;
272 BUG_ON(!dev);
273 BUG_ON(!data);
275 ret = smsc95xx_eeprom_confirm_not_busy(dev);
276 if (ret)
277 return ret;
279 /* Issue write/erase enable command */
280 val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
281 smsc95xx_write_reg(dev, E2P_CMD, val);
283 ret = smsc95xx_wait_eeprom(dev);
284 if (ret < 0)
285 return ret;
287 for (i = 0; i < length; i++) {
289 /* Fill data register */
290 val = data[i];
291 smsc95xx_write_reg(dev, E2P_DATA, val);
293 /* Send "write" command */
294 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
295 smsc95xx_write_reg(dev, E2P_CMD, val);
297 ret = smsc95xx_wait_eeprom(dev);
298 if (ret < 0)
299 return ret;
301 offset++;
304 return 0;
307 static void smsc95xx_async_cmd_callback(struct urb *urb)
309 struct usb_context *usb_context = urb->context;
310 struct usbnet *dev = usb_context->dev;
311 int status = urb->status;
313 if (status < 0)
314 netdev_warn(dev->net, "async callback failed with %d\n", status);
316 kfree(usb_context);
317 usb_free_urb(urb);
320 static int smsc95xx_write_reg_async(struct usbnet *dev, u16 index, u32 *data)
322 struct usb_context *usb_context;
323 int status;
324 struct urb *urb;
325 const u16 size = 4;
327 urb = usb_alloc_urb(0, GFP_ATOMIC);
328 if (!urb) {
329 netdev_warn(dev->net, "Error allocating URB\n");
330 return -ENOMEM;
333 usb_context = kmalloc(sizeof(struct usb_context), GFP_ATOMIC);
334 if (usb_context == NULL) {
335 netdev_warn(dev->net, "Error allocating control msg\n");
336 usb_free_urb(urb);
337 return -ENOMEM;
340 usb_context->req.bRequestType =
341 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
342 usb_context->req.bRequest = USB_VENDOR_REQUEST_WRITE_REGISTER;
343 usb_context->req.wValue = 00;
344 usb_context->req.wIndex = cpu_to_le16(index);
345 usb_context->req.wLength = cpu_to_le16(size);
347 usb_fill_control_urb(urb, dev->udev, usb_sndctrlpipe(dev->udev, 0),
348 (void *)&usb_context->req, data, size,
349 smsc95xx_async_cmd_callback,
350 (void *)usb_context);
352 status = usb_submit_urb(urb, GFP_ATOMIC);
353 if (status < 0) {
354 netdev_warn(dev->net, "Error submitting control msg, sts=%d\n",
355 status);
356 kfree(usb_context);
357 usb_free_urb(urb);
360 return status;
363 /* returns hash bit number for given MAC address
364 * example:
365 * 01 00 5E 00 00 01 -> returns bit number 31 */
366 static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
368 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
371 static void smsc95xx_set_multicast(struct net_device *netdev)
373 struct usbnet *dev = netdev_priv(netdev);
374 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
375 unsigned long flags;
377 pdata->hash_hi = 0;
378 pdata->hash_lo = 0;
380 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
382 if (dev->net->flags & IFF_PROMISC) {
383 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n");
384 pdata->mac_cr |= MAC_CR_PRMS_;
385 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
386 } else if (dev->net->flags & IFF_ALLMULTI) {
387 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n");
388 pdata->mac_cr |= MAC_CR_MCPAS_;
389 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_);
390 } else if (!netdev_mc_empty(dev->net)) {
391 struct netdev_hw_addr *ha;
393 pdata->mac_cr |= MAC_CR_HPFILT_;
394 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
396 netdev_for_each_mc_addr(ha, netdev) {
397 u32 bitnum = smsc95xx_hash(ha->addr);
398 u32 mask = 0x01 << (bitnum & 0x1F);
399 if (bitnum & 0x20)
400 pdata->hash_hi |= mask;
401 else
402 pdata->hash_lo |= mask;
405 netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n",
406 pdata->hash_hi, pdata->hash_lo);
407 } else {
408 netif_dbg(dev, drv, dev->net, "receive own packets only\n");
409 pdata->mac_cr &=
410 ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
413 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
415 /* Initiate async writes, as we can't wait for completion here */
416 smsc95xx_write_reg_async(dev, HASHH, &pdata->hash_hi);
417 smsc95xx_write_reg_async(dev, HASHL, &pdata->hash_lo);
418 smsc95xx_write_reg_async(dev, MAC_CR, &pdata->mac_cr);
421 static void smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
422 u16 lcladv, u16 rmtadv)
424 u32 flow, afc_cfg = 0;
426 int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
427 if (ret < 0) {
428 netdev_warn(dev->net, "error reading AFC_CFG\n");
429 return;
432 if (duplex == DUPLEX_FULL) {
433 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
435 if (cap & FLOW_CTRL_RX)
436 flow = 0xFFFF0002;
437 else
438 flow = 0;
440 if (cap & FLOW_CTRL_TX)
441 afc_cfg |= 0xF;
442 else
443 afc_cfg &= ~0xF;
445 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n",
446 cap & FLOW_CTRL_RX ? "enabled" : "disabled",
447 cap & FLOW_CTRL_TX ? "enabled" : "disabled");
448 } else {
449 netif_dbg(dev, link, dev->net, "half duplex\n");
450 flow = 0;
451 afc_cfg |= 0xF;
454 smsc95xx_write_reg(dev, FLOW, flow);
455 smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
458 static int smsc95xx_link_reset(struct usbnet *dev)
460 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
461 struct mii_if_info *mii = &dev->mii;
462 struct ethtool_cmd ecmd;
463 unsigned long flags;
464 u16 lcladv, rmtadv;
465 u32 intdata;
467 /* clear interrupt status */
468 smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
469 intdata = 0xFFFFFFFF;
470 smsc95xx_write_reg(dev, INT_STS, intdata);
472 mii_check_media(mii, 1, 1);
473 mii_ethtool_gset(&dev->mii, &ecmd);
474 lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
475 rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
477 netif_dbg(dev, link, dev->net, "speed: %d duplex: %d lcladv: %04x rmtadv: %04x\n",
478 ecmd.speed, ecmd.duplex, lcladv, rmtadv);
480 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
481 if (ecmd.duplex != DUPLEX_FULL) {
482 pdata->mac_cr &= ~MAC_CR_FDPX_;
483 pdata->mac_cr |= MAC_CR_RCVOWN_;
484 } else {
485 pdata->mac_cr &= ~MAC_CR_RCVOWN_;
486 pdata->mac_cr |= MAC_CR_FDPX_;
488 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
490 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
492 smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
494 return 0;
497 static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
499 u32 intdata;
501 if (urb->actual_length != 4) {
502 netdev_warn(dev->net, "unexpected urb length %d\n",
503 urb->actual_length);
504 return;
507 memcpy(&intdata, urb->transfer_buffer, 4);
508 le32_to_cpus(&intdata);
510 netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata);
512 if (intdata & INT_ENP_PHY_INT_)
513 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
514 else
515 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n",
516 intdata);
519 /* Enable or disable Tx & Rx checksum offload engines */
520 static int smsc95xx_set_csums(struct usbnet *dev)
522 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
523 u32 read_buf;
524 int ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
525 if (ret < 0) {
526 netdev_warn(dev->net, "Failed to read COE_CR: %d\n", ret);
527 return ret;
530 if (pdata->use_tx_csum)
531 read_buf |= Tx_COE_EN_;
532 else
533 read_buf &= ~Tx_COE_EN_;
535 if (pdata->use_rx_csum)
536 read_buf |= Rx_COE_EN_;
537 else
538 read_buf &= ~Rx_COE_EN_;
540 ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
541 if (ret < 0) {
542 netdev_warn(dev->net, "Failed to write COE_CR: %d\n", ret);
543 return ret;
546 netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);
547 return 0;
550 static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
552 return MAX_EEPROM_SIZE;
555 static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev,
556 struct ethtool_eeprom *ee, u8 *data)
558 struct usbnet *dev = netdev_priv(netdev);
560 ee->magic = LAN95XX_EEPROM_MAGIC;
562 return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data);
565 static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev,
566 struct ethtool_eeprom *ee, u8 *data)
568 struct usbnet *dev = netdev_priv(netdev);
570 if (ee->magic != LAN95XX_EEPROM_MAGIC) {
571 netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n",
572 ee->magic);
573 return -EINVAL;
576 return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
579 static u32 smsc95xx_ethtool_get_rx_csum(struct net_device *netdev)
581 struct usbnet *dev = netdev_priv(netdev);
582 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
584 return pdata->use_rx_csum;
587 static int smsc95xx_ethtool_set_rx_csum(struct net_device *netdev, u32 val)
589 struct usbnet *dev = netdev_priv(netdev);
590 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
592 pdata->use_rx_csum = !!val;
594 return smsc95xx_set_csums(dev);
597 static u32 smsc95xx_ethtool_get_tx_csum(struct net_device *netdev)
599 struct usbnet *dev = netdev_priv(netdev);
600 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
602 return pdata->use_tx_csum;
605 static int smsc95xx_ethtool_set_tx_csum(struct net_device *netdev, u32 val)
607 struct usbnet *dev = netdev_priv(netdev);
608 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
610 pdata->use_tx_csum = !!val;
612 ethtool_op_set_tx_hw_csum(netdev, pdata->use_tx_csum);
613 return smsc95xx_set_csums(dev);
616 static const struct ethtool_ops smsc95xx_ethtool_ops = {
617 .get_link = usbnet_get_link,
618 .nway_reset = usbnet_nway_reset,
619 .get_drvinfo = usbnet_get_drvinfo,
620 .get_msglevel = usbnet_get_msglevel,
621 .set_msglevel = usbnet_set_msglevel,
622 .get_settings = usbnet_get_settings,
623 .set_settings = usbnet_set_settings,
624 .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len,
625 .get_eeprom = smsc95xx_ethtool_get_eeprom,
626 .set_eeprom = smsc95xx_ethtool_set_eeprom,
627 .get_tx_csum = smsc95xx_ethtool_get_tx_csum,
628 .set_tx_csum = smsc95xx_ethtool_set_tx_csum,
629 .get_rx_csum = smsc95xx_ethtool_get_rx_csum,
630 .set_rx_csum = smsc95xx_ethtool_set_rx_csum,
633 static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
635 struct usbnet *dev = netdev_priv(netdev);
637 if (!netif_running(netdev))
638 return -EINVAL;
640 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
643 static void smsc95xx_init_mac_address(struct usbnet *dev)
645 /* try reading mac address from EEPROM */
646 if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
647 dev->net->dev_addr) == 0) {
648 if (is_valid_ether_addr(dev->net->dev_addr)) {
649 /* eeprom values are valid so use them */
650 netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n");
651 return;
655 /* no eeprom, or eeprom values are invalid. generate random MAC */
656 random_ether_addr(dev->net->dev_addr);
657 netif_dbg(dev, ifup, dev->net, "MAC address set to random_ether_addr\n");
660 static int smsc95xx_set_mac_address(struct usbnet *dev)
662 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
663 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
664 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
665 int ret;
667 ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
668 if (ret < 0) {
669 netdev_warn(dev->net, "Failed to write ADDRL: %d\n", ret);
670 return ret;
673 ret = smsc95xx_write_reg(dev, ADDRH, addr_hi);
674 if (ret < 0) {
675 netdev_warn(dev->net, "Failed to write ADDRH: %d\n", ret);
676 return ret;
679 return 0;
682 /* starts the TX path */
683 static void smsc95xx_start_tx_path(struct usbnet *dev)
685 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
686 unsigned long flags;
687 u32 reg_val;
689 /* Enable Tx at MAC */
690 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
691 pdata->mac_cr |= MAC_CR_TXEN_;
692 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
694 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
696 /* Enable Tx at SCSRs */
697 reg_val = TX_CFG_ON_;
698 smsc95xx_write_reg(dev, TX_CFG, reg_val);
701 /* Starts the Receive path */
702 static void smsc95xx_start_rx_path(struct usbnet *dev)
704 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
705 unsigned long flags;
707 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
708 pdata->mac_cr |= MAC_CR_RXEN_;
709 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
711 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
714 static int smsc95xx_phy_initialize(struct usbnet *dev)
716 int bmcr, timeout = 0;
718 /* Initialize MII structure */
719 dev->mii.dev = dev->net;
720 dev->mii.mdio_read = smsc95xx_mdio_read;
721 dev->mii.mdio_write = smsc95xx_mdio_write;
722 dev->mii.phy_id_mask = 0x1f;
723 dev->mii.reg_num_mask = 0x1f;
724 dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
726 /* reset phy and wait for reset to complete */
727 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
729 do {
730 msleep(10);
731 bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
732 timeout++;
733 } while ((bmcr & MII_BMCR) && (timeout < 100));
735 if (timeout >= 100) {
736 netdev_warn(dev->net, "timeout on PHY Reset");
737 return -EIO;
740 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
741 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
742 ADVERTISE_PAUSE_ASYM);
744 /* read to clear */
745 smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
747 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
748 PHY_INT_MASK_DEFAULT_);
749 mii_nway_restart(&dev->mii);
751 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n");
752 return 0;
755 static int smsc95xx_reset(struct usbnet *dev)
757 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
758 struct net_device *netdev = dev->net;
759 u32 read_buf, write_buf, burst_cap;
760 int ret = 0, timeout;
762 netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n");
764 write_buf = HW_CFG_LRST_;
765 ret = smsc95xx_write_reg(dev, HW_CFG, write_buf);
766 if (ret < 0) {
767 netdev_warn(dev->net, "Failed to write HW_CFG_LRST_ bit in HW_CFG register, ret = %d\n",
768 ret);
769 return ret;
772 timeout = 0;
773 do {
774 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
775 if (ret < 0) {
776 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
777 return ret;
779 msleep(10);
780 timeout++;
781 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
783 if (timeout >= 100) {
784 netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n");
785 return ret;
788 write_buf = PM_CTL_PHY_RST_;
789 ret = smsc95xx_write_reg(dev, PM_CTRL, write_buf);
790 if (ret < 0) {
791 netdev_warn(dev->net, "Failed to write PM_CTRL: %d\n", ret);
792 return ret;
795 timeout = 0;
796 do {
797 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
798 if (ret < 0) {
799 netdev_warn(dev->net, "Failed to read PM_CTRL: %d\n", ret);
800 return ret;
802 msleep(10);
803 timeout++;
804 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
806 if (timeout >= 100) {
807 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
808 return ret;
811 ret = smsc95xx_set_mac_address(dev);
812 if (ret < 0)
813 return ret;
815 netif_dbg(dev, ifup, dev->net,
816 "MAC Address: %pM\n", dev->net->dev_addr);
818 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
819 if (ret < 0) {
820 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
821 return ret;
824 netif_dbg(dev, ifup, dev->net,
825 "Read Value from HW_CFG : 0x%08x\n", read_buf);
827 read_buf |= HW_CFG_BIR_;
829 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
830 if (ret < 0) {
831 netdev_warn(dev->net, "Failed to write HW_CFG_BIR_ bit in HW_CFG register, ret = %d\n",
832 ret);
833 return ret;
836 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
837 if (ret < 0) {
838 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
839 return ret;
841 netif_dbg(dev, ifup, dev->net,
842 "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n",
843 read_buf);
845 if (!turbo_mode) {
846 burst_cap = 0;
847 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
848 } else if (dev->udev->speed == USB_SPEED_HIGH) {
849 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
850 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
851 } else {
852 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
853 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
856 netif_dbg(dev, ifup, dev->net,
857 "rx_urb_size=%ld\n", (ulong)dev->rx_urb_size);
859 ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
860 if (ret < 0) {
861 netdev_warn(dev->net, "Failed to write BURST_CAP: %d\n", ret);
862 return ret;
865 ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
866 if (ret < 0) {
867 netdev_warn(dev->net, "Failed to read BURST_CAP: %d\n", ret);
868 return ret;
870 netif_dbg(dev, ifup, dev->net,
871 "Read Value from BURST_CAP after writing: 0x%08x\n",
872 read_buf);
874 read_buf = DEFAULT_BULK_IN_DELAY;
875 ret = smsc95xx_write_reg(dev, BULK_IN_DLY, read_buf);
876 if (ret < 0) {
877 netdev_warn(dev->net, "ret = %d\n", ret);
878 return ret;
881 ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
882 if (ret < 0) {
883 netdev_warn(dev->net, "Failed to read BULK_IN_DLY: %d\n", ret);
884 return ret;
886 netif_dbg(dev, ifup, dev->net,
887 "Read Value from BULK_IN_DLY after writing: 0x%08x\n",
888 read_buf);
890 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
891 if (ret < 0) {
892 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
893 return ret;
895 netif_dbg(dev, ifup, dev->net,
896 "Read Value from HW_CFG: 0x%08x\n", read_buf);
898 if (turbo_mode)
899 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
901 read_buf &= ~HW_CFG_RXDOFF_;
903 /* set Rx data offset=2, Make IP header aligns on word boundary. */
904 read_buf |= NET_IP_ALIGN << 9;
906 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
907 if (ret < 0) {
908 netdev_warn(dev->net, "Failed to write HW_CFG register, ret=%d\n",
909 ret);
910 return ret;
913 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
914 if (ret < 0) {
915 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
916 return ret;
918 netif_dbg(dev, ifup, dev->net,
919 "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
921 write_buf = 0xFFFFFFFF;
922 ret = smsc95xx_write_reg(dev, INT_STS, write_buf);
923 if (ret < 0) {
924 netdev_warn(dev->net, "Failed to write INT_STS register, ret=%d\n",
925 ret);
926 return ret;
929 ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
930 if (ret < 0) {
931 netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret);
932 return ret;
934 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);
936 /* Configure GPIO pins as LED outputs */
937 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
938 LED_GPIO_CFG_FDX_LED;
939 ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
940 if (ret < 0) {
941 netdev_warn(dev->net, "Failed to write LED_GPIO_CFG register, ret=%d\n",
942 ret);
943 return ret;
946 /* Init Tx */
947 write_buf = 0;
948 ret = smsc95xx_write_reg(dev, FLOW, write_buf);
949 if (ret < 0) {
950 netdev_warn(dev->net, "Failed to write FLOW: %d\n", ret);
951 return ret;
954 read_buf = AFC_CFG_DEFAULT;
955 ret = smsc95xx_write_reg(dev, AFC_CFG, read_buf);
956 if (ret < 0) {
957 netdev_warn(dev->net, "Failed to write AFC_CFG: %d\n", ret);
958 return ret;
961 /* Don't need mac_cr_lock during initialisation */
962 ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
963 if (ret < 0) {
964 netdev_warn(dev->net, "Failed to read MAC_CR: %d\n", ret);
965 return ret;
968 /* Init Rx */
969 /* Set Vlan */
970 write_buf = (u32)ETH_P_8021Q;
971 ret = smsc95xx_write_reg(dev, VLAN1, write_buf);
972 if (ret < 0) {
973 netdev_warn(dev->net, "Failed to write VAN1: %d\n", ret);
974 return ret;
977 /* Enable or disable checksum offload engines */
978 ethtool_op_set_tx_hw_csum(netdev, pdata->use_tx_csum);
979 ret = smsc95xx_set_csums(dev);
980 if (ret < 0) {
981 netdev_warn(dev->net, "Failed to set csum offload: %d\n", ret);
982 return ret;
985 smsc95xx_set_multicast(dev->net);
987 if (smsc95xx_phy_initialize(dev) < 0)
988 return -EIO;
990 ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
991 if (ret < 0) {
992 netdev_warn(dev->net, "Failed to read INT_EP_CTL: %d\n", ret);
993 return ret;
996 /* enable PHY interrupts */
997 read_buf |= INT_EP_CTL_PHY_INT_;
999 ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
1000 if (ret < 0) {
1001 netdev_warn(dev->net, "Failed to write INT_EP_CTL: %d\n", ret);
1002 return ret;
1005 smsc95xx_start_tx_path(dev);
1006 smsc95xx_start_rx_path(dev);
1008 netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n");
1009 return 0;
1012 static const struct net_device_ops smsc95xx_netdev_ops = {
1013 .ndo_open = usbnet_open,
1014 .ndo_stop = usbnet_stop,
1015 .ndo_start_xmit = usbnet_start_xmit,
1016 .ndo_tx_timeout = usbnet_tx_timeout,
1017 .ndo_change_mtu = usbnet_change_mtu,
1018 .ndo_set_mac_address = eth_mac_addr,
1019 .ndo_validate_addr = eth_validate_addr,
1020 .ndo_do_ioctl = smsc95xx_ioctl,
1021 .ndo_set_multicast_list = smsc95xx_set_multicast,
1024 static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
1026 struct smsc95xx_priv *pdata = NULL;
1027 int ret;
1029 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1031 ret = usbnet_get_endpoints(dev, intf);
1032 if (ret < 0) {
1033 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret);
1034 return ret;
1037 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
1038 GFP_KERNEL);
1040 pdata = (struct smsc95xx_priv *)(dev->data[0]);
1041 if (!pdata) {
1042 netdev_warn(dev->net, "Unable to allocate struct smsc95xx_priv\n");
1043 return -ENOMEM;
1046 spin_lock_init(&pdata->mac_cr_lock);
1048 pdata->use_tx_csum = DEFAULT_TX_CSUM_ENABLE;
1049 pdata->use_rx_csum = DEFAULT_RX_CSUM_ENABLE;
1051 smsc95xx_init_mac_address(dev);
1053 /* Init all registers */
1054 ret = smsc95xx_reset(dev);
1056 dev->net->netdev_ops = &smsc95xx_netdev_ops;
1057 dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
1058 dev->net->flags |= IFF_MULTICAST;
1059 dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD;
1060 return 0;
1063 static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1065 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1066 if (pdata) {
1067 netif_dbg(dev, ifdown, dev->net, "free pdata\n");
1068 kfree(pdata);
1069 pdata = NULL;
1070 dev->data[0] = 0;
1074 static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
1076 skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
1077 skb->ip_summed = CHECKSUM_COMPLETE;
1078 skb_trim(skb, skb->len - 2);
1081 static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1083 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1085 while (skb->len > 0) {
1086 u32 header, align_count;
1087 struct sk_buff *ax_skb;
1088 unsigned char *packet;
1089 u16 size;
1091 memcpy(&header, skb->data, sizeof(header));
1092 le32_to_cpus(&header);
1093 skb_pull(skb, 4 + NET_IP_ALIGN);
1094 packet = skb->data;
1096 /* get the packet length */
1097 size = (u16)((header & RX_STS_FL_) >> 16);
1098 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
1100 if (unlikely(header & RX_STS_ES_)) {
1101 netif_dbg(dev, rx_err, dev->net,
1102 "Error header=0x%08x\n", header);
1103 dev->net->stats.rx_errors++;
1104 dev->net->stats.rx_dropped++;
1106 if (header & RX_STS_CRC_) {
1107 dev->net->stats.rx_crc_errors++;
1108 } else {
1109 if (header & (RX_STS_TL_ | RX_STS_RF_))
1110 dev->net->stats.rx_frame_errors++;
1112 if ((header & RX_STS_LE_) &&
1113 (!(header & RX_STS_FT_)))
1114 dev->net->stats.rx_length_errors++;
1116 } else {
1117 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1118 if (unlikely(size > (ETH_FRAME_LEN + 12))) {
1119 netif_dbg(dev, rx_err, dev->net,
1120 "size err header=0x%08x\n", header);
1121 return 0;
1124 /* last frame in this batch */
1125 if (skb->len == size) {
1126 if (pdata->use_rx_csum)
1127 smsc95xx_rx_csum_offload(skb);
1128 skb_trim(skb, skb->len - 4); /* remove fcs */
1129 skb->truesize = size + sizeof(struct sk_buff);
1131 return 1;
1134 ax_skb = skb_clone(skb, GFP_ATOMIC);
1135 if (unlikely(!ax_skb)) {
1136 netdev_warn(dev->net, "Error allocating skb\n");
1137 return 0;
1140 ax_skb->len = size;
1141 ax_skb->data = packet;
1142 skb_set_tail_pointer(ax_skb, size);
1144 if (pdata->use_rx_csum)
1145 smsc95xx_rx_csum_offload(ax_skb);
1146 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
1147 ax_skb->truesize = size + sizeof(struct sk_buff);
1149 usbnet_skb_return(dev, ax_skb);
1152 skb_pull(skb, size);
1154 /* padding bytes before the next frame starts */
1155 if (skb->len)
1156 skb_pull(skb, align_count);
1159 if (unlikely(skb->len < 0)) {
1160 netdev_warn(dev->net, "invalid rx length<0 %d\n", skb->len);
1161 return 0;
1164 return 1;
1167 static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb)
1169 u16 low_16 = (u16)skb_checksum_start_offset(skb);
1170 u16 high_16 = low_16 + skb->csum_offset;
1171 return (high_16 << 16) | low_16;
1174 static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev,
1175 struct sk_buff *skb, gfp_t flags)
1177 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1178 bool csum = pdata->use_tx_csum && (skb->ip_summed == CHECKSUM_PARTIAL);
1179 int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD;
1180 u32 tx_cmd_a, tx_cmd_b;
1182 /* We do not advertise SG, so skbs should be already linearized */
1183 BUG_ON(skb_shinfo(skb)->nr_frags);
1185 if (skb_headroom(skb) < overhead) {
1186 struct sk_buff *skb2 = skb_copy_expand(skb,
1187 overhead, 0, flags);
1188 dev_kfree_skb_any(skb);
1189 skb = skb2;
1190 if (!skb)
1191 return NULL;
1194 if (csum) {
1195 if (skb->len <= 45) {
1196 /* workaround - hardware tx checksum does not work
1197 * properly with extremely small packets */
1198 long csstart = skb_checksum_start_offset(skb);
1199 __wsum calc = csum_partial(skb->data + csstart,
1200 skb->len - csstart, 0);
1201 *((__sum16 *)(skb->data + csstart
1202 + skb->csum_offset)) = csum_fold(calc);
1204 csum = false;
1205 } else {
1206 u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
1207 skb_push(skb, 4);
1208 memcpy(skb->data, &csum_preamble, 4);
1212 skb_push(skb, 4);
1213 tx_cmd_b = (u32)(skb->len - 4);
1214 if (csum)
1215 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE;
1216 cpu_to_le32s(&tx_cmd_b);
1217 memcpy(skb->data, &tx_cmd_b, 4);
1219 skb_push(skb, 4);
1220 tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ |
1221 TX_CMD_A_LAST_SEG_;
1222 cpu_to_le32s(&tx_cmd_a);
1223 memcpy(skb->data, &tx_cmd_a, 4);
1225 return skb;
1228 static const struct driver_info smsc95xx_info = {
1229 .description = "smsc95xx USB 2.0 Ethernet",
1230 .bind = smsc95xx_bind,
1231 .unbind = smsc95xx_unbind,
1232 .link_reset = smsc95xx_link_reset,
1233 .reset = smsc95xx_reset,
1234 .rx_fixup = smsc95xx_rx_fixup,
1235 .tx_fixup = smsc95xx_tx_fixup,
1236 .status = smsc95xx_status,
1237 .flags = FLAG_ETHER | FLAG_SEND_ZLP,
1240 static const struct usb_device_id products[] = {
1242 /* SMSC9500 USB Ethernet Device */
1243 USB_DEVICE(0x0424, 0x9500),
1244 .driver_info = (unsigned long) &smsc95xx_info,
1247 /* SMSC9505 USB Ethernet Device */
1248 USB_DEVICE(0x0424, 0x9505),
1249 .driver_info = (unsigned long) &smsc95xx_info,
1252 /* SMSC9500A USB Ethernet Device */
1253 USB_DEVICE(0x0424, 0x9E00),
1254 .driver_info = (unsigned long) &smsc95xx_info,
1257 /* SMSC9505A USB Ethernet Device */
1258 USB_DEVICE(0x0424, 0x9E01),
1259 .driver_info = (unsigned long) &smsc95xx_info,
1262 /* SMSC9512/9514 USB Hub & Ethernet Device */
1263 USB_DEVICE(0x0424, 0xec00),
1264 .driver_info = (unsigned long) &smsc95xx_info,
1267 /* SMSC9500 USB Ethernet Device (SAL10) */
1268 USB_DEVICE(0x0424, 0x9900),
1269 .driver_info = (unsigned long) &smsc95xx_info,
1272 /* SMSC9505 USB Ethernet Device (SAL10) */
1273 USB_DEVICE(0x0424, 0x9901),
1274 .driver_info = (unsigned long) &smsc95xx_info,
1277 /* SMSC9500A USB Ethernet Device (SAL10) */
1278 USB_DEVICE(0x0424, 0x9902),
1279 .driver_info = (unsigned long) &smsc95xx_info,
1282 /* SMSC9505A USB Ethernet Device (SAL10) */
1283 USB_DEVICE(0x0424, 0x9903),
1284 .driver_info = (unsigned long) &smsc95xx_info,
1287 /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */
1288 USB_DEVICE(0x0424, 0x9904),
1289 .driver_info = (unsigned long) &smsc95xx_info,
1292 /* SMSC9500A USB Ethernet Device (HAL) */
1293 USB_DEVICE(0x0424, 0x9905),
1294 .driver_info = (unsigned long) &smsc95xx_info,
1297 /* SMSC9505A USB Ethernet Device (HAL) */
1298 USB_DEVICE(0x0424, 0x9906),
1299 .driver_info = (unsigned long) &smsc95xx_info,
1302 /* SMSC9500 USB Ethernet Device (Alternate ID) */
1303 USB_DEVICE(0x0424, 0x9907),
1304 .driver_info = (unsigned long) &smsc95xx_info,
1307 /* SMSC9500A USB Ethernet Device (Alternate ID) */
1308 USB_DEVICE(0x0424, 0x9908),
1309 .driver_info = (unsigned long) &smsc95xx_info,
1312 /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */
1313 USB_DEVICE(0x0424, 0x9909),
1314 .driver_info = (unsigned long) &smsc95xx_info,
1317 /* SMSC LAN9530 USB Ethernet Device */
1318 USB_DEVICE(0x0424, 0x9530),
1319 .driver_info = (unsigned long) &smsc95xx_info,
1322 /* SMSC LAN9730 USB Ethernet Device */
1323 USB_DEVICE(0x0424, 0x9730),
1324 .driver_info = (unsigned long) &smsc95xx_info,
1327 /* SMSC LAN89530 USB Ethernet Device */
1328 USB_DEVICE(0x0424, 0x9E08),
1329 .driver_info = (unsigned long) &smsc95xx_info,
1331 { }, /* END */
1333 MODULE_DEVICE_TABLE(usb, products);
1335 static struct usb_driver smsc95xx_driver = {
1336 .name = "smsc95xx",
1337 .id_table = products,
1338 .probe = usbnet_probe,
1339 .suspend = usbnet_suspend,
1340 .resume = usbnet_resume,
1341 .disconnect = usbnet_disconnect,
1344 static int __init smsc95xx_init(void)
1346 return usb_register(&smsc95xx_driver);
1348 module_init(smsc95xx_init);
1350 static void __exit smsc95xx_exit(void)
1352 usb_deregister(&smsc95xx_driver);
1354 module_exit(smsc95xx_exit);
1356 MODULE_AUTHOR("Nancy Lin");
1357 MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>");
1358 MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices");
1359 MODULE_LICENSE("GPL");