x86: change init_gdt to update the gdt via write_gdt, rather than a direct write.
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / x86 / kernel / pci-dma.c
blob87d4d6964ec2b9ecb5d83ad01c081589218dc303
1 #include <linux/dma-mapping.h>
2 #include <linux/dmar.h>
3 #include <linux/bootmem.h>
4 #include <linux/pci.h>
6 #include <asm/proto.h>
7 #include <asm/dma.h>
8 #include <asm/iommu.h>
9 #include <asm/calgary.h>
10 #include <asm/amd_iommu.h>
12 static int forbid_dac __read_mostly;
14 struct dma_mapping_ops *dma_ops;
15 EXPORT_SYMBOL(dma_ops);
17 static int iommu_sac_force __read_mostly;
19 #ifdef CONFIG_IOMMU_DEBUG
20 int panic_on_overflow __read_mostly = 1;
21 int force_iommu __read_mostly = 1;
22 #else
23 int panic_on_overflow __read_mostly = 0;
24 int force_iommu __read_mostly = 0;
25 #endif
27 int iommu_merge __read_mostly = 0;
29 int no_iommu __read_mostly;
30 /* Set this to 1 if there is a HW IOMMU in the system */
31 int iommu_detected __read_mostly = 0;
33 /* This tells the BIO block layer to assume merging. Default to off
34 because we cannot guarantee merging later. */
35 int iommu_bio_merge __read_mostly = 0;
36 EXPORT_SYMBOL(iommu_bio_merge);
38 dma_addr_t bad_dma_address __read_mostly = 0;
39 EXPORT_SYMBOL(bad_dma_address);
41 /* Dummy device used for NULL arguments (normally ISA). Better would
42 be probably a smaller DMA mask, but this is bug-to-bug compatible
43 to older i386. */
44 struct device fallback_dev = {
45 .bus_id = "fallback device",
46 .coherent_dma_mask = DMA_32BIT_MASK,
47 .dma_mask = &fallback_dev.coherent_dma_mask,
50 int dma_set_mask(struct device *dev, u64 mask)
52 if (!dev->dma_mask || !dma_supported(dev, mask))
53 return -EIO;
55 *dev->dma_mask = mask;
57 return 0;
59 EXPORT_SYMBOL(dma_set_mask);
61 #ifdef CONFIG_X86_64
62 static __initdata void *dma32_bootmem_ptr;
63 static unsigned long dma32_bootmem_size __initdata = (128ULL<<20);
65 static int __init parse_dma32_size_opt(char *p)
67 if (!p)
68 return -EINVAL;
69 dma32_bootmem_size = memparse(p, &p);
70 return 0;
72 early_param("dma32_size", parse_dma32_size_opt);
74 void __init dma32_reserve_bootmem(void)
76 unsigned long size, align;
77 if (max_pfn <= MAX_DMA32_PFN)
78 return;
81 * check aperture_64.c allocate_aperture() for reason about
82 * using 512M as goal
84 align = 64ULL<<20;
85 size = round_up(dma32_bootmem_size, align);
86 dma32_bootmem_ptr = __alloc_bootmem_nopanic(size, align,
87 512ULL<<20);
88 if (dma32_bootmem_ptr)
89 dma32_bootmem_size = size;
90 else
91 dma32_bootmem_size = 0;
93 static void __init dma32_free_bootmem(void)
96 if (max_pfn <= MAX_DMA32_PFN)
97 return;
99 if (!dma32_bootmem_ptr)
100 return;
102 free_bootmem(__pa(dma32_bootmem_ptr), dma32_bootmem_size);
104 dma32_bootmem_ptr = NULL;
105 dma32_bootmem_size = 0;
108 void __init pci_iommu_alloc(void)
110 /* free the range so iommu could get some range less than 4G */
111 dma32_free_bootmem();
113 * The order of these functions is important for
114 * fall-back/fail-over reasons
116 gart_iommu_hole_init();
118 detect_calgary();
120 detect_intel_iommu();
122 amd_iommu_detect();
124 pci_swiotlb_init();
127 unsigned long iommu_num_pages(unsigned long addr, unsigned long len)
129 unsigned long size = roundup((addr & ~PAGE_MASK) + len, PAGE_SIZE);
131 return size >> PAGE_SHIFT;
133 EXPORT_SYMBOL(iommu_num_pages);
134 #endif
137 * See <Documentation/x86_64/boot-options.txt> for the iommu kernel parameter
138 * documentation.
140 static __init int iommu_setup(char *p)
142 iommu_merge = 1;
144 if (!p)
145 return -EINVAL;
147 while (*p) {
148 if (!strncmp(p, "off", 3))
149 no_iommu = 1;
150 /* gart_parse_options has more force support */
151 if (!strncmp(p, "force", 5))
152 force_iommu = 1;
153 if (!strncmp(p, "noforce", 7)) {
154 iommu_merge = 0;
155 force_iommu = 0;
158 if (!strncmp(p, "biomerge", 8)) {
159 iommu_bio_merge = 4096;
160 iommu_merge = 1;
161 force_iommu = 1;
163 if (!strncmp(p, "panic", 5))
164 panic_on_overflow = 1;
165 if (!strncmp(p, "nopanic", 7))
166 panic_on_overflow = 0;
167 if (!strncmp(p, "merge", 5)) {
168 iommu_merge = 1;
169 force_iommu = 1;
171 if (!strncmp(p, "nomerge", 7))
172 iommu_merge = 0;
173 if (!strncmp(p, "forcesac", 8))
174 iommu_sac_force = 1;
175 if (!strncmp(p, "allowdac", 8))
176 forbid_dac = 0;
177 if (!strncmp(p, "nodac", 5))
178 forbid_dac = -1;
179 if (!strncmp(p, "usedac", 6)) {
180 forbid_dac = -1;
181 return 1;
183 #ifdef CONFIG_SWIOTLB
184 if (!strncmp(p, "soft", 4))
185 swiotlb = 1;
186 #endif
188 gart_parse_options(p);
190 #ifdef CONFIG_CALGARY_IOMMU
191 if (!strncmp(p, "calgary", 7))
192 use_calgary = 1;
193 #endif /* CONFIG_CALGARY_IOMMU */
195 p += strcspn(p, ",");
196 if (*p == ',')
197 ++p;
199 return 0;
201 early_param("iommu", iommu_setup);
203 int dma_supported(struct device *dev, u64 mask)
205 struct dma_mapping_ops *ops = get_dma_ops(dev);
207 #ifdef CONFIG_PCI
208 if (mask > 0xffffffff && forbid_dac > 0) {
209 dev_info(dev, "PCI: Disallowing DAC for device\n");
210 return 0;
212 #endif
214 if (ops->dma_supported)
215 return ops->dma_supported(dev, mask);
217 /* Copied from i386. Doesn't make much sense, because it will
218 only work for pci_alloc_coherent.
219 The caller just has to use GFP_DMA in this case. */
220 if (mask < DMA_24BIT_MASK)
221 return 0;
223 /* Tell the device to use SAC when IOMMU force is on. This
224 allows the driver to use cheaper accesses in some cases.
226 Problem with this is that if we overflow the IOMMU area and
227 return DAC as fallback address the device may not handle it
228 correctly.
230 As a special case some controllers have a 39bit address
231 mode that is as efficient as 32bit (aic79xx). Don't force
232 SAC for these. Assume all masks <= 40 bits are of this
233 type. Normally this doesn't make any difference, but gives
234 more gentle handling of IOMMU overflow. */
235 if (iommu_sac_force && (mask >= DMA_40BIT_MASK)) {
236 dev_info(dev, "Force SAC with mask %Lx\n", mask);
237 return 0;
240 return 1;
242 EXPORT_SYMBOL(dma_supported);
244 /* Allocate DMA memory on node near device */
245 static noinline struct page *
246 dma_alloc_pages(struct device *dev, gfp_t gfp, unsigned order)
248 int node;
250 node = dev_to_node(dev);
252 return alloc_pages_node(node, gfp, order);
256 * Allocate memory for a coherent mapping.
258 void *
259 dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
260 gfp_t gfp)
262 struct dma_mapping_ops *ops = get_dma_ops(dev);
263 void *memory = NULL;
264 struct page *page;
265 unsigned long dma_mask = 0;
266 dma_addr_t bus;
267 int noretry = 0;
269 /* ignore region specifiers */
270 gfp &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32);
272 if (dma_alloc_from_coherent(dev, size, dma_handle, &memory))
273 return memory;
275 if (!dev) {
276 dev = &fallback_dev;
277 gfp |= GFP_DMA;
279 dma_mask = dev->coherent_dma_mask;
280 if (dma_mask == 0)
281 dma_mask = (gfp & GFP_DMA) ? DMA_24BIT_MASK : DMA_32BIT_MASK;
283 /* Device not DMA able */
284 if (dev->dma_mask == NULL)
285 return NULL;
287 /* Don't invoke OOM killer or retry in lower 16MB DMA zone */
288 if (gfp & __GFP_DMA)
289 noretry = 1;
291 #ifdef CONFIG_X86_64
292 /* Why <=? Even when the mask is smaller than 4GB it is often
293 larger than 16MB and in this case we have a chance of
294 finding fitting memory in the next higher zone first. If
295 not retry with true GFP_DMA. -AK */
296 if (dma_mask <= DMA_32BIT_MASK && !(gfp & GFP_DMA)) {
297 gfp |= GFP_DMA32;
298 if (dma_mask < DMA_32BIT_MASK)
299 noretry = 1;
301 #endif
303 again:
304 page = dma_alloc_pages(dev,
305 noretry ? gfp | __GFP_NORETRY : gfp, get_order(size));
306 if (page == NULL)
307 return NULL;
310 int high, mmu;
311 bus = page_to_phys(page);
312 memory = page_address(page);
313 high = (bus + size) >= dma_mask;
314 mmu = high;
315 if (force_iommu && !(gfp & GFP_DMA))
316 mmu = 1;
317 else if (high) {
318 free_pages((unsigned long)memory,
319 get_order(size));
321 /* Don't use the 16MB ZONE_DMA unless absolutely
322 needed. It's better to use remapping first. */
323 if (dma_mask < DMA_32BIT_MASK && !(gfp & GFP_DMA)) {
324 gfp = (gfp & ~GFP_DMA32) | GFP_DMA;
325 goto again;
328 /* Let low level make its own zone decisions */
329 gfp &= ~(GFP_DMA32|GFP_DMA);
331 if (ops->alloc_coherent)
332 return ops->alloc_coherent(dev, size,
333 dma_handle, gfp);
334 return NULL;
337 memset(memory, 0, size);
338 if (!mmu) {
339 *dma_handle = bus;
340 return memory;
344 if (ops->alloc_coherent) {
345 free_pages((unsigned long)memory, get_order(size));
346 gfp &= ~(GFP_DMA|GFP_DMA32);
347 return ops->alloc_coherent(dev, size, dma_handle, gfp);
350 if (ops->map_simple) {
351 *dma_handle = ops->map_simple(dev, virt_to_phys(memory),
352 size,
353 PCI_DMA_BIDIRECTIONAL);
354 if (*dma_handle != bad_dma_address)
355 return memory;
358 if (panic_on_overflow)
359 panic("dma_alloc_coherent: IOMMU overflow by %lu bytes\n",
360 (unsigned long)size);
361 free_pages((unsigned long)memory, get_order(size));
362 return NULL;
364 EXPORT_SYMBOL(dma_alloc_coherent);
367 * Unmap coherent memory.
368 * The caller must ensure that the device has finished accessing the mapping.
370 void dma_free_coherent(struct device *dev, size_t size,
371 void *vaddr, dma_addr_t bus)
373 struct dma_mapping_ops *ops = get_dma_ops(dev);
375 int order = get_order(size);
376 WARN_ON(irqs_disabled()); /* for portability */
377 if (dma_release_from_coherent(dev, order, vaddr))
378 return;
379 if (ops->unmap_single)
380 ops->unmap_single(dev, bus, size, 0);
381 free_pages((unsigned long)vaddr, order);
383 EXPORT_SYMBOL(dma_free_coherent);
385 static int __init pci_iommu_init(void)
387 calgary_iommu_init();
389 intel_iommu_init();
391 amd_iommu_init();
393 gart_iommu_init();
395 no_iommu_init();
396 return 0;
399 void pci_iommu_shutdown(void)
401 gart_iommu_shutdown();
403 /* Must execute after PCI subsystem */
404 fs_initcall(pci_iommu_init);
406 #ifdef CONFIG_PCI
407 /* Many VIA bridges seem to corrupt data for DAC. Disable it here */
409 static __devinit void via_no_dac(struct pci_dev *dev)
411 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI && forbid_dac == 0) {
412 printk(KERN_INFO "PCI: VIA PCI bridge detected."
413 "Disabling DAC.\n");
414 forbid_dac = 1;
417 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_ANY_ID, via_no_dac);
418 #endif