Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-mmc
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / hwmon / w83792d.c
blob7576ec9426a35b0e733d08f5552058aa67e9cd73
1 /*
2 w83792d.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (C) 2004, 2005 Winbond Electronics Corp.
5 Chunhao Huang <DZShen@Winbond.com.tw>,
6 Rudolf Marek <r.marek@sh.cvut.cz>
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 Note:
23 1. This driver is only for 2.6 kernel, 2.4 kernel need a different driver.
24 2. This driver is only for Winbond W83792D C version device, there
25 are also some motherboards with B version W83792D device. The
26 calculation method to in6-in7(measured value, limits) is a little
27 different between C and B version. C or B version can be identified
28 by CR[0x49h].
32 Supports following chips:
34 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
35 w83792d 9 7 7 3 0x7a 0x5ca3 yes no
38 #include <linux/module.h>
39 #include <linux/init.h>
40 #include <linux/slab.h>
41 #include <linux/i2c.h>
42 #include <linux/hwmon.h>
43 #include <linux/hwmon-sysfs.h>
44 #include <linux/err.h>
45 #include <linux/mutex.h>
47 /* Addresses to scan */
48 static unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
50 /* Insmod parameters */
51 I2C_CLIENT_INSMOD_1(w83792d);
52 I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
53 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
55 static int init;
56 module_param(init, bool, 0);
57 MODULE_PARM_DESC(init, "Set to one to force chip initialization");
59 /* The W83792D registers */
60 static const u8 W83792D_REG_IN[9] = {
61 0x20, /* Vcore A in DataSheet */
62 0x21, /* Vcore B in DataSheet */
63 0x22, /* VIN0 in DataSheet */
64 0x23, /* VIN1 in DataSheet */
65 0x24, /* VIN2 in DataSheet */
66 0x25, /* VIN3 in DataSheet */
67 0x26, /* 5VCC in DataSheet */
68 0xB0, /* 5VSB in DataSheet */
69 0xB1 /* VBAT in DataSheet */
71 #define W83792D_REG_LOW_BITS1 0x3E /* Low Bits I in DataSheet */
72 #define W83792D_REG_LOW_BITS2 0x3F /* Low Bits II in DataSheet */
73 static const u8 W83792D_REG_IN_MAX[9] = {
74 0x2B, /* Vcore A High Limit in DataSheet */
75 0x2D, /* Vcore B High Limit in DataSheet */
76 0x2F, /* VIN0 High Limit in DataSheet */
77 0x31, /* VIN1 High Limit in DataSheet */
78 0x33, /* VIN2 High Limit in DataSheet */
79 0x35, /* VIN3 High Limit in DataSheet */
80 0x37, /* 5VCC High Limit in DataSheet */
81 0xB4, /* 5VSB High Limit in DataSheet */
82 0xB6 /* VBAT High Limit in DataSheet */
84 static const u8 W83792D_REG_IN_MIN[9] = {
85 0x2C, /* Vcore A Low Limit in DataSheet */
86 0x2E, /* Vcore B Low Limit in DataSheet */
87 0x30, /* VIN0 Low Limit in DataSheet */
88 0x32, /* VIN1 Low Limit in DataSheet */
89 0x34, /* VIN2 Low Limit in DataSheet */
90 0x36, /* VIN3 Low Limit in DataSheet */
91 0x38, /* 5VCC Low Limit in DataSheet */
92 0xB5, /* 5VSB Low Limit in DataSheet */
93 0xB7 /* VBAT Low Limit in DataSheet */
95 static const u8 W83792D_REG_FAN[7] = {
96 0x28, /* FAN 1 Count in DataSheet */
97 0x29, /* FAN 2 Count in DataSheet */
98 0x2A, /* FAN 3 Count in DataSheet */
99 0xB8, /* FAN 4 Count in DataSheet */
100 0xB9, /* FAN 5 Count in DataSheet */
101 0xBA, /* FAN 6 Count in DataSheet */
102 0xBE /* FAN 7 Count in DataSheet */
104 static const u8 W83792D_REG_FAN_MIN[7] = {
105 0x3B, /* FAN 1 Count Low Limit in DataSheet */
106 0x3C, /* FAN 2 Count Low Limit in DataSheet */
107 0x3D, /* FAN 3 Count Low Limit in DataSheet */
108 0xBB, /* FAN 4 Count Low Limit in DataSheet */
109 0xBC, /* FAN 5 Count Low Limit in DataSheet */
110 0xBD, /* FAN 6 Count Low Limit in DataSheet */
111 0xBF /* FAN 7 Count Low Limit in DataSheet */
113 #define W83792D_REG_FAN_CFG 0x84 /* FAN Configuration in DataSheet */
114 static const u8 W83792D_REG_FAN_DIV[4] = {
115 0x47, /* contains FAN2 and FAN1 Divisor */
116 0x5B, /* contains FAN4 and FAN3 Divisor */
117 0x5C, /* contains FAN6 and FAN5 Divisor */
118 0x9E /* contains FAN7 Divisor. */
120 static const u8 W83792D_REG_PWM[7] = {
121 0x81, /* FAN 1 Duty Cycle, be used to control */
122 0x83, /* FAN 2 Duty Cycle, be used to control */
123 0x94, /* FAN 3 Duty Cycle, be used to control */
124 0xA3, /* FAN 4 Duty Cycle, be used to control */
125 0xA4, /* FAN 5 Duty Cycle, be used to control */
126 0xA5, /* FAN 6 Duty Cycle, be used to control */
127 0xA6 /* FAN 7 Duty Cycle, be used to control */
129 #define W83792D_REG_BANK 0x4E
130 #define W83792D_REG_TEMP2_CONFIG 0xC2
131 #define W83792D_REG_TEMP3_CONFIG 0xCA
133 static const u8 W83792D_REG_TEMP1[3] = {
134 0x27, /* TEMP 1 in DataSheet */
135 0x39, /* TEMP 1 Over in DataSheet */
136 0x3A, /* TEMP 1 Hyst in DataSheet */
139 static const u8 W83792D_REG_TEMP_ADD[2][6] = {
140 { 0xC0, /* TEMP 2 in DataSheet */
141 0xC1, /* TEMP 2(0.5 deg) in DataSheet */
142 0xC5, /* TEMP 2 Over High part in DataSheet */
143 0xC6, /* TEMP 2 Over Low part in DataSheet */
144 0xC3, /* TEMP 2 Thyst High part in DataSheet */
145 0xC4 }, /* TEMP 2 Thyst Low part in DataSheet */
146 { 0xC8, /* TEMP 3 in DataSheet */
147 0xC9, /* TEMP 3(0.5 deg) in DataSheet */
148 0xCD, /* TEMP 3 Over High part in DataSheet */
149 0xCE, /* TEMP 3 Over Low part in DataSheet */
150 0xCB, /* TEMP 3 Thyst High part in DataSheet */
151 0xCC } /* TEMP 3 Thyst Low part in DataSheet */
154 static const u8 W83792D_REG_THERMAL[3] = {
155 0x85, /* SmartFanI: Fan1 target value */
156 0x86, /* SmartFanI: Fan2 target value */
157 0x96 /* SmartFanI: Fan3 target value */
160 static const u8 W83792D_REG_TOLERANCE[3] = {
161 0x87, /* (bit3-0)SmartFan Fan1 tolerance */
162 0x87, /* (bit7-4)SmartFan Fan2 tolerance */
163 0x97 /* (bit3-0)SmartFan Fan3 tolerance */
166 static const u8 W83792D_REG_POINTS[3][4] = {
167 { 0x85, /* SmartFanII: Fan1 temp point 1 */
168 0xE3, /* SmartFanII: Fan1 temp point 2 */
169 0xE4, /* SmartFanII: Fan1 temp point 3 */
170 0xE5 }, /* SmartFanII: Fan1 temp point 4 */
171 { 0x86, /* SmartFanII: Fan2 temp point 1 */
172 0xE6, /* SmartFanII: Fan2 temp point 2 */
173 0xE7, /* SmartFanII: Fan2 temp point 3 */
174 0xE8 }, /* SmartFanII: Fan2 temp point 4 */
175 { 0x96, /* SmartFanII: Fan3 temp point 1 */
176 0xE9, /* SmartFanII: Fan3 temp point 2 */
177 0xEA, /* SmartFanII: Fan3 temp point 3 */
178 0xEB } /* SmartFanII: Fan3 temp point 4 */
181 static const u8 W83792D_REG_LEVELS[3][4] = {
182 { 0x88, /* (bit3-0) SmartFanII: Fan1 Non-Stop */
183 0x88, /* (bit7-4) SmartFanII: Fan1 Level 1 */
184 0xE0, /* (bit7-4) SmartFanII: Fan1 Level 2 */
185 0xE0 }, /* (bit3-0) SmartFanII: Fan1 Level 3 */
186 { 0x89, /* (bit3-0) SmartFanII: Fan2 Non-Stop */
187 0x89, /* (bit7-4) SmartFanII: Fan2 Level 1 */
188 0xE1, /* (bit7-4) SmartFanII: Fan2 Level 2 */
189 0xE1 }, /* (bit3-0) SmartFanII: Fan2 Level 3 */
190 { 0x98, /* (bit3-0) SmartFanII: Fan3 Non-Stop */
191 0x98, /* (bit7-4) SmartFanII: Fan3 Level 1 */
192 0xE2, /* (bit7-4) SmartFanII: Fan3 Level 2 */
193 0xE2 } /* (bit3-0) SmartFanII: Fan3 Level 3 */
196 #define W83792D_REG_GPIO_EN 0x1A
197 #define W83792D_REG_CONFIG 0x40
198 #define W83792D_REG_VID_FANDIV 0x47
199 #define W83792D_REG_CHIPID 0x49
200 #define W83792D_REG_WCHIPID 0x58
201 #define W83792D_REG_CHIPMAN 0x4F
202 #define W83792D_REG_PIN 0x4B
203 #define W83792D_REG_I2C_SUBADDR 0x4A
205 #define W83792D_REG_ALARM1 0xA9 /* realtime status register1 */
206 #define W83792D_REG_ALARM2 0xAA /* realtime status register2 */
207 #define W83792D_REG_ALARM3 0xAB /* realtime status register3 */
208 #define W83792D_REG_CHASSIS 0x42 /* Bit 5: Case Open status bit */
209 #define W83792D_REG_CHASSIS_CLR 0x44 /* Bit 7: Case Open CLR_CHS/Reset bit */
211 /* control in0/in1 's limit modifiability */
212 #define W83792D_REG_VID_IN_B 0x17
214 #define W83792D_REG_VBAT 0x5D
215 #define W83792D_REG_I2C_ADDR 0x48
217 /* Conversions. Rounding and limit checking is only done on the TO_REG
218 variants. Note that you should be a bit careful with which arguments
219 these macros are called: arguments may be evaluated more than once.
220 Fixing this is just not worth it. */
221 #define IN_FROM_REG(nr,val) (((nr)<=1)?(val*2): \
222 ((((nr)==6)||((nr)==7))?(val*6):(val*4)))
223 #define IN_TO_REG(nr,val) (((nr)<=1)?(val/2): \
224 ((((nr)==6)||((nr)==7))?(val/6):(val/4)))
226 static inline u8
227 FAN_TO_REG(long rpm, int div)
229 if (rpm == 0)
230 return 255;
231 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
232 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
235 #define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \
236 ((val) == 255 ? 0 : \
237 1350000 / ((val) * (div))))
239 /* for temp1 */
240 #define TEMP1_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
241 : (val)) / 1000, 0, 0xff))
242 #define TEMP1_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
243 /* for temp2 and temp3, because they need addtional resolution */
244 #define TEMP_ADD_FROM_REG(val1, val2) \
245 ((((val1) & 0x80 ? (val1)-0x100 \
246 : (val1)) * 1000) + ((val2 & 0x80) ? 500 : 0))
247 #define TEMP_ADD_TO_REG_HIGH(val) \
248 (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
249 : (val)) / 1000, 0, 0xff))
250 #define TEMP_ADD_TO_REG_LOW(val) ((val%1000) ? 0x80 : 0x00)
252 #define DIV_FROM_REG(val) (1 << (val))
254 static inline u8
255 DIV_TO_REG(long val)
257 int i;
258 val = SENSORS_LIMIT(val, 1, 128) >> 1;
259 for (i = 0; i < 7; i++) {
260 if (val == 0)
261 break;
262 val >>= 1;
264 return ((u8) i);
267 struct w83792d_data {
268 struct i2c_client client;
269 struct class_device *class_dev;
270 enum chips type;
272 struct mutex update_lock;
273 char valid; /* !=0 if following fields are valid */
274 unsigned long last_updated; /* In jiffies */
276 /* array of 2 pointers to subclients */
277 struct i2c_client *lm75[2];
279 u8 in[9]; /* Register value */
280 u8 in_max[9]; /* Register value */
281 u8 in_min[9]; /* Register value */
282 u16 low_bits; /* Additional resolution to voltage in6-0 */
283 u8 fan[7]; /* Register value */
284 u8 fan_min[7]; /* Register value */
285 u8 temp1[3]; /* current, over, thyst */
286 u8 temp_add[2][6]; /* Register value */
287 u8 fan_div[7]; /* Register encoding, shifted right */
288 u8 pwm[7]; /* We only consider the first 3 set of pwm,
289 although 792 chip has 7 set of pwm. */
290 u8 pwmenable[3];
291 u32 alarms; /* realtime status register encoding,combined */
292 u8 chassis; /* Chassis status */
293 u8 chassis_clear; /* CLR_CHS, clear chassis intrusion detection */
294 u8 thermal_cruise[3]; /* Smart FanI: Fan1,2,3 target value */
295 u8 tolerance[3]; /* Fan1,2,3 tolerance(Smart Fan I/II) */
296 u8 sf2_points[3][4]; /* Smart FanII: Fan1,2,3 temperature points */
297 u8 sf2_levels[3][4]; /* Smart FanII: Fan1,2,3 duty cycle levels */
300 static int w83792d_attach_adapter(struct i2c_adapter *adapter);
301 static int w83792d_detect(struct i2c_adapter *adapter, int address, int kind);
302 static int w83792d_detach_client(struct i2c_client *client);
303 static struct w83792d_data *w83792d_update_device(struct device *dev);
305 #ifdef DEBUG
306 static void w83792d_print_debug(struct w83792d_data *data, struct device *dev);
307 #endif
309 static void w83792d_init_client(struct i2c_client *client);
311 static struct i2c_driver w83792d_driver = {
312 .driver = {
313 .name = "w83792d",
315 .attach_adapter = w83792d_attach_adapter,
316 .detach_client = w83792d_detach_client,
319 static inline long in_count_from_reg(int nr, struct w83792d_data *data)
321 /* in7 and in8 do not have low bits, but the formula still works */
322 return ((data->in[nr] << 2) | ((data->low_bits >> (2 * nr)) & 0x03));
325 /* The SMBus locks itself. The Winbond W83792D chip has a bank register,
326 but the driver only accesses registers in bank 0, so we don't have
327 to switch banks and lock access between switches. */
328 static inline int w83792d_read_value(struct i2c_client *client, u8 reg)
330 return i2c_smbus_read_byte_data(client, reg);
333 static inline int
334 w83792d_write_value(struct i2c_client *client, u8 reg, u8 value)
336 return i2c_smbus_write_byte_data(client, reg, value);
339 /* following are the sysfs callback functions */
340 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
341 char *buf)
343 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
344 int nr = sensor_attr->index;
345 struct w83792d_data *data = w83792d_update_device(dev);
346 return sprintf(buf,"%ld\n", IN_FROM_REG(nr,(in_count_from_reg(nr, data))));
349 #define show_in_reg(reg) \
350 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
351 char *buf) \
353 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
354 int nr = sensor_attr->index; \
355 struct w83792d_data *data = w83792d_update_device(dev); \
356 return sprintf(buf,"%ld\n", (long)(IN_FROM_REG(nr, (data->reg[nr])*4))); \
359 show_in_reg(in_min);
360 show_in_reg(in_max);
362 #define store_in_reg(REG, reg) \
363 static ssize_t store_in_##reg (struct device *dev, \
364 struct device_attribute *attr, \
365 const char *buf, size_t count) \
367 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
368 int nr = sensor_attr->index; \
369 struct i2c_client *client = to_i2c_client(dev); \
370 struct w83792d_data *data = i2c_get_clientdata(client); \
371 u32 val; \
373 val = simple_strtoul(buf, NULL, 10); \
374 mutex_lock(&data->update_lock); \
375 data->in_##reg[nr] = SENSORS_LIMIT(IN_TO_REG(nr, val)/4, 0, 255); \
376 w83792d_write_value(client, W83792D_REG_IN_##REG[nr], data->in_##reg[nr]); \
377 mutex_unlock(&data->update_lock); \
379 return count; \
381 store_in_reg(MIN, min);
382 store_in_reg(MAX, max);
384 static struct sensor_device_attribute sda_in_input[] = {
385 SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
386 SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
387 SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
388 SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
389 SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
390 SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
391 SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
392 SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
393 SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
395 static struct sensor_device_attribute sda_in_min[] = {
396 SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
397 SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
398 SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
399 SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
400 SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
401 SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
402 SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
403 SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
404 SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
406 static struct sensor_device_attribute sda_in_max[] = {
407 SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
408 SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
409 SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
410 SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
411 SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
412 SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
413 SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
414 SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
415 SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
419 #define show_fan_reg(reg) \
420 static ssize_t show_##reg (struct device *dev, struct device_attribute *attr, \
421 char *buf) \
423 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
424 int nr = sensor_attr->index - 1; \
425 struct w83792d_data *data = w83792d_update_device(dev); \
426 return sprintf(buf,"%d\n", \
427 FAN_FROM_REG(data->reg[nr], DIV_FROM_REG(data->fan_div[nr]))); \
430 show_fan_reg(fan);
431 show_fan_reg(fan_min);
433 static ssize_t
434 store_fan_min(struct device *dev, struct device_attribute *attr,
435 const char *buf, size_t count)
437 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
438 int nr = sensor_attr->index - 1;
439 struct i2c_client *client = to_i2c_client(dev);
440 struct w83792d_data *data = i2c_get_clientdata(client);
441 u32 val;
443 val = simple_strtoul(buf, NULL, 10);
444 mutex_lock(&data->update_lock);
445 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
446 w83792d_write_value(client, W83792D_REG_FAN_MIN[nr],
447 data->fan_min[nr]);
448 mutex_unlock(&data->update_lock);
450 return count;
453 static ssize_t
454 show_fan_div(struct device *dev, struct device_attribute *attr,
455 char *buf)
457 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
458 int nr = sensor_attr->index;
459 struct w83792d_data *data = w83792d_update_device(dev);
460 return sprintf(buf, "%u\n", DIV_FROM_REG(data->fan_div[nr - 1]));
463 /* Note: we save and restore the fan minimum here, because its value is
464 determined in part by the fan divisor. This follows the principle of
465 least surprise; the user doesn't expect the fan minimum to change just
466 because the divisor changed. */
467 static ssize_t
468 store_fan_div(struct device *dev, struct device_attribute *attr,
469 const char *buf, size_t count)
471 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
472 int nr = sensor_attr->index - 1;
473 struct i2c_client *client = to_i2c_client(dev);
474 struct w83792d_data *data = i2c_get_clientdata(client);
475 unsigned long min;
476 /*u8 reg;*/
477 u8 fan_div_reg = 0;
478 u8 tmp_fan_div;
480 /* Save fan_min */
481 mutex_lock(&data->update_lock);
482 min = FAN_FROM_REG(data->fan_min[nr],
483 DIV_FROM_REG(data->fan_div[nr]));
485 data->fan_div[nr] = DIV_TO_REG(simple_strtoul(buf, NULL, 10));
487 fan_div_reg = w83792d_read_value(client, W83792D_REG_FAN_DIV[nr >> 1]);
488 fan_div_reg &= (nr & 0x01) ? 0x8f : 0xf8;
489 tmp_fan_div = (nr & 0x01) ? (((data->fan_div[nr]) << 4) & 0x70)
490 : ((data->fan_div[nr]) & 0x07);
491 w83792d_write_value(client, W83792D_REG_FAN_DIV[nr >> 1],
492 fan_div_reg | tmp_fan_div);
494 /* Restore fan_min */
495 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
496 w83792d_write_value(client, W83792D_REG_FAN_MIN[nr], data->fan_min[nr]);
497 mutex_unlock(&data->update_lock);
499 return count;
502 static struct sensor_device_attribute sda_fan_input[] = {
503 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 1),
504 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 2),
505 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 3),
506 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 4),
507 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 5),
508 SENSOR_ATTR(fan6_input, S_IRUGO, show_fan, NULL, 6),
509 SENSOR_ATTR(fan7_input, S_IRUGO, show_fan, NULL, 7),
511 static struct sensor_device_attribute sda_fan_min[] = {
512 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min, store_fan_min, 1),
513 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min, store_fan_min, 2),
514 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min, store_fan_min, 3),
515 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min, store_fan_min, 4),
516 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min, store_fan_min, 5),
517 SENSOR_ATTR(fan6_min, S_IWUSR | S_IRUGO, show_fan_min, store_fan_min, 6),
518 SENSOR_ATTR(fan7_min, S_IWUSR | S_IRUGO, show_fan_min, store_fan_min, 7),
520 static struct sensor_device_attribute sda_fan_div[] = {
521 SENSOR_ATTR(fan1_div, S_IWUSR | S_IRUGO, show_fan_div, store_fan_div, 1),
522 SENSOR_ATTR(fan2_div, S_IWUSR | S_IRUGO, show_fan_div, store_fan_div, 2),
523 SENSOR_ATTR(fan3_div, S_IWUSR | S_IRUGO, show_fan_div, store_fan_div, 3),
524 SENSOR_ATTR(fan4_div, S_IWUSR | S_IRUGO, show_fan_div, store_fan_div, 4),
525 SENSOR_ATTR(fan5_div, S_IWUSR | S_IRUGO, show_fan_div, store_fan_div, 5),
526 SENSOR_ATTR(fan6_div, S_IWUSR | S_IRUGO, show_fan_div, store_fan_div, 6),
527 SENSOR_ATTR(fan7_div, S_IWUSR | S_IRUGO, show_fan_div, store_fan_div, 7),
531 /* read/write the temperature1, includes measured value and limits */
533 static ssize_t show_temp1(struct device *dev, struct device_attribute *attr,
534 char *buf)
536 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
537 int nr = sensor_attr->index;
538 struct w83792d_data *data = w83792d_update_device(dev);
539 return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp1[nr]));
542 static ssize_t store_temp1(struct device *dev, struct device_attribute *attr,
543 const char *buf, size_t count)
545 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
546 int nr = sensor_attr->index;
547 struct i2c_client *client = to_i2c_client(dev);
548 struct w83792d_data *data = i2c_get_clientdata(client);
549 s32 val;
551 val = simple_strtol(buf, NULL, 10);
552 mutex_lock(&data->update_lock);
553 data->temp1[nr] = TEMP1_TO_REG(val);
554 w83792d_write_value(client, W83792D_REG_TEMP1[nr],
555 data->temp1[nr]);
556 mutex_unlock(&data->update_lock);
558 return count;
561 /* read/write the temperature2-3, includes measured value and limits */
563 static ssize_t show_temp23(struct device *dev, struct device_attribute *attr,
564 char *buf)
566 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
567 int nr = sensor_attr->nr;
568 int index = sensor_attr->index;
569 struct w83792d_data *data = w83792d_update_device(dev);
570 return sprintf(buf,"%ld\n",
571 (long)TEMP_ADD_FROM_REG(data->temp_add[nr][index],
572 data->temp_add[nr][index+1]));
575 static ssize_t store_temp23(struct device *dev, struct device_attribute *attr,
576 const char *buf, size_t count)
578 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
579 int nr = sensor_attr->nr;
580 int index = sensor_attr->index;
581 struct i2c_client *client = to_i2c_client(dev);
582 struct w83792d_data *data = i2c_get_clientdata(client);
583 s32 val;
585 val = simple_strtol(buf, NULL, 10);
586 mutex_lock(&data->update_lock);
587 data->temp_add[nr][index] = TEMP_ADD_TO_REG_HIGH(val);
588 data->temp_add[nr][index+1] = TEMP_ADD_TO_REG_LOW(val);
589 w83792d_write_value(client, W83792D_REG_TEMP_ADD[nr][index],
590 data->temp_add[nr][index]);
591 w83792d_write_value(client, W83792D_REG_TEMP_ADD[nr][index+1],
592 data->temp_add[nr][index+1]);
593 mutex_unlock(&data->update_lock);
595 return count;
598 static struct sensor_device_attribute_2 sda_temp_input[] = {
599 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp1, NULL, 0, 0),
600 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp23, NULL, 0, 0),
601 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp23, NULL, 1, 0),
604 static struct sensor_device_attribute_2 sda_temp_max[] = {
605 SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp1, store_temp1, 0, 1),
606 SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp23, store_temp23, 0, 2),
607 SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp23, store_temp23, 1, 2),
610 static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
611 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp1, store_temp1, 0, 2),
612 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp23, store_temp23, 0, 4),
613 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp23, store_temp23, 1, 4),
616 /* get reatime status of all sensors items: voltage, temp, fan */
617 static ssize_t
618 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
620 struct w83792d_data *data = w83792d_update_device(dev);
621 return sprintf(buf, "%d\n", data->alarms);
624 static
625 DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
627 static ssize_t
628 show_pwm(struct device *dev, struct device_attribute *attr,
629 char *buf)
631 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
632 int nr = sensor_attr->index;
633 struct w83792d_data *data = w83792d_update_device(dev);
634 return sprintf(buf, "%d\n", (data->pwm[nr] & 0x0f) << 4);
637 static ssize_t
638 show_pwmenable(struct device *dev, struct device_attribute *attr,
639 char *buf)
641 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
642 int nr = sensor_attr->index - 1;
643 struct w83792d_data *data = w83792d_update_device(dev);
644 long pwm_enable_tmp = 1;
646 switch (data->pwmenable[nr]) {
647 case 0:
648 pwm_enable_tmp = 1; /* manual mode */
649 break;
650 case 1:
651 pwm_enable_tmp = 3; /*thermal cruise/Smart Fan I */
652 break;
653 case 2:
654 pwm_enable_tmp = 2; /* Smart Fan II */
655 break;
658 return sprintf(buf, "%ld\n", pwm_enable_tmp);
661 static ssize_t
662 store_pwm(struct device *dev, struct device_attribute *attr,
663 const char *buf, size_t count)
665 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
666 int nr = sensor_attr->index;
667 struct i2c_client *client = to_i2c_client(dev);
668 struct w83792d_data *data = i2c_get_clientdata(client);
669 u8 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 255) >> 4;
671 mutex_lock(&data->update_lock);
672 val |= w83792d_read_value(client, W83792D_REG_PWM[nr]) & 0xf0;
673 data->pwm[nr] = val;
674 w83792d_write_value(client, W83792D_REG_PWM[nr], data->pwm[nr]);
675 mutex_unlock(&data->update_lock);
677 return count;
680 static ssize_t
681 store_pwmenable(struct device *dev, struct device_attribute *attr,
682 const char *buf, size_t count)
684 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
685 int nr = sensor_attr->index - 1;
686 struct i2c_client *client = to_i2c_client(dev);
687 struct w83792d_data *data = i2c_get_clientdata(client);
688 u32 val;
689 u8 fan_cfg_tmp, cfg1_tmp, cfg2_tmp, cfg3_tmp, cfg4_tmp;
691 val = simple_strtoul(buf, NULL, 10);
692 if (val < 1 || val > 3)
693 return -EINVAL;
695 mutex_lock(&data->update_lock);
696 switch (val) {
697 case 1:
698 data->pwmenable[nr] = 0; /* manual mode */
699 break;
700 case 2:
701 data->pwmenable[nr] = 2; /* Smart Fan II */
702 break;
703 case 3:
704 data->pwmenable[nr] = 1; /* thermal cruise/Smart Fan I */
705 break;
707 cfg1_tmp = data->pwmenable[0];
708 cfg2_tmp = (data->pwmenable[1]) << 2;
709 cfg3_tmp = (data->pwmenable[2]) << 4;
710 cfg4_tmp = w83792d_read_value(client,W83792D_REG_FAN_CFG) & 0xc0;
711 fan_cfg_tmp = ((cfg4_tmp | cfg3_tmp) | cfg2_tmp) | cfg1_tmp;
712 w83792d_write_value(client, W83792D_REG_FAN_CFG, fan_cfg_tmp);
713 mutex_unlock(&data->update_lock);
715 return count;
718 static struct sensor_device_attribute sda_pwm[] = {
719 SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
720 SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
721 SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
723 static struct sensor_device_attribute sda_pwm_enable[] = {
724 SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO,
725 show_pwmenable, store_pwmenable, 1),
726 SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO,
727 show_pwmenable, store_pwmenable, 2),
728 SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO,
729 show_pwmenable, store_pwmenable, 3),
733 static ssize_t
734 show_pwm_mode(struct device *dev, struct device_attribute *attr,
735 char *buf)
737 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
738 int nr = sensor_attr->index;
739 struct w83792d_data *data = w83792d_update_device(dev);
740 return sprintf(buf, "%d\n", data->pwm[nr] >> 7);
743 static ssize_t
744 store_pwm_mode(struct device *dev, struct device_attribute *attr,
745 const char *buf, size_t count)
747 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
748 int nr = sensor_attr->index;
749 struct i2c_client *client = to_i2c_client(dev);
750 struct w83792d_data *data = i2c_get_clientdata(client);
751 u32 val;
753 val = simple_strtoul(buf, NULL, 10);
754 if (val != 0 && val != 1)
755 return -EINVAL;
757 mutex_lock(&data->update_lock);
758 data->pwm[nr] = w83792d_read_value(client, W83792D_REG_PWM[nr]);
759 if (val) { /* PWM mode */
760 data->pwm[nr] |= 0x80;
761 } else { /* DC mode */
762 data->pwm[nr] &= 0x7f;
764 w83792d_write_value(client, W83792D_REG_PWM[nr], data->pwm[nr]);
765 mutex_unlock(&data->update_lock);
767 return count;
770 static struct sensor_device_attribute sda_pwm_mode[] = {
771 SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO,
772 show_pwm_mode, store_pwm_mode, 0),
773 SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO,
774 show_pwm_mode, store_pwm_mode, 1),
775 SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO,
776 show_pwm_mode, store_pwm_mode, 2),
780 static ssize_t
781 show_regs_chassis(struct device *dev, struct device_attribute *attr,
782 char *buf)
784 struct w83792d_data *data = w83792d_update_device(dev);
785 return sprintf(buf, "%d\n", data->chassis);
788 static DEVICE_ATTR(chassis, S_IRUGO, show_regs_chassis, NULL);
790 static ssize_t
791 show_chassis_clear(struct device *dev, struct device_attribute *attr, char *buf)
793 struct w83792d_data *data = w83792d_update_device(dev);
794 return sprintf(buf, "%d\n", data->chassis_clear);
797 static ssize_t
798 store_chassis_clear(struct device *dev, struct device_attribute *attr,
799 const char *buf, size_t count)
801 struct i2c_client *client = to_i2c_client(dev);
802 struct w83792d_data *data = i2c_get_clientdata(client);
803 u32 val;
804 u8 temp1 = 0, temp2 = 0;
806 val = simple_strtoul(buf, NULL, 10);
807 mutex_lock(&data->update_lock);
808 data->chassis_clear = SENSORS_LIMIT(val, 0 ,1);
809 temp1 = ((data->chassis_clear) << 7) & 0x80;
810 temp2 = w83792d_read_value(client,
811 W83792D_REG_CHASSIS_CLR) & 0x7f;
812 w83792d_write_value(client, W83792D_REG_CHASSIS_CLR, temp1 | temp2);
813 mutex_unlock(&data->update_lock);
815 return count;
818 static DEVICE_ATTR(chassis_clear, S_IRUGO | S_IWUSR,
819 show_chassis_clear, store_chassis_clear);
821 /* For Smart Fan I / Thermal Cruise */
822 static ssize_t
823 show_thermal_cruise(struct device *dev, struct device_attribute *attr,
824 char *buf)
826 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
827 int nr = sensor_attr->index;
828 struct w83792d_data *data = w83792d_update_device(dev);
829 return sprintf(buf, "%ld\n", (long)data->thermal_cruise[nr-1]);
832 static ssize_t
833 store_thermal_cruise(struct device *dev, struct device_attribute *attr,
834 const char *buf, size_t count)
836 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
837 int nr = sensor_attr->index - 1;
838 struct i2c_client *client = to_i2c_client(dev);
839 struct w83792d_data *data = i2c_get_clientdata(client);
840 u32 val;
841 u8 target_tmp=0, target_mask=0;
843 val = simple_strtoul(buf, NULL, 10);
844 target_tmp = val;
845 target_tmp = target_tmp & 0x7f;
846 mutex_lock(&data->update_lock);
847 target_mask = w83792d_read_value(client, W83792D_REG_THERMAL[nr]) & 0x80;
848 data->thermal_cruise[nr] = SENSORS_LIMIT(target_tmp, 0, 255);
849 w83792d_write_value(client, W83792D_REG_THERMAL[nr],
850 (data->thermal_cruise[nr]) | target_mask);
851 mutex_unlock(&data->update_lock);
853 return count;
856 static struct sensor_device_attribute sda_thermal_cruise[] = {
857 SENSOR_ATTR(thermal_cruise1, S_IWUSR | S_IRUGO,
858 show_thermal_cruise, store_thermal_cruise, 1),
859 SENSOR_ATTR(thermal_cruise2, S_IWUSR | S_IRUGO,
860 show_thermal_cruise, store_thermal_cruise, 2),
861 SENSOR_ATTR(thermal_cruise3, S_IWUSR | S_IRUGO,
862 show_thermal_cruise, store_thermal_cruise, 3),
865 /* For Smart Fan I/Thermal Cruise and Smart Fan II */
866 static ssize_t
867 show_tolerance(struct device *dev, struct device_attribute *attr,
868 char *buf)
870 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
871 int nr = sensor_attr->index;
872 struct w83792d_data *data = w83792d_update_device(dev);
873 return sprintf(buf, "%ld\n", (long)data->tolerance[nr-1]);
876 static ssize_t
877 store_tolerance(struct device *dev, struct device_attribute *attr,
878 const char *buf, size_t count)
880 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
881 int nr = sensor_attr->index - 1;
882 struct i2c_client *client = to_i2c_client(dev);
883 struct w83792d_data *data = i2c_get_clientdata(client);
884 u32 val;
885 u8 tol_tmp, tol_mask;
887 val = simple_strtoul(buf, NULL, 10);
888 mutex_lock(&data->update_lock);
889 tol_mask = w83792d_read_value(client,
890 W83792D_REG_TOLERANCE[nr]) & ((nr == 1) ? 0x0f : 0xf0);
891 tol_tmp = SENSORS_LIMIT(val, 0, 15);
892 tol_tmp &= 0x0f;
893 data->tolerance[nr] = tol_tmp;
894 if (nr == 1) {
895 tol_tmp <<= 4;
897 w83792d_write_value(client, W83792D_REG_TOLERANCE[nr],
898 tol_mask | tol_tmp);
899 mutex_unlock(&data->update_lock);
901 return count;
904 static struct sensor_device_attribute sda_tolerance[] = {
905 SENSOR_ATTR(tolerance1, S_IWUSR | S_IRUGO,
906 show_tolerance, store_tolerance, 1),
907 SENSOR_ATTR(tolerance2, S_IWUSR | S_IRUGO,
908 show_tolerance, store_tolerance, 2),
909 SENSOR_ATTR(tolerance3, S_IWUSR | S_IRUGO,
910 show_tolerance, store_tolerance, 3),
913 /* For Smart Fan II */
914 static ssize_t
915 show_sf2_point(struct device *dev, struct device_attribute *attr,
916 char *buf)
918 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
919 int nr = sensor_attr->nr;
920 int index = sensor_attr->index;
921 struct w83792d_data *data = w83792d_update_device(dev);
922 return sprintf(buf, "%ld\n", (long)data->sf2_points[index-1][nr-1]);
925 static ssize_t
926 store_sf2_point(struct device *dev, struct device_attribute *attr,
927 const char *buf, size_t count)
929 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
930 int nr = sensor_attr->nr - 1;
931 int index = sensor_attr->index - 1;
932 struct i2c_client *client = to_i2c_client(dev);
933 struct w83792d_data *data = i2c_get_clientdata(client);
934 u32 val;
935 u8 mask_tmp = 0;
937 val = simple_strtoul(buf, NULL, 10);
938 mutex_lock(&data->update_lock);
939 data->sf2_points[index][nr] = SENSORS_LIMIT(val, 0, 127);
940 mask_tmp = w83792d_read_value(client,
941 W83792D_REG_POINTS[index][nr]) & 0x80;
942 w83792d_write_value(client, W83792D_REG_POINTS[index][nr],
943 mask_tmp|data->sf2_points[index][nr]);
944 mutex_unlock(&data->update_lock);
946 return count;
949 static struct sensor_device_attribute_2 sda_sf2_point[] = {
950 SENSOR_ATTR_2(sf2_point1_fan1, S_IRUGO | S_IWUSR,
951 show_sf2_point, store_sf2_point, 1, 1),
952 SENSOR_ATTR_2(sf2_point2_fan1, S_IRUGO | S_IWUSR,
953 show_sf2_point, store_sf2_point, 2, 1),
954 SENSOR_ATTR_2(sf2_point3_fan1, S_IRUGO | S_IWUSR,
955 show_sf2_point, store_sf2_point, 3, 1),
956 SENSOR_ATTR_2(sf2_point4_fan1, S_IRUGO | S_IWUSR,
957 show_sf2_point, store_sf2_point, 4, 1),
959 SENSOR_ATTR_2(sf2_point1_fan2, S_IRUGO | S_IWUSR,
960 show_sf2_point, store_sf2_point, 1, 2),
961 SENSOR_ATTR_2(sf2_point2_fan2, S_IRUGO | S_IWUSR,
962 show_sf2_point, store_sf2_point, 2, 2),
963 SENSOR_ATTR_2(sf2_point3_fan2, S_IRUGO | S_IWUSR,
964 show_sf2_point, store_sf2_point, 3, 2),
965 SENSOR_ATTR_2(sf2_point4_fan2, S_IRUGO | S_IWUSR,
966 show_sf2_point, store_sf2_point, 4, 2),
968 SENSOR_ATTR_2(sf2_point1_fan3, S_IRUGO | S_IWUSR,
969 show_sf2_point, store_sf2_point, 1, 3),
970 SENSOR_ATTR_2(sf2_point2_fan3, S_IRUGO | S_IWUSR,
971 show_sf2_point, store_sf2_point, 2, 3),
972 SENSOR_ATTR_2(sf2_point3_fan3, S_IRUGO | S_IWUSR,
973 show_sf2_point, store_sf2_point, 3, 3),
974 SENSOR_ATTR_2(sf2_point4_fan3, S_IRUGO | S_IWUSR,
975 show_sf2_point, store_sf2_point, 4, 3),
979 static ssize_t
980 show_sf2_level(struct device *dev, struct device_attribute *attr,
981 char *buf)
983 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
984 int nr = sensor_attr->nr;
985 int index = sensor_attr->index;
986 struct w83792d_data *data = w83792d_update_device(dev);
987 return sprintf(buf, "%d\n",
988 (((data->sf2_levels[index-1][nr]) * 100) / 15));
991 static ssize_t
992 store_sf2_level(struct device *dev, struct device_attribute *attr,
993 const char *buf, size_t count)
995 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
996 int nr = sensor_attr->nr;
997 int index = sensor_attr->index - 1;
998 struct i2c_client *client = to_i2c_client(dev);
999 struct w83792d_data *data = i2c_get_clientdata(client);
1000 u32 val;
1001 u8 mask_tmp=0, level_tmp=0;
1003 val = simple_strtoul(buf, NULL, 10);
1004 mutex_lock(&data->update_lock);
1005 data->sf2_levels[index][nr] = SENSORS_LIMIT((val * 15) / 100, 0, 15);
1006 mask_tmp = w83792d_read_value(client, W83792D_REG_LEVELS[index][nr])
1007 & ((nr==3) ? 0xf0 : 0x0f);
1008 if (nr==3) {
1009 level_tmp = data->sf2_levels[index][nr];
1010 } else {
1011 level_tmp = data->sf2_levels[index][nr] << 4;
1013 w83792d_write_value(client, W83792D_REG_LEVELS[index][nr], level_tmp | mask_tmp);
1014 mutex_unlock(&data->update_lock);
1016 return count;
1019 static struct sensor_device_attribute_2 sda_sf2_level[] = {
1020 SENSOR_ATTR_2(sf2_level1_fan1, S_IRUGO | S_IWUSR,
1021 show_sf2_level, store_sf2_level, 1, 1),
1022 SENSOR_ATTR_2(sf2_level2_fan1, S_IRUGO | S_IWUSR,
1023 show_sf2_level, store_sf2_level, 2, 1),
1024 SENSOR_ATTR_2(sf2_level3_fan1, S_IRUGO | S_IWUSR,
1025 show_sf2_level, store_sf2_level, 3, 1),
1027 SENSOR_ATTR_2(sf2_level1_fan2, S_IRUGO | S_IWUSR,
1028 show_sf2_level, store_sf2_level, 1, 2),
1029 SENSOR_ATTR_2(sf2_level2_fan2, S_IRUGO | S_IWUSR,
1030 show_sf2_level, store_sf2_level, 2, 2),
1031 SENSOR_ATTR_2(sf2_level3_fan2, S_IRUGO | S_IWUSR,
1032 show_sf2_level, store_sf2_level, 3, 2),
1034 SENSOR_ATTR_2(sf2_level1_fan3, S_IRUGO | S_IWUSR,
1035 show_sf2_level, store_sf2_level, 1, 3),
1036 SENSOR_ATTR_2(sf2_level2_fan3, S_IRUGO | S_IWUSR,
1037 show_sf2_level, store_sf2_level, 2, 3),
1038 SENSOR_ATTR_2(sf2_level3_fan3, S_IRUGO | S_IWUSR,
1039 show_sf2_level, store_sf2_level, 3, 3),
1042 /* This function is called when:
1043 * w83792d_driver is inserted (when this module is loaded), for each
1044 available adapter
1045 * when a new adapter is inserted (and w83792d_driver is still present) */
1046 static int
1047 w83792d_attach_adapter(struct i2c_adapter *adapter)
1049 if (!(adapter->class & I2C_CLASS_HWMON))
1050 return 0;
1051 return i2c_probe(adapter, &addr_data, w83792d_detect);
1055 static int
1056 w83792d_create_subclient(struct i2c_adapter *adapter,
1057 struct i2c_client *new_client, int addr,
1058 struct i2c_client **sub_cli)
1060 int err;
1061 struct i2c_client *sub_client;
1063 (*sub_cli) = sub_client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
1064 if (!(sub_client)) {
1065 return -ENOMEM;
1067 sub_client->addr = 0x48 + addr;
1068 i2c_set_clientdata(sub_client, NULL);
1069 sub_client->adapter = adapter;
1070 sub_client->driver = &w83792d_driver;
1071 sub_client->flags = 0;
1072 strlcpy(sub_client->name, "w83792d subclient", I2C_NAME_SIZE);
1073 if ((err = i2c_attach_client(sub_client))) {
1074 dev_err(&new_client->dev, "subclient registration "
1075 "at address 0x%x failed\n", sub_client->addr);
1076 kfree(sub_client);
1077 return err;
1079 return 0;
1083 static int
1084 w83792d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
1085 struct i2c_client *new_client)
1087 int i, id, err;
1088 u8 val;
1089 struct w83792d_data *data = i2c_get_clientdata(new_client);
1091 id = i2c_adapter_id(adapter);
1092 if (force_subclients[0] == id && force_subclients[1] == address) {
1093 for (i = 2; i <= 3; i++) {
1094 if (force_subclients[i] < 0x48 ||
1095 force_subclients[i] > 0x4f) {
1096 dev_err(&new_client->dev, "invalid subclient "
1097 "address %d; must be 0x48-0x4f\n",
1098 force_subclients[i]);
1099 err = -ENODEV;
1100 goto ERROR_SC_0;
1103 w83792d_write_value(new_client, W83792D_REG_I2C_SUBADDR,
1104 (force_subclients[2] & 0x07) |
1105 ((force_subclients[3] & 0x07) << 4));
1108 val = w83792d_read_value(new_client, W83792D_REG_I2C_SUBADDR);
1109 if (!(val & 0x08)) {
1110 err = w83792d_create_subclient(adapter, new_client, val & 0x7,
1111 &data->lm75[0]);
1112 if (err < 0)
1113 goto ERROR_SC_0;
1115 if (!(val & 0x80)) {
1116 if ((data->lm75[0] != NULL) &&
1117 ((val & 0x7) == ((val >> 4) & 0x7))) {
1118 dev_err(&new_client->dev, "duplicate addresses 0x%x, "
1119 "use force_subclient\n", data->lm75[0]->addr);
1120 err = -ENODEV;
1121 goto ERROR_SC_1;
1123 err = w83792d_create_subclient(adapter, new_client,
1124 (val >> 4) & 0x7, &data->lm75[1]);
1125 if (err < 0)
1126 goto ERROR_SC_1;
1129 return 0;
1131 /* Undo inits in case of errors */
1133 ERROR_SC_1:
1134 if (data->lm75[0] != NULL) {
1135 i2c_detach_client(data->lm75[0]);
1136 kfree(data->lm75[0]);
1138 ERROR_SC_0:
1139 return err;
1142 static void device_create_file_fan(struct device *dev, int i)
1144 device_create_file(dev, &sda_fan_input[i].dev_attr);
1145 device_create_file(dev, &sda_fan_div[i].dev_attr);
1146 device_create_file(dev, &sda_fan_min[i].dev_attr);
1149 static int
1150 w83792d_detect(struct i2c_adapter *adapter, int address, int kind)
1152 int i = 0, val1 = 0, val2;
1153 struct i2c_client *client;
1154 struct device *dev;
1155 struct w83792d_data *data;
1156 int err = 0;
1157 const char *client_name = "";
1159 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1160 goto ERROR0;
1163 /* OK. For now, we presume we have a valid client. We now create the
1164 client structure, even though we cannot fill it completely yet.
1165 But it allows us to access w83792d_{read,write}_value. */
1167 if (!(data = kzalloc(sizeof(struct w83792d_data), GFP_KERNEL))) {
1168 err = -ENOMEM;
1169 goto ERROR0;
1172 client = &data->client;
1173 dev = &client->dev;
1174 i2c_set_clientdata(client, data);
1175 client->addr = address;
1176 client->adapter = adapter;
1177 client->driver = &w83792d_driver;
1178 client->flags = 0;
1180 /* Now, we do the remaining detection. */
1182 /* The w83792d may be stuck in some other bank than bank 0. This may
1183 make reading other information impossible. Specify a force=... or
1184 force_*=... parameter, and the Winbond will be reset to the right
1185 bank. */
1186 if (kind < 0) {
1187 if (w83792d_read_value(client, W83792D_REG_CONFIG) & 0x80) {
1188 dev_dbg(dev, "Detection failed at step 1\n");
1189 goto ERROR1;
1191 val1 = w83792d_read_value(client, W83792D_REG_BANK);
1192 val2 = w83792d_read_value(client, W83792D_REG_CHIPMAN);
1193 /* Check for Winbond ID if in bank 0 */
1194 if (!(val1 & 0x07)) { /* is Bank0 */
1195 if (((!(val1 & 0x80)) && (val2 != 0xa3)) ||
1196 ((val1 & 0x80) && (val2 != 0x5c))) {
1197 dev_dbg(dev, "Detection failed at step 2\n");
1198 goto ERROR1;
1201 /* If Winbond chip, address of chip and W83792D_REG_I2C_ADDR
1202 should match */
1203 if (w83792d_read_value(client,
1204 W83792D_REG_I2C_ADDR) != address) {
1205 dev_dbg(dev, "Detection failed at step 3\n");
1206 goto ERROR1;
1210 /* We have either had a force parameter, or we have already detected the
1211 Winbond. Put it now into bank 0 and Vendor ID High Byte */
1212 w83792d_write_value(client,
1213 W83792D_REG_BANK,
1214 (w83792d_read_value(client,
1215 W83792D_REG_BANK) & 0x78) | 0x80);
1217 /* Determine the chip type. */
1218 if (kind <= 0) {
1219 /* get vendor ID */
1220 val2 = w83792d_read_value(client, W83792D_REG_CHIPMAN);
1221 if (val2 != 0x5c) { /* the vendor is NOT Winbond */
1222 goto ERROR1;
1224 val1 = w83792d_read_value(client, W83792D_REG_WCHIPID);
1225 if (val1 == 0x7a) {
1226 kind = w83792d;
1227 } else {
1228 if (kind == 0)
1229 dev_warn(dev,
1230 "w83792d: Ignoring 'force' parameter for"
1231 " unknown chip at adapter %d, address"
1232 " 0x%02x\n", i2c_adapter_id(adapter),
1233 address);
1234 goto ERROR1;
1238 if (kind == w83792d) {
1239 client_name = "w83792d";
1240 } else {
1241 dev_err(dev, "w83792d: Internal error: unknown"
1242 " kind (%d)?!?", kind);
1243 goto ERROR1;
1246 /* Fill in the remaining client fields and put into the global list */
1247 strlcpy(client->name, client_name, I2C_NAME_SIZE);
1248 data->type = kind;
1250 data->valid = 0;
1251 mutex_init(&data->update_lock);
1253 /* Tell the I2C layer a new client has arrived */
1254 if ((err = i2c_attach_client(client)))
1255 goto ERROR1;
1257 if ((err = w83792d_detect_subclients(adapter, address,
1258 kind, client)))
1259 goto ERROR2;
1261 /* Initialize the chip */
1262 w83792d_init_client(client);
1264 /* A few vars need to be filled upon startup */
1265 for (i = 0; i < 7; i++) {
1266 data->fan_min[i] = w83792d_read_value(client,
1267 W83792D_REG_FAN_MIN[i]);
1270 /* Register sysfs hooks */
1271 data->class_dev = hwmon_device_register(dev);
1272 if (IS_ERR(data->class_dev)) {
1273 err = PTR_ERR(data->class_dev);
1274 goto ERROR3;
1276 for (i = 0; i < 9; i++) {
1277 device_create_file(dev, &sda_in_input[i].dev_attr);
1278 device_create_file(dev, &sda_in_max[i].dev_attr);
1279 device_create_file(dev, &sda_in_min[i].dev_attr);
1281 for (i = 0; i < 3; i++)
1282 device_create_file_fan(dev, i);
1284 /* Read GPIO enable register to check if pins for fan 4,5 are used as
1285 GPIO */
1286 val1 = w83792d_read_value(client, W83792D_REG_GPIO_EN);
1287 if (!(val1 & 0x40))
1288 device_create_file_fan(dev, 3);
1289 if (!(val1 & 0x20))
1290 device_create_file_fan(dev, 4);
1292 val1 = w83792d_read_value(client, W83792D_REG_PIN);
1293 if (val1 & 0x40)
1294 device_create_file_fan(dev, 5);
1295 if (val1 & 0x04)
1296 device_create_file_fan(dev, 6);
1298 for (i = 0; i < 3; i++) {
1299 device_create_file(dev, &sda_temp_input[i].dev_attr);
1300 device_create_file(dev, &sda_temp_max[i].dev_attr);
1301 device_create_file(dev, &sda_temp_max_hyst[i].dev_attr);
1302 device_create_file(dev, &sda_thermal_cruise[i].dev_attr);
1303 device_create_file(dev, &sda_tolerance[i].dev_attr);
1306 for (i = 0; i < ARRAY_SIZE(sda_pwm); i++) {
1307 device_create_file(dev, &sda_pwm[i].dev_attr);
1308 device_create_file(dev, &sda_pwm_enable[i].dev_attr);
1309 device_create_file(dev, &sda_pwm_mode[i].dev_attr);
1312 device_create_file(dev, &dev_attr_alarms);
1313 device_create_file(dev, &dev_attr_chassis);
1314 device_create_file(dev, &dev_attr_chassis_clear);
1316 for (i = 0; i < ARRAY_SIZE(sda_sf2_point); i++)
1317 device_create_file(dev, &sda_sf2_point[i].dev_attr);
1319 for (i = 0; i < ARRAY_SIZE(sda_sf2_level); i++)
1320 device_create_file(dev, &sda_sf2_level[i].dev_attr);
1322 return 0;
1324 ERROR3:
1325 if (data->lm75[0] != NULL) {
1326 i2c_detach_client(data->lm75[0]);
1327 kfree(data->lm75[0]);
1329 if (data->lm75[1] != NULL) {
1330 i2c_detach_client(data->lm75[1]);
1331 kfree(data->lm75[1]);
1333 ERROR2:
1334 i2c_detach_client(client);
1335 ERROR1:
1336 kfree(data);
1337 ERROR0:
1338 return err;
1341 static int
1342 w83792d_detach_client(struct i2c_client *client)
1344 struct w83792d_data *data = i2c_get_clientdata(client);
1345 int err;
1347 /* main client */
1348 if (data)
1349 hwmon_device_unregister(data->class_dev);
1351 if ((err = i2c_detach_client(client)))
1352 return err;
1354 /* main client */
1355 if (data)
1356 kfree(data);
1357 /* subclient */
1358 else
1359 kfree(client);
1361 return 0;
1364 static void
1365 w83792d_init_client(struct i2c_client *client)
1367 u8 temp2_cfg, temp3_cfg, vid_in_b;
1369 if (init) {
1370 w83792d_write_value(client, W83792D_REG_CONFIG, 0x80);
1372 /* Clear the bit6 of W83792D_REG_VID_IN_B(set it into 0):
1373 W83792D_REG_VID_IN_B bit6 = 0: the high/low limit of
1374 vin0/vin1 can be modified by user;
1375 W83792D_REG_VID_IN_B bit6 = 1: the high/low limit of
1376 vin0/vin1 auto-updated, can NOT be modified by user. */
1377 vid_in_b = w83792d_read_value(client, W83792D_REG_VID_IN_B);
1378 w83792d_write_value(client, W83792D_REG_VID_IN_B,
1379 vid_in_b & 0xbf);
1381 temp2_cfg = w83792d_read_value(client, W83792D_REG_TEMP2_CONFIG);
1382 temp3_cfg = w83792d_read_value(client, W83792D_REG_TEMP3_CONFIG);
1383 w83792d_write_value(client, W83792D_REG_TEMP2_CONFIG,
1384 temp2_cfg & 0xe6);
1385 w83792d_write_value(client, W83792D_REG_TEMP3_CONFIG,
1386 temp3_cfg & 0xe6);
1388 /* Start monitoring */
1389 w83792d_write_value(client, W83792D_REG_CONFIG,
1390 (w83792d_read_value(client,
1391 W83792D_REG_CONFIG) & 0xf7)
1392 | 0x01);
1395 static struct w83792d_data *w83792d_update_device(struct device *dev)
1397 struct i2c_client *client = to_i2c_client(dev);
1398 struct w83792d_data *data = i2c_get_clientdata(client);
1399 int i, j;
1400 u8 reg_array_tmp[4], reg_tmp;
1402 mutex_lock(&data->update_lock);
1404 if (time_after
1405 (jiffies - data->last_updated, (unsigned long) (HZ * 3))
1406 || time_before(jiffies, data->last_updated) || !data->valid) {
1407 dev_dbg(dev, "Starting device update\n");
1409 /* Update the voltages measured value and limits */
1410 for (i = 0; i < 9; i++) {
1411 data->in[i] = w83792d_read_value(client,
1412 W83792D_REG_IN[i]);
1413 data->in_max[i] = w83792d_read_value(client,
1414 W83792D_REG_IN_MAX[i]);
1415 data->in_min[i] = w83792d_read_value(client,
1416 W83792D_REG_IN_MIN[i]);
1418 data->low_bits = w83792d_read_value(client,
1419 W83792D_REG_LOW_BITS1) +
1420 (w83792d_read_value(client,
1421 W83792D_REG_LOW_BITS2) << 8);
1422 for (i = 0; i < 7; i++) {
1423 /* Update the Fan measured value and limits */
1424 data->fan[i] = w83792d_read_value(client,
1425 W83792D_REG_FAN[i]);
1426 data->fan_min[i] = w83792d_read_value(client,
1427 W83792D_REG_FAN_MIN[i]);
1428 /* Update the PWM/DC Value and PWM/DC flag */
1429 data->pwm[i] = w83792d_read_value(client,
1430 W83792D_REG_PWM[i]);
1433 reg_tmp = w83792d_read_value(client, W83792D_REG_FAN_CFG);
1434 data->pwmenable[0] = reg_tmp & 0x03;
1435 data->pwmenable[1] = (reg_tmp>>2) & 0x03;
1436 data->pwmenable[2] = (reg_tmp>>4) & 0x03;
1438 for (i = 0; i < 3; i++) {
1439 data->temp1[i] = w83792d_read_value(client,
1440 W83792D_REG_TEMP1[i]);
1442 for (i = 0; i < 2; i++) {
1443 for (j = 0; j < 6; j++) {
1444 data->temp_add[i][j] = w83792d_read_value(
1445 client,W83792D_REG_TEMP_ADD[i][j]);
1449 /* Update the Fan Divisor */
1450 for (i = 0; i < 4; i++) {
1451 reg_array_tmp[i] = w83792d_read_value(client,
1452 W83792D_REG_FAN_DIV[i]);
1454 data->fan_div[0] = reg_array_tmp[0] & 0x07;
1455 data->fan_div[1] = (reg_array_tmp[0] >> 4) & 0x07;
1456 data->fan_div[2] = reg_array_tmp[1] & 0x07;
1457 data->fan_div[3] = (reg_array_tmp[1] >> 4) & 0x07;
1458 data->fan_div[4] = reg_array_tmp[2] & 0x07;
1459 data->fan_div[5] = (reg_array_tmp[2] >> 4) & 0x07;
1460 data->fan_div[6] = reg_array_tmp[3] & 0x07;
1462 /* Update the realtime status */
1463 data->alarms = w83792d_read_value(client, W83792D_REG_ALARM1) +
1464 (w83792d_read_value(client, W83792D_REG_ALARM2) << 8) +
1465 (w83792d_read_value(client, W83792D_REG_ALARM3) << 16);
1467 /* Update CaseOpen status and it's CLR_CHS. */
1468 data->chassis = (w83792d_read_value(client,
1469 W83792D_REG_CHASSIS) >> 5) & 0x01;
1470 data->chassis_clear = (w83792d_read_value(client,
1471 W83792D_REG_CHASSIS_CLR) >> 7) & 0x01;
1473 /* Update Thermal Cruise/Smart Fan I target value */
1474 for (i = 0; i < 3; i++) {
1475 data->thermal_cruise[i] =
1476 w83792d_read_value(client,
1477 W83792D_REG_THERMAL[i]) & 0x7f;
1480 /* Update Smart Fan I/II tolerance */
1481 reg_tmp = w83792d_read_value(client, W83792D_REG_TOLERANCE[0]);
1482 data->tolerance[0] = reg_tmp & 0x0f;
1483 data->tolerance[1] = (reg_tmp >> 4) & 0x0f;
1484 data->tolerance[2] = w83792d_read_value(client,
1485 W83792D_REG_TOLERANCE[2]) & 0x0f;
1487 /* Update Smart Fan II temperature points */
1488 for (i = 0; i < 3; i++) {
1489 for (j = 0; j < 4; j++) {
1490 data->sf2_points[i][j] = w83792d_read_value(
1491 client,W83792D_REG_POINTS[i][j]) & 0x7f;
1495 /* Update Smart Fan II duty cycle levels */
1496 for (i = 0; i < 3; i++) {
1497 reg_tmp = w83792d_read_value(client,
1498 W83792D_REG_LEVELS[i][0]);
1499 data->sf2_levels[i][0] = reg_tmp & 0x0f;
1500 data->sf2_levels[i][1] = (reg_tmp >> 4) & 0x0f;
1501 reg_tmp = w83792d_read_value(client,
1502 W83792D_REG_LEVELS[i][2]);
1503 data->sf2_levels[i][2] = (reg_tmp >> 4) & 0x0f;
1504 data->sf2_levels[i][3] = reg_tmp & 0x0f;
1507 data->last_updated = jiffies;
1508 data->valid = 1;
1511 mutex_unlock(&data->update_lock);
1513 #ifdef DEBUG
1514 w83792d_print_debug(data, dev);
1515 #endif
1517 return data;
1520 #ifdef DEBUG
1521 static void w83792d_print_debug(struct w83792d_data *data, struct device *dev)
1523 int i=0, j=0;
1524 dev_dbg(dev, "==========The following is the debug message...========\n");
1525 dev_dbg(dev, "9 set of Voltages: =====>\n");
1526 for (i=0; i<9; i++) {
1527 dev_dbg(dev, "vin[%d] is: 0x%x\n", i, data->in[i]);
1528 dev_dbg(dev, "vin[%d] max is: 0x%x\n", i, data->in_max[i]);
1529 dev_dbg(dev, "vin[%d] min is: 0x%x\n", i, data->in_min[i]);
1531 dev_dbg(dev, "Low Bit1 is: 0x%x\n", data->low_bits & 0xff);
1532 dev_dbg(dev, "Low Bit2 is: 0x%x\n", data->low_bits >> 8);
1533 dev_dbg(dev, "7 set of Fan Counts and Duty Cycles: =====>\n");
1534 for (i=0; i<7; i++) {
1535 dev_dbg(dev, "fan[%d] is: 0x%x\n", i, data->fan[i]);
1536 dev_dbg(dev, "fan[%d] min is: 0x%x\n", i, data->fan_min[i]);
1537 dev_dbg(dev, "pwm[%d] is: 0x%x\n", i, data->pwm[i]);
1539 dev_dbg(dev, "3 set of Temperatures: =====>\n");
1540 for (i=0; i<3; i++) {
1541 dev_dbg(dev, "temp1[%d] is: 0x%x\n", i, data->temp1[i]);
1544 for (i=0; i<2; i++) {
1545 for (j=0; j<6; j++) {
1546 dev_dbg(dev, "temp_add[%d][%d] is: 0x%x\n", i, j,
1547 data->temp_add[i][j]);
1551 for (i=0; i<7; i++) {
1552 dev_dbg(dev, "fan_div[%d] is: 0x%x\n", i, data->fan_div[i]);
1554 dev_dbg(dev, "==========End of the debug message...==================\n");
1555 dev_dbg(dev, "\n");
1557 #endif
1559 static int __init
1560 sensors_w83792d_init(void)
1562 return i2c_add_driver(&w83792d_driver);
1565 static void __exit
1566 sensors_w83792d_exit(void)
1568 i2c_del_driver(&w83792d_driver);
1571 MODULE_AUTHOR("Chunhao Huang @ Winbond <DZShen@Winbond.com.tw>");
1572 MODULE_DESCRIPTION("W83792AD/D driver for linux-2.6");
1573 MODULE_LICENSE("GPL");
1575 module_init(sensors_w83792d_init);
1576 module_exit(sensors_w83792d_exit);