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rtl8187: add short slot handling for 8187B
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / rtl8187_dev.c
blobcd839bcb6d78d49edb144e88c85cf86bbb5f3696
1 /*
2 * Linux device driver for RTL8187
3 *
4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
6 *
7 * Based on the r8187 driver, which is:
8 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
9 *
10 * Magic delays and register offsets below are taken from the original
11 * r8187 driver sources. Thanks to Realtek for their support!
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 */
17
18 #include <linux/init.h>
19 #include <linux/usb.h>
20 #include <linux/delay.h>
21 #include <linux/etherdevice.h>
22 #include <linux/eeprom_93cx6.h>
23 #include <net/mac80211.h>
24
25 #include "rtl8187.h"
26 #include "rtl8187_rtl8225.h"
27
28 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
29 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
30 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
31 MODULE_LICENSE("GPL");
32
33 static struct usb_device_id rtl8187_table[] __devinitdata = {
34 /* Asus */
35 {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
36 /* Belkin */
37 {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
38 /* Realtek */
39 {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
40 {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
41 {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
42 {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
43 /* Netgear */
44 {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
45 {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
46 {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
47 /* HP */
48 {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
49 /* Sitecom */
50 {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
51 {}
52 };
53
54 MODULE_DEVICE_TABLE(usb, rtl8187_table);
55
56 static const struct ieee80211_rate rtl818x_rates[] = {
57 { .bitrate = 10, .hw_value = 0, },
58 { .bitrate = 20, .hw_value = 1, },
59 { .bitrate = 55, .hw_value = 2, },
60 { .bitrate = 110, .hw_value = 3, },
61 { .bitrate = 60, .hw_value = 4, },
62 { .bitrate = 90, .hw_value = 5, },
63 { .bitrate = 120, .hw_value = 6, },
64 { .bitrate = 180, .hw_value = 7, },
65 { .bitrate = 240, .hw_value = 8, },
66 { .bitrate = 360, .hw_value = 9, },
67 { .bitrate = 480, .hw_value = 10, },
68 { .bitrate = 540, .hw_value = 11, },
69 };
70
71 static const struct ieee80211_channel rtl818x_channels[] = {
72 { .center_freq = 2412 },
73 { .center_freq = 2417 },
74 { .center_freq = 2422 },
75 { .center_freq = 2427 },
76 { .center_freq = 2432 },
77 { .center_freq = 2437 },
78 { .center_freq = 2442 },
79 { .center_freq = 2447 },
80 { .center_freq = 2452 },
81 { .center_freq = 2457 },
82 { .center_freq = 2462 },
83 { .center_freq = 2467 },
84 { .center_freq = 2472 },
85 { .center_freq = 2484 },
86 };
87
88 static void rtl8187_iowrite_async_cb(struct urb *urb)
89 {
90 kfree(urb->context);
91 usb_free_urb(urb);
92 }
93
94 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
95 void *data, u16 len)
96 {
97 struct usb_ctrlrequest *dr;
98 struct urb *urb;
99 struct rtl8187_async_write_data {
100 u8 data[4];
101 struct usb_ctrlrequest dr;
102 } *buf;
103 int rc;
104
105 buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
106 if (!buf)
107 return;
108
109 urb = usb_alloc_urb(0, GFP_ATOMIC);
110 if (!urb) {
111 kfree(buf);
112 return;
113 }
114
115 dr = &buf->dr;
116
117 dr->bRequestType = RTL8187_REQT_WRITE;
118 dr->bRequest = RTL8187_REQ_SET_REG;
119 dr->wValue = addr;
120 dr->wIndex = 0;
121 dr->wLength = cpu_to_le16(len);
122
123 memcpy(buf, data, len);
124
125 usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
126 (unsigned char *)dr, buf, len,
127 rtl8187_iowrite_async_cb, buf);
128 rc = usb_submit_urb(urb, GFP_ATOMIC);
129 if (rc < 0) {
130 kfree(buf);
131 usb_free_urb(urb);
132 }
133 }
134
135 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
136 __le32 *addr, u32 val)
137 {
138 __le32 buf = cpu_to_le32(val);
139
140 rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
141 &buf, sizeof(buf));
142 }
143
144 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
145 {
146 struct rtl8187_priv *priv = dev->priv;
147
148 data <<= 8;
149 data |= addr | 0x80;
150
151 rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
152 rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
153 rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
154 rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
155
156 msleep(1);
157 }
158
159 static void rtl8187_tx_cb(struct urb *urb)
160 {
161 struct sk_buff *skb = (struct sk_buff *)urb->context;
162 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
163 struct ieee80211_hw *hw = info->driver_data[0];
164 struct rtl8187_priv *priv = hw->priv;
165
166 usb_free_urb(info->driver_data[1]);
167 skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
168 sizeof(struct rtl8187_tx_hdr));
169 memset(&info->status, 0, sizeof(info->status));
170 info->flags |= IEEE80211_TX_STAT_ACK;
171 ieee80211_tx_status_irqsafe(hw, skb);
172 }
173
174 static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
175 {
176 struct rtl8187_priv *priv = dev->priv;
177 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
178 unsigned int ep;
179 void *buf;
180 struct urb *urb;
181 __le16 rts_dur = 0;
182 u32 flags;
183 int rc;
184
185 urb = usb_alloc_urb(0, GFP_ATOMIC);
186 if (!urb) {
187 kfree_skb(skb);
188 return 0;
189 }
190
191 flags = skb->len;
192 flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
193
194 flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
195 if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
196 flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
197 if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
198 flags |= RTL818X_TX_DESC_FLAG_RTS;
199 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
200 rts_dur = ieee80211_rts_duration(dev, priv->vif,
201 skb->len, info);
202 } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
203 flags |= RTL818X_TX_DESC_FLAG_CTS;
204 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
205 }
206
207 if (!priv->is_rtl8187b) {
208 struct rtl8187_tx_hdr *hdr =
209 (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
210 hdr->flags = cpu_to_le32(flags);
211 hdr->len = 0;
212 hdr->rts_duration = rts_dur;
213 hdr->retry = cpu_to_le32(info->control.retry_limit << 8);
214 buf = hdr;
215
216 ep = 2;
217 } else {
218 /* fc needs to be calculated before skb_push() */
219 unsigned int epmap[4] = { 6, 7, 5, 4 };
220 struct ieee80211_hdr *tx_hdr =
221 (struct ieee80211_hdr *)(skb->data);
222 u16 fc = le16_to_cpu(tx_hdr->frame_control);
223
224 struct rtl8187b_tx_hdr *hdr =
225 (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
226 struct ieee80211_rate *txrate =
227 ieee80211_get_tx_rate(dev, info);
228 memset(hdr, 0, sizeof(*hdr));
229 hdr->flags = cpu_to_le32(flags);
230 hdr->rts_duration = rts_dur;
231 hdr->retry = cpu_to_le32(info->control.retry_limit << 8);
232 hdr->tx_duration =
233 ieee80211_generic_frame_duration(dev, priv->vif,
234 skb->len, txrate);
235 buf = hdr;
236
237 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
238 ep = 12;
239 else
240 ep = epmap[skb_get_queue_mapping(skb)];
241 }
242
243 info->driver_data[0] = dev;
244 info->driver_data[1] = urb;
245
246 usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
247 buf, skb->len, rtl8187_tx_cb, skb);
248 rc = usb_submit_urb(urb, GFP_ATOMIC);
249 if (rc < 0) {
250 usb_free_urb(urb);
251 kfree_skb(skb);
252 }
253
254 return 0;
255 }
256
257 static void rtl8187_rx_cb(struct urb *urb)
258 {
259 struct sk_buff *skb = (struct sk_buff *)urb->context;
260 struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
261 struct ieee80211_hw *dev = info->dev;
262 struct rtl8187_priv *priv = dev->priv;
263 struct ieee80211_rx_status rx_status = { 0 };
264 int rate, signal;
265 u32 flags;
266 u32 quality;
267
268 spin_lock(&priv->rx_queue.lock);
269 if (skb->next)
270 __skb_unlink(skb, &priv->rx_queue);
271 else {
272 spin_unlock(&priv->rx_queue.lock);
273 return;
274 }
275 spin_unlock(&priv->rx_queue.lock);
276
277 if (unlikely(urb->status)) {
278 usb_free_urb(urb);
279 dev_kfree_skb_irq(skb);
280 return;
281 }
282
283 skb_put(skb, urb->actual_length);
284 if (!priv->is_rtl8187b) {
285 struct rtl8187_rx_hdr *hdr =
286 (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
287 flags = le32_to_cpu(hdr->flags);
288 signal = hdr->signal & 0x7f;
289 rx_status.antenna = (hdr->signal >> 7) & 1;
290 rx_status.noise = hdr->noise;
291 rx_status.mactime = le64_to_cpu(hdr->mac_time);
292 priv->quality = signal;
293 rx_status.qual = priv->quality;
294 priv->noise = hdr->noise;
295 rate = (flags >> 20) & 0xF;
296 if (rate > 3) { /* OFDM rate */
297 if (signal > 90)
298 signal = 90;
299 else if (signal < 25)
300 signal = 25;
301 signal = 90 - signal;
302 } else { /* CCK rate */
303 if (signal > 95)
304 signal = 95;
305 else if (signal < 30)
306 signal = 30;
307 signal = 95 - signal;
308 }
309 rx_status.signal = signal;
310 priv->signal = signal;
311 } else {
312 struct rtl8187b_rx_hdr *hdr =
313 (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
314 /* The Realtek datasheet for the RTL8187B shows that the RX
315 * header contains the following quantities: signal quality,
316 * RSSI, AGC, the received power in dB, and the measured SNR.
317 * In testing, none of these quantities show qualitative
318 * agreement with AP signal strength, except for the AGC,
319 * which is inversely proportional to the strength of the
320 * signal. In the following, the quality and signal strength
321 * are derived from the AGC. The arbitrary scaling constants
322 * are chosen to make the results close to the values obtained
323 * for a BCM4312 using b43 as the driver. The noise is ignored
324 * for now.
325 */
326 flags = le32_to_cpu(hdr->flags);
327 quality = 170 - hdr->agc;
328 if (quality > 100)
329 quality = 100;
330 signal = 14 - hdr->agc / 2;
331 rx_status.qual = quality;
332 priv->quality = quality;
333 rx_status.signal = signal;
334 priv->signal = signal;
335 rx_status.antenna = (hdr->rssi >> 7) & 1;
336 rx_status.mactime = le64_to_cpu(hdr->mac_time);
337 rate = (flags >> 20) & 0xF;
338 }
339
340 skb_trim(skb, flags & 0x0FFF);
341 rx_status.rate_idx = rate;
342 rx_status.freq = dev->conf.channel->center_freq;
343 rx_status.band = dev->conf.channel->band;
344 rx_status.flag |= RX_FLAG_TSFT;
345 if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
346 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
347 ieee80211_rx_irqsafe(dev, skb, &rx_status);
348
349 skb = dev_alloc_skb(RTL8187_MAX_RX);
350 if (unlikely(!skb)) {
351 usb_free_urb(urb);
352 /* TODO check rx queue length and refill *somewhere* */
353 return;
354 }
355
356 info = (struct rtl8187_rx_info *)skb->cb;
357 info->urb = urb;
358 info->dev = dev;
359 urb->transfer_buffer = skb_tail_pointer(skb);
360 urb->context = skb;
361 skb_queue_tail(&priv->rx_queue, skb);
362
363 usb_submit_urb(urb, GFP_ATOMIC);
364 }
365
366 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
367 {
368 struct rtl8187_priv *priv = dev->priv;
369 struct urb *entry;
370 struct sk_buff *skb;
371 struct rtl8187_rx_info *info;
372
373 while (skb_queue_len(&priv->rx_queue) < 8) {
374 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
375 if (!skb)
376 break;
377 entry = usb_alloc_urb(0, GFP_KERNEL);
378 if (!entry) {
379 kfree_skb(skb);
380 break;
381 }
382 usb_fill_bulk_urb(entry, priv->udev,
383 usb_rcvbulkpipe(priv->udev,
384 priv->is_rtl8187b ? 3 : 1),
385 skb_tail_pointer(skb),
386 RTL8187_MAX_RX, rtl8187_rx_cb, skb);
387 info = (struct rtl8187_rx_info *)skb->cb;
388 info->urb = entry;
389 info->dev = dev;
390 skb_queue_tail(&priv->rx_queue, skb);
391 usb_submit_urb(entry, GFP_KERNEL);
392 }
393
394 return 0;
395 }
396
397 static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
398 {
399 struct rtl8187_priv *priv = dev->priv;
400 u8 reg;
401 int i;
402
403 reg = rtl818x_ioread8(priv, &priv->map->CMD);
404 reg &= (1 << 1);
405 reg |= RTL818X_CMD_RESET;
406 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
407
408 i = 10;
409 do {
410 msleep(2);
411 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
412 RTL818X_CMD_RESET))
413 break;
414 } while (--i);
415
416 if (!i) {
417 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
418 return -ETIMEDOUT;
419 }
420
421 /* reload registers from eeprom */
422 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
423
424 i = 10;
425 do {
426 msleep(4);
427 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
428 RTL818X_EEPROM_CMD_CONFIG))
429 break;
430 } while (--i);
431
432 if (!i) {
433 printk(KERN_ERR "%s: eeprom reset timeout!\n",
434 wiphy_name(dev->wiphy));
435 return -ETIMEDOUT;
436 }
437
438 return 0;
439 }
440
441 static int rtl8187_init_hw(struct ieee80211_hw *dev)
442 {
443 struct rtl8187_priv *priv = dev->priv;
444 u8 reg;
445 int res;
446
447 /* reset */
448 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
449 RTL818X_EEPROM_CMD_CONFIG);
450 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
451 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg |
452 RTL818X_CONFIG3_ANAPARAM_WRITE);
453 rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
454 RTL8187_RTL8225_ANAPARAM_ON);
455 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
456 RTL8187_RTL8225_ANAPARAM2_ON);
457 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg &
458 ~RTL818X_CONFIG3_ANAPARAM_WRITE);
459 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
460 RTL818X_EEPROM_CMD_NORMAL);
461
462 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
463
464 msleep(200);
465 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
466 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
467 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
468 msleep(200);
469
470 res = rtl8187_cmd_reset(dev);
471 if (res)
472 return res;
473
474 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
475 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
476 rtl818x_iowrite8(priv, &priv->map->CONFIG3,
477 reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
478 rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
479 RTL8187_RTL8225_ANAPARAM_ON);
480 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
481 RTL8187_RTL8225_ANAPARAM2_ON);
482 rtl818x_iowrite8(priv, &priv->map->CONFIG3,
483 reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
484 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
485
486 /* setup card */
487 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
488 rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
489
490 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
491 rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
492 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
493
494 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
495
496 rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
497 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
498 reg &= 0x3F;
499 reg |= 0x80;
500 rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
501
502 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
503
504 rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
505 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
506 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
507
508 // TODO: set RESP_RATE and BRSR properly
509 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
510 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
511
512 /* host_usb_init */
513 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
514 rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
515 reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
516 rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
517 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
518 rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
519 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
520 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
521 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
522 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
523 msleep(100);
524
525 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
526 rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
527 rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
528 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
529 RTL818X_EEPROM_CMD_CONFIG);
530 rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
531 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
532 RTL818X_EEPROM_CMD_NORMAL);
533 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
534 msleep(100);
535
536 priv->rf->init(dev);
537
538 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
539 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
540 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
541 rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
542 rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
543 rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
544 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
545
546 return 0;
547 }
548
549 static const u8 rtl8187b_reg_table[][3] = {
550 {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
551 {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
552 {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
553 {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
554
555 {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
556 {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
557 {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1},
558 {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1},
559 {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1},
560 {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
561
562 {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
563 {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
564 {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
565 {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
566 {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
567 {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
568 {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
569 {0x73, 0x9A, 2},
570
571 {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
572 {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
573 {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
574 {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
575 {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x91, 0x03, 0},
576
577 {0x4C, 0x00, 2}, {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0},
578 {0x8E, 0x08, 0}, {0x8F, 0x00, 0}
579 };
580
581 static int rtl8187b_init_hw(struct ieee80211_hw *dev)
582 {
583 struct rtl8187_priv *priv = dev->priv;
584 int res, i;
585 u8 reg;
586
587 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
588 RTL818X_EEPROM_CMD_CONFIG);
589
590 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
591 reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT;
592 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
593 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
594 RTL8187B_RTL8225_ANAPARAM2_ON);
595 rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
596 RTL8187B_RTL8225_ANAPARAM_ON);
597 rtl818x_iowrite8(priv, &priv->map->ANAPARAM3,
598 RTL8187B_RTL8225_ANAPARAM3_ON);
599
600 rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
601 reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
602 rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
603 rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
604
605 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
606 reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
607 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
608
609 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
610 RTL818X_EEPROM_CMD_NORMAL);
611
612 res = rtl8187_cmd_reset(dev);
613 if (res)
614 return res;
615
616 rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF);
617 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
618 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
619 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
620 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
621 reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT |
622 RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
623 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
624
625 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
626 reg = rtl818x_ioread8(priv, &priv->map->RATE_FALLBACK);
627 reg |= RTL818X_RATE_FALLBACK_ENABLE;
628 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, reg);
629
630 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
631 rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
632 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
633
634 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
635 RTL818X_EEPROM_CMD_CONFIG);
636 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
637 rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
638 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
639 RTL818X_EEPROM_CMD_NORMAL);
640
641 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
642 for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
643 rtl818x_iowrite8_idx(priv,
644 (u8 *)(uintptr_t)
645 (rtl8187b_reg_table[i][0] | 0xFF00),
646 rtl8187b_reg_table[i][1],
647 rtl8187b_reg_table[i][2]);
648 }
649
650 rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
651 rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
652
653 rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
654 rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
655 rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
656
657 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
658
659 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
660
661 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
662 RTL818X_EEPROM_CMD_CONFIG);
663 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
664 reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
665 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
666 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
667 RTL818X_EEPROM_CMD_NORMAL);
668
669 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
670 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
671 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
672 msleep(1100);
673
674 priv->rf->init(dev);
675
676 reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
677 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
678 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
679
680 rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
681 rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
682 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
683 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
684 rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
685 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
686 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
687
688 reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
689 rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
690 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
691 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
692 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
693 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
694 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
695 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
696 rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
697 rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
698 rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
699 rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
700 rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
701
702 rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
703
704 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
705
706 return 0;
707 }
708
709 static int rtl8187_start(struct ieee80211_hw *dev)
710 {
711 struct rtl8187_priv *priv = dev->priv;
712 u32 reg;
713 int ret;
714
715 ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
716 rtl8187b_init_hw(dev);
717 if (ret)
718 return ret;
719
720 mutex_lock(&priv->conf_mutex);
721 if (priv->is_rtl8187b) {
722 reg = RTL818X_RX_CONF_MGMT |
723 RTL818X_RX_CONF_DATA |
724 RTL818X_RX_CONF_BROADCAST |
725 RTL818X_RX_CONF_NICMAC |
726 RTL818X_RX_CONF_BSSID |
727 (7 << 13 /* RX FIFO threshold NONE */) |
728 (7 << 10 /* MAX RX DMA */) |
729 RTL818X_RX_CONF_RX_AUTORESETPHY |
730 RTL818X_RX_CONF_ONLYERLPKT |
731 RTL818X_RX_CONF_MULTICAST;
732 priv->rx_conf = reg;
733 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
734
735 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
736 RTL818X_TX_CONF_HW_SEQNUM |
737 RTL818X_TX_CONF_DISREQQSIZE |
738 (7 << 8 /* short retry limit */) |
739 (7 << 0 /* long retry limit */) |
740 (7 << 21 /* MAX TX DMA */));
741 rtl8187_init_urbs(dev);
742 mutex_unlock(&priv->conf_mutex);
743 return 0;
744 }
745
746 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
747
748 rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
749 rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
750
751 rtl8187_init_urbs(dev);
752
753 reg = RTL818X_RX_CONF_ONLYERLPKT |
754 RTL818X_RX_CONF_RX_AUTORESETPHY |
755 RTL818X_RX_CONF_BSSID |
756 RTL818X_RX_CONF_MGMT |
757 RTL818X_RX_CONF_DATA |
758 (7 << 13 /* RX FIFO threshold NONE */) |
759 (7 << 10 /* MAX RX DMA */) |
760 RTL818X_RX_CONF_BROADCAST |
761 RTL818X_RX_CONF_NICMAC;
762
763 priv->rx_conf = reg;
764 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
765
766 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
767 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
768 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
769 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
770
771 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
772 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
773 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
774 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
775 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
776
777 reg = RTL818X_TX_CONF_CW_MIN |
778 (7 << 21 /* MAX TX DMA */) |
779 RTL818X_TX_CONF_NO_ICV;
780 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
781
782 reg = rtl818x_ioread8(priv, &priv->map->CMD);
783 reg |= RTL818X_CMD_TX_ENABLE;
784 reg |= RTL818X_CMD_RX_ENABLE;
785 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
786 mutex_unlock(&priv->conf_mutex);
787
788 return 0;
789 }
790
791 static void rtl8187_stop(struct ieee80211_hw *dev)
792 {
793 struct rtl8187_priv *priv = dev->priv;
794 struct rtl8187_rx_info *info;
795 struct sk_buff *skb;
796 u32 reg;
797
798 mutex_lock(&priv->conf_mutex);
799 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
800
801 reg = rtl818x_ioread8(priv, &priv->map->CMD);
802 reg &= ~RTL818X_CMD_TX_ENABLE;
803 reg &= ~RTL818X_CMD_RX_ENABLE;
804 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
805
806 priv->rf->stop(dev);
807
808 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
809 reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
810 rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
811 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
812
813 while ((skb = skb_dequeue(&priv->rx_queue))) {
814 info = (struct rtl8187_rx_info *)skb->cb;
815 usb_kill_urb(info->urb);
816 kfree_skb(skb);
817 }
818 mutex_unlock(&priv->conf_mutex);
819 }
820
821 static int rtl8187_add_interface(struct ieee80211_hw *dev,
822 struct ieee80211_if_init_conf *conf)
823 {
824 struct rtl8187_priv *priv = dev->priv;
825 int i;
826
827 if (priv->mode != NL80211_IFTYPE_MONITOR)
828 return -EOPNOTSUPP;
829
830 switch (conf->type) {
831 case NL80211_IFTYPE_STATION:
832 priv->mode = conf->type;
833 break;
834 default:
835 return -EOPNOTSUPP;
836 }
837
838 mutex_lock(&priv->conf_mutex);
839 priv->vif = conf->vif;
840
841 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
842 for (i = 0; i < ETH_ALEN; i++)
843 rtl818x_iowrite8(priv, &priv->map->MAC[i],
844 ((u8 *)conf->mac_addr)[i]);
845 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
846
847 mutex_unlock(&priv->conf_mutex);
848 return 0;
849 }
850
851 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
852 struct ieee80211_if_init_conf *conf)
853 {
854 struct rtl8187_priv *priv = dev->priv;
855 mutex_lock(&priv->conf_mutex);
856 priv->mode = NL80211_IFTYPE_MONITOR;
857 priv->vif = NULL;
858 mutex_unlock(&priv->conf_mutex);
859 }
860
861 static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
862 {
863 struct rtl8187_priv *priv = dev->priv;
864 struct ieee80211_conf *conf = &dev->conf;
865 u32 reg;
866
867 mutex_lock(&priv->conf_mutex);
868 reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
869 /* Enable TX loopback on MAC level to avoid TX during channel
870 * changes, as this has be seen to causes problems and the
871 * card will stop work until next reset
872 */
873 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
874 reg | RTL818X_TX_CONF_LOOPBACK_MAC);
875 msleep(10);
876 priv->rf->set_chan(dev, conf);
877 msleep(10);
878 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
879
880 rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
881 rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
882 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
883 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
884 mutex_unlock(&priv->conf_mutex);
885 return 0;
886 }
887
888 static int rtl8187_config_interface(struct ieee80211_hw *dev,
889 struct ieee80211_vif *vif,
890 struct ieee80211_if_conf *conf)
891 {
892 struct rtl8187_priv *priv = dev->priv;
893 int i;
894 u8 reg;
895
896 mutex_lock(&priv->conf_mutex);
897 for (i = 0; i < ETH_ALEN; i++)
898 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
899
900 if (is_valid_ether_addr(conf->bssid)) {
901 reg = RTL818X_MSR_INFRA;
902 if (priv->is_rtl8187b)
903 reg |= RTL818X_MSR_ENEDCA;
904 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
905 } else {
906 reg = RTL818X_MSR_NO_LINK;
907 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
908 }
909
910 mutex_unlock(&priv->conf_mutex);
911 return 0;
912 }
913
914 static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
915 bool use_short_preamble)
916 {
917 if (priv->is_rtl8187b) {
918 u8 difs, eifs, slot_time;
919 u16 ack_timeout;
920
921 if (use_short_slot) {
922 slot_time = 0x9;
923 difs = 0x1c;
924 eifs = 0x53;
925 } else {
926 slot_time = 0x14;
927 difs = 0x32;
928 eifs = 0x5b;
929 }
930 rtl818x_iowrite8(priv, &priv->map->SIFS, 0xa);
931 rtl818x_iowrite8(priv, &priv->map->SLOT, slot_time);
932 rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
933
934 /*
935 * BRSR+1 on 8187B is in fact EIFS register
936 * Value in units of 4 us
937 */
938 rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
939
940 /*
941 * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
942 * register. In units of 4 us like eifs register
943 * ack_timeout = ack duration + plcp + difs + preamble
944 */
945 ack_timeout = 112 + 48 + difs;
946 if (use_short_preamble)
947 ack_timeout += 72;
948 else
949 ack_timeout += 144;
950 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
951 DIV_ROUND_UP(ack_timeout, 4));
952 } else {
953 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
954 if (use_short_slot) {
955 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
956 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
957 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
958 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73);
959 } else {
960 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
961 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
962 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
963 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5);
964 }
965 }
966 }
967
968 static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
969 struct ieee80211_vif *vif,
970 struct ieee80211_bss_conf *info,
971 u32 changed)
972 {
973 struct rtl8187_priv *priv = dev->priv;
974
975 if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
976 rtl8187_conf_erp(priv, info->use_short_slot,
977 info->use_short_preamble);
978 }
979
980 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
981 unsigned int changed_flags,
982 unsigned int *total_flags,
983 int mc_count, struct dev_addr_list *mclist)
984 {
985 struct rtl8187_priv *priv = dev->priv;
986
987 if (changed_flags & FIF_FCSFAIL)
988 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
989 if (changed_flags & FIF_CONTROL)
990 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
991 if (changed_flags & FIF_OTHER_BSS)
992 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
993 if (*total_flags & FIF_ALLMULTI || mc_count > 0)
994 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
995 else
996 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
997
998 *total_flags = 0;
999
1000 if (priv->rx_conf & RTL818X_RX_CONF_FCS)
1001 *total_flags |= FIF_FCSFAIL;
1002 if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
1003 *total_flags |= FIF_CONTROL;
1004 if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
1005 *total_flags |= FIF_OTHER_BSS;
1006 if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
1007 *total_flags |= FIF_ALLMULTI;
1008
1009 rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
1010 }
1011
1012 static const struct ieee80211_ops rtl8187_ops = {
1013 .tx = rtl8187_tx,
1014 .start = rtl8187_start,
1015 .stop = rtl8187_stop,
1016 .add_interface = rtl8187_add_interface,
1017 .remove_interface = rtl8187_remove_interface,
1018 .config = rtl8187_config,
1019 .config_interface = rtl8187_config_interface,
1020 .bss_info_changed = rtl8187_bss_info_changed,
1021 .configure_filter = rtl8187_configure_filter,
1022 };
1023
1024 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
1025 {
1026 struct ieee80211_hw *dev = eeprom->data;
1027 struct rtl8187_priv *priv = dev->priv;
1028 u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1029
1030 eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
1031 eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
1032 eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
1033 eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
1034 }
1035
1036 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
1037 {
1038 struct ieee80211_hw *dev = eeprom->data;
1039 struct rtl8187_priv *priv = dev->priv;
1040 u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
1041
1042 if (eeprom->reg_data_in)
1043 reg |= RTL818X_EEPROM_CMD_WRITE;
1044 if (eeprom->reg_data_out)
1045 reg |= RTL818X_EEPROM_CMD_READ;
1046 if (eeprom->reg_data_clock)
1047 reg |= RTL818X_EEPROM_CMD_CK;
1048 if (eeprom->reg_chip_select)
1049 reg |= RTL818X_EEPROM_CMD_CS;
1050
1051 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1052 udelay(10);
1053 }
1054
1055 static int __devinit rtl8187_probe(struct usb_interface *intf,
1056 const struct usb_device_id *id)
1057 {
1058 struct usb_device *udev = interface_to_usbdev(intf);
1059 struct ieee80211_hw *dev;
1060 struct rtl8187_priv *priv;
1061 struct eeprom_93cx6 eeprom;
1062 struct ieee80211_channel *channel;
1063 const char *chip_name;
1064 u16 txpwr, reg;
1065 int err, i;
1066
1067 dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1068 if (!dev) {
1069 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1070 return -ENOMEM;
1071 }
1072
1073 priv = dev->priv;
1074 priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1075
1076 SET_IEEE80211_DEV(dev, &intf->dev);
1077 usb_set_intfdata(intf, dev);
1078 priv->udev = udev;
1079
1080 usb_get_dev(udev);
1081
1082 skb_queue_head_init(&priv->rx_queue);
1083
1084 BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1085 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1086
1087 memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1088 memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1089 priv->map = (struct rtl818x_csr *)0xFF00;
1090
1091 priv->band.band = IEEE80211_BAND_2GHZ;
1092 priv->band.channels = priv->channels;
1093 priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1094 priv->band.bitrates = priv->rates;
1095 priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1096 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1097
1098
1099 priv->mode = NL80211_IFTYPE_MONITOR;
1100 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1101 IEEE80211_HW_RX_INCLUDES_FCS;
1102
1103 eeprom.data = dev;
1104 eeprom.register_read = rtl8187_eeprom_register_read;
1105 eeprom.register_write = rtl8187_eeprom_register_write;
1106 if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1107 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1108 else
1109 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1110
1111 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1112 udelay(10);
1113
1114 eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1115 (__le16 __force *)dev->wiphy->perm_addr, 3);
1116 if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
1117 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1118 "generated MAC address\n");
1119 random_ether_addr(dev->wiphy->perm_addr);
1120 }
1121
1122 channel = priv->channels;
1123 for (i = 0; i < 3; i++) {
1124 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1125 &txpwr);
1126 (*channel++).hw_value = txpwr & 0xFF;
1127 (*channel++).hw_value = txpwr >> 8;
1128 }
1129 for (i = 0; i < 2; i++) {
1130 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1131 &txpwr);
1132 (*channel++).hw_value = txpwr & 0xFF;
1133 (*channel++).hw_value = txpwr >> 8;
1134 }
1135
1136 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1137 &priv->txpwr_base);
1138
1139 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1140 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1141 /* 0 means asic B-cut, we should use SW 3 wire
1142 * bit-by-bit banging for radio. 1 means we can use
1143 * USB specific request to write radio registers */
1144 priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1145 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1146 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1147
1148 if (!priv->is_rtl8187b) {
1149 u32 reg32;
1150 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1151 reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1152 switch (reg32) {
1153 case RTL818X_TX_CONF_R8187vD_B:
1154 /* Some RTL8187B devices have a USB ID of 0x8187
1155 * detect them here */
1156 chip_name = "RTL8187BvB(early)";
1157 priv->is_rtl8187b = 1;
1158 priv->hw_rev = RTL8187BvB;
1159 break;
1160 case RTL818X_TX_CONF_R8187vD:
1161 chip_name = "RTL8187vD";
1162 break;
1163 default:
1164 chip_name = "RTL8187vB (default)";
1165 }
1166 } else {
1167 /*
1168 * Force USB request to write radio registers for 8187B, Realtek
1169 * only uses it in their sources
1170 */
1171 /*if (priv->asic_rev == 0) {
1172 printk(KERN_WARNING "rtl8187: Forcing use of USB "
1173 "requests to write to radio registers\n");
1174 priv->asic_rev = 1;
1175 }*/
1176 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1177 case RTL818X_R8187B_B:
1178 chip_name = "RTL8187BvB";
1179 priv->hw_rev = RTL8187BvB;
1180 break;
1181 case RTL818X_R8187B_D:
1182 chip_name = "RTL8187BvD";
1183 priv->hw_rev = RTL8187BvD;
1184 break;
1185 case RTL818X_R8187B_E:
1186 chip_name = "RTL8187BvE";
1187 priv->hw_rev = RTL8187BvE;
1188 break;
1189 default:
1190 chip_name = "RTL8187BvB (default)";
1191 priv->hw_rev = RTL8187BvB;
1192 }
1193 }
1194
1195 if (!priv->is_rtl8187b) {
1196 for (i = 0; i < 2; i++) {
1197 eeprom_93cx6_read(&eeprom,
1198 RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1199 &txpwr);
1200 (*channel++).hw_value = txpwr & 0xFF;
1201 (*channel++).hw_value = txpwr >> 8;
1202 }
1203 } else {
1204 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1205 &txpwr);
1206 (*channel++).hw_value = txpwr & 0xFF;
1207
1208 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1209 (*channel++).hw_value = txpwr & 0xFF;
1210
1211 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1212 (*channel++).hw_value = txpwr & 0xFF;
1213 (*channel++).hw_value = txpwr >> 8;
1214 }
1215
1216 if (priv->is_rtl8187b) {
1217 printk(KERN_WARNING "rtl8187: 8187B chip detected. Support "
1218 "is EXPERIMENTAL, and could damage your\n"
1219 " hardware, use at your own risk\n");
1220 dev->flags |= IEEE80211_HW_SIGNAL_DBM;
1221 } else {
1222 dev->flags |= IEEE80211_HW_SIGNAL_UNSPEC;
1223 dev->max_signal = 65;
1224 }
1225
1226 /*
1227 * XXX: Once this driver supports anything that requires
1228 * beacons it must implement IEEE80211_TX_CTL_ASSIGN_SEQ.
1229 */
1230 dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1231
1232 if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1233 printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1234 " info!\n");
1235
1236 priv->rf = rtl8187_detect_rf(dev);
1237 dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1238 sizeof(struct rtl8187_tx_hdr) :
1239 sizeof(struct rtl8187b_tx_hdr);
1240 if (!priv->is_rtl8187b)
1241 dev->queues = 1;
1242 else
1243 dev->queues = 4;
1244
1245 err = ieee80211_register_hw(dev);
1246 if (err) {
1247 printk(KERN_ERR "rtl8187: Cannot register device\n");
1248 goto err_free_dev;
1249 }
1250 mutex_init(&priv->conf_mutex);
1251
1252 printk(KERN_INFO "%s: hwaddr %pM, %s V%d + %s\n",
1253 wiphy_name(dev->wiphy), dev->wiphy->perm_addr,
1254 chip_name, priv->asic_rev, priv->rf->name);
1255
1256 return 0;
1257
1258 err_free_dev:
1259 ieee80211_free_hw(dev);
1260 usb_set_intfdata(intf, NULL);
1261 usb_put_dev(udev);
1262 return err;
1263 }
1264
1265 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
1266 {
1267 struct ieee80211_hw *dev = usb_get_intfdata(intf);
1268 struct rtl8187_priv *priv;
1269
1270 if (!dev)
1271 return;
1272
1273 ieee80211_unregister_hw(dev);
1274
1275 priv = dev->priv;
1276 usb_put_dev(interface_to_usbdev(intf));
1277 ieee80211_free_hw(dev);
1278 }
1279
1280 static struct usb_driver rtl8187_driver = {
1281 .name = KBUILD_MODNAME,
1282 .id_table = rtl8187_table,
1283 .probe = rtl8187_probe,
1284 .disconnect = __devexit_p(rtl8187_disconnect),
1285 };
1286
1287 static int __init rtl8187_init(void)
1288 {
1289 return usb_register(&rtl8187_driver);
1290 }
1291
1292 static void __exit rtl8187_exit(void)
1293 {
1294 usb_deregister(&rtl8187_driver);
1295 }
1296
1297 module_init(rtl8187_init);
1298 module_exit(rtl8187_exit);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree