2 * i2c-ocores.c: I2C bus driver for OpenCores I2C controller
3 * (http://www.opencores.org/projects.cgi/web/i2c/overview).
5 * Peter Korsgaard <jacmet@sunsite.dk>
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/errno.h>
16 #include <linux/platform_device.h>
17 #include <linux/i2c.h>
18 #include <linux/interrupt.h>
19 #include <linux/wait.h>
20 #include <linux/i2c-ocores.h>
26 wait_queue_head_t wait
;
27 struct i2c_adapter adap
;
31 int state
; /* see STATE_ */
36 #define OCI2C_PRELOW 0
37 #define OCI2C_PREHIGH 1
38 #define OCI2C_CONTROL 2
40 #define OCI2C_CMD 4 /* write only */
41 #define OCI2C_STATUS 4 /* read only, same address as OCI2C_CMD */
43 #define OCI2C_CTRL_IEN 0x40
44 #define OCI2C_CTRL_EN 0x80
46 #define OCI2C_CMD_START 0x91
47 #define OCI2C_CMD_STOP 0x41
48 #define OCI2C_CMD_READ 0x21
49 #define OCI2C_CMD_WRITE 0x11
50 #define OCI2C_CMD_READ_ACK 0x21
51 #define OCI2C_CMD_READ_NACK 0x29
52 #define OCI2C_CMD_IACK 0x01
54 #define OCI2C_STAT_IF 0x01
55 #define OCI2C_STAT_TIP 0x02
56 #define OCI2C_STAT_ARBLOST 0x20
57 #define OCI2C_STAT_BUSY 0x40
58 #define OCI2C_STAT_NACK 0x80
66 static inline void oc_setreg(struct ocores_i2c
*i2c
, int reg
, u8 value
)
68 iowrite8(value
, i2c
->base
+ reg
* i2c
->regstep
);
71 static inline u8
oc_getreg(struct ocores_i2c
*i2c
, int reg
)
73 return ioread8(i2c
->base
+ reg
* i2c
->regstep
);
76 static void ocores_process(struct ocores_i2c
*i2c
)
78 struct i2c_msg
*msg
= i2c
->msg
;
79 u8 stat
= oc_getreg(i2c
, OCI2C_STATUS
);
81 if ((i2c
->state
== STATE_DONE
) || (i2c
->state
== STATE_ERROR
)) {
82 /* stop has been sent */
83 oc_setreg(i2c
, OCI2C_CMD
, OCI2C_CMD_IACK
);
89 if (stat
& OCI2C_STAT_ARBLOST
) {
90 i2c
->state
= STATE_ERROR
;
91 oc_setreg(i2c
, OCI2C_CMD
, OCI2C_CMD_STOP
);
95 if ((i2c
->state
== STATE_START
) || (i2c
->state
== STATE_WRITE
)) {
97 (msg
->flags
& I2C_M_RD
) ? STATE_READ
: STATE_WRITE
;
99 if (stat
& OCI2C_STAT_NACK
) {
100 i2c
->state
= STATE_ERROR
;
101 oc_setreg(i2c
, OCI2C_CMD
, OCI2C_CMD_STOP
);
105 msg
->buf
[i2c
->pos
++] = oc_getreg(i2c
, OCI2C_DATA
);
108 if (i2c
->pos
== msg
->len
) {
114 if (i2c
->nmsgs
) { /* end? */
116 if (!(msg
->flags
& I2C_M_NOSTART
)) {
117 u8 addr
= (msg
->addr
<< 1);
119 if (msg
->flags
& I2C_M_RD
)
122 i2c
->state
= STATE_START
;
124 oc_setreg(i2c
, OCI2C_DATA
, addr
);
125 oc_setreg(i2c
, OCI2C_CMD
, OCI2C_CMD_START
);
128 i2c
->state
= (msg
->flags
& I2C_M_RD
)
129 ? STATE_READ
: STATE_WRITE
;
131 i2c
->state
= STATE_DONE
;
132 oc_setreg(i2c
, OCI2C_CMD
, OCI2C_CMD_STOP
);
137 if (i2c
->state
== STATE_READ
) {
138 oc_setreg(i2c
, OCI2C_CMD
, i2c
->pos
== (msg
->len
-1) ?
139 OCI2C_CMD_READ_NACK
: OCI2C_CMD_READ_ACK
);
141 oc_setreg(i2c
, OCI2C_DATA
, msg
->buf
[i2c
->pos
++]);
142 oc_setreg(i2c
, OCI2C_CMD
, OCI2C_CMD_WRITE
);
146 static irqreturn_t
ocores_isr(int irq
, void *dev_id
)
148 struct ocores_i2c
*i2c
= dev_id
;
155 static int ocores_xfer(struct i2c_adapter
*adap
, struct i2c_msg
*msgs
, int num
)
157 struct ocores_i2c
*i2c
= i2c_get_adapdata(adap
);
162 i2c
->state
= STATE_START
;
164 oc_setreg(i2c
, OCI2C_DATA
,
165 (i2c
->msg
->addr
<< 1) |
166 ((i2c
->msg
->flags
& I2C_M_RD
) ? 1:0));
168 oc_setreg(i2c
, OCI2C_CMD
, OCI2C_CMD_START
);
170 if (wait_event_timeout(i2c
->wait
, (i2c
->state
== STATE_ERROR
) ||
171 (i2c
->state
== STATE_DONE
), HZ
))
172 return (i2c
->state
== STATE_DONE
) ? num
: -EIO
;
177 static void ocores_init(struct ocores_i2c
*i2c
)
180 u8 ctrl
= oc_getreg(i2c
, OCI2C_CONTROL
);
182 /* make sure the device is disabled */
183 oc_setreg(i2c
, OCI2C_CONTROL
, ctrl
& ~(OCI2C_CTRL_EN
|OCI2C_CTRL_IEN
));
185 prescale
= (i2c
->clock_khz
/ (5*100)) - 1;
186 oc_setreg(i2c
, OCI2C_PRELOW
, prescale
& 0xff);
187 oc_setreg(i2c
, OCI2C_PREHIGH
, prescale
>> 8);
189 /* Init the device */
190 oc_setreg(i2c
, OCI2C_CMD
, OCI2C_CMD_IACK
);
191 oc_setreg(i2c
, OCI2C_CONTROL
, ctrl
| OCI2C_CTRL_IEN
| OCI2C_CTRL_EN
);
195 static u32
ocores_func(struct i2c_adapter
*adap
)
197 return I2C_FUNC_I2C
| I2C_FUNC_SMBUS_EMUL
;
200 static const struct i2c_algorithm ocores_algorithm
= {
201 .master_xfer
= ocores_xfer
,
202 .functionality
= ocores_func
,
205 static struct i2c_adapter ocores_adapter
= {
206 .owner
= THIS_MODULE
,
207 .name
= "i2c-ocores",
208 .class = I2C_CLASS_HWMON
| I2C_CLASS_SPD
,
209 .algo
= &ocores_algorithm
,
213 static int __devinit
ocores_i2c_probe(struct platform_device
*pdev
)
215 struct ocores_i2c
*i2c
;
216 struct ocores_i2c_platform_data
*pdata
;
217 struct resource
*res
, *res2
;
220 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
224 res2
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
228 pdata
= (struct ocores_i2c_platform_data
*) pdev
->dev
.platform_data
;
232 i2c
= kzalloc(sizeof(*i2c
), GFP_KERNEL
);
236 if (!request_mem_region(res
->start
, res
->end
- res
->start
+ 1,
238 dev_err(&pdev
->dev
, "Memory region busy\n");
240 goto request_mem_failed
;
243 i2c
->base
= ioremap(res
->start
, res
->end
- res
->start
+ 1);
245 dev_err(&pdev
->dev
, "Unable to map registers\n");
250 i2c
->regstep
= pdata
->regstep
;
251 i2c
->clock_khz
= pdata
->clock_khz
;
254 init_waitqueue_head(&i2c
->wait
);
255 ret
= request_irq(res2
->start
, ocores_isr
, 0, pdev
->name
, i2c
);
257 dev_err(&pdev
->dev
, "Cannot claim IRQ\n");
258 goto request_irq_failed
;
261 /* hook up driver to tree */
262 platform_set_drvdata(pdev
, i2c
);
263 i2c
->adap
= ocores_adapter
;
264 i2c_set_adapdata(&i2c
->adap
, i2c
);
265 i2c
->adap
.dev
.parent
= &pdev
->dev
;
267 /* add i2c adapter to i2c tree */
268 ret
= i2c_add_adapter(&i2c
->adap
);
270 dev_err(&pdev
->dev
, "Failed to add adapter\n");
271 goto add_adapter_failed
;
277 free_irq(res2
->start
, i2c
);
281 release_mem_region(res
->start
, res
->end
- res
->start
+ 1);
288 static int __devexit
ocores_i2c_remove(struct platform_device
* pdev
)
290 struct ocores_i2c
*i2c
= platform_get_drvdata(pdev
);
291 struct resource
*res
;
293 /* disable i2c logic */
294 oc_setreg(i2c
, OCI2C_CONTROL
, oc_getreg(i2c
, OCI2C_CONTROL
)
295 & ~(OCI2C_CTRL_EN
|OCI2C_CTRL_IEN
));
297 /* remove adapter & data */
298 i2c_del_adapter(&i2c
->adap
);
299 platform_set_drvdata(pdev
, NULL
);
301 res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
303 free_irq(res
->start
, i2c
);
307 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
309 release_mem_region(res
->start
, res
->end
- res
->start
+ 1);
317 static int ocores_i2c_suspend(struct platform_device
*pdev
, pm_message_t state
)
319 struct ocores_i2c
*i2c
= platform_get_drvdata(pdev
);
320 u8 ctrl
= oc_getreg(i2c
, OCI2C_CONTROL
);
322 /* make sure the device is disabled */
323 oc_setreg(i2c
, OCI2C_CONTROL
, ctrl
& ~(OCI2C_CTRL_EN
|OCI2C_CTRL_IEN
));
328 static int ocores_i2c_resume(struct platform_device
*pdev
)
330 struct ocores_i2c
*i2c
= platform_get_drvdata(pdev
);
337 #define ocores_i2c_suspend NULL
338 #define ocores_i2c_resume NULL
341 /* work with hotplug and coldplug */
342 MODULE_ALIAS("platform:ocores-i2c");
344 static struct platform_driver ocores_i2c_driver
= {
345 .probe
= ocores_i2c_probe
,
346 .remove
= __devexit_p(ocores_i2c_remove
),
347 .suspend
= ocores_i2c_suspend
,
348 .resume
= ocores_i2c_resume
,
350 .owner
= THIS_MODULE
,
351 .name
= "ocores-i2c",
355 static int __init
ocores_i2c_init(void)
357 return platform_driver_register(&ocores_i2c_driver
);
360 static void __exit
ocores_i2c_exit(void)
362 platform_driver_unregister(&ocores_i2c_driver
);
365 module_init(ocores_i2c_init
);
366 module_exit(ocores_i2c_exit
);
368 MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
369 MODULE_DESCRIPTION("OpenCores I2C bus driver");
370 MODULE_LICENSE("GPL");