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netxen: change firmware write size
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / netxen / netxen_nic_init.c
blob8926b0e0c8bcf811e3faf1219f4f178faf2a507a
1 /*
2 * Copyright (C) 2003 - 2009 NetXen, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
19 *
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
22 *
23 * Contact Information:
24 * info@netxen.com
25 * NetXen Inc,
26 * 18922 Forge Drive
27 * Cupertino, CA 95014-0701
28 *
29 */
30
31 #include <linux/netdevice.h>
32 #include <linux/delay.h>
33 #include "netxen_nic.h"
34 #include "netxen_nic_hw.h"
35
36 struct crb_addr_pair {
37 u32 addr;
38 u32 data;
39 };
40
41 #define NETXEN_MAX_CRB_XFORM 60
42 static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
43 #define NETXEN_ADDR_ERROR (0xffffffff)
44
45 #define crb_addr_transform(name) \
46 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
47 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
48
49 #define NETXEN_NIC_XDMA_RESET 0x8000ff
50
51 static void
52 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
53 struct nx_host_rds_ring *rds_ring);
54
55 static void crb_addr_transform_setup(void)
56 {
57 crb_addr_transform(XDMA);
58 crb_addr_transform(TIMR);
59 crb_addr_transform(SRE);
60 crb_addr_transform(SQN3);
61 crb_addr_transform(SQN2);
62 crb_addr_transform(SQN1);
63 crb_addr_transform(SQN0);
64 crb_addr_transform(SQS3);
65 crb_addr_transform(SQS2);
66 crb_addr_transform(SQS1);
67 crb_addr_transform(SQS0);
68 crb_addr_transform(RPMX7);
69 crb_addr_transform(RPMX6);
70 crb_addr_transform(RPMX5);
71 crb_addr_transform(RPMX4);
72 crb_addr_transform(RPMX3);
73 crb_addr_transform(RPMX2);
74 crb_addr_transform(RPMX1);
75 crb_addr_transform(RPMX0);
76 crb_addr_transform(ROMUSB);
77 crb_addr_transform(SN);
78 crb_addr_transform(QMN);
79 crb_addr_transform(QMS);
80 crb_addr_transform(PGNI);
81 crb_addr_transform(PGND);
82 crb_addr_transform(PGN3);
83 crb_addr_transform(PGN2);
84 crb_addr_transform(PGN1);
85 crb_addr_transform(PGN0);
86 crb_addr_transform(PGSI);
87 crb_addr_transform(PGSD);
88 crb_addr_transform(PGS3);
89 crb_addr_transform(PGS2);
90 crb_addr_transform(PGS1);
91 crb_addr_transform(PGS0);
92 crb_addr_transform(PS);
93 crb_addr_transform(PH);
94 crb_addr_transform(NIU);
95 crb_addr_transform(I2Q);
96 crb_addr_transform(EG);
97 crb_addr_transform(MN);
98 crb_addr_transform(MS);
99 crb_addr_transform(CAS2);
100 crb_addr_transform(CAS1);
101 crb_addr_transform(CAS0);
102 crb_addr_transform(CAM);
103 crb_addr_transform(C2C1);
104 crb_addr_transform(C2C0);
105 crb_addr_transform(SMB);
106 crb_addr_transform(OCM0);
107 crb_addr_transform(I2C0);
108 }
109
110 void netxen_release_rx_buffers(struct netxen_adapter *adapter)
111 {
112 struct netxen_recv_context *recv_ctx;
113 struct nx_host_rds_ring *rds_ring;
114 struct netxen_rx_buffer *rx_buf;
115 int i, ring;
116
117 recv_ctx = &adapter->recv_ctx;
118 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
119 rds_ring = &recv_ctx->rds_rings[ring];
120 for (i = 0; i < rds_ring->num_desc; ++i) {
121 rx_buf = &(rds_ring->rx_buf_arr[i]);
122 if (rx_buf->state == NETXEN_BUFFER_FREE)
123 continue;
124 pci_unmap_single(adapter->pdev,
125 rx_buf->dma,
126 rds_ring->dma_size,
127 PCI_DMA_FROMDEVICE);
128 if (rx_buf->skb != NULL)
129 dev_kfree_skb_any(rx_buf->skb);
130 }
131 }
132 }
133
134 void netxen_release_tx_buffers(struct netxen_adapter *adapter)
135 {
136 struct netxen_cmd_buffer *cmd_buf;
137 struct netxen_skb_frag *buffrag;
138 int i, j;
139 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
140
141 cmd_buf = tx_ring->cmd_buf_arr;
142 for (i = 0; i < tx_ring->num_desc; i++) {
143 buffrag = cmd_buf->frag_array;
144 if (buffrag->dma) {
145 pci_unmap_single(adapter->pdev, buffrag->dma,
146 buffrag->length, PCI_DMA_TODEVICE);
147 buffrag->dma = 0ULL;
148 }
149 for (j = 0; j < cmd_buf->frag_count; j++) {
150 buffrag++;
151 if (buffrag->dma) {
152 pci_unmap_page(adapter->pdev, buffrag->dma,
153 buffrag->length,
154 PCI_DMA_TODEVICE);
155 buffrag->dma = 0ULL;
156 }
157 }
158 if (cmd_buf->skb) {
159 dev_kfree_skb_any(cmd_buf->skb);
160 cmd_buf->skb = NULL;
161 }
162 cmd_buf++;
163 }
164 }
165
166 void netxen_free_sw_resources(struct netxen_adapter *adapter)
167 {
168 struct netxen_recv_context *recv_ctx;
169 struct nx_host_rds_ring *rds_ring;
170 struct nx_host_tx_ring *tx_ring;
171 int ring;
172
173 recv_ctx = &adapter->recv_ctx;
174
175 if (recv_ctx->rds_rings == NULL)
176 goto skip_rds;
177
178 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
179 rds_ring = &recv_ctx->rds_rings[ring];
180 vfree(rds_ring->rx_buf_arr);
181 rds_ring->rx_buf_arr = NULL;
182 }
183 kfree(recv_ctx->rds_rings);
184
185 skip_rds:
186 if (adapter->tx_ring == NULL)
187 return;
188
189 tx_ring = adapter->tx_ring;
190 vfree(tx_ring->cmd_buf_arr);
191 }
192
193 int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
194 {
195 struct netxen_recv_context *recv_ctx;
196 struct nx_host_rds_ring *rds_ring;
197 struct nx_host_sds_ring *sds_ring;
198 struct nx_host_tx_ring *tx_ring;
199 struct netxen_rx_buffer *rx_buf;
200 int ring, i, size;
201
202 struct netxen_cmd_buffer *cmd_buf_arr;
203 struct net_device *netdev = adapter->netdev;
204 struct pci_dev *pdev = adapter->pdev;
205
206 size = sizeof(struct nx_host_tx_ring);
207 tx_ring = kzalloc(size, GFP_KERNEL);
208 if (tx_ring == NULL) {
209 dev_err(&pdev->dev, "%s: failed to allocate tx ring struct\n",
210 netdev->name);
211 return -ENOMEM;
212 }
213 adapter->tx_ring = tx_ring;
214
215 tx_ring->num_desc = adapter->num_txd;
216 tx_ring->txq = netdev_get_tx_queue(netdev, 0);
217
218 cmd_buf_arr = vmalloc(TX_BUFF_RINGSIZE(tx_ring));
219 if (cmd_buf_arr == NULL) {
220 dev_err(&pdev->dev, "%s: failed to allocate cmd buffer ring\n",
221 netdev->name);
222 return -ENOMEM;
223 }
224 memset(cmd_buf_arr, 0, TX_BUFF_RINGSIZE(tx_ring));
225 tx_ring->cmd_buf_arr = cmd_buf_arr;
226
227 recv_ctx = &adapter->recv_ctx;
228
229 size = adapter->max_rds_rings * sizeof (struct nx_host_rds_ring);
230 rds_ring = kzalloc(size, GFP_KERNEL);
231 if (rds_ring == NULL) {
232 dev_err(&pdev->dev, "%s: failed to allocate rds ring struct\n",
233 netdev->name);
234 return -ENOMEM;
235 }
236 recv_ctx->rds_rings = rds_ring;
237
238 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
239 rds_ring = &recv_ctx->rds_rings[ring];
240 switch (ring) {
241 case RCV_RING_NORMAL:
242 rds_ring->num_desc = adapter->num_rxd;
243 if (adapter->ahw.cut_through) {
244 rds_ring->dma_size =
245 NX_CT_DEFAULT_RX_BUF_LEN;
246 rds_ring->skb_size =
247 NX_CT_DEFAULT_RX_BUF_LEN;
248 } else {
249 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
250 rds_ring->dma_size =
251 NX_P3_RX_BUF_MAX_LEN;
252 else
253 rds_ring->dma_size =
254 NX_P2_RX_BUF_MAX_LEN;
255 rds_ring->skb_size =
256 rds_ring->dma_size + NET_IP_ALIGN;
257 }
258 break;
259
260 case RCV_RING_JUMBO:
261 rds_ring->num_desc = adapter->num_jumbo_rxd;
262 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
263 rds_ring->dma_size =
264 NX_P3_RX_JUMBO_BUF_MAX_LEN;
265 else
266 rds_ring->dma_size =
267 NX_P2_RX_JUMBO_BUF_MAX_LEN;
268
269 if (adapter->capabilities & NX_CAP0_HW_LRO)
270 rds_ring->dma_size += NX_LRO_BUFFER_EXTRA;
271
272 rds_ring->skb_size =
273 rds_ring->dma_size + NET_IP_ALIGN;
274 break;
275
276 case RCV_RING_LRO:
277 rds_ring->num_desc = adapter->num_lro_rxd;
278 rds_ring->dma_size = NX_RX_LRO_BUFFER_LENGTH;
279 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
280 break;
281
282 }
283 rds_ring->rx_buf_arr = (struct netxen_rx_buffer *)
284 vmalloc(RCV_BUFF_RINGSIZE(rds_ring));
285 if (rds_ring->rx_buf_arr == NULL) {
286 printk(KERN_ERR "%s: Failed to allocate "
287 "rx buffer ring %d\n",
288 netdev->name, ring);
289 /* free whatever was already allocated */
290 goto err_out;
291 }
292 memset(rds_ring->rx_buf_arr, 0, RCV_BUFF_RINGSIZE(rds_ring));
293 INIT_LIST_HEAD(&rds_ring->free_list);
294 /*
295 * Now go through all of them, set reference handles
296 * and put them in the queues.
297 */
298 rx_buf = rds_ring->rx_buf_arr;
299 for (i = 0; i < rds_ring->num_desc; i++) {
300 list_add_tail(&rx_buf->list,
301 &rds_ring->free_list);
302 rx_buf->ref_handle = i;
303 rx_buf->state = NETXEN_BUFFER_FREE;
304 rx_buf++;
305 }
306 spin_lock_init(&rds_ring->lock);
307 }
308
309 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
310 sds_ring = &recv_ctx->sds_rings[ring];
311 sds_ring->irq = adapter->msix_entries[ring].vector;
312 sds_ring->adapter = adapter;
313 sds_ring->num_desc = adapter->num_rxd;
314
315 for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
316 INIT_LIST_HEAD(&sds_ring->free_list[i]);
317 }
318
319 return 0;
320
321 err_out:
322 netxen_free_sw_resources(adapter);
323 return -ENOMEM;
324 }
325
326 /*
327 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
328 * address to external PCI CRB address.
329 */
330 static u32 netxen_decode_crb_addr(u32 addr)
331 {
332 int i;
333 u32 base_addr, offset, pci_base;
334
335 crb_addr_transform_setup();
336
337 pci_base = NETXEN_ADDR_ERROR;
338 base_addr = addr & 0xfff00000;
339 offset = addr & 0x000fffff;
340
341 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
342 if (crb_addr_xform[i] == base_addr) {
343 pci_base = i << 20;
344 break;
345 }
346 }
347 if (pci_base == NETXEN_ADDR_ERROR)
348 return pci_base;
349 else
350 return (pci_base + offset);
351 }
352
353 #define NETXEN_MAX_ROM_WAIT_USEC 100
354
355 static int netxen_wait_rom_done(struct netxen_adapter *adapter)
356 {
357 long timeout = 0;
358 long done = 0;
359
360 cond_resched();
361
362 while (done == 0) {
363 done = NXRD32(adapter, NETXEN_ROMUSB_GLB_STATUS);
364 done &= 2;
365 if (++timeout >= NETXEN_MAX_ROM_WAIT_USEC) {
366 dev_err(&adapter->pdev->dev,
367 "Timeout reached waiting for rom done");
368 return -EIO;
369 }
370 udelay(1);
371 }
372 return 0;
373 }
374
375 static int do_rom_fast_read(struct netxen_adapter *adapter,
376 int addr, int *valp)
377 {
378 NXWR32(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
379 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
380 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
381 NXWR32(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
382 if (netxen_wait_rom_done(adapter)) {
383 printk("Error waiting for rom done\n");
384 return -EIO;
385 }
386 /* reset abyte_cnt and dummy_byte_cnt */
387 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
388 udelay(10);
389 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
390
391 *valp = NXRD32(adapter, NETXEN_ROMUSB_ROM_RDATA);
392 return 0;
393 }
394
395 static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
396 u8 *bytes, size_t size)
397 {
398 int addridx;
399 int ret = 0;
400
401 for (addridx = addr; addridx < (addr + size); addridx += 4) {
402 int v;
403 ret = do_rom_fast_read(adapter, addridx, &v);
404 if (ret != 0)
405 break;
406 *(__le32 *)bytes = cpu_to_le32(v);
407 bytes += 4;
408 }
409
410 return ret;
411 }
412
413 int
414 netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
415 u8 *bytes, size_t size)
416 {
417 int ret;
418
419 ret = netxen_rom_lock(adapter);
420 if (ret < 0)
421 return ret;
422
423 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
424
425 netxen_rom_unlock(adapter);
426 return ret;
427 }
428
429 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
430 {
431 int ret;
432
433 if (netxen_rom_lock(adapter) != 0)
434 return -EIO;
435
436 ret = do_rom_fast_read(adapter, addr, valp);
437 netxen_rom_unlock(adapter);
438 return ret;
439 }
440
441 #define NETXEN_BOARDTYPE 0x4008
442 #define NETXEN_BOARDNUM 0x400c
443 #define NETXEN_CHIPNUM 0x4010
444
445 int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
446 {
447 int addr, val;
448 int i, n, init_delay = 0;
449 struct crb_addr_pair *buf;
450 unsigned offset;
451 u32 off;
452
453 /* resetall */
454 netxen_rom_lock(adapter);
455 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0xffffffff);
456 netxen_rom_unlock(adapter);
457
458 if (verbose) {
459 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
460 printk("P2 ROM board type: 0x%08x\n", val);
461 else
462 printk("Could not read board type\n");
463 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
464 printk("P2 ROM board num: 0x%08x\n", val);
465 else
466 printk("Could not read board number\n");
467 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
468 printk("P2 ROM chip num: 0x%08x\n", val);
469 else
470 printk("Could not read chip number\n");
471 }
472
473 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
474 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
475 (n != 0xcafecafe) ||
476 netxen_rom_fast_read(adapter, 4, &n) != 0) {
477 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
478 "n: %08x\n", netxen_nic_driver_name, n);
479 return -EIO;
480 }
481 offset = n & 0xffffU;
482 n = (n >> 16) & 0xffffU;
483 } else {
484 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
485 !(n & 0x80000000)) {
486 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
487 "n: %08x\n", netxen_nic_driver_name, n);
488 return -EIO;
489 }
490 offset = 1;
491 n &= ~0x80000000;
492 }
493
494 if (n < 1024) {
495 if (verbose)
496 printk(KERN_DEBUG "%s: %d CRB init values found"
497 " in ROM.\n", netxen_nic_driver_name, n);
498 } else {
499 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not"
500 " initialized.\n", __func__, n);
501 return -EIO;
502 }
503
504 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
505 if (buf == NULL) {
506 printk("%s: netxen_pinit_from_rom: Unable to calloc memory.\n",
507 netxen_nic_driver_name);
508 return -ENOMEM;
509 }
510 for (i = 0; i < n; i++) {
511 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
512 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
513 kfree(buf);
514 return -EIO;
515 }
516
517 buf[i].addr = addr;
518 buf[i].data = val;
519
520 if (verbose)
521 printk(KERN_DEBUG "%s: PCI: 0x%08x == 0x%08x\n",
522 netxen_nic_driver_name,
523 (u32)netxen_decode_crb_addr(addr), val);
524 }
525 for (i = 0; i < n; i++) {
526
527 off = netxen_decode_crb_addr(buf[i].addr);
528 if (off == NETXEN_ADDR_ERROR) {
529 printk(KERN_ERR"CRB init value out of range %x\n",
530 buf[i].addr);
531 continue;
532 }
533 off += NETXEN_PCI_CRBSPACE;
534 /* skipping cold reboot MAGIC */
535 if (off == NETXEN_CAM_RAM(0x1fc))
536 continue;
537
538 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
539 /* do not reset PCI */
540 if (off == (ROMUSB_GLB + 0xbc))
541 continue;
542 if (off == (ROMUSB_GLB + 0xa8))
543 continue;
544 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
545 continue;
546 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
547 continue;
548 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
549 continue;
550 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18))
551 buf[i].data = 0x1020;
552 /* skip the function enable register */
553 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION))
554 continue;
555 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2))
556 continue;
557 if ((off & 0x0ff00000) == NETXEN_CRB_SMB)
558 continue;
559 }
560
561 if (off == NETXEN_ADDR_ERROR) {
562 printk(KERN_ERR "%s: Err: Unknown addr: 0x%08x\n",
563 netxen_nic_driver_name, buf[i].addr);
564 continue;
565 }
566
567 init_delay = 1;
568 /* After writing this register, HW needs time for CRB */
569 /* to quiet down (else crb_window returns 0xffffffff) */
570 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
571 init_delay = 1000;
572 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
573 /* hold xdma in reset also */
574 buf[i].data = NETXEN_NIC_XDMA_RESET;
575 buf[i].data = 0x8000ff;
576 }
577 }
578
579 NXWR32(adapter, off, buf[i].data);
580
581 msleep(init_delay);
582 }
583 kfree(buf);
584
585 /* disable_peg_cache_all */
586
587 /* unreset_net_cache */
588 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
589 val = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET);
590 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f));
591 }
592
593 /* p2dn replyCount */
594 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
595 /* disable_peg_cache 0 */
596 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8);
597 /* disable_peg_cache 1 */
598 NXWR32(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8);
599
600 /* peg_clr_all */
601
602 /* peg_clr 0 */
603 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0);
604 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0);
605 /* peg_clr 1 */
606 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0);
607 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0);
608 /* peg_clr 2 */
609 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0);
610 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0);
611 /* peg_clr 3 */
612 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0);
613 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0);
614 return 0;
615 }
616
617 int
618 netxen_need_fw_reset(struct netxen_adapter *adapter)
619 {
620 u32 count, old_count;
621 u32 val, version, major, minor, build;
622 int i, timeout;
623 u8 fw_type;
624
625 /* NX2031 firmware doesn't support heartbit */
626 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
627 return 1;
628
629 /* last attempt had failed */
630 if (NXRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED)
631 return 1;
632
633 old_count = count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
634
635 for (i = 0; i < 10; i++) {
636
637 timeout = msleep_interruptible(200);
638 if (timeout) {
639 NXWR32(adapter, CRB_CMDPEG_STATE,
640 PHAN_INITIALIZE_FAILED);
641 return -EINTR;
642 }
643
644 count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
645 if (count != old_count)
646 break;
647 }
648
649 /* firmware is dead */
650 if (count == old_count)
651 return 1;
652
653 /* check if we have got newer or different file firmware */
654 if (adapter->fw) {
655
656 const struct firmware *fw = adapter->fw;
657
658 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]);
659 version = NETXEN_DECODE_VERSION(val);
660
661 major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR);
662 minor = NXRD32(adapter, NETXEN_FW_VERSION_MINOR);
663 build = NXRD32(adapter, NETXEN_FW_VERSION_SUB);
664
665 if (version > NETXEN_VERSION_CODE(major, minor, build))
666 return 1;
667
668 if (version == NETXEN_VERSION_CODE(major, minor, build)) {
669
670 val = NXRD32(adapter, NETXEN_MIU_MN_CONTROL);
671 fw_type = (val & 0x4) ?
672 NX_P3_CT_ROMIMAGE : NX_P3_MN_ROMIMAGE;
673
674 if (adapter->fw_type != fw_type)
675 return 1;
676 }
677 }
678
679 return 0;
680 }
681
682 static char *fw_name[] = {
683 "nxromimg.bin", "nx3fwct.bin", "nx3fwmn.bin", "flash",
684 };
685
686 int
687 netxen_load_firmware(struct netxen_adapter *adapter)
688 {
689 u64 *ptr64;
690 u32 i, flashaddr, size;
691 const struct firmware *fw = adapter->fw;
692 struct pci_dev *pdev = adapter->pdev;
693
694 dev_info(&pdev->dev, "loading firmware from %s\n",
695 fw_name[adapter->fw_type]);
696
697 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
698 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 1);
699
700 if (fw) {
701 __le64 data;
702
703 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
704
705 ptr64 = (u64 *)&fw->data[NETXEN_BOOTLD_START];
706 flashaddr = NETXEN_BOOTLD_START;
707
708 for (i = 0; i < size; i++) {
709 data = cpu_to_le64(ptr64[i]);
710 adapter->pci_mem_write(adapter, flashaddr, &data, 8);
711 flashaddr += 8;
712 }
713
714 size = *(u32 *)&fw->data[NX_FW_SIZE_OFFSET];
715 size = (__force u32)cpu_to_le32(size) / 8;
716
717 ptr64 = (u64 *)&fw->data[NETXEN_IMAGE_START];
718 flashaddr = NETXEN_IMAGE_START;
719
720 for (i = 0; i < size; i++) {
721 data = cpu_to_le64(ptr64[i]);
722
723 if (adapter->pci_mem_write(adapter,
724 flashaddr, &data, 8))
725 return -EIO;
726
727 flashaddr += 8;
728 }
729 } else {
730 u64 data;
731 u32 hi, lo;
732
733 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
734 flashaddr = NETXEN_BOOTLD_START;
735
736 for (i = 0; i < size; i++) {
737 if (netxen_rom_fast_read(adapter,
738 flashaddr, &lo) != 0)
739 return -EIO;
740 if (netxen_rom_fast_read(adapter,
741 flashaddr + 4, &hi) != 0)
742 return -EIO;
743
744 /* hi, lo are already in host endian byteorder */
745 data = (((u64)hi << 32) | lo);
746
747 if (adapter->pci_mem_write(adapter,
748 flashaddr, &data, 8))
749 return -EIO;
750
751 flashaddr += 8;
752 }
753 }
754 msleep(1);
755
756 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
757 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d);
758 else {
759 NXWR32(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff);
760 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 0);
761 }
762
763 return 0;
764 }
765
766 static int
767 netxen_validate_firmware(struct netxen_adapter *adapter, const char *fwname)
768 {
769 __le32 val;
770 u32 ver, min_ver, bios;
771 struct pci_dev *pdev = adapter->pdev;
772 const struct firmware *fw = adapter->fw;
773
774 if (fw->size < NX_FW_MIN_SIZE)
775 return -EINVAL;
776
777 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_MAGIC_OFFSET]);
778 if ((__force u32)val != NETXEN_BDINFO_MAGIC)
779 return -EINVAL;
780
781 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]);
782
783 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
784 min_ver = NETXEN_VERSION_CODE(4, 0, 216);
785 else
786 min_ver = NETXEN_VERSION_CODE(3, 4, 216);
787
788 ver = NETXEN_DECODE_VERSION(val);
789
790 if ((_major(ver) > _NETXEN_NIC_LINUX_MAJOR) || (ver < min_ver)) {
791 dev_err(&pdev->dev,
792 "%s: firmware version %d.%d.%d unsupported\n",
793 fwname, _major(ver), _minor(ver), _build(ver));
794 return -EINVAL;
795 }
796
797 val = cpu_to_le32(*(u32 *)&fw->data[NX_BIOS_VERSION_OFFSET]);
798 netxen_rom_fast_read(adapter, NX_BIOS_VERSION_OFFSET, (int *)&bios);
799 if ((__force u32)val != bios) {
800 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
801 fwname);
802 return -EINVAL;
803 }
804
805 /* check if flashed firmware is newer */
806 if (netxen_rom_fast_read(adapter,
807 NX_FW_VERSION_OFFSET, (int *)&val))
808 return -EIO;
809 val = NETXEN_DECODE_VERSION(val);
810 if (val > ver) {
811 dev_info(&pdev->dev, "%s: firmware is older than flash\n",
812 fwname);
813 return -EINVAL;
814 }
815
816 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC);
817 return 0;
818 }
819
820 static int
821 netxen_p3_has_mn(struct netxen_adapter *adapter)
822 {
823 u32 capability, flashed_ver;
824 capability = 0;
825
826 netxen_rom_fast_read(adapter,
827 NX_FW_VERSION_OFFSET, (int *)&flashed_ver);
828 flashed_ver = NETXEN_DECODE_VERSION(flashed_ver);
829
830 if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) {
831
832 capability = NXRD32(adapter, NX_PEG_TUNE_CAPABILITY);
833 if (capability & NX_PEG_TUNE_MN_PRESENT)
834 return 1;
835 }
836 return 0;
837 }
838
839 void netxen_request_firmware(struct netxen_adapter *adapter)
840 {
841 u8 fw_type;
842 struct pci_dev *pdev = adapter->pdev;
843 int rc = 0;
844
845 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
846 fw_type = NX_P2_MN_ROMIMAGE;
847 goto request_fw;
848 }
849
850 fw_type = netxen_p3_has_mn(adapter) ?
851 NX_P3_MN_ROMIMAGE : NX_P3_CT_ROMIMAGE;
852
853 request_fw:
854 rc = request_firmware(&adapter->fw, fw_name[fw_type], &pdev->dev);
855 if (rc != 0) {
856 if (fw_type == NX_P3_MN_ROMIMAGE) {
857 msleep(1);
858 fw_type = NX_P3_CT_ROMIMAGE;
859 goto request_fw;
860 }
861
862 fw_type = NX_FLASH_ROMIMAGE;
863 adapter->fw = NULL;
864 goto done;
865 }
866
867 rc = netxen_validate_firmware(adapter, fw_name[fw_type]);
868 if (rc != 0) {
869 release_firmware(adapter->fw);
870
871 if (fw_type == NX_P3_MN_ROMIMAGE) {
872 msleep(1);
873 fw_type = NX_P3_CT_ROMIMAGE;
874 goto request_fw;
875 }
876
877 fw_type = NX_FLASH_ROMIMAGE;
878 adapter->fw = NULL;
879 goto done;
880 }
881
882 done:
883 adapter->fw_type = fw_type;
884 }
885
886
887 void
888 netxen_release_firmware(struct netxen_adapter *adapter)
889 {
890 if (adapter->fw)
891 release_firmware(adapter->fw);
892 adapter->fw = NULL;
893 }
894
895 int netxen_init_dummy_dma(struct netxen_adapter *adapter)
896 {
897 u64 addr;
898 u32 hi, lo;
899
900 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
901 return 0;
902
903 adapter->dummy_dma.addr = pci_alloc_consistent(adapter->pdev,
904 NETXEN_HOST_DUMMY_DMA_SIZE,
905 &adapter->dummy_dma.phys_addr);
906 if (adapter->dummy_dma.addr == NULL) {
907 dev_err(&adapter->pdev->dev,
908 "ERROR: Could not allocate dummy DMA memory\n");
909 return -ENOMEM;
910 }
911
912 addr = (uint64_t) adapter->dummy_dma.phys_addr;
913 hi = (addr >> 32) & 0xffffffff;
914 lo = addr & 0xffffffff;
915
916 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi);
917 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo);
918
919 return 0;
920 }
921
922 /*
923 * NetXen DMA watchdog control:
924 *
925 * Bit 0 : enabled => R/O: 1 watchdog active, 0 inactive
926 * Bit 1 : disable_request => 1 req disable dma watchdog
927 * Bit 2 : enable_request => 1 req enable dma watchdog
928 * Bit 3-31 : unused
929 */
930 void netxen_free_dummy_dma(struct netxen_adapter *adapter)
931 {
932 int i = 100;
933 u32 ctrl;
934
935 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
936 return;
937
938 if (!adapter->dummy_dma.addr)
939 return;
940
941 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL);
942 if ((ctrl & 0x1) != 0) {
943 NXWR32(adapter, NETXEN_DMA_WATCHDOG_CTRL, (ctrl | 0x2));
944
945 while ((ctrl & 0x1) != 0) {
946
947 msleep(50);
948
949 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL);
950
951 if (--i == 0)
952 break;
953 };
954 }
955
956 if (i) {
957 pci_free_consistent(adapter->pdev,
958 NETXEN_HOST_DUMMY_DMA_SIZE,
959 adapter->dummy_dma.addr,
960 adapter->dummy_dma.phys_addr);
961 adapter->dummy_dma.addr = NULL;
962 } else
963 dev_err(&adapter->pdev->dev, "dma_watchdog_shutdown failed\n");
964 }
965
966 int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
967 {
968 u32 val = 0;
969 int retries = 60;
970
971 if (pegtune_val)
972 return 0;
973
974 do {
975 val = NXRD32(adapter, CRB_CMDPEG_STATE);
976
977 switch (val) {
978 case PHAN_INITIALIZE_COMPLETE:
979 case PHAN_INITIALIZE_ACK:
980 return 0;
981 case PHAN_INITIALIZE_FAILED:
982 goto out_err;
983 default:
984 break;
985 }
986
987 msleep(500);
988
989 } while (--retries);
990
991 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED);
992
993 out_err:
994 dev_warn(&adapter->pdev->dev, "firmware init failed\n");
995 return -EIO;
996 }
997
998 static int
999 netxen_receive_peg_ready(struct netxen_adapter *adapter)
1000 {
1001 u32 val = 0;
1002 int retries = 2000;
1003
1004 do {
1005 val = NXRD32(adapter, CRB_RCVPEG_STATE);
1006
1007 if (val == PHAN_PEG_RCV_INITIALIZED)
1008 return 0;
1009
1010 msleep(10);
1011
1012 } while (--retries);
1013
1014 if (!retries) {
1015 printk(KERN_ERR "Receive Peg initialization not "
1016 "complete, state: 0x%x.\n", val);
1017 return -EIO;
1018 }
1019
1020 return 0;
1021 }
1022
1023 int netxen_init_firmware(struct netxen_adapter *adapter)
1024 {
1025 int err;
1026
1027 err = netxen_receive_peg_ready(adapter);
1028 if (err)
1029 return err;
1030
1031 NXWR32(adapter, CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT);
1032 NXWR32(adapter, CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC);
1033 NXWR32(adapter, CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE);
1034 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
1035
1036 return err;
1037 }
1038
1039 static void
1040 netxen_handle_linkevent(struct netxen_adapter *adapter, nx_fw_msg_t *msg)
1041 {
1042 u32 cable_OUI;
1043 u16 cable_len;
1044 u16 link_speed;
1045 u8 link_status, module, duplex, autoneg;
1046 struct net_device *netdev = adapter->netdev;
1047
1048 adapter->has_link_events = 1;
1049
1050 cable_OUI = msg->body[1] & 0xffffffff;
1051 cable_len = (msg->body[1] >> 32) & 0xffff;
1052 link_speed = (msg->body[1] >> 48) & 0xffff;
1053
1054 link_status = msg->body[2] & 0xff;
1055 duplex = (msg->body[2] >> 16) & 0xff;
1056 autoneg = (msg->body[2] >> 24) & 0xff;
1057
1058 module = (msg->body[2] >> 8) & 0xff;
1059 if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE) {
1060 printk(KERN_INFO "%s: unsupported cable: OUI 0x%x, length %d\n",
1061 netdev->name, cable_OUI, cable_len);
1062 } else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN) {
1063 printk(KERN_INFO "%s: unsupported cable length %d\n",
1064 netdev->name, cable_len);
1065 }
1066
1067 netxen_advert_link_change(adapter, link_status);
1068
1069 /* update link parameters */
1070 if (duplex == LINKEVENT_FULL_DUPLEX)
1071 adapter->link_duplex = DUPLEX_FULL;
1072 else
1073 adapter->link_duplex = DUPLEX_HALF;
1074 adapter->module_type = module;
1075 adapter->link_autoneg = autoneg;
1076 adapter->link_speed = link_speed;
1077 }
1078
1079 static void
1080 netxen_handle_fw_message(int desc_cnt, int index,
1081 struct nx_host_sds_ring *sds_ring)
1082 {
1083 nx_fw_msg_t msg;
1084 struct status_desc *desc;
1085 int i = 0, opcode;
1086
1087 while (desc_cnt > 0 && i < 8) {
1088 desc = &sds_ring->desc_head[index];
1089 msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
1090 msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
1091
1092 index = get_next_index(index, sds_ring->num_desc);
1093 desc_cnt--;
1094 }
1095
1096 opcode = netxen_get_nic_msg_opcode(msg.body[0]);
1097 switch (opcode) {
1098 case NX_NIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
1099 netxen_handle_linkevent(sds_ring->adapter, &msg);
1100 break;
1101 default:
1102 break;
1103 }
1104 }
1105
1106 static int
1107 netxen_alloc_rx_skb(struct netxen_adapter *adapter,
1108 struct nx_host_rds_ring *rds_ring,
1109 struct netxen_rx_buffer *buffer)
1110 {
1111 struct sk_buff *skb;
1112 dma_addr_t dma;
1113 struct pci_dev *pdev = adapter->pdev;
1114
1115 buffer->skb = dev_alloc_skb(rds_ring->skb_size);
1116 if (!buffer->skb)
1117 return 1;
1118
1119 skb = buffer->skb;
1120
1121 if (!adapter->ahw.cut_through)
1122 skb_reserve(skb, 2);
1123
1124 dma = pci_map_single(pdev, skb->data,
1125 rds_ring->dma_size, PCI_DMA_FROMDEVICE);
1126
1127 if (pci_dma_mapping_error(pdev, dma)) {
1128 dev_kfree_skb_any(skb);
1129 buffer->skb = NULL;
1130 return 1;
1131 }
1132
1133 buffer->skb = skb;
1134 buffer->dma = dma;
1135 buffer->state = NETXEN_BUFFER_BUSY;
1136
1137 return 0;
1138 }
1139
1140 static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter,
1141 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum)
1142 {
1143 struct netxen_rx_buffer *buffer;
1144 struct sk_buff *skb;
1145
1146 buffer = &rds_ring->rx_buf_arr[index];
1147
1148 pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
1149 PCI_DMA_FROMDEVICE);
1150
1151 skb = buffer->skb;
1152 if (!skb)
1153 goto no_skb;
1154
1155 if (likely(adapter->rx_csum && cksum == STATUS_CKSUM_OK)) {
1156 adapter->stats.csummed++;
1157 skb->ip_summed = CHECKSUM_UNNECESSARY;
1158 } else
1159 skb->ip_summed = CHECKSUM_NONE;
1160
1161 skb->dev = adapter->netdev;
1162
1163 buffer->skb = NULL;
1164 no_skb:
1165 buffer->state = NETXEN_BUFFER_FREE;
1166 return skb;
1167 }
1168
1169 static struct netxen_rx_buffer *
1170 netxen_process_rcv(struct netxen_adapter *adapter,
1171 struct nx_host_sds_ring *sds_ring,
1172 int ring, u64 sts_data0)
1173 {
1174 struct net_device *netdev = adapter->netdev;
1175 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
1176 struct netxen_rx_buffer *buffer;
1177 struct sk_buff *skb;
1178 struct nx_host_rds_ring *rds_ring;
1179 int index, length, cksum, pkt_offset;
1180
1181 if (unlikely(ring >= adapter->max_rds_rings))
1182 return NULL;
1183
1184 rds_ring = &recv_ctx->rds_rings[ring];
1185
1186 index = netxen_get_sts_refhandle(sts_data0);
1187 if (unlikely(index >= rds_ring->num_desc))
1188 return NULL;
1189
1190 buffer = &rds_ring->rx_buf_arr[index];
1191
1192 length = netxen_get_sts_totallength(sts_data0);
1193 cksum = netxen_get_sts_status(sts_data0);
1194 pkt_offset = netxen_get_sts_pkt_offset(sts_data0);
1195
1196 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum);
1197 if (!skb)
1198 return buffer;
1199
1200 if (length > rds_ring->skb_size)
1201 skb_put(skb, rds_ring->skb_size);
1202 else
1203 skb_put(skb, length);
1204
1205
1206 if (pkt_offset)
1207 skb_pull(skb, pkt_offset);
1208
1209 skb->truesize = skb->len + sizeof(struct sk_buff);
1210 skb->protocol = eth_type_trans(skb, netdev);
1211
1212 napi_gro_receive(&sds_ring->napi, skb);
1213
1214 adapter->stats.rx_pkts++;
1215 adapter->stats.rxbytes += length;
1216
1217 return buffer;
1218 }
1219
1220 #define TCP_HDR_SIZE 20
1221 #define TCP_TS_OPTION_SIZE 12
1222 #define TCP_TS_HDR_SIZE (TCP_HDR_SIZE + TCP_TS_OPTION_SIZE)
1223
1224 static struct netxen_rx_buffer *
1225 netxen_process_lro(struct netxen_adapter *adapter,
1226 struct nx_host_sds_ring *sds_ring,
1227 int ring, u64 sts_data0, u64 sts_data1)
1228 {
1229 struct net_device *netdev = adapter->netdev;
1230 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
1231 struct netxen_rx_buffer *buffer;
1232 struct sk_buff *skb;
1233 struct nx_host_rds_ring *rds_ring;
1234 struct iphdr *iph;
1235 struct tcphdr *th;
1236 bool push, timestamp;
1237 int l2_hdr_offset, l4_hdr_offset;
1238 int index;
1239 u16 lro_length, length, data_offset;
1240 u32 seq_number;
1241
1242 if (unlikely(ring > adapter->max_rds_rings))
1243 return NULL;
1244
1245 rds_ring = &recv_ctx->rds_rings[ring];
1246
1247 index = netxen_get_lro_sts_refhandle(sts_data0);
1248 if (unlikely(index > rds_ring->num_desc))
1249 return NULL;
1250
1251 buffer = &rds_ring->rx_buf_arr[index];
1252
1253 timestamp = netxen_get_lro_sts_timestamp(sts_data0);
1254 lro_length = netxen_get_lro_sts_length(sts_data0);
1255 l2_hdr_offset = netxen_get_lro_sts_l2_hdr_offset(sts_data0);
1256 l4_hdr_offset = netxen_get_lro_sts_l4_hdr_offset(sts_data0);
1257 push = netxen_get_lro_sts_push_flag(sts_data0);
1258 seq_number = netxen_get_lro_sts_seq_number(sts_data1);
1259
1260 skb = netxen_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK);
1261 if (!skb)
1262 return buffer;
1263
1264 if (timestamp)
1265 data_offset = l4_hdr_offset + TCP_TS_HDR_SIZE;
1266 else
1267 data_offset = l4_hdr_offset + TCP_HDR_SIZE;
1268
1269 skb_put(skb, lro_length + data_offset);
1270
1271 skb->truesize = skb->len + sizeof(struct sk_buff) + skb_headroom(skb);
1272
1273 skb_pull(skb, l2_hdr_offset);
1274 skb->protocol = eth_type_trans(skb, netdev);
1275
1276 iph = (struct iphdr *)skb->data;
1277 th = (struct tcphdr *)(skb->data + (iph->ihl << 2));
1278
1279 length = (iph->ihl << 2) + (th->doff << 2) + lro_length;
1280 iph->tot_len = htons(length);
1281 iph->check = 0;
1282 iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl);
1283 th->psh = push;
1284 th->seq = htonl(seq_number);
1285
1286 length = skb->len;
1287
1288 netif_receive_skb(skb);
1289
1290 adapter->stats.lro_pkts++;
1291 adapter->stats.rxbytes += length;
1292
1293 return buffer;
1294 }
1295
1296 #define netxen_merge_rx_buffers(list, head) \
1297 do { list_splice_tail_init(list, head); } while (0);
1298
1299 int
1300 netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max)
1301 {
1302 struct netxen_adapter *adapter = sds_ring->adapter;
1303
1304 struct list_head *cur;
1305
1306 struct status_desc *desc;
1307 struct netxen_rx_buffer *rxbuf;
1308
1309 u32 consumer = sds_ring->consumer;
1310
1311 int count = 0;
1312 u64 sts_data0, sts_data1;
1313 int opcode, ring = 0, desc_cnt;
1314
1315 while (count < max) {
1316 desc = &sds_ring->desc_head[consumer];
1317 sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
1318
1319 if (!(sts_data0 & STATUS_OWNER_HOST))
1320 break;
1321
1322 desc_cnt = netxen_get_sts_desc_cnt(sts_data0);
1323
1324 opcode = netxen_get_sts_opcode(sts_data0);
1325
1326 switch (opcode) {
1327 case NETXEN_NIC_RXPKT_DESC:
1328 case NETXEN_OLD_RXPKT_DESC:
1329 case NETXEN_NIC_SYN_OFFLOAD:
1330 ring = netxen_get_sts_type(sts_data0);
1331 rxbuf = netxen_process_rcv(adapter, sds_ring,
1332 ring, sts_data0);
1333 break;
1334 case NETXEN_NIC_LRO_DESC:
1335 ring = netxen_get_lro_sts_type(sts_data0);
1336 sts_data1 = le64_to_cpu(desc->status_desc_data[1]);
1337 rxbuf = netxen_process_lro(adapter, sds_ring,
1338 ring, sts_data0, sts_data1);
1339 break;
1340 case NETXEN_NIC_RESPONSE_DESC:
1341 netxen_handle_fw_message(desc_cnt, consumer, sds_ring);
1342 default:
1343 goto skip;
1344 }
1345
1346 WARN_ON(desc_cnt > 1);
1347
1348 if (rxbuf)
1349 list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
1350
1351 skip:
1352 for (; desc_cnt > 0; desc_cnt--) {
1353 desc = &sds_ring->desc_head[consumer];
1354 desc->status_desc_data[0] =
1355 cpu_to_le64(STATUS_OWNER_PHANTOM);
1356 consumer = get_next_index(consumer, sds_ring->num_desc);
1357 }
1358 count++;
1359 }
1360
1361 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
1362 struct nx_host_rds_ring *rds_ring =
1363 &adapter->recv_ctx.rds_rings[ring];
1364
1365 if (!list_empty(&sds_ring->free_list[ring])) {
1366 list_for_each(cur, &sds_ring->free_list[ring]) {
1367 rxbuf = list_entry(cur,
1368 struct netxen_rx_buffer, list);
1369 netxen_alloc_rx_skb(adapter, rds_ring, rxbuf);
1370 }
1371 spin_lock(&rds_ring->lock);
1372 netxen_merge_rx_buffers(&sds_ring->free_list[ring],
1373 &rds_ring->free_list);
1374 spin_unlock(&rds_ring->lock);
1375 }
1376
1377 netxen_post_rx_buffers_nodb(adapter, rds_ring);
1378 }
1379
1380 if (count) {
1381 sds_ring->consumer = consumer;
1382 NXWRIO(adapter, sds_ring->crb_sts_consumer, consumer);
1383 }
1384
1385 return count;
1386 }
1387
1388 /* Process Command status ring */
1389 int netxen_process_cmd_ring(struct netxen_adapter *adapter)
1390 {
1391 u32 sw_consumer, hw_consumer;
1392 int count = 0, i;
1393 struct netxen_cmd_buffer *buffer;
1394 struct pci_dev *pdev = adapter->pdev;
1395 struct net_device *netdev = adapter->netdev;
1396 struct netxen_skb_frag *frag;
1397 int done = 0;
1398 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
1399
1400 if (!spin_trylock(&adapter->tx_clean_lock))
1401 return 1;
1402
1403 sw_consumer = tx_ring->sw_consumer;
1404 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1405
1406 while (sw_consumer != hw_consumer) {
1407 buffer = &tx_ring->cmd_buf_arr[sw_consumer];
1408 if (buffer->skb) {
1409 frag = &buffer->frag_array[0];
1410 pci_unmap_single(pdev, frag->dma, frag->length,
1411 PCI_DMA_TODEVICE);
1412 frag->dma = 0ULL;
1413 for (i = 1; i < buffer->frag_count; i++) {
1414 frag++; /* Get the next frag */
1415 pci_unmap_page(pdev, frag->dma, frag->length,
1416 PCI_DMA_TODEVICE);
1417 frag->dma = 0ULL;
1418 }
1419
1420 adapter->stats.xmitfinished++;
1421 dev_kfree_skb_any(buffer->skb);
1422 buffer->skb = NULL;
1423 }
1424
1425 sw_consumer = get_next_index(sw_consumer, tx_ring->num_desc);
1426 if (++count >= MAX_STATUS_HANDLE)
1427 break;
1428 }
1429
1430 if (count && netif_running(netdev)) {
1431 tx_ring->sw_consumer = sw_consumer;
1432
1433 smp_mb();
1434
1435 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev)) {
1436 __netif_tx_lock(tx_ring->txq, smp_processor_id());
1437 if (netxen_tx_avail(tx_ring) > TX_STOP_THRESH)
1438 netif_wake_queue(netdev);
1439 __netif_tx_unlock(tx_ring->txq);
1440 }
1441 }
1442 /*
1443 * If everything is freed up to consumer then check if the ring is full
1444 * If the ring is full then check if more needs to be freed and
1445 * schedule the call back again.
1446 *
1447 * This happens when there are 2 CPUs. One could be freeing and the
1448 * other filling it. If the ring is full when we get out of here and
1449 * the card has already interrupted the host then the host can miss the
1450 * interrupt.
1451 *
1452 * There is still a possible race condition and the host could miss an
1453 * interrupt. The card has to take care of this.
1454 */
1455 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1456 done = (sw_consumer == hw_consumer);
1457 spin_unlock(&adapter->tx_clean_lock);
1458
1459 return (done);
1460 }
1461
1462 void
1463 netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid,
1464 struct nx_host_rds_ring *rds_ring)
1465 {
1466 struct rcv_desc *pdesc;
1467 struct netxen_rx_buffer *buffer;
1468 int producer, count = 0;
1469 netxen_ctx_msg msg = 0;
1470 struct list_head *head;
1471
1472 producer = rds_ring->producer;
1473
1474 spin_lock(&rds_ring->lock);
1475 head = &rds_ring->free_list;
1476 while (!list_empty(head)) {
1477
1478 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1479
1480 if (!buffer->skb) {
1481 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1482 break;
1483 }
1484
1485 count++;
1486 list_del(&buffer->list);
1487
1488 /* make a rcv descriptor */
1489 pdesc = &rds_ring->desc_head[producer];
1490 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1491 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1492 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1493
1494 producer = get_next_index(producer, rds_ring->num_desc);
1495 }
1496 spin_unlock(&rds_ring->lock);
1497
1498 if (count) {
1499 rds_ring->producer = producer;
1500 NXWRIO(adapter, rds_ring->crb_rcv_producer,
1501 (producer-1) & (rds_ring->num_desc-1));
1502
1503 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
1504 /*
1505 * Write a doorbell msg to tell phanmon of change in
1506 * receive ring producer
1507 * Only for firmware version < 4.0.0
1508 */
1509 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1510 netxen_set_msg_privid(msg);
1511 netxen_set_msg_count(msg,
1512 ((producer - 1) &
1513 (rds_ring->num_desc - 1)));
1514 netxen_set_msg_ctxid(msg, adapter->portnum);
1515 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1516 read_lock(&adapter->adapter_lock);
1517 writel(msg, DB_NORMALIZE(adapter,
1518 NETXEN_RCV_PRODUCER_OFFSET));
1519 read_unlock(&adapter->adapter_lock);
1520 }
1521 }
1522 }
1523
1524 static void
1525 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1526 struct nx_host_rds_ring *rds_ring)
1527 {
1528 struct rcv_desc *pdesc;
1529 struct netxen_rx_buffer *buffer;
1530 int producer, count = 0;
1531 struct list_head *head;
1532
1533 producer = rds_ring->producer;
1534 if (!spin_trylock(&rds_ring->lock))
1535 return;
1536
1537 head = &rds_ring->free_list;
1538 while (!list_empty(head)) {
1539
1540 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1541
1542 if (!buffer->skb) {
1543 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1544 break;
1545 }
1546
1547 count++;
1548 list_del(&buffer->list);
1549
1550 /* make a rcv descriptor */
1551 pdesc = &rds_ring->desc_head[producer];
1552 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1553 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1554 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1555
1556 producer = get_next_index(producer, rds_ring->num_desc);
1557 }
1558
1559 if (count) {
1560 rds_ring->producer = producer;
1561 NXWRIO(adapter, rds_ring->crb_rcv_producer,
1562 (producer - 1) & (rds_ring->num_desc - 1));
1563 }
1564 spin_unlock(&rds_ring->lock);
1565 }
1566
1567 void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1568 {
1569 memset(&adapter->stats, 0, sizeof(adapter->stats));
1570 return;
1571 }
1572
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree