4 * TLB entry wiring helpers for URB-equipped parts.
6 * Copyright (C) 2010 Matt Fleming
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
15 #include <asm/mmu_context.h>
18 * Load the entry for 'addr' into the TLB and wire the entry.
20 void tlb_wire_entry(struct vm_area_struct
*vma
, unsigned long addr
, pte_t pte
)
22 unsigned long status
, flags
;
25 local_irq_save(flags
);
27 status
= __raw_readl(MMUCR
);
28 urb
= (status
& MMUCR_URB
) >> MMUCR_URB_SHIFT
;
32 * Make sure we're not trying to wire the last TLB entry slot.
36 urb
= urb
% MMUCR_URB_NENTRIES
;
39 * Insert this entry into the highest non-wired TLB slot (via
42 status
|= (urb
<< MMUCR_URC_SHIFT
);
43 __raw_writel(status
, MMUCR
);
46 /* Load the entry into the TLB */
47 __update_tlb(vma
, addr
, pte
);
49 /* ... and wire it up. */
50 status
= __raw_readl(MMUCR
);
53 status
|= (urb
<< MMUCR_URB_SHIFT
);
55 __raw_writel(status
, MMUCR
);
58 local_irq_restore(flags
);
62 * Unwire the last wired TLB entry.
64 * It should also be noted that it is not possible to wire and unwire
65 * TLB entries in an arbitrary order. If you wire TLB entry N, followed
66 * by entry N+1, you must unwire entry N+1 first, then entry N. In this
67 * respect, it works like a stack or LIFO queue.
69 void tlb_unwire_entry(void)
71 unsigned long status
, flags
;
74 local_irq_save(flags
);
76 status
= __raw_readl(MMUCR
);
77 urb
= (status
& MMUCR_URB
) >> MMUCR_URB_SHIFT
;
81 * Make sure we're not trying to unwire a TLB entry when none
84 BUG_ON(urb
++ == MMUCR_URB_NENTRIES
);
86 urb
= urb
% MMUCR_URB_NENTRIES
;
88 status
|= (urb
<< MMUCR_URB_SHIFT
);
89 __raw_writel(status
, MMUCR
);
92 local_irq_restore(flags
);