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cfg80211: keep track of supported interface modes
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / ath9k / main.c
blob39a4a70d01305f239d66cc48e01b846a9ff79eb0
1 /*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 /* mac80211 and PCI callbacks */
18
19 #include <linux/nl80211.h>
20 #include "core.h"
21
22 #define ATH_PCI_VERSION "0.1"
23
24 #define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
25
26 static char *dev_info = "ath9k";
27
28 MODULE_AUTHOR("Atheros Communications");
29 MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
30 MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
31 MODULE_LICENSE("Dual BSD/GPL");
32
33 static struct pci_device_id ath_pci_id_table[] __devinitdata = {
34 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
35 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
36 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
38 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
39 { 0 }
40 };
41
42 static int ath_get_channel(struct ath_softc *sc,
43 struct ieee80211_channel *chan)
44 {
45 int i;
46
47 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
48 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
49 return i;
50 }
51
52 return -1;
53 }
54
55 static u32 ath_get_extchanmode(struct ath_softc *sc,
56 struct ieee80211_channel *chan)
57 {
58 u32 chanmode = 0;
59 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
60 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
61
62 switch (chan->band) {
63 case IEEE80211_BAND_2GHZ:
64 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
65 (tx_chan_width == ATH9K_HT_MACMODE_20))
66 chanmode = CHANNEL_G_HT20;
67 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
68 (tx_chan_width == ATH9K_HT_MACMODE_2040))
69 chanmode = CHANNEL_G_HT40PLUS;
70 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
71 (tx_chan_width == ATH9K_HT_MACMODE_2040))
72 chanmode = CHANNEL_G_HT40MINUS;
73 break;
74 case IEEE80211_BAND_5GHZ:
75 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
76 (tx_chan_width == ATH9K_HT_MACMODE_20))
77 chanmode = CHANNEL_A_HT20;
78 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
79 (tx_chan_width == ATH9K_HT_MACMODE_2040))
80 chanmode = CHANNEL_A_HT40PLUS;
81 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
82 (tx_chan_width == ATH9K_HT_MACMODE_2040))
83 chanmode = CHANNEL_A_HT40MINUS;
84 break;
85 default:
86 break;
87 }
88
89 return chanmode;
90 }
91
92
93 static int ath_setkey_tkip(struct ath_softc *sc,
94 struct ieee80211_key_conf *key,
95 struct ath9k_keyval *hk,
96 const u8 *addr)
97 {
98 u8 *key_rxmic = NULL;
99 u8 *key_txmic = NULL;
100
101 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
102 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
103
104 if (addr == NULL) {
105 /* Group key installation */
106 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
107 return ath_keyset(sc, key->keyidx, hk, addr);
108 }
109 if (!sc->sc_splitmic) {
110 /*
111 * data key goes at first index,
112 * the hal handles the MIC keys at index+64.
113 */
114 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
115 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
116 return ath_keyset(sc, key->keyidx, hk, addr);
117 }
118 /*
119 * TX key goes at first index, RX key at +32.
120 * The hal handles the MIC keys at index+64.
121 */
122 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
123 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
124 /* Txmic entry failed. No need to proceed further */
125 DPRINTF(sc, ATH_DBG_KEYCACHE,
126 "%s Setting TX MIC Key Failed\n", __func__);
127 return 0;
128 }
129
130 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
131 /* XXX delete tx key on failure? */
132 return ath_keyset(sc, key->keyidx+32, hk, addr);
133 }
134
135 static int ath_key_config(struct ath_softc *sc,
136 const u8 *addr,
137 struct ieee80211_key_conf *key)
138 {
139 struct ieee80211_vif *vif;
140 struct ath9k_keyval hk;
141 const u8 *mac = NULL;
142 int ret = 0;
143 enum ieee80211_if_types opmode;
144
145 memset(&hk, 0, sizeof(hk));
146
147 switch (key->alg) {
148 case ALG_WEP:
149 hk.kv_type = ATH9K_CIPHER_WEP;
150 break;
151 case ALG_TKIP:
152 hk.kv_type = ATH9K_CIPHER_TKIP;
153 break;
154 case ALG_CCMP:
155 hk.kv_type = ATH9K_CIPHER_AES_CCM;
156 break;
157 default:
158 return -EINVAL;
159 }
160
161 hk.kv_len = key->keylen;
162 memcpy(hk.kv_val, key->key, key->keylen);
163
164 if (!sc->sc_vaps[0])
165 return -EIO;
166
167 vif = sc->sc_vaps[0]->av_if_data;
168 opmode = vif->type;
169
170 /*
171 * Strategy:
172 * For _M_STA mc tx, we will not setup a key at all since we never
173 * tx mc.
174 * _M_STA mc rx, we will use the keyID.
175 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
176 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
177 * peer node. BUT we will plumb a cleartext key so that we can do
178 * perSta default key table lookup in software.
179 */
180 if (is_broadcast_ether_addr(addr)) {
181 switch (opmode) {
182 case IEEE80211_IF_TYPE_STA:
183 /* default key: could be group WPA key
184 * or could be static WEP key */
185 mac = NULL;
186 break;
187 case IEEE80211_IF_TYPE_IBSS:
188 break;
189 case IEEE80211_IF_TYPE_AP:
190 break;
191 default:
192 ASSERT(0);
193 break;
194 }
195 } else {
196 mac = addr;
197 }
198
199 if (key->alg == ALG_TKIP)
200 ret = ath_setkey_tkip(sc, key, &hk, mac);
201 else
202 ret = ath_keyset(sc, key->keyidx, &hk, mac);
203
204 if (!ret)
205 return -EIO;
206
207 sc->sc_keytype = hk.kv_type;
208 return 0;
209 }
210
211 static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
212 {
213 int freeslot;
214
215 freeslot = (key->keyidx >= 4) ? 1 : 0;
216 ath_key_reset(sc, key->keyidx, freeslot);
217 }
218
219 static void setup_ht_cap(struct ieee80211_ht_info *ht_info)
220 {
221 #define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
222 #define ATH9K_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
223
224 ht_info->ht_supported = 1;
225 ht_info->cap = (u16)IEEE80211_HT_CAP_SUP_WIDTH
226 |(u16)IEEE80211_HT_CAP_MIMO_PS
227 |(u16)IEEE80211_HT_CAP_SGI_40
228 |(u16)IEEE80211_HT_CAP_DSSSCCK40;
229
230 ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
231 ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
232 /* setup supported mcs set */
233 memset(ht_info->supp_mcs_set, 0, 16);
234 ht_info->supp_mcs_set[0] = 0xff;
235 ht_info->supp_mcs_set[1] = 0xff;
236 ht_info->supp_mcs_set[12] = IEEE80211_HT_CAP_MCS_TX_DEFINED;
237 }
238
239 static int ath_rate2idx(struct ath_softc *sc, int rate)
240 {
241 int i = 0, cur_band, n_rates;
242 struct ieee80211_hw *hw = sc->hw;
243
244 cur_band = hw->conf.channel->band;
245 n_rates = sc->sbands[cur_band].n_bitrates;
246
247 for (i = 0; i < n_rates; i++) {
248 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
249 break;
250 }
251
252 /*
253 * NB:mac80211 validates rx rate index against the supported legacy rate
254 * index only (should be done against ht rates also), return the highest
255 * legacy rate index for rx rate which does not match any one of the
256 * supported basic and extended rates to make mac80211 happy.
257 * The following hack will be cleaned up once the issue with
258 * the rx rate index validation in mac80211 is fixed.
259 */
260 if (i == n_rates)
261 return n_rates - 1;
262 return i;
263 }
264
265 static void ath9k_rx_prepare(struct ath_softc *sc,
266 struct sk_buff *skb,
267 struct ath_recv_status *status,
268 struct ieee80211_rx_status *rx_status)
269 {
270 struct ieee80211_hw *hw = sc->hw;
271 struct ieee80211_channel *curchan = hw->conf.channel;
272
273 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
274
275 rx_status->mactime = status->tsf;
276 rx_status->band = curchan->band;
277 rx_status->freq = curchan->center_freq;
278 rx_status->noise = ATH_DEFAULT_NOISE_FLOOR;
279 rx_status->signal = rx_status->noise + status->rssi;
280 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
281 rx_status->antenna = status->antenna;
282 rx_status->qual = status->rssi * 100 / 64;
283
284 if (status->flags & ATH_RX_MIC_ERROR)
285 rx_status->flag |= RX_FLAG_MMIC_ERROR;
286 if (status->flags & ATH_RX_FCS_ERROR)
287 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
288
289 rx_status->flag |= RX_FLAG_TSFT;
290 }
291
292 static u8 parse_mpdudensity(u8 mpdudensity)
293 {
294 /*
295 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
296 * 0 for no restriction
297 * 1 for 1/4 us
298 * 2 for 1/2 us
299 * 3 for 1 us
300 * 4 for 2 us
301 * 5 for 4 us
302 * 6 for 8 us
303 * 7 for 16 us
304 */
305 switch (mpdudensity) {
306 case 0:
307 return 0;
308 case 1:
309 case 2:
310 case 3:
311 /* Our lower layer calculations limit our precision to
312 1 microsecond */
313 return 1;
314 case 4:
315 return 2;
316 case 5:
317 return 4;
318 case 6:
319 return 8;
320 case 7:
321 return 16;
322 default:
323 return 0;
324 }
325 }
326
327 static int ath9k_start(struct ieee80211_hw *hw)
328 {
329 struct ath_softc *sc = hw->priv;
330 struct ieee80211_channel *curchan = hw->conf.channel;
331 int error = 0, pos;
332
333 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
334 "initial channel: %d MHz\n", __func__, curchan->center_freq);
335
336 /* setup initial channel */
337
338 pos = ath_get_channel(sc, curchan);
339 if (pos == -1) {
340 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
341 return -EINVAL;
342 }
343
344 sc->sc_ah->ah_channels[pos].chanmode =
345 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
346
347 /* open ath_dev */
348 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
349 if (error) {
350 DPRINTF(sc, ATH_DBG_FATAL,
351 "%s: Unable to complete ath_open\n", __func__);
352 return error;
353 }
354
355 ieee80211_wake_queues(hw);
356 return 0;
357 }
358
359 static int ath9k_tx(struct ieee80211_hw *hw,
360 struct sk_buff *skb)
361 {
362 struct ath_softc *sc = hw->priv;
363 int hdrlen, padsize;
364 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
365
366 /*
367 * As a temporary workaround, assign seq# here; this will likely need
368 * to be cleaned up to work better with Beacon transmission and virtual
369 * BSSes.
370 */
371 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
372 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
373 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
374 sc->seq_no += 0x10;
375 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
376 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
377 }
378
379 /* Add the padding after the header if this is not already done */
380 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
381 if (hdrlen & 3) {
382 padsize = hdrlen % 4;
383 if (skb_headroom(skb) < padsize)
384 return -1;
385 skb_push(skb, padsize);
386 memmove(skb->data, skb->data + padsize, hdrlen);
387 }
388
389 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
390 __func__,
391 skb);
392
393 if (ath_tx_start(sc, skb) != 0) {
394 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
395 dev_kfree_skb_any(skb);
396 /* FIXME: Check for proper return value from ATH_DEV */
397 return 0;
398 }
399
400 return 0;
401 }
402
403 static void ath9k_stop(struct ieee80211_hw *hw)
404 {
405 struct ath_softc *sc = hw->priv;
406 int error;
407
408 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
409
410 error = ath_suspend(sc);
411 if (error)
412 DPRINTF(sc, ATH_DBG_CONFIG,
413 "%s: Device is no longer present\n", __func__);
414
415 ieee80211_stop_queues(hw);
416 }
417
418 static int ath9k_add_interface(struct ieee80211_hw *hw,
419 struct ieee80211_if_init_conf *conf)
420 {
421 struct ath_softc *sc = hw->priv;
422 int error, ic_opmode = 0;
423
424 /* Support only vap for now */
425
426 if (sc->sc_nvaps)
427 return -ENOBUFS;
428
429 switch (conf->type) {
430 case IEEE80211_IF_TYPE_STA:
431 ic_opmode = ATH9K_M_STA;
432 break;
433 case IEEE80211_IF_TYPE_IBSS:
434 ic_opmode = ATH9K_M_IBSS;
435 break;
436 case IEEE80211_IF_TYPE_AP:
437 ic_opmode = ATH9K_M_HOSTAP;
438 break;
439 default:
440 DPRINTF(sc, ATH_DBG_FATAL,
441 "%s: Interface type %d not yet supported\n",
442 __func__, conf->type);
443 return -EOPNOTSUPP;
444 }
445
446 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
447 __func__,
448 ic_opmode);
449
450 error = ath_vap_attach(sc, 0, conf->vif, ic_opmode);
451 if (error) {
452 DPRINTF(sc, ATH_DBG_FATAL,
453 "%s: Unable to attach vap, error: %d\n",
454 __func__, error);
455 return error;
456 }
457
458 return 0;
459 }
460
461 static void ath9k_remove_interface(struct ieee80211_hw *hw,
462 struct ieee80211_if_init_conf *conf)
463 {
464 struct ath_softc *sc = hw->priv;
465 struct ath_vap *avp;
466 int error;
467
468 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
469
470 avp = sc->sc_vaps[0];
471 if (avp == NULL) {
472 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
473 __func__);
474 return;
475 }
476
477 #ifdef CONFIG_SLOW_ANT_DIV
478 ath_slow_ant_div_stop(&sc->sc_antdiv);
479 #endif
480
481 /* Update ratectrl */
482 ath_rate_newstate(sc, avp);
483
484 /* Reclaim beacon resources */
485 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
486 sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
487 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
488 ath_beacon_return(sc, avp);
489 }
490
491 /* Set interrupt mask */
492 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
493 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask & ~ATH9K_INT_GLOBAL);
494 sc->sc_flags &= ~SC_OP_BEACONS;
495
496 error = ath_vap_detach(sc, 0);
497 if (error)
498 DPRINTF(sc, ATH_DBG_FATAL,
499 "%s: Unable to detach vap, error: %d\n",
500 __func__, error);
501 }
502
503 static int ath9k_config(struct ieee80211_hw *hw,
504 struct ieee80211_conf *conf)
505 {
506 struct ath_softc *sc = hw->priv;
507 struct ieee80211_channel *curchan = hw->conf.channel;
508 int pos;
509
510 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
511 __func__,
512 curchan->center_freq);
513
514 pos = ath_get_channel(sc, curchan);
515 if (pos == -1) {
516 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
517 return -EINVAL;
518 }
519
520 sc->sc_ah->ah_channels[pos].chanmode =
521 (curchan->band == IEEE80211_BAND_2GHZ) ?
522 CHANNEL_G : CHANNEL_A;
523
524 if (sc->sc_curaid && hw->conf.ht_conf.ht_supported)
525 sc->sc_ah->ah_channels[pos].chanmode =
526 ath_get_extchanmode(sc, curchan);
527
528 sc->sc_config.txpowlimit = 2 * conf->power_level;
529
530 /* set h/w channel */
531 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
532 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
533 __func__);
534
535 return 0;
536 }
537
538 static int ath9k_config_interface(struct ieee80211_hw *hw,
539 struct ieee80211_vif *vif,
540 struct ieee80211_if_conf *conf)
541 {
542 struct ath_softc *sc = hw->priv;
543 struct ath_hal *ah = sc->sc_ah;
544 struct ath_vap *avp;
545 u32 rfilt = 0;
546 int error, i;
547 DECLARE_MAC_BUF(mac);
548
549 avp = sc->sc_vaps[0];
550 if (avp == NULL) {
551 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
552 __func__);
553 return -EINVAL;
554 }
555
556 /* TODO: Need to decide which hw opmode to use for multi-interface
557 * cases */
558 if (vif->type == IEEE80211_IF_TYPE_AP &&
559 ah->ah_opmode != ATH9K_M_HOSTAP) {
560 ah->ah_opmode = ATH9K_M_HOSTAP;
561 ath9k_hw_setopmode(ah);
562 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
563 /* Request full reset to get hw opmode changed properly */
564 sc->sc_flags |= SC_OP_FULL_RESET;
565 }
566
567 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
568 !is_zero_ether_addr(conf->bssid)) {
569 switch (vif->type) {
570 case IEEE80211_IF_TYPE_STA:
571 case IEEE80211_IF_TYPE_IBSS:
572 /* Update ratectrl about the new state */
573 ath_rate_newstate(sc, avp);
574
575 /* Set BSSID */
576 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
577 sc->sc_curaid = 0;
578 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
579 sc->sc_curaid);
580
581 /* Set aggregation protection mode parameters */
582 sc->sc_config.ath_aggr_prot = 0;
583
584 /*
585 * Reset our TSF so that its value is lower than the
586 * beacon that we are trying to catch.
587 * Only then hw will update its TSF register with the
588 * new beacon. Reset the TSF before setting the BSSID
589 * to avoid allowing in any frames that would update
590 * our TSF only to have us clear it
591 * immediately thereafter.
592 */
593 ath9k_hw_reset_tsf(sc->sc_ah);
594
595 /* Disable BMISS interrupt when we're not associated */
596 ath9k_hw_set_interrupts(sc->sc_ah,
597 sc->sc_imask &
598 ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
599 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
600
601 DPRINTF(sc, ATH_DBG_CONFIG,
602 "%s: RX filter 0x%x bssid %s aid 0x%x\n",
603 __func__, rfilt,
604 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
605
606 /* need to reconfigure the beacon */
607 sc->sc_flags &= ~SC_OP_BEACONS ;
608
609 break;
610 default:
611 break;
612 }
613 }
614
615 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
616 ((vif->type == IEEE80211_IF_TYPE_IBSS) ||
617 (vif->type == IEEE80211_IF_TYPE_AP))) {
618 /*
619 * Allocate and setup the beacon frame.
620 *
621 * Stop any previous beacon DMA. This may be
622 * necessary, for example, when an ibss merge
623 * causes reconfiguration; we may be called
624 * with beacon transmission active.
625 */
626 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
627
628 error = ath_beacon_alloc(sc, 0);
629 if (error != 0)
630 return error;
631
632 ath_beacon_sync(sc, 0);
633 }
634
635 /* Check for WLAN_CAPABILITY_PRIVACY ? */
636 if ((avp->av_opmode != IEEE80211_IF_TYPE_STA)) {
637 for (i = 0; i < IEEE80211_WEP_NKID; i++)
638 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
639 ath9k_hw_keysetmac(sc->sc_ah,
640 (u16)i,
641 sc->sc_curbssid);
642 }
643
644 /* Only legacy IBSS for now */
645 if (vif->type == IEEE80211_IF_TYPE_IBSS)
646 ath_update_chainmask(sc, 0);
647
648 return 0;
649 }
650
651 #define SUPPORTED_FILTERS \
652 (FIF_PROMISC_IN_BSS | \
653 FIF_ALLMULTI | \
654 FIF_CONTROL | \
655 FIF_OTHER_BSS | \
656 FIF_BCN_PRBRESP_PROMISC | \
657 FIF_FCSFAIL)
658
659 /* FIXME: sc->sc_full_reset ? */
660 static void ath9k_configure_filter(struct ieee80211_hw *hw,
661 unsigned int changed_flags,
662 unsigned int *total_flags,
663 int mc_count,
664 struct dev_mc_list *mclist)
665 {
666 struct ath_softc *sc = hw->priv;
667 u32 rfilt;
668
669 changed_flags &= SUPPORTED_FILTERS;
670 *total_flags &= SUPPORTED_FILTERS;
671
672 sc->rx_filter = *total_flags;
673 rfilt = ath_calcrxfilter(sc);
674 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
675
676 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
677 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
678 ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
679 }
680
681 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
682 __func__, sc->rx_filter);
683 }
684
685 static void ath9k_sta_notify(struct ieee80211_hw *hw,
686 struct ieee80211_vif *vif,
687 enum sta_notify_cmd cmd,
688 const u8 *addr)
689 {
690 struct ath_softc *sc = hw->priv;
691 struct ath_node *an;
692 unsigned long flags;
693 DECLARE_MAC_BUF(mac);
694
695 spin_lock_irqsave(&sc->node_lock, flags);
696 an = ath_node_find(sc, (u8 *) addr);
697 spin_unlock_irqrestore(&sc->node_lock, flags);
698
699 switch (cmd) {
700 case STA_NOTIFY_ADD:
701 spin_lock_irqsave(&sc->node_lock, flags);
702 if (!an) {
703 ath_node_attach(sc, (u8 *)addr, 0);
704 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a node: %s\n",
705 __func__,
706 print_mac(mac, addr));
707 } else {
708 ath_node_get(sc, (u8 *)addr);
709 }
710 spin_unlock_irqrestore(&sc->node_lock, flags);
711 break;
712 case STA_NOTIFY_REMOVE:
713 if (!an)
714 DPRINTF(sc, ATH_DBG_FATAL,
715 "%s: Removal of a non-existent node\n",
716 __func__);
717 else {
718 ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
719 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Put a node: %s\n",
720 __func__,
721 print_mac(mac, addr));
722 }
723 break;
724 default:
725 break;
726 }
727 }
728
729 static int ath9k_conf_tx(struct ieee80211_hw *hw,
730 u16 queue,
731 const struct ieee80211_tx_queue_params *params)
732 {
733 struct ath_softc *sc = hw->priv;
734 struct ath9k_tx_queue_info qi;
735 int ret = 0, qnum;
736
737 if (queue >= WME_NUM_AC)
738 return 0;
739
740 qi.tqi_aifs = params->aifs;
741 qi.tqi_cwmin = params->cw_min;
742 qi.tqi_cwmax = params->cw_max;
743 qi.tqi_burstTime = params->txop;
744 qnum = ath_get_hal_qnum(queue, sc);
745
746 DPRINTF(sc, ATH_DBG_CONFIG,
747 "%s: Configure tx [queue/halq] [%d/%d], "
748 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
749 __func__,
750 queue,
751 qnum,
752 params->aifs,
753 params->cw_min,
754 params->cw_max,
755 params->txop);
756
757 ret = ath_txq_update(sc, qnum, &qi);
758 if (ret)
759 DPRINTF(sc, ATH_DBG_FATAL,
760 "%s: TXQ Update failed\n", __func__);
761
762 return ret;
763 }
764
765 static int ath9k_set_key(struct ieee80211_hw *hw,
766 enum set_key_cmd cmd,
767 const u8 *local_addr,
768 const u8 *addr,
769 struct ieee80211_key_conf *key)
770 {
771 struct ath_softc *sc = hw->priv;
772 int ret = 0;
773
774 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
775
776 switch (cmd) {
777 case SET_KEY:
778 ret = ath_key_config(sc, addr, key);
779 if (!ret) {
780 set_bit(key->keyidx, sc->sc_keymap);
781 key->hw_key_idx = key->keyidx;
782 /* push IV and Michael MIC generation to stack */
783 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
784 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
785 }
786 break;
787 case DISABLE_KEY:
788 ath_key_delete(sc, key);
789 clear_bit(key->keyidx, sc->sc_keymap);
790 sc->sc_keytype = ATH9K_CIPHER_CLR;
791 break;
792 default:
793 ret = -EINVAL;
794 }
795
796 return ret;
797 }
798
799 static void ath9k_ht_conf(struct ath_softc *sc,
800 struct ieee80211_bss_conf *bss_conf)
801 {
802 #define IEEE80211_HT_CAP_40MHZ_INTOLERANT BIT(14)
803 struct ath_ht_info *ht_info = &sc->sc_ht_info;
804
805 if (bss_conf->assoc_ht) {
806 ht_info->ext_chan_offset =
807 bss_conf->ht_bss_conf->bss_cap &
808 IEEE80211_HT_IE_CHA_SEC_OFFSET;
809
810 if (!(bss_conf->ht_conf->cap &
811 IEEE80211_HT_CAP_40MHZ_INTOLERANT) &&
812 (bss_conf->ht_bss_conf->bss_cap &
813 IEEE80211_HT_IE_CHA_WIDTH))
814 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
815 else
816 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
817
818 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
819 ht_info->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
820 bss_conf->ht_conf->ampdu_factor);
821 ht_info->mpdudensity =
822 parse_mpdudensity(bss_conf->ht_conf->ampdu_density);
823
824 }
825
826 #undef IEEE80211_HT_CAP_40MHZ_INTOLERANT
827 }
828
829 static void ath9k_bss_assoc_info(struct ath_softc *sc,
830 struct ieee80211_bss_conf *bss_conf)
831 {
832 struct ieee80211_hw *hw = sc->hw;
833 struct ieee80211_channel *curchan = hw->conf.channel;
834 struct ath_vap *avp;
835 int pos;
836 DECLARE_MAC_BUF(mac);
837
838 if (bss_conf->assoc) {
839 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
840 __func__,
841 bss_conf->aid);
842
843 avp = sc->sc_vaps[0];
844 if (avp == NULL) {
845 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
846 __func__);
847 return;
848 }
849
850 /* New association, store aid */
851 if (avp->av_opmode == ATH9K_M_STA) {
852 sc->sc_curaid = bss_conf->aid;
853 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
854 sc->sc_curaid);
855 }
856
857 /* Configure the beacon */
858 ath_beacon_config(sc, 0);
859 sc->sc_flags |= SC_OP_BEACONS;
860
861 /* Reset rssi stats */
862 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
863 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
864 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
865 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
866
867 /* Update chainmask */
868 ath_update_chainmask(sc, bss_conf->assoc_ht);
869
870 DPRINTF(sc, ATH_DBG_CONFIG,
871 "%s: bssid %s aid 0x%x\n",
872 __func__,
873 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
874
875 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
876 __func__,
877 curchan->center_freq);
878
879 pos = ath_get_channel(sc, curchan);
880 if (pos == -1) {
881 DPRINTF(sc, ATH_DBG_FATAL,
882 "%s: Invalid channel\n", __func__);
883 return;
884 }
885
886 if (hw->conf.ht_conf.ht_supported)
887 sc->sc_ah->ah_channels[pos].chanmode =
888 ath_get_extchanmode(sc, curchan);
889 else
890 sc->sc_ah->ah_channels[pos].chanmode =
891 (curchan->band == IEEE80211_BAND_2GHZ) ?
892 CHANNEL_G : CHANNEL_A;
893
894 /* set h/w channel */
895 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
896 DPRINTF(sc, ATH_DBG_FATAL,
897 "%s: Unable to set channel\n",
898 __func__);
899
900 ath_rate_newstate(sc, avp);
901 /* Update ratectrl about the new state */
902 ath_rc_node_update(hw, avp->rc_node);
903 } else {
904 DPRINTF(sc, ATH_DBG_CONFIG,
905 "%s: Bss Info DISSOC\n", __func__);
906 sc->sc_curaid = 0;
907 }
908 }
909
910 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
911 struct ieee80211_vif *vif,
912 struct ieee80211_bss_conf *bss_conf,
913 u32 changed)
914 {
915 struct ath_softc *sc = hw->priv;
916
917 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
918 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
919 __func__,
920 bss_conf->use_short_preamble);
921 if (bss_conf->use_short_preamble)
922 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
923 else
924 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
925 }
926
927 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
928 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
929 __func__,
930 bss_conf->use_cts_prot);
931 if (bss_conf->use_cts_prot &&
932 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
933 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
934 else
935 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
936 }
937
938 if (changed & BSS_CHANGED_HT) {
939 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT %d\n",
940 __func__,
941 bss_conf->assoc_ht);
942 ath9k_ht_conf(sc, bss_conf);
943 }
944
945 if (changed & BSS_CHANGED_ASSOC) {
946 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
947 __func__,
948 bss_conf->assoc);
949 ath9k_bss_assoc_info(sc, bss_conf);
950 }
951 }
952
953 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
954 {
955 u64 tsf;
956 struct ath_softc *sc = hw->priv;
957 struct ath_hal *ah = sc->sc_ah;
958
959 tsf = ath9k_hw_gettsf64(ah);
960
961 return tsf;
962 }
963
964 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
965 {
966 struct ath_softc *sc = hw->priv;
967 struct ath_hal *ah = sc->sc_ah;
968
969 ath9k_hw_reset_tsf(ah);
970 }
971
972 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
973 enum ieee80211_ampdu_mlme_action action,
974 const u8 *addr,
975 u16 tid,
976 u16 *ssn)
977 {
978 struct ath_softc *sc = hw->priv;
979 int ret = 0;
980
981 switch (action) {
982 case IEEE80211_AMPDU_RX_START:
983 ret = ath_rx_aggr_start(sc, addr, tid, ssn);
984 if (ret < 0)
985 DPRINTF(sc, ATH_DBG_FATAL,
986 "%s: Unable to start RX aggregation\n",
987 __func__);
988 break;
989 case IEEE80211_AMPDU_RX_STOP:
990 ret = ath_rx_aggr_stop(sc, addr, tid);
991 if (ret < 0)
992 DPRINTF(sc, ATH_DBG_FATAL,
993 "%s: Unable to stop RX aggregation\n",
994 __func__);
995 break;
996 case IEEE80211_AMPDU_TX_START:
997 ret = ath_tx_aggr_start(sc, addr, tid, ssn);
998 if (ret < 0)
999 DPRINTF(sc, ATH_DBG_FATAL,
1000 "%s: Unable to start TX aggregation\n",
1001 __func__);
1002 else
1003 ieee80211_start_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
1004 break;
1005 case IEEE80211_AMPDU_TX_STOP:
1006 ret = ath_tx_aggr_stop(sc, addr, tid);
1007 if (ret < 0)
1008 DPRINTF(sc, ATH_DBG_FATAL,
1009 "%s: Unable to stop TX aggregation\n",
1010 __func__);
1011
1012 ieee80211_stop_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
1013 break;
1014 default:
1015 DPRINTF(sc, ATH_DBG_FATAL,
1016 "%s: Unknown AMPDU action\n", __func__);
1017 }
1018
1019 return ret;
1020 }
1021
1022 static struct ieee80211_ops ath9k_ops = {
1023 .tx = ath9k_tx,
1024 .start = ath9k_start,
1025 .stop = ath9k_stop,
1026 .add_interface = ath9k_add_interface,
1027 .remove_interface = ath9k_remove_interface,
1028 .config = ath9k_config,
1029 .config_interface = ath9k_config_interface,
1030 .configure_filter = ath9k_configure_filter,
1031 .get_stats = NULL,
1032 .sta_notify = ath9k_sta_notify,
1033 .conf_tx = ath9k_conf_tx,
1034 .get_tx_stats = NULL,
1035 .bss_info_changed = ath9k_bss_info_changed,
1036 .set_tim = NULL,
1037 .set_key = ath9k_set_key,
1038 .hw_scan = NULL,
1039 .get_tkip_seq = NULL,
1040 .set_rts_threshold = NULL,
1041 .set_frag_threshold = NULL,
1042 .set_retry_limit = NULL,
1043 .get_tsf = ath9k_get_tsf,
1044 .reset_tsf = ath9k_reset_tsf,
1045 .tx_last_beacon = NULL,
1046 .ampdu_action = ath9k_ampdu_action
1047 };
1048
1049 void ath_get_beaconconfig(struct ath_softc *sc,
1050 int if_id,
1051 struct ath_beacon_config *conf)
1052 {
1053 struct ieee80211_hw *hw = sc->hw;
1054
1055 /* fill in beacon config data */
1056
1057 conf->beacon_interval = hw->conf.beacon_int;
1058 conf->listen_interval = 100;
1059 conf->dtim_count = 1;
1060 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
1061 }
1062
1063 void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
1064 struct ath_xmit_status *tx_status, struct ath_node *an)
1065 {
1066 struct ieee80211_hw *hw = sc->hw;
1067 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1068
1069 DPRINTF(sc, ATH_DBG_XMIT,
1070 "%s: TX complete: skb: %p\n", __func__, skb);
1071
1072 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
1073 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
1074 /* free driver's private data area of tx_info */
1075 if (tx_info->driver_data[0] != NULL)
1076 kfree(tx_info->driver_data[0]);
1077 tx_info->driver_data[0] = NULL;
1078 }
1079
1080 if (tx_status->flags & ATH_TX_BAR) {
1081 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
1082 tx_status->flags &= ~ATH_TX_BAR;
1083 }
1084
1085 if (tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY)) {
1086 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) {
1087 /* Frame was not ACKed, but an ACK was expected */
1088 tx_info->status.excessive_retries = 1;
1089 }
1090 } else {
1091 /* Frame was ACKed */
1092 tx_info->flags |= IEEE80211_TX_STAT_ACK;
1093 }
1094
1095 tx_info->status.retry_count = tx_status->retries;
1096
1097 ieee80211_tx_status(hw, skb);
1098 if (an)
1099 ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
1100 }
1101
1102 int _ath_rx_indicate(struct ath_softc *sc,
1103 struct sk_buff *skb,
1104 struct ath_recv_status *status,
1105 u16 keyix)
1106 {
1107 struct ieee80211_hw *hw = sc->hw;
1108 struct ath_node *an = NULL;
1109 struct ieee80211_rx_status rx_status;
1110 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1111 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1112 int padsize;
1113 enum ATH_RX_TYPE st;
1114
1115 /* see if any padding is done by the hw and remove it */
1116 if (hdrlen & 3) {
1117 padsize = hdrlen % 4;
1118 memmove(skb->data + padsize, skb->data, hdrlen);
1119 skb_pull(skb, padsize);
1120 }
1121
1122 /* Prepare rx status */
1123 ath9k_rx_prepare(sc, skb, status, &rx_status);
1124
1125 if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
1126 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
1127 rx_status.flag |= RX_FLAG_DECRYPTED;
1128 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
1129 && !(status->flags & ATH_RX_DECRYPT_ERROR)
1130 && skb->len >= hdrlen + 4) {
1131 keyix = skb->data[hdrlen + 3] >> 6;
1132
1133 if (test_bit(keyix, sc->sc_keymap))
1134 rx_status.flag |= RX_FLAG_DECRYPTED;
1135 }
1136
1137 spin_lock_bh(&sc->node_lock);
1138 an = ath_node_find(sc, hdr->addr2);
1139 spin_unlock_bh(&sc->node_lock);
1140
1141 if (an) {
1142 ath_rx_input(sc, an,
1143 hw->conf.ht_conf.ht_supported,
1144 skb, status, &st);
1145 }
1146 if (!an || (st != ATH_RX_CONSUMED))
1147 __ieee80211_rx(hw, skb, &rx_status);
1148
1149 return 0;
1150 }
1151
1152 int ath_rx_subframe(struct ath_node *an,
1153 struct sk_buff *skb,
1154 struct ath_recv_status *status)
1155 {
1156 struct ath_softc *sc = an->an_sc;
1157 struct ieee80211_hw *hw = sc->hw;
1158 struct ieee80211_rx_status rx_status;
1159
1160 /* Prepare rx status */
1161 ath9k_rx_prepare(sc, skb, status, &rx_status);
1162 if (!(status->flags & ATH_RX_DECRYPT_ERROR))
1163 rx_status.flag |= RX_FLAG_DECRYPTED;
1164
1165 __ieee80211_rx(hw, skb, &rx_status);
1166
1167 return 0;
1168 }
1169
1170 /********************************/
1171 /* LED functions */
1172 /********************************/
1173
1174 static void ath_led_brightness(struct led_classdev *led_cdev,
1175 enum led_brightness brightness)
1176 {
1177 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
1178 struct ath_softc *sc = led->sc;
1179
1180 switch (brightness) {
1181 case LED_OFF:
1182 if (led->led_type == ATH_LED_ASSOC ||
1183 led->led_type == ATH_LED_RADIO)
1184 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
1185 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
1186 (led->led_type == ATH_LED_RADIO) ? 1 :
1187 !!(sc->sc_flags & SC_OP_LED_ASSOCIATED));
1188 break;
1189 case LED_FULL:
1190 if (led->led_type == ATH_LED_ASSOC)
1191 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
1192 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
1193 break;
1194 default:
1195 break;
1196 }
1197 }
1198
1199 static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
1200 char *trigger)
1201 {
1202 int ret;
1203
1204 led->sc = sc;
1205 led->led_cdev.name = led->name;
1206 led->led_cdev.default_trigger = trigger;
1207 led->led_cdev.brightness_set = ath_led_brightness;
1208
1209 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
1210 if (ret)
1211 DPRINTF(sc, ATH_DBG_FATAL,
1212 "Failed to register led:%s", led->name);
1213 else
1214 led->registered = 1;
1215 return ret;
1216 }
1217
1218 static void ath_unregister_led(struct ath_led *led)
1219 {
1220 if (led->registered) {
1221 led_classdev_unregister(&led->led_cdev);
1222 led->registered = 0;
1223 }
1224 }
1225
1226 static void ath_deinit_leds(struct ath_softc *sc)
1227 {
1228 ath_unregister_led(&sc->assoc_led);
1229 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
1230 ath_unregister_led(&sc->tx_led);
1231 ath_unregister_led(&sc->rx_led);
1232 ath_unregister_led(&sc->radio_led);
1233 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1234 }
1235
1236 static void ath_init_leds(struct ath_softc *sc)
1237 {
1238 char *trigger;
1239 int ret;
1240
1241 /* Configure gpio 1 for output */
1242 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1243 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1244 /* LED off, active low */
1245 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1246
1247 trigger = ieee80211_get_radio_led_name(sc->hw);
1248 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
1249 "ath9k-%s:radio", wiphy_name(sc->hw->wiphy));
1250 ret = ath_register_led(sc, &sc->radio_led, trigger);
1251 sc->radio_led.led_type = ATH_LED_RADIO;
1252 if (ret)
1253 goto fail;
1254
1255 trigger = ieee80211_get_assoc_led_name(sc->hw);
1256 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
1257 "ath9k-%s:assoc", wiphy_name(sc->hw->wiphy));
1258 ret = ath_register_led(sc, &sc->assoc_led, trigger);
1259 sc->assoc_led.led_type = ATH_LED_ASSOC;
1260 if (ret)
1261 goto fail;
1262
1263 trigger = ieee80211_get_tx_led_name(sc->hw);
1264 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
1265 "ath9k-%s:tx", wiphy_name(sc->hw->wiphy));
1266 ret = ath_register_led(sc, &sc->tx_led, trigger);
1267 sc->tx_led.led_type = ATH_LED_TX;
1268 if (ret)
1269 goto fail;
1270
1271 trigger = ieee80211_get_rx_led_name(sc->hw);
1272 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
1273 "ath9k-%s:rx", wiphy_name(sc->hw->wiphy));
1274 ret = ath_register_led(sc, &sc->rx_led, trigger);
1275 sc->rx_led.led_type = ATH_LED_RX;
1276 if (ret)
1277 goto fail;
1278
1279 return;
1280
1281 fail:
1282 ath_deinit_leds(sc);
1283 }
1284
1285 static int ath_detach(struct ath_softc *sc)
1286 {
1287 struct ieee80211_hw *hw = sc->hw;
1288
1289 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
1290
1291 /* Deinit LED control */
1292 ath_deinit_leds(sc);
1293
1294 /* Unregister hw */
1295
1296 ieee80211_unregister_hw(hw);
1297
1298 /* unregister Rate control */
1299 ath_rate_control_unregister();
1300
1301 /* tx/rx cleanup */
1302
1303 ath_rx_cleanup(sc);
1304 ath_tx_cleanup(sc);
1305
1306 /* Deinit */
1307
1308 ath_deinit(sc);
1309
1310 return 0;
1311 }
1312
1313 static int ath_attach(u16 devid,
1314 struct ath_softc *sc)
1315 {
1316 struct ieee80211_hw *hw = sc->hw;
1317 int error = 0;
1318
1319 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
1320
1321 error = ath_init(devid, sc);
1322 if (error != 0)
1323 return error;
1324
1325 /* Init nodes */
1326
1327 INIT_LIST_HEAD(&sc->node_list);
1328 spin_lock_init(&sc->node_lock);
1329
1330 /* get mac address from hardware and set in mac80211 */
1331
1332 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
1333
1334 /* setup channels and rates */
1335
1336 sc->sbands[IEEE80211_BAND_2GHZ].channels =
1337 sc->channels[IEEE80211_BAND_2GHZ];
1338 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
1339 sc->rates[IEEE80211_BAND_2GHZ];
1340 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
1341
1342 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
1343 /* Setup HT capabilities for 2.4Ghz*/
1344 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_info);
1345
1346 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1347 &sc->sbands[IEEE80211_BAND_2GHZ];
1348
1349 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes)) {
1350 sc->sbands[IEEE80211_BAND_5GHZ].channels =
1351 sc->channels[IEEE80211_BAND_5GHZ];
1352 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
1353 sc->rates[IEEE80211_BAND_5GHZ];
1354 sc->sbands[IEEE80211_BAND_5GHZ].band =
1355 IEEE80211_BAND_5GHZ;
1356
1357 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
1358 /* Setup HT capabilities for 5Ghz*/
1359 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_info);
1360
1361 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1362 &sc->sbands[IEEE80211_BAND_5GHZ];
1363 }
1364
1365 /* FIXME: Have to figure out proper hw init values later */
1366
1367 hw->queues = 4;
1368 hw->ampdu_queues = 1;
1369
1370 /* Register rate control */
1371 hw->rate_control_algorithm = "ath9k_rate_control";
1372 error = ath_rate_control_register();
1373 if (error != 0) {
1374 DPRINTF(sc, ATH_DBG_FATAL,
1375 "%s: Unable to register rate control "
1376 "algorithm:%d\n", __func__, error);
1377 ath_rate_control_unregister();
1378 goto bad;
1379 }
1380
1381 error = ieee80211_register_hw(hw);
1382 if (error != 0) {
1383 ath_rate_control_unregister();
1384 goto bad;
1385 }
1386
1387 /* Initialize LED control */
1388 ath_init_leds(sc);
1389
1390 /* initialize tx/rx engine */
1391
1392 error = ath_tx_init(sc, ATH_TXBUF);
1393 if (error != 0)
1394 goto detach;
1395
1396 error = ath_rx_init(sc, ATH_RXBUF);
1397 if (error != 0)
1398 goto detach;
1399
1400 return 0;
1401 detach:
1402 ath_detach(sc);
1403 bad:
1404 return error;
1405 }
1406
1407 static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1408 {
1409 void __iomem *mem;
1410 struct ath_softc *sc;
1411 struct ieee80211_hw *hw;
1412 const char *athname;
1413 u8 csz;
1414 u32 val;
1415 int ret = 0;
1416
1417 if (pci_enable_device(pdev))
1418 return -EIO;
1419
1420 /* XXX 32-bit addressing only */
1421 if (pci_set_dma_mask(pdev, 0xffffffff)) {
1422 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1423 ret = -ENODEV;
1424 goto bad;
1425 }
1426
1427 /*
1428 * Cache line size is used to size and align various
1429 * structures used to communicate with the hardware.
1430 */
1431 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1432 if (csz == 0) {
1433 /*
1434 * Linux 2.4.18 (at least) writes the cache line size
1435 * register as a 16-bit wide register which is wrong.
1436 * We must have this setup properly for rx buffer
1437 * DMA to work so force a reasonable value here if it
1438 * comes up zero.
1439 */
1440 csz = L1_CACHE_BYTES / sizeof(u32);
1441 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1442 }
1443 /*
1444 * The default setting of latency timer yields poor results,
1445 * set it to the value used by other systems. It may be worth
1446 * tweaking this setting more.
1447 */
1448 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1449
1450 pci_set_master(pdev);
1451
1452 /*
1453 * Disable the RETRY_TIMEOUT register (0x41) to keep
1454 * PCI Tx retries from interfering with C3 CPU state.
1455 */
1456 pci_read_config_dword(pdev, 0x40, &val);
1457 if ((val & 0x0000ff00) != 0)
1458 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1459
1460 ret = pci_request_region(pdev, 0, "ath9k");
1461 if (ret) {
1462 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1463 ret = -ENODEV;
1464 goto bad;
1465 }
1466
1467 mem = pci_iomap(pdev, 0, 0);
1468 if (!mem) {
1469 printk(KERN_ERR "PCI memory map error\n") ;
1470 ret = -EIO;
1471 goto bad1;
1472 }
1473
1474 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1475 if (hw == NULL) {
1476 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1477 goto bad2;
1478 }
1479
1480 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
1481 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1482 IEEE80211_HW_SIGNAL_DBM |
1483 IEEE80211_HW_NOISE_DBM;
1484
1485 hw->wiphy->interface_modes =
1486 BIT(NL80211_IFTYPE_AP) |
1487 BIT(NL80211_IFTYPE_STATION) |
1488 BIT(NL80211_IFTYPE_ADHOC);
1489
1490 SET_IEEE80211_DEV(hw, &pdev->dev);
1491 pci_set_drvdata(pdev, hw);
1492
1493 sc = hw->priv;
1494 sc->hw = hw;
1495 sc->pdev = pdev;
1496 sc->mem = mem;
1497
1498 if (ath_attach(id->device, sc) != 0) {
1499 ret = -ENODEV;
1500 goto bad3;
1501 }
1502
1503 /* setup interrupt service routine */
1504
1505 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1506 printk(KERN_ERR "%s: request_irq failed\n",
1507 wiphy_name(hw->wiphy));
1508 ret = -EIO;
1509 goto bad4;
1510 }
1511
1512 athname = ath9k_hw_probe(id->vendor, id->device);
1513
1514 printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1515 wiphy_name(hw->wiphy),
1516 athname ? athname : "Atheros ???",
1517 (unsigned long)mem, pdev->irq);
1518
1519 return 0;
1520 bad4:
1521 ath_detach(sc);
1522 bad3:
1523 ieee80211_free_hw(hw);
1524 bad2:
1525 pci_iounmap(pdev, mem);
1526 bad1:
1527 pci_release_region(pdev, 0);
1528 bad:
1529 pci_disable_device(pdev);
1530 return ret;
1531 }
1532
1533 static void ath_pci_remove(struct pci_dev *pdev)
1534 {
1535 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1536 struct ath_softc *sc = hw->priv;
1537
1538 if (pdev->irq)
1539 free_irq(pdev->irq, sc);
1540 ath_detach(sc);
1541 pci_iounmap(pdev, sc->mem);
1542 pci_release_region(pdev, 0);
1543 pci_disable_device(pdev);
1544 ieee80211_free_hw(hw);
1545 }
1546
1547 #ifdef CONFIG_PM
1548
1549 static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1550 {
1551 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1552 struct ath_softc *sc = hw->priv;
1553
1554 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1555 pci_save_state(pdev);
1556 pci_disable_device(pdev);
1557 pci_set_power_state(pdev, 3);
1558
1559 return 0;
1560 }
1561
1562 static int ath_pci_resume(struct pci_dev *pdev)
1563 {
1564 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1565 struct ath_softc *sc = hw->priv;
1566 u32 val;
1567 int err;
1568
1569 err = pci_enable_device(pdev);
1570 if (err)
1571 return err;
1572 pci_restore_state(pdev);
1573 /*
1574 * Suspend/Resume resets the PCI configuration space, so we have to
1575 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1576 * PCI Tx retries from interfering with C3 CPU state
1577 */
1578 pci_read_config_dword(pdev, 0x40, &val);
1579 if ((val & 0x0000ff00) != 0)
1580 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1581
1582 /* Enable LED */
1583 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1584 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1585 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1586
1587 return 0;
1588 }
1589
1590 #endif /* CONFIG_PM */
1591
1592 MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1593
1594 static struct pci_driver ath_pci_driver = {
1595 .name = "ath9k",
1596 .id_table = ath_pci_id_table,
1597 .probe = ath_pci_probe,
1598 .remove = ath_pci_remove,
1599 #ifdef CONFIG_PM
1600 .suspend = ath_pci_suspend,
1601 .resume = ath_pci_resume,
1602 #endif /* CONFIG_PM */
1603 };
1604
1605 static int __init init_ath_pci(void)
1606 {
1607 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1608
1609 if (pci_register_driver(&ath_pci_driver) < 0) {
1610 printk(KERN_ERR
1611 "ath_pci: No devices found, driver not installed.\n");
1612 pci_unregister_driver(&ath_pci_driver);
1613 return -ENODEV;
1614 }
1615
1616 return 0;
1617 }
1618 module_init(init_ath_pci);
1619
1620 static void __exit exit_ath_pci(void)
1621 {
1622 pci_unregister_driver(&ath_pci_driver);
1623 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1624 }
1625 module_exit(exit_ath_pci);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree