arch/i386/pci/irq.c

   1 /*
   2  *      Low-Level PCI Support for PC -- Routing of Interrupts
   3  *
   4  *      (c) 1999--2000 Martin Mares <mj@ucw.cz>
   5  */
   6
   7 #include <linux/types.h>
   8 #include <linux/kernel.h>
   9 #include <linux/pci.h>
  10 #include <linux/init.h>
  11 #include <linux/slab.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/dmi.h>
  14 #include <asm/io.h>
  15 #include <asm/smp.h>
  16 #include <asm/io_apic.h>
  17 #include <linux/irq.h>
  18 #include <linux/acpi.h>
  19
  20 #include "pci.h"
  21
  22 #define PIRQ_SIGNATURE  (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
  23 #define PIRQ_VERSION 0x0100
  24
  25 static int broken_hp_bios_irq9;
  26 static int acer_tm360_irqrouting;
  27
  28 static struct irq_routing_table *pirq_table;
  29
  30 static int pirq_enable_irq(struct pci_dev *dev);
  31
  32 /*
  33  * Never use: 0, 1, 2 (timer, keyboard, and cascade)
  34  * Avoid using: 13, 14 and 15 (FP error and IDE).
  35  * Penalize: 3, 4, 6, 7, 12 (known ISA uses: serial, floppy, parallel and mouse)
  36  */
  37 unsigned int pcibios_irq_mask = 0xfff8;
  38
  39 static int pirq_penalty[16] = {
  40         1000000, 1000000, 1000000, 1000, 1000, 0, 1000, 1000,
  41         0, 0, 0, 0, 1000, 100000, 100000, 100000
  42 };
  43
  44 struct irq_router {
  45         char *name;
  46         u16 vendor, device;
  47         int (*get)(struct pci_dev *router, struct pci_dev *dev, int pirq);
  48         int (*set)(struct pci_dev *router, struct pci_dev *dev, int pirq, int new);
  49 };
  50
  51 struct irq_router_handler {
  52         u16 vendor;
  53         int (*probe)(struct irq_router *r, struct pci_dev *router, u16 device);
  54 };
  55
  56 int (*pcibios_enable_irq)(struct pci_dev *dev) = NULL;
  57 void (*pcibios_disable_irq)(struct pci_dev *dev) = NULL;
  58
  59 /*
  60  *  Check passed address for the PCI IRQ Routing Table signature
  61  *  and perform checksum verification.
  62  */
  63
  64 static inline struct irq_routing_table * pirq_check_routing_table(u8 *addr)
  65 {
  66         struct irq_routing_table *rt;
  67         int i;
  68         u8 sum;
  69
  70         rt = (struct irq_routing_table *) addr;
  71         if (rt->signature != PIRQ_SIGNATURE ||
  72             rt->version != PIRQ_VERSION ||
  73             rt->size % 16 ||
  74             rt->size < sizeof(struct irq_routing_table))
  75                 return NULL;
  76         sum = 0;
  77         for (i=0; i < rt->size; i++)
  78                 sum += addr[i];
  79         if (!sum) {
  80                 DBG(KERN_DEBUG "PCI: Interrupt Routing Table found at 0x%p\n", rt);
  81                 return rt;
  82         }
  83         return NULL;
  84 }
  85
  86
  87
  88 /*
  89  *  Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
  90  */
  91
  92 static struct irq_routing_table * __init pirq_find_routing_table(void)
  93 {
  94         u8 *addr;
  95         struct irq_routing_table *rt;
  96
  97         if (pirq_table_addr) {
  98                 rt = pirq_check_routing_table((u8 *) __va(pirq_table_addr));
  99                 if (rt)
 100                         return rt;
 101                 printk(KERN_WARNING "PCI: PIRQ table NOT found at pirqaddr\n");
 102         }
 103         for(addr = (u8 *) __va(0xf0000); addr < (u8 *) __va(0x100000); addr += 16) {
 104                 rt = pirq_check_routing_table(addr);
 105                 if (rt)
 106                         return rt;
 107         }
 108         return NULL;
 109 }
 110
 111 /*
 112  *  If we have a IRQ routing table, use it to search for peer host
 113  *  bridges.  It's a gross hack, but since there are no other known
 114  *  ways how to get a list of buses, we have to go this way.
 115  */
 116
 117 static void __init pirq_peer_trick(void)
 118 {
 119         struct irq_routing_table *rt = pirq_table;
 120         u8 busmap[256];
 121         int i;
 122         struct irq_info *e;
 123
 124         memset(busmap, 0, sizeof(busmap));
 125         for(i=0; i < (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info); i++) {
 126                 e = &rt->slots[i];
 127 #ifdef DEBUG
 128                 {
 129                         int j;
 130                         DBG(KERN_DEBUG "%02x:%02x slot=%02x", e->bus, e->devfn/8, e->slot);
 131                         for(j=0; j<4; j++)
 132                                 DBG(" %d:%02x/%04x", j, e->irq[j].link, e->irq[j].bitmap);
 133                         DBG("\n");
 134                 }
 135 #endif
 136                 busmap[e->bus] = 1;
 137         }
 138         for(i = 1; i < 256; i++) {
 139                 if (!busmap[i] || pci_find_bus(0, i))
 140                         continue;
 141                 if (pci_scan_bus(i, &pci_root_ops, NULL))
 142                         printk(KERN_INFO "PCI: Discovered primary peer bus %02x [IRQ]\n", i);
 143         }
 144         pcibios_last_bus = -1;
 145 }
 146
 147 /*
 148  *  Code for querying and setting of IRQ routes on various interrupt routers.
 149  */
 150
 151 void eisa_set_level_irq(unsigned int irq)
 152 {
 153         unsigned char mask = 1 << (irq & 7);
 154         unsigned int port = 0x4d0 + (irq >> 3);
 155         unsigned char val;
 156         static u16 eisa_irq_mask;
 157
 158         if (irq >= 16 || (1 << irq) & eisa_irq_mask)
 159                 return;
 160
 161         eisa_irq_mask |= (1 << irq);
 162         printk(KERN_DEBUG "PCI: setting IRQ %u as level-triggered\n", irq);
 163         val = inb(port);
 164         if (!(val & mask)) {
 165                 DBG(KERN_DEBUG " -> edge");
 166                 outb(val | mask, port);
 167         }
 168 }
 169
 170 /*
 171  * Common IRQ routing practice: nybbles in config space,
 172  * offset by some magic constant.
 173  */
 174 static unsigned int read_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr)
 175 {
 176         u8 x;
 177         unsigned reg = offset + (nr >> 1);
 178
 179         pci_read_config_byte(router, reg, &x);
 180         return (nr & 1) ? (x >> 4) : (x & 0xf);
 181 }
 182
 183 static void write_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr, unsigned int val)
 184 {
 185         u8 x;
 186         unsigned reg = offset + (nr >> 1);
 187
 188         pci_read_config_byte(router, reg, &x);
 189         x = (nr & 1) ? ((x & 0x0f) | (val << 4)) : ((x & 0xf0) | val);
 190         pci_write_config_byte(router, reg, x);
 191 }
 192
 193 /*
 194  * ALI pirq entries are damn ugly, and completely undocumented.
 195  * This has been figured out from pirq tables, and it's not a pretty
 196  * picture.
 197  */
 198 static int pirq_ali_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 199 {
 200         static const unsigned char irqmap[16] = { 0, 9, 3, 10, 4, 5, 7, 6, 1, 11, 0, 12, 0, 14, 0, 15 };
 201
 202         return irqmap[read_config_nybble(router, 0x48, pirq-1)];
 203 }
 204
 205 static int pirq_ali_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 206 {
 207         static const unsigned char irqmap[16] = { 0, 8, 0, 2, 4, 5, 7, 6, 0, 1, 3, 9, 11, 0, 13, 15 };
 208         unsigned int val = irqmap[irq];
 209
 210         if (val) {
 211                 write_config_nybble(router, 0x48, pirq-1, val);
 212                 return 1;
 213         }
 214         return 0;
 215 }
 216
 217 /*
 218  * The Intel PIIX4 pirq rules are fairly simple: "pirq" is
 219  * just a pointer to the config space.
 220  */
 221 static int pirq_piix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 222 {
 223         u8 x;
 224
 225         pci_read_config_byte(router, pirq, &x);
 226         return (x < 16) ? x : 0;
 227 }
 228
 229 static int pirq_piix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 230 {
 231         pci_write_config_byte(router, pirq, irq);
 232         return 1;
 233 }
 234
 235 /*
 236  * The VIA pirq rules are nibble-based, like ALI,
 237  * but without the ugly irq number munging.
 238  * However, PIRQD is in the upper instead of lower 4 bits.
 239  */
 240 static int pirq_via_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 241 {
 242         return read_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq);
 243 }
 244
 245 static int pirq_via_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 246 {
 247         write_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq, irq);
 248         return 1;
 249 }
 250
 251 /*
 252  * The VIA pirq rules are nibble-based, like ALI,
 253  * but without the ugly irq number munging.
 254  * However, for 82C586, nibble map is different .
 255  */
 256 static int pirq_via586_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 257 {
 258         static const unsigned int pirqmap[5] = { 3, 2, 5, 1, 1 };
 259         return read_config_nybble(router, 0x55, pirqmap[pirq-1]);
 260 }
 261
 262 static int pirq_via586_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 263 {
 264         static const unsigned int pirqmap[5] = { 3, 2, 5, 1, 1 };
 265         write_config_nybble(router, 0x55, pirqmap[pirq-1], irq);
 266         return 1;
 267 }
 268
 269 /*
 270  * ITE 8330G pirq rules are nibble-based
 271  * FIXME: pirqmap may be { 1, 0, 3, 2 },
 272  *        2+3 are both mapped to irq 9 on my system
 273  */
 274 static int pirq_ite_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 275 {
 276         static const unsigned char pirqmap[4] = { 1, 0, 2, 3 };
 277         return read_config_nybble(router,0x43, pirqmap[pirq-1]);
 278 }
 279
 280 static int pirq_ite_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 281 {
 282         static const unsigned char pirqmap[4] = { 1, 0, 2, 3 };
 283         write_config_nybble(router, 0x43, pirqmap[pirq-1], irq);
 284         return 1;
 285 }
 286
 287 /*
 288  * OPTI: high four bits are nibble pointer..
 289  * I wonder what the low bits do?
 290  */
 291 static int pirq_opti_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 292 {
 293         return read_config_nybble(router, 0xb8, pirq >> 4);
 294 }
 295
 296 static int pirq_opti_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 297 {
 298         write_config_nybble(router, 0xb8, pirq >> 4, irq);
 299         return 1;
 300 }
 301
 302 /*
 303  * Cyrix: nibble offset 0x5C
 304  * 0x5C bits 7:4 is INTB bits 3:0 is INTA
 305  * 0x5D bits 7:4 is INTD bits 3:0 is INTC
 306  */
 307 static int pirq_cyrix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 308 {
 309         return read_config_nybble(router, 0x5C, (pirq-1)^1);
 310 }
 311
 312 static int pirq_cyrix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 313 {
 314         write_config_nybble(router, 0x5C, (pirq-1)^1, irq);
 315         return 1;
 316 }
 317
 318 /*
 319  *      PIRQ routing for SiS 85C503 router used in several SiS chipsets.
 320  *      We have to deal with the following issues here:
 321  *      - vendors have different ideas about the meaning of link values
 322  *      - some onboard devices (integrated in the chipset) have special
 323  *        links and are thus routed differently (i.e. not via PCI INTA-INTD)
 324  *      - different revision of the router have a different layout for
 325  *        the routing registers, particularly for the onchip devices
 326  *
 327  *      For all routing registers the common thing is we have one byte
 328  *      per routeable link which is defined as:
 329  *               bit 7      IRQ mapping enabled (0) or disabled (1)
 330  *               bits [6:4] reserved (sometimes used for onchip devices)
 331  *               bits [3:0] IRQ to map to
 332  *                   allowed: 3-7, 9-12, 14-15
 333  *                   reserved: 0, 1, 2, 8, 13
 334  *
 335  *      The config-space registers located at 0x41/0x42/0x43/0x44 are
 336  *      always used to route the normal PCI INT A/B/C/D respectively.
 337  *      Apparently there are systems implementing PCI routing table using
 338  *      link values 0x01-0x04 and others using 0x41-0x44 for PCI INTA..D.
 339  *      We try our best to handle both link mappings.
 340  *
 341  *      Currently (2003-05-21) it appears most SiS chipsets follow the
 342  *      definition of routing registers from the SiS-5595 southbridge.
 343  *      According to the SiS 5595 datasheets the revision id's of the
 344  *      router (ISA-bridge) should be 0x01 or 0xb0.
 345  *
 346  *      Furthermore we've also seen lspci dumps with revision 0x00 and 0xb1.
 347  *      Looks like these are used in a number of SiS 5xx/6xx/7xx chipsets.
 348  *      They seem to work with the current routing code. However there is
 349  *      some concern because of the two USB-OHCI HCs (original SiS 5595
 350  *      had only one). YMMV.
 351  *
 352  *      Onchip routing for router rev-id 0x01/0xb0 and probably 0x00/0xb1:
 353  *
 354  *      0x61:   IDEIRQ:
 355  *              bits [6:5] must be written 01
 356  *              bit 4 channel-select primary (0), secondary (1)
 357  *
 358  *      0x62:   USBIRQ:
 359  *              bit 6 OHCI function disabled (0), enabled (1)
 360  *
 361  *      0x6a:   ACPI/SCI IRQ: bits 4-6 reserved
 362  *
 363  *      0x7e:   Data Acq. Module IRQ - bits 4-6 reserved
 364  *
 365  *      We support USBIRQ (in addition to INTA-INTD) and keep the
 366  *      IDE, ACPI and DAQ routing untouched as set by the BIOS.
 367  *
 368  *      Currently the only reported exception is the new SiS 65x chipset
 369  *      which includes the SiS 69x southbridge. Here we have the 85C503
 370  *      router revision 0x04 and there are changes in the register layout
 371  *      mostly related to the different USB HCs with USB 2.0 support.
 372  *
 373  *      Onchip routing for router rev-id 0x04 (try-and-error observation)
 374  *
 375  *      0x60/0x61/0x62/0x63:    1xEHCI and 3xOHCI (companion) USB-HCs
 376  *                              bit 6-4 are probably unused, not like 5595
 377  */
 378
 379 #define PIRQ_SIS_IRQ_MASK       0x0f
 380 #define PIRQ_SIS_IRQ_DISABLE    0x80
 381 #define PIRQ_SIS_USB_ENABLE     0x40
 382
 383 static int pirq_sis_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 384 {
 385         u8 x;
 386         int reg;
 387
 388         reg = pirq;
 389         if (reg >= 0x01 && reg <= 0x04)
 390                 reg += 0x40;
 391         pci_read_config_byte(router, reg, &x);
 392         return (x & PIRQ_SIS_IRQ_DISABLE) ? 0 : (x & PIRQ_SIS_IRQ_MASK);
 393 }
 394
 395 static int pirq_sis_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 396 {
 397         u8 x;
 398         int reg;
 399
 400         reg = pirq;
 401         if (reg >= 0x01 && reg <= 0x04)
 402                 reg += 0x40;
 403         pci_read_config_byte(router, reg, &x);
 404         x &= ~(PIRQ_SIS_IRQ_MASK | PIRQ_SIS_IRQ_DISABLE);
 405         x |= irq ? irq: PIRQ_SIS_IRQ_DISABLE;
 406         pci_write_config_byte(router, reg, x);
 407         return 1;
 408 }
 409
 410
 411 /*
 412  * VLSI: nibble offset 0x74 - educated guess due to routing table and
 413  *       config space of VLSI 82C534 PCI-bridge/router (1004:0102)
 414  *       Tested on HP OmniBook 800 covering PIRQ 1, 2, 4, 8 for onboard
 415  *       devices, PIRQ 3 for non-pci(!) soundchip and (untested) PIRQ 6
 416  *       for the busbridge to the docking station.
 417  */
 418
 419 static int pirq_vlsi_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 420 {
 421         if (pirq > 8) {
 422                 printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
 423                 return 0;
 424         }
 425         return read_config_nybble(router, 0x74, pirq-1);
 426 }
 427
 428 static int pirq_vlsi_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 429 {
 430         if (pirq > 8) {
 431                 printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
 432                 return 0;
 433         }
 434         write_config_nybble(router, 0x74, pirq-1, irq);
 435         return 1;
 436 }
 437
 438 /*
 439  * ServerWorks: PCI interrupts mapped to system IRQ lines through Index
 440  * and Redirect I/O registers (0x0c00 and 0x0c01).  The Index register
 441  * format is (PCIIRQ## | 0x10), e.g.: PCIIRQ10=0x1a.  The Redirect
 442  * register is a straight binary coding of desired PIC IRQ (low nibble).
 443  *
 444  * The 'link' value in the PIRQ table is already in the correct format
 445  * for the Index register.  There are some special index values:
 446  * 0x00 for ACPI (SCI), 0x01 for USB, 0x02 for IDE0, 0x04 for IDE1,
 447  * and 0x03 for SMBus.
 448  */
 449 static int pirq_serverworks_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 450 {
 451         outb_p(pirq, 0xc00);
 452         return inb(0xc01) & 0xf;
 453 }
 454
 455 static int pirq_serverworks_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 456 {
 457         outb_p(pirq, 0xc00);
 458         outb_p(irq, 0xc01);
 459         return 1;
 460 }
 461
 462 /* Support for AMD756 PCI IRQ Routing
 463  * Jhon H. Caicedo <jhcaiced@osso.org.co>
 464  * Jun/21/2001 0.2.0 Release, fixed to use "nybble" functions... (jhcaiced)
 465  * Jun/19/2001 Alpha Release 0.1.0 (jhcaiced)
 466  * The AMD756 pirq rules are nibble-based
 467  * offset 0x56 0-3 PIRQA  4-7  PIRQB
 468  * offset 0x57 0-3 PIRQC  4-7  PIRQD
 469  */
 470 static int pirq_amd756_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 471 {
 472         u8 irq;
 473         irq = 0;
 474         if (pirq <= 4)
 475         {
 476                 irq = read_config_nybble(router, 0x56, pirq - 1);
 477         }
 478         printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d get irq : %2d\n",
 479                 dev->vendor, dev->device, pirq, irq);
 480         return irq;
 481 }
 482
 483 static int pirq_amd756_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 484 {
 485         printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d SET irq : %2d\n",
 486                 dev->vendor, dev->device, pirq, irq);
 487         if (pirq <= 4)
 488         {
 489                 write_config_nybble(router, 0x56, pirq - 1, irq);
 490         }
 491         return 1;
 492 }
 493
 494 #ifdef CONFIG_PCI_BIOS
 495
 496 static int pirq_bios_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 497 {
 498         struct pci_dev *bridge;
 499         int pin = pci_get_interrupt_pin(dev, &bridge);
 500         return pcibios_set_irq_routing(bridge, pin, irq);
 501 }
 502
 503 #endif
 504
 505 static __init int intel_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 506 {
 507         static struct pci_device_id __initdata pirq_440gx[] = {
 508                 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_0) },
 509                 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_2) },
 510                 { },
 511         };
 512
 513         /* 440GX has a proprietary PIRQ router -- don't use it */
 514         if (pci_dev_present(pirq_440gx))
 515                 return 0;
 516
 517         switch(device)
 518         {
 519                 case PCI_DEVICE_ID_INTEL_82371FB_0:
 520                 case PCI_DEVICE_ID_INTEL_82371SB_0:
 521                 case PCI_DEVICE_ID_INTEL_82371AB_0:
 522                 case PCI_DEVICE_ID_INTEL_82371MX:
 523                 case PCI_DEVICE_ID_INTEL_82443MX_0:
 524                 case PCI_DEVICE_ID_INTEL_82801AA_0:
 525                 case PCI_DEVICE_ID_INTEL_82801AB_0:
 526                 case PCI_DEVICE_ID_INTEL_82801BA_0:
 527                 case PCI_DEVICE_ID_INTEL_82801BA_10:
 528                 case PCI_DEVICE_ID_INTEL_82801CA_0:
 529                 case PCI_DEVICE_ID_INTEL_82801CA_12:
 530                 case PCI_DEVICE_ID_INTEL_82801DB_0:
 531                 case PCI_DEVICE_ID_INTEL_82801E_0:
 532                 case PCI_DEVICE_ID_INTEL_82801EB_0:
 533                 case PCI_DEVICE_ID_INTEL_ESB_1:
 534                 case PCI_DEVICE_ID_INTEL_ICH6_0:
 535                 case PCI_DEVICE_ID_INTEL_ICH6_1:
 536                 case PCI_DEVICE_ID_INTEL_ICH7_0:
 537                 case PCI_DEVICE_ID_INTEL_ICH7_1:
 538                 case PCI_DEVICE_ID_INTEL_ICH7_30:
 539                 case PCI_DEVICE_ID_INTEL_ICH7_31:
 540                 case PCI_DEVICE_ID_INTEL_ESB2_0:
 541                 case PCI_DEVICE_ID_INTEL_ICH8_0:
 542                 case PCI_DEVICE_ID_INTEL_ICH8_1:
 543                 case PCI_DEVICE_ID_INTEL_ICH8_2:
 544                 case PCI_DEVICE_ID_INTEL_ICH8_3:
 545                 case PCI_DEVICE_ID_INTEL_ICH8_4:
 546                         r->name = "PIIX/ICH";
 547                         r->get = pirq_piix_get;
 548                         r->set = pirq_piix_set;
 549                         return 1;
 550         }
 551         return 0;
 552 }
 553
 554 static __init int via_router_probe(struct irq_router *r,
 555                                 struct pci_dev *router, u16 device)
 556 {
 557         /* FIXME: We should move some of the quirk fixup stuff here */
 558
 559         /*
 560          * work arounds for some buggy BIOSes
 561          */
 562         if (device == PCI_DEVICE_ID_VIA_82C586_0) {
 563                 switch(router->device) {
 564                 case PCI_DEVICE_ID_VIA_82C686:
 565                         /*
 566                          * Asus k7m bios wrongly reports 82C686A
 567                          * as 586-compatible
 568                          */
 569                         device = PCI_DEVICE_ID_VIA_82C686;
 570                         break;
 571                 case PCI_DEVICE_ID_VIA_8235:
 572                         /**
 573                          * Asus a7v-x bios wrongly reports 8235
 574                          * as 586-compatible
 575                          */
 576                         device = PCI_DEVICE_ID_VIA_8235;
 577                         break;
 578                 }
 579         }
 580
 581         switch(device) {
 582         case PCI_DEVICE_ID_VIA_82C586_0:
 583                 r->name = "VIA";
 584                 r->get = pirq_via586_get;
 585                 r->set = pirq_via586_set;
 586                 return 1;
 587         case PCI_DEVICE_ID_VIA_82C596:
 588         case PCI_DEVICE_ID_VIA_82C686:
 589         case PCI_DEVICE_ID_VIA_8231:
 590         case PCI_DEVICE_ID_VIA_8233A:
 591         case PCI_DEVICE_ID_VIA_8235:
 592         case PCI_DEVICE_ID_VIA_8237:
 593                 /* FIXME: add new ones for 8233/5 */
 594                 r->name = "VIA";
 595                 r->get = pirq_via_get;
 596                 r->set = pirq_via_set;
 597                 return 1;
 598         }
 599         return 0;
 600 }
 601
 602 static __init int vlsi_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 603 {
 604         switch(device)
 605         {
 606                 case PCI_DEVICE_ID_VLSI_82C534:
 607                         r->name = "VLSI 82C534";
 608                         r->get = pirq_vlsi_get;
 609                         r->set = pirq_vlsi_set;
 610                         return 1;
 611         }
 612         return 0;
 613 }
 614
 615
 616 static __init int serverworks_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 617 {
 618         switch(device)
 619         {
 620                 case PCI_DEVICE_ID_SERVERWORKS_OSB4:
 621                 case PCI_DEVICE_ID_SERVERWORKS_CSB5:
 622                         r->name = "ServerWorks";
 623                         r->get = pirq_serverworks_get;
 624                         r->set = pirq_serverworks_set;
 625                         return 1;
 626         }
 627         return 0;
 628 }
 629
 630 static __init int sis_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 631 {
 632         if (device != PCI_DEVICE_ID_SI_503)
 633                 return 0;
 634
 635         r->name = "SIS";
 636         r->get = pirq_sis_get;
 637         r->set = pirq_sis_set;
 638         return 1;
 639 }
 640
 641 static __init int cyrix_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 642 {
 643         switch(device)
 644         {
 645                 case PCI_DEVICE_ID_CYRIX_5520:
 646                         r->name = "NatSemi";
 647                         r->get = pirq_cyrix_get;
 648                         r->set = pirq_cyrix_set;
 649                         return 1;
 650         }
 651         return 0;
 652 }
 653
 654 static __init int opti_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 655 {
 656         switch(device)
 657         {
 658                 case PCI_DEVICE_ID_OPTI_82C700:
 659                         r->name = "OPTI";
 660                         r->get = pirq_opti_get;
 661                         r->set = pirq_opti_set;
 662                         return 1;
 663         }
 664         return 0;
 665 }
 666
 667 static __init int ite_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 668 {
 669         switch(device)
 670         {
 671                 case PCI_DEVICE_ID_ITE_IT8330G_0:
 672                         r->name = "ITE";
 673                         r->get = pirq_ite_get;
 674                         r->set = pirq_ite_set;
 675                         return 1;
 676         }
 677         return 0;
 678 }
 679
 680 static __init int ali_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 681 {
 682         switch(device)
 683         {
 684         case PCI_DEVICE_ID_AL_M1533:
 685         case PCI_DEVICE_ID_AL_M1563:
 686                 printk(KERN_DEBUG "PCI: Using ALI IRQ Router\n");
 687                 r->name = "ALI";
 688                 r->get = pirq_ali_get;
 689                 r->set = pirq_ali_set;
 690                 return 1;
 691         }
 692         return 0;
 693 }
 694
 695 static __init int amd_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 696 {
 697         switch(device)
 698         {
 699                 case PCI_DEVICE_ID_AMD_VIPER_740B:
 700                         r->name = "AMD756";
 701                         break;
 702                 case PCI_DEVICE_ID_AMD_VIPER_7413:
 703                         r->name = "AMD766";
 704                         break;
 705                 case PCI_DEVICE_ID_AMD_VIPER_7443:
 706                         r->name = "AMD768";
 707                         break;
 708                 default:
 709                         return 0;
 710         }
 711         r->get = pirq_amd756_get;
 712         r->set = pirq_amd756_set;
 713         return 1;
 714 }
 715
 716 static __initdata struct irq_router_handler pirq_routers[] = {
 717         { PCI_VENDOR_ID_INTEL, intel_router_probe },
 718         { PCI_VENDOR_ID_AL, ali_router_probe },
 719         { PCI_VENDOR_ID_ITE, ite_router_probe },
 720         { PCI_VENDOR_ID_VIA, via_router_probe },
 721         { PCI_VENDOR_ID_OPTI, opti_router_probe },
 722         { PCI_VENDOR_ID_SI, sis_router_probe },
 723         { PCI_VENDOR_ID_CYRIX, cyrix_router_probe },
 724         { PCI_VENDOR_ID_VLSI, vlsi_router_probe },
 725         { PCI_VENDOR_ID_SERVERWORKS, serverworks_router_probe },
 726         { PCI_VENDOR_ID_AMD, amd_router_probe },
 727         /* Someone with docs needs to add the ATI Radeon IGP */
 728         { 0, NULL }
 729 };
 730 static struct irq_router pirq_router;
 731 static struct pci_dev *pirq_router_dev;
 732
 733
 734 /*
 735  *      FIXME: should we have an option to say "generic for
 736  *      chipset" ?
 737  */
 738
 739 static void __init pirq_find_router(struct irq_router *r)
 740 {
 741         struct irq_routing_table *rt = pirq_table;
 742         struct irq_router_handler *h;
 743
 744 #ifdef CONFIG_PCI_BIOS
 745         if (!rt->signature) {
 746                 printk(KERN_INFO "PCI: Using BIOS for IRQ routing\n");
 747                 r->set = pirq_bios_set;
 748                 r->name = "BIOS";
 749                 return;
 750         }
 751 #endif
 752
 753         /* Default unless a driver reloads it */
 754         r->name = "default";
 755         r->get = NULL;
 756         r->set = NULL;
 757
 758         DBG(KERN_DEBUG "PCI: Attempting to find IRQ router for %04x:%04x\n",
 759             rt->rtr_vendor, rt->rtr_device);
 760
 761         pirq_router_dev = pci_find_slot(rt->rtr_bus, rt->rtr_devfn);
 762         if (!pirq_router_dev) {
 763                 DBG(KERN_DEBUG "PCI: Interrupt router not found at "
 764                         "%02x:%02x\n", rt->rtr_bus, rt->rtr_devfn);
 765                 return;
 766         }
 767
 768         for( h = pirq_routers; h->vendor; h++) {
 769                 /* First look for a router match */
 770                 if (rt->rtr_vendor == h->vendor && h->probe(r, pirq_router_dev, rt->rtr_device))
 771                         break;
 772                 /* Fall back to a device match */
 773                 if (pirq_router_dev->vendor == h->vendor && h->probe(r, pirq_router_dev, pirq_router_dev->device))
 774                         break;
 775         }
 776         printk(KERN_INFO "PCI: Using IRQ router %s [%04x/%04x] at %s\n",
 777                 pirq_router.name,
 778                 pirq_router_dev->vendor,
 779                 pirq_router_dev->device,
 780                 pci_name(pirq_router_dev));
 781 }
 782
 783 static struct irq_info *pirq_get_info(struct pci_dev *dev)
 784 {
 785         struct irq_routing_table *rt = pirq_table;
 786         int entries = (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
 787         struct irq_info *info;
 788
 789         for (info = rt->slots; entries--; info++)
 790                 if (info->bus == dev->bus->number && PCI_SLOT(info->devfn) == PCI_SLOT(dev->devfn))
 791                         return info;
 792         return NULL;
 793 }
 794
 795 static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
 796 {
 797         u8 pin;
 798         struct irq_info *info;
 799         int i, pirq, newirq;
 800         int irq = 0;
 801         u32 mask;
 802         struct irq_router *r = &pirq_router;
 803         struct pci_dev *dev2 = NULL;
 804         char *msg = NULL;
 805
 806         /* Find IRQ pin */
 807         pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
 808         if (!pin) {
 809                 DBG(KERN_DEBUG " -> no interrupt pin\n");
 810                 return 0;
 811         }
 812         pin = pin - 1;
 813
 814         /* Find IRQ routing entry */
 815
 816         if (!pirq_table)
 817                 return 0;
 818
 819         DBG(KERN_DEBUG "IRQ for %s[%c]", pci_name(dev), 'A' + pin);
 820         info = pirq_get_info(dev);
 821         if (!info) {
 822                 DBG(" -> not found in routing table\n" KERN_DEBUG);
 823                 return 0;
 824         }
 825         pirq = info->irq[pin].link;
 826         mask = info->irq[pin].bitmap;
 827         if (!pirq) {
 828                 DBG(" -> not routed\n" KERN_DEBUG);
 829                 return 0;
 830         }
 831         DBG(" -> PIRQ %02x, mask %04x, excl %04x", pirq, mask, pirq_table->exclusive_irqs);
 832         mask &= pcibios_irq_mask;
 833
 834         /* Work around broken HP Pavilion Notebooks which assign USB to
 835            IRQ 9 even though it is actually wired to IRQ 11 */
 836
 837         if (broken_hp_bios_irq9 && pirq == 0x59 && dev->irq == 9) {
 838                 dev->irq = 11;
 839                 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
 840                 r->set(pirq_router_dev, dev, pirq, 11);
 841         }
 842
 843         /* same for Acer Travelmate 360, but with CB and irq 11 -> 10 */
 844         if (acer_tm360_irqrouting && dev->irq == 11 && dev->vendor == PCI_VENDOR_ID_O2) {
 845                 pirq = 0x68;
 846                 mask = 0x400;
 847                 dev->irq = r->get(pirq_router_dev, dev, pirq);
 848                 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
 849         }
 850
 851         /*
 852          * Find the best IRQ to assign: use the one
 853          * reported by the device if possible.
 854          */
 855         newirq = dev->irq;
 856         if (newirq && !((1 << newirq) & mask)) {
 857                 if ( pci_probe & PCI_USE_PIRQ_MASK) newirq = 0;
 858                 else printk("\n" KERN_WARNING
 859                         "PCI: IRQ %i for device %s doesn't match PIRQ mask "
 860                         "- try pci=usepirqmask\n" KERN_DEBUG, newirq,
 861                         pci_name(dev));
 862         }
 863         if (!newirq && assign) {
 864                 for (i = 0; i < 16; i++) {
 865                         if (!(mask & (1 << i)))
 866                                 continue;
 867                         if (pirq_penalty[i] < pirq_penalty[newirq] && can_request_irq(i, IRQF_SHARED))
 868                                 newirq = i;
 869                 }
 870         }
 871         DBG(" -> newirq=%d", newirq);
 872
 873         /* Check if it is hardcoded */
 874         if ((pirq & 0xf0) == 0xf0) {
 875                 irq = pirq & 0xf;
 876                 DBG(" -> hardcoded IRQ %d\n", irq);
 877                 msg = "Hardcoded";
 878         } else if ( r->get && (irq = r->get(pirq_router_dev, dev, pirq)) && \
 879         ((!(pci_probe & PCI_USE_PIRQ_MASK)) || ((1 << irq) & mask)) ) {
 880                 DBG(" -> got IRQ %d\n", irq);
 881                 msg = "Found";
 882                 eisa_set_level_irq(irq);
 883         } else if (newirq && r->set && (dev->class >> 8) != PCI_CLASS_DISPLAY_VGA) {
 884                 DBG(" -> assigning IRQ %d", newirq);
 885                 if (r->set(pirq_router_dev, dev, pirq, newirq)) {
 886                         eisa_set_level_irq(newirq);
 887                         DBG(" ... OK\n");
 888                         msg = "Assigned";
 889                         irq = newirq;
 890                 }
 891         }
 892
 893         if (!irq) {
 894                 DBG(" ... failed\n");
 895                 if (newirq && mask == (1 << newirq)) {
 896                         msg = "Guessed";
 897                         irq = newirq;
 898                 } else
 899                         return 0;
 900         }
 901         printk(KERN_INFO "PCI: %s IRQ %d for device %s\n", msg, irq, pci_name(dev));
 902
 903         /* Update IRQ for all devices with the same pirq value */
 904         while ((dev2 = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev2)) != NULL) {
 905                 pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin);
 906                 if (!pin)
 907                         continue;
 908                 pin--;
 909                 info = pirq_get_info(dev2);
 910                 if (!info)
 911                         continue;
 912                 if (info->irq[pin].link == pirq) {
 913                         /* We refuse to override the dev->irq information. Give a warning! */
 914                         if ( dev2->irq && dev2->irq != irq && \
 915                         (!(pci_probe & PCI_USE_PIRQ_MASK) || \
 916                         ((1 << dev2->irq) & mask)) ) {
 917 #ifndef CONFIG_PCI_MSI
 918                                 printk(KERN_INFO "IRQ routing conflict for %s, have irq %d, want irq %d\n",
 919                                        pci_name(dev2), dev2->irq, irq);
 920 #endif
 921                                 continue;
 922                         }
 923                         dev2->irq = irq;
 924                         pirq_penalty[irq]++;
 925                         if (dev != dev2)
 926                                 printk(KERN_INFO "PCI: Sharing IRQ %d with %s\n", irq, pci_name(dev2));
 927                 }
 928         }
 929         return 1;
 930 }
 931
 932 static void __init pcibios_fixup_irqs(void)
 933 {
 934         struct pci_dev *dev = NULL;
 935         u8 pin;
 936
 937         DBG(KERN_DEBUG "PCI: IRQ fixup\n");
 938         while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
 939                 /*
 940                  * If the BIOS has set an out of range IRQ number, just ignore it.
 941                  * Also keep track of which IRQ's are already in use.
 942                  */
 943                 if (dev->irq >= 16) {
 944                         DBG(KERN_DEBUG "%s: ignoring bogus IRQ %d\n", pci_name(dev), dev->irq);
 945                         dev->irq = 0;
 946                 }
 947                 /* If the IRQ is already assigned to a PCI device, ignore its ISA use penalty */
 948                 if (pirq_penalty[dev->irq] >= 100 && pirq_penalty[dev->irq] < 100000)
 949                         pirq_penalty[dev->irq] = 0;
 950                 pirq_penalty[dev->irq]++;
 951         }
 952
 953         dev = NULL;
 954         while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
 955                 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
 956 #ifdef CONFIG_X86_IO_APIC
 957                 /*
 958                  * Recalculate IRQ numbers if we use the I/O APIC.
 959                  */
 960                 if (io_apic_assign_pci_irqs)
 961                 {
 962                         int irq;
 963
 964                         if (pin) {
 965                                 pin--;          /* interrupt pins are numbered starting from 1 */
 966                                 irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
 967         /*
 968          * Busses behind bridges are typically not listed in the MP-table.
 969          * In this case we have to look up the IRQ based on the parent bus,
 970          * parent slot, and pin number. The SMP code detects such bridged
 971          * busses itself so we should get into this branch reliably.
 972          */
 973                                 if (irq < 0 && dev->bus->parent) { /* go back to the bridge */
 974                                         struct pci_dev * bridge = dev->bus->self;
 975
 976                                         pin = (pin + PCI_SLOT(dev->devfn)) % 4;
 977                                         irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
 978                                                         PCI_SLOT(bridge->devfn), pin);
 979                                         if (irq >= 0)
 980                                                 printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n",
 981                                                         pci_name(bridge), 'A' + pin, irq);
 982                                 }
 983                                 if (irq >= 0) {
 984                                         printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
 985                                                 pci_name(dev), 'A' + pin, irq);
 986                                         dev->irq = irq;
 987                                 }
 988                         }
 989                 }
 990 #endif
 991                 /*
 992                  * Still no IRQ? Try to lookup one...
 993                  */
 994                 if (pin && !dev->irq)
 995                         pcibios_lookup_irq(dev, 0);
 996         }
 997 }
 998
 999 /*
1000  * Work around broken HP Pavilion Notebooks which assign USB to
1001  * IRQ 9 even though it is actually wired to IRQ 11
1002  */
1003 static int __init fix_broken_hp_bios_irq9(struct dmi_system_id *d)
1004 {
1005         if (!broken_hp_bios_irq9) {
1006                 broken_hp_bios_irq9 = 1;
1007                 printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
1008         }
1009         return 0;
1010 }
1011
1012 /*
1013  * Work around broken Acer TravelMate 360 Notebooks which assign
1014  * Cardbus to IRQ 11 even though it is actually wired to IRQ 10
1015  */
1016 static int __init fix_acer_tm360_irqrouting(struct dmi_system_id *d)
1017 {
1018         if (!acer_tm360_irqrouting) {
1019                 acer_tm360_irqrouting = 1;
1020                 printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
1021         }
1022         return 0;
1023 }
1024
1025 static struct dmi_system_id __initdata pciirq_dmi_table[] = {
1026         {
1027                 .callback = fix_broken_hp_bios_irq9,
1028                 .ident = "HP Pavilion N5400 Series Laptop",
1029                 .matches = {
1030                         DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1031                         DMI_MATCH(DMI_BIOS_VERSION, "GE.M1.03"),
1032                         DMI_MATCH(DMI_PRODUCT_VERSION, "HP Pavilion Notebook Model GE"),
1033                         DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
1034                 },
1035         },
1036         {
1037                 .callback = fix_acer_tm360_irqrouting,
1038                 .ident = "Acer TravelMate 36x Laptop",
1039                 .matches = {
1040                         DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
1041                         DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
1042                 },
1043         },
1044         { }
1045 };
1046
1047 static int __init pcibios_irq_init(void)
1048 {
1049         DBG(KERN_DEBUG "PCI: IRQ init\n");
1050
1051         if (pcibios_enable_irq || raw_pci_ops == NULL)
1052                 return 0;
1053
1054         dmi_check_system(pciirq_dmi_table);
1055
1056         pirq_table = pirq_find_routing_table();
1057
1058 #ifdef CONFIG_PCI_BIOS
1059         if (!pirq_table && (pci_probe & PCI_BIOS_IRQ_SCAN))
1060                 pirq_table = pcibios_get_irq_routing_table();
1061 #endif
1062         if (pirq_table) {
1063                 pirq_peer_trick();
1064                 pirq_find_router(&pirq_router);
1065                 if (pirq_table->exclusive_irqs) {
1066                         int i;
1067                         for (i=0; i<16; i++)
1068                                 if (!(pirq_table->exclusive_irqs & (1 << i)))
1069                                         pirq_penalty[i] += 100;
1070                 }
1071                 /* If we're using the I/O APIC, avoid using the PCI IRQ routing table */
1072                 if (io_apic_assign_pci_irqs)
1073                         pirq_table = NULL;
1074         }
1075
1076         pcibios_enable_irq = pirq_enable_irq;
1077
1078         pcibios_fixup_irqs();
1079         return 0;
1080 }
1081
1082 subsys_initcall(pcibios_irq_init);
1083
1084
1085 static void pirq_penalize_isa_irq(int irq, int active)
1086 {
1087         /*
1088          *  If any ISAPnP device reports an IRQ in its list of possible
1089          *  IRQ's, we try to avoid assigning it to PCI devices.
1090          */
1091         if (irq < 16) {
1092                 if (active)
1093                         pirq_penalty[irq] += 1000;
1094                 else
1095                         pirq_penalty[irq] += 100;
1096         }
1097 }
1098
1099 void pcibios_penalize_isa_irq(int irq, int active)
1100 {
1101 #ifdef CONFIG_ACPI
1102         if (!acpi_noirq)
1103                 acpi_penalize_isa_irq(irq, active);
1104         else
1105 #endif
1106                 pirq_penalize_isa_irq(irq, active);
1107 }
1108
1109 static int pirq_enable_irq(struct pci_dev *dev)
1110 {
1111         u8 pin;
1112         struct pci_dev *temp_dev;
1113
1114         pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
1115         if (pin && !pcibios_lookup_irq(dev, 1) && !dev->irq) {
1116                 char *msg = "";
1117
1118                 pin--;          /* interrupt pins are numbered starting from 1 */
1119
1120                 if (io_apic_assign_pci_irqs) {
1121                         int irq;
1122
1123                         irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
1124                         /*
1125                          * Busses behind bridges are typically not listed in the MP-table.
1126                          * In this case we have to look up the IRQ based on the parent bus,
1127                          * parent slot, and pin number. The SMP code detects such bridged
1128                          * busses itself so we should get into this branch reliably.
1129                          */
1130                         temp_dev = dev;
1131                         while (irq < 0 && dev->bus->parent) { /* go back to the bridge */
1132                                 struct pci_dev * bridge = dev->bus->self;
1133
1134                                 pin = (pin + PCI_SLOT(dev->devfn)) % 4;
1135                                 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
1136                                                 PCI_SLOT(bridge->devfn), pin);
1137                                 if (irq >= 0)
1138                                         printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n",
1139                                                 pci_name(bridge), 'A' + pin, irq);
1140                                 dev = bridge;
1141                         }
1142                         dev = temp_dev;
1143                         if (irq >= 0) {
1144                                 printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
1145                                         pci_name(dev), 'A' + pin, irq);
1146                                 dev->irq = irq;
1147                                 return 0;
1148                         } else
1149                                 msg = " Probably buggy MP table.";
1150                 } else if (pci_probe & PCI_BIOS_IRQ_SCAN)
1151                         msg = "";
1152                 else
1153                         msg = " Please try using pci=biosirq.";
1154
1155                 /* With IDE legacy devices the IRQ lookup failure is not a problem.. */
1156                 if (dev->class >> 8 == PCI_CLASS_STORAGE_IDE && !(dev->class & 0x5))
1157                         return 0;
1158
1159                 printk(KERN_WARNING "PCI: No IRQ known for interrupt pin %c of device %s.%s\n",
1160                        'A' + pin, pci_name(dev), msg);
1161         }
1162         return 0;
1163 }