drivers/net/wireless/ath/ar9170/mac.c

   1 /*
   2  * Atheros AR9170 driver
   3  *
   4  * MAC programming
   5  *
   6  * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; see the file COPYING.  If not, see
  20  * http://www.gnu.org/licenses/.
  21  *
  22  * This file incorporates work covered by the following copyright and
  23  * permission notice:
  24  *    Copyright (c) 2007-2008 Atheros Communications, Inc.
  25  *
  26  *    Permission to use, copy, modify, and/or distribute this software for any
  27  *    purpose with or without fee is hereby granted, provided that the above
  28  *    copyright notice and this permission notice appear in all copies.
  29  *
  30  *    THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  31  *    WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  32  *    MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  33  *    ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  34  *    WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  35  *    ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  36  *    OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  37  */
  38
  39 #include <asm/unaligned.h>
  40
  41 #include "ar9170.h"
  42 #include "cmd.h"
  43
  44 int ar9170_set_dyn_sifs_ack(struct ar9170 *ar)
  45 {
  46         u32 val;
  47
  48         if (conf_is_ht40(&ar->hw->conf))
  49                 val = 0x010a;
  50         else {
  51                 if (ar->hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  52                         val = 0x105;
  53                 else
  54                         val = 0x104;
  55         }
  56
  57         return ar9170_write_reg(ar, AR9170_MAC_REG_DYNAMIC_SIFS_ACK, val);
  58 }
  59
  60 int ar9170_set_slot_time(struct ar9170 *ar)
  61 {
  62         u32 slottime = 20;
  63
  64         if (!ar->vif)
  65                 return 0;
  66
  67         if ((ar->hw->conf.channel->band == IEEE80211_BAND_5GHZ) ||
  68             ar->vif->bss_conf.use_short_slot)
  69                 slottime = 9;
  70
  71         return ar9170_write_reg(ar, AR9170_MAC_REG_SLOT_TIME, slottime << 10);
  72 }
  73
  74 int ar9170_set_basic_rates(struct ar9170 *ar)
  75 {
  76         u8 cck, ofdm;
  77
  78         if (!ar->vif)
  79                 return 0;
  80
  81         ofdm = ar->vif->bss_conf.basic_rates >> 4;
  82
  83         /* FIXME: is still necessary? */
  84         if (ar->hw->conf.channel->band == IEEE80211_BAND_5GHZ)
  85                 cck = 0;
  86         else
  87                 cck = ar->vif->bss_conf.basic_rates & 0xf;
  88
  89         return ar9170_write_reg(ar, AR9170_MAC_REG_BASIC_RATE,
  90                                 ofdm << 8 | cck);
  91 }
  92
  93 int ar9170_set_qos(struct ar9170 *ar)
  94 {
  95         ar9170_regwrite_begin(ar);
  96
  97         ar9170_regwrite(AR9170_MAC_REG_AC0_CW, ar->edcf[0].cw_min |
  98                         (ar->edcf[0].cw_max << 16));
  99         ar9170_regwrite(AR9170_MAC_REG_AC1_CW, ar->edcf[1].cw_min |
 100                         (ar->edcf[1].cw_max << 16));
 101         ar9170_regwrite(AR9170_MAC_REG_AC2_CW, ar->edcf[2].cw_min |
 102                         (ar->edcf[2].cw_max << 16));
 103         ar9170_regwrite(AR9170_MAC_REG_AC3_CW, ar->edcf[3].cw_min |
 104                         (ar->edcf[3].cw_max << 16));
 105         ar9170_regwrite(AR9170_MAC_REG_AC4_CW, ar->edcf[4].cw_min |
 106                         (ar->edcf[4].cw_max << 16));
 107
 108         ar9170_regwrite(AR9170_MAC_REG_AC1_AC0_AIFS,
 109                         ((ar->edcf[0].aifs * 9 + 10)) |
 110                         ((ar->edcf[1].aifs * 9 + 10) << 12) |
 111                         ((ar->edcf[2].aifs * 9 + 10) << 24));
 112         ar9170_regwrite(AR9170_MAC_REG_AC3_AC2_AIFS,
 113                         ((ar->edcf[2].aifs * 9 + 10) >> 8) |
 114                         ((ar->edcf[3].aifs * 9 + 10) << 4) |
 115                         ((ar->edcf[4].aifs * 9 + 10) << 16));
 116
 117         ar9170_regwrite(AR9170_MAC_REG_AC1_AC0_TXOP,
 118                         ar->edcf[0].txop | ar->edcf[1].txop << 16);
 119         ar9170_regwrite(AR9170_MAC_REG_AC3_AC2_TXOP,
 120                         ar->edcf[2].txop | ar->edcf[3].txop << 16);
 121
 122         ar9170_regwrite_finish();
 123
 124         return ar9170_regwrite_result();
 125 }
 126
 127 static int ar9170_set_ampdu_density(struct ar9170 *ar, u8 mpdudensity)
 128 {
 129         u32 val;
 130
 131         /* don't allow AMPDU density > 8us */
 132         if (mpdudensity > 6)
 133                 return -EINVAL;
 134
 135         /* Watch out! Otus uses slightly different density values. */
 136         val = 0x140a00 | (mpdudensity ? (mpdudensity + 1) : 0);
 137
 138         ar9170_regwrite_begin(ar);
 139         ar9170_regwrite(AR9170_MAC_REG_AMPDU_DENSITY, val);
 140         ar9170_regwrite_finish();
 141
 142         return ar9170_regwrite_result();
 143 }
 144
 145 int ar9170_init_mac(struct ar9170 *ar)
 146 {
 147         ar9170_regwrite_begin(ar);
 148
 149         ar9170_regwrite(AR9170_MAC_REG_ACK_EXTENSION, 0x40);
 150
 151         ar9170_regwrite(AR9170_MAC_REG_RETRY_MAX, 0);
 152
 153         /* enable MMIC */
 154         ar9170_regwrite(AR9170_MAC_REG_SNIFFER,
 155                         AR9170_MAC_REG_SNIFFER_DEFAULTS);
 156
 157         ar9170_regwrite(AR9170_MAC_REG_RX_THRESHOLD, 0xc1f80);
 158
 159         ar9170_regwrite(AR9170_MAC_REG_RX_PE_DELAY, 0x70);
 160         ar9170_regwrite(AR9170_MAC_REG_EIFS_AND_SIFS, 0xa144000);
 161         ar9170_regwrite(AR9170_MAC_REG_SLOT_TIME, 9 << 10);
 162
 163         /* CF-END mode */
 164         ar9170_regwrite(0x1c3b2c, 0x19000000);
 165
 166         /* NAV protects ACK only (in TXOP) */
 167         ar9170_regwrite(0x1c3b38, 0x201);
 168
 169         /* Set Beacon PHY CTRL's TPC to 0x7, TA1=1 */
 170         /* OTUS set AM to 0x1 */
 171         ar9170_regwrite(AR9170_MAC_REG_BCN_HT1, 0x8000170);
 172
 173         ar9170_regwrite(AR9170_MAC_REG_BACKOFF_PROTECT, 0x105);
 174
 175         /* AGG test code*/
 176         /* Aggregation MAX number and timeout */
 177         ar9170_regwrite(0x1c3b9c, 0x10000a);
 178
 179         ar9170_regwrite(AR9170_MAC_REG_FRAMETYPE_FILTER,
 180                         AR9170_MAC_REG_FTF_DEFAULTS);
 181
 182         /* Enable deaggregator, response in sniffer mode */
 183         ar9170_regwrite(0x1c3c40, 0x1 | 1<<30);
 184
 185         /* rate sets */
 186         ar9170_regwrite(AR9170_MAC_REG_BASIC_RATE, 0x150f);
 187         ar9170_regwrite(AR9170_MAC_REG_MANDATORY_RATE, 0x150f);
 188         ar9170_regwrite(AR9170_MAC_REG_RTS_CTS_RATE, 0x10b01bb);
 189
 190         /* MIMO response control */
 191         ar9170_regwrite(0x1c3694, 0x4003C1E);/* bit 26~28  otus-AM */
 192
 193         /* switch MAC to OTUS interface */
 194         ar9170_regwrite(0x1c3600, 0x3);
 195
 196         ar9170_regwrite(AR9170_MAC_REG_AMPDU_RX_THRESH, 0xffff);
 197
 198         /* set PHY register read timeout (??) */
 199         ar9170_regwrite(AR9170_MAC_REG_MISC_680, 0xf00008);
 200
 201         /* Disable Rx TimeOut, workaround for BB. */
 202         ar9170_regwrite(AR9170_MAC_REG_RX_TIMEOUT, 0x0);
 203
 204         /* Set CPU clock frequency to 88/80MHz */
 205         ar9170_regwrite(AR9170_PWR_REG_CLOCK_SEL,
 206                         AR9170_PWR_CLK_AHB_80_88MHZ |
 207                         AR9170_PWR_CLK_DAC_160_INV_DLY);
 208
 209         /* Set WLAN DMA interrupt mode: generate int per packet */
 210         ar9170_regwrite(AR9170_MAC_REG_TXRX_MPI, 0x110011);
 211
 212         ar9170_regwrite(AR9170_MAC_REG_FCS_SELECT,
 213                         AR9170_MAC_FCS_FIFO_PROT);
 214
 215         /* Disables the CF_END frame, undocumented register */
 216         ar9170_regwrite(AR9170_MAC_REG_TXOP_NOT_ENOUGH_IND,
 217                         0x141E0F48);
 218
 219         ar9170_regwrite_finish();
 220
 221         return ar9170_regwrite_result();
 222 }
 223
 224 static int ar9170_set_mac_reg(struct ar9170 *ar, const u32 reg, const u8 *mac)
 225 {
 226         static const u8 zero[ETH_ALEN] = { 0 };
 227
 228         if (!mac)
 229                 mac = zero;
 230
 231         ar9170_regwrite_begin(ar);
 232
 233         ar9170_regwrite(reg, get_unaligned_le32(mac));
 234         ar9170_regwrite(reg + 4, get_unaligned_le16(mac + 4));
 235
 236         ar9170_regwrite_finish();
 237
 238         return ar9170_regwrite_result();
 239 }
 240
 241 int ar9170_update_multicast(struct ar9170 *ar, const u64 mc_hash)
 242 {
 243         int err;
 244
 245         ar9170_regwrite_begin(ar);
 246         ar9170_regwrite(AR9170_MAC_REG_GROUP_HASH_TBL_H, mc_hash >> 32);
 247         ar9170_regwrite(AR9170_MAC_REG_GROUP_HASH_TBL_L, mc_hash);
 248         ar9170_regwrite_finish();
 249         err = ar9170_regwrite_result();
 250         if (err)
 251                 return err;
 252
 253         ar->cur_mc_hash = mc_hash;
 254         return 0;
 255 }
 256
 257 int ar9170_update_frame_filter(struct ar9170 *ar, const u32 filter)
 258 {
 259         int err;
 260
 261         err = ar9170_write_reg(ar, AR9170_MAC_REG_FRAMETYPE_FILTER, filter);
 262         if (err)
 263                 return err;
 264
 265         ar->cur_filter = filter;
 266         return 0;
 267 }
 268
 269 static int ar9170_set_promiscouous(struct ar9170 *ar)
 270 {
 271         u32 encr_mode, sniffer;
 272         int err;
 273
 274         err = ar9170_read_reg(ar, AR9170_MAC_REG_SNIFFER, &sniffer);
 275         if (err)
 276                 return err;
 277
 278         err = ar9170_read_reg(ar, AR9170_MAC_REG_ENCRYPTION, &encr_mode);
 279         if (err)
 280                 return err;
 281
 282         if (ar->sniffer_enabled) {
 283                 sniffer |= AR9170_MAC_REG_SNIFFER_ENABLE_PROMISC;
 284
 285                 /*
 286                  * Rx decryption works in place.
 287                  *
 288                  * If we don't disable it, the hardware will render all
 289                  * encrypted frames which are encrypted with an unknown
 290                  * key useless.
 291                  */
 292
 293                 encr_mode |= AR9170_MAC_REG_ENCRYPTION_RX_SOFTWARE;
 294                 ar->sniffer_enabled = true;
 295         } else {
 296                 sniffer &= ~AR9170_MAC_REG_SNIFFER_ENABLE_PROMISC;
 297
 298                 if (ar->rx_software_decryption)
 299                         encr_mode |= AR9170_MAC_REG_ENCRYPTION_RX_SOFTWARE;
 300                 else
 301                         encr_mode &= ~AR9170_MAC_REG_ENCRYPTION_RX_SOFTWARE;
 302         }
 303
 304         ar9170_regwrite_begin(ar);
 305         ar9170_regwrite(AR9170_MAC_REG_ENCRYPTION, encr_mode);
 306         ar9170_regwrite(AR9170_MAC_REG_SNIFFER, sniffer);
 307         ar9170_regwrite_finish();
 308
 309         return ar9170_regwrite_result();
 310 }
 311
 312 int ar9170_set_operating_mode(struct ar9170 *ar)
 313 {
 314         struct ath_common *common = &ar->common;
 315         u32 pm_mode = AR9170_MAC_REG_POWERMGT_DEFAULTS;
 316         u8 *mac_addr, *bssid;
 317         int err;
 318
 319         if (ar->vif) {
 320                 mac_addr = common->macaddr;
 321                 bssid = common->curbssid;
 322
 323                 switch (ar->vif->type) {
 324                 case NL80211_IFTYPE_MESH_POINT:
 325                 case NL80211_IFTYPE_ADHOC:
 326                         pm_mode |= AR9170_MAC_REG_POWERMGT_IBSS;
 327                         break;
 328                 case NL80211_IFTYPE_AP:
 329                         pm_mode |= AR9170_MAC_REG_POWERMGT_AP;
 330                         break;
 331                 case NL80211_IFTYPE_WDS:
 332                         pm_mode |= AR9170_MAC_REG_POWERMGT_AP_WDS;
 333                         break;
 334                 case NL80211_IFTYPE_MONITOR:
 335                         ar->sniffer_enabled = true;
 336                         ar->rx_software_decryption = true;
 337                         break;
 338                 default:
 339                         pm_mode |= AR9170_MAC_REG_POWERMGT_STA;
 340                         break;
 341                 }
 342         } else {
 343                 mac_addr = NULL;
 344                 bssid = NULL;
 345         }
 346
 347         err = ar9170_set_mac_reg(ar, AR9170_MAC_REG_MAC_ADDR_L, mac_addr);
 348         if (err)
 349                 return err;
 350
 351         err = ar9170_set_mac_reg(ar, AR9170_MAC_REG_BSSID_L, bssid);
 352         if (err)
 353                 return err;
 354
 355         err = ar9170_set_promiscouous(ar);
 356         if (err)
 357                 return err;
 358
 359         /* set AMPDU density to 8us. */
 360         err = ar9170_set_ampdu_density(ar, 6);
 361         if (err)
 362                 return err;
 363
 364         ar9170_regwrite_begin(ar);
 365
 366         ar9170_regwrite(AR9170_MAC_REG_POWERMANAGEMENT, pm_mode);
 367         ar9170_regwrite_finish();
 368
 369         return ar9170_regwrite_result();
 370 }
 371
 372 int ar9170_set_hwretry_limit(struct ar9170 *ar, unsigned int max_retry)
 373 {
 374         u32 tmp = min_t(u32, 0x33333, max_retry * 0x11111);
 375
 376         return ar9170_write_reg(ar, AR9170_MAC_REG_RETRY_MAX, tmp);
 377 }
 378
 379 int ar9170_set_beacon_timers(struct ar9170 *ar)
 380 {
 381         u32 v = 0;
 382         u32 pretbtt = 0;
 383
 384         if (ar->vif) {
 385                 v |= ar->vif->bss_conf.beacon_int;
 386
 387                 if (ar->enable_beacon) {
 388                         switch (ar->vif->type) {
 389                         case NL80211_IFTYPE_MESH_POINT:
 390                         case NL80211_IFTYPE_ADHOC:
 391                                 v |= BIT(25);
 392                                 break;
 393                         case NL80211_IFTYPE_AP:
 394                                 v |= BIT(24);
 395                                 pretbtt = (ar->vif->bss_conf.beacon_int - 6) <<
 396                                           16;
 397                                 break;
 398                         default:
 399                         break;
 400                         }
 401                 }
 402
 403                 v |= ar->vif->bss_conf.dtim_period << 16;
 404         }
 405
 406         ar9170_regwrite_begin(ar);
 407         ar9170_regwrite(AR9170_MAC_REG_PRETBTT, pretbtt);
 408         ar9170_regwrite(AR9170_MAC_REG_BCN_PERIOD, v);
 409         ar9170_regwrite_finish();
 410         return ar9170_regwrite_result();
 411 }
 412
 413 int ar9170_update_beacon(struct ar9170 *ar)
 414 {
 415         struct sk_buff *skb;
 416         __le32 *data, *old = NULL;
 417         u32 word;
 418         int i;
 419
 420         skb = ieee80211_beacon_get(ar->hw, ar->vif);
 421         if (!skb)
 422                 return -ENOMEM;
 423
 424         data = (__le32 *)skb->data;
 425         if (ar->beacon)
 426                 old = (__le32 *)ar->beacon->data;
 427
 428         ar9170_regwrite_begin(ar);
 429         for (i = 0; i < DIV_ROUND_UP(skb->len, 4); i++) {
 430                 /*
 431                  * XXX: This accesses beyond skb data for up
 432                  *      to the last 3 bytes!!
 433                  */
 434
 435                 if (old && (data[i] == old[i]))
 436                         continue;
 437
 438                 word = le32_to_cpu(data[i]);
 439                 ar9170_regwrite(AR9170_BEACON_BUFFER_ADDRESS + 4 * i, word);
 440         }
 441
 442         /* XXX: use skb->cb info */
 443         if (ar->hw->conf.channel->band == IEEE80211_BAND_2GHZ)
 444                 ar9170_regwrite(AR9170_MAC_REG_BCN_PLCP,
 445                                 ((skb->len + 4) << (3 + 16)) + 0x0400);
 446         else
 447                 ar9170_regwrite(AR9170_MAC_REG_BCN_PLCP,
 448                                 ((skb->len + 4) << 16) + 0x001b);
 449
 450         ar9170_regwrite(AR9170_MAC_REG_BCN_LENGTH, skb->len + 4);
 451         ar9170_regwrite(AR9170_MAC_REG_BCN_ADDR, AR9170_BEACON_BUFFER_ADDRESS);
 452         ar9170_regwrite(AR9170_MAC_REG_BCN_CTRL, 1);
 453
 454         ar9170_regwrite_finish();
 455
 456         dev_kfree_skb(ar->beacon);
 457         ar->beacon = skb;
 458
 459         return ar9170_regwrite_result();
 460 }
 461
 462 void ar9170_new_beacon(struct work_struct *work)
 463 {
 464         struct ar9170 *ar = container_of(work, struct ar9170,
 465                                          beacon_work);
 466         struct sk_buff *skb;
 467
 468         if (unlikely(!IS_STARTED(ar)))
 469                 return ;
 470
 471         mutex_lock(&ar->mutex);
 472
 473         if (!ar->vif)
 474                 goto out;
 475
 476         ar9170_update_beacon(ar);
 477
 478         rcu_read_lock();
 479         while ((skb = ieee80211_get_buffered_bc(ar->hw, ar->vif)))
 480                 ar9170_op_tx(ar->hw, skb);
 481
 482         rcu_read_unlock();
 483
 484  out:
 485         mutex_unlock(&ar->mutex);
 486 }
 487
 488 int ar9170_upload_key(struct ar9170 *ar, u8 id, const u8 *mac, u8 ktype,
 489                       u8 keyidx, u8 *keydata, int keylen)
 490 {
 491         __le32 vals[7];
 492         static const u8 bcast[ETH_ALEN] =
 493                 { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
 494         u8 dummy;
 495
 496         mac = mac ? : bcast;
 497
 498         vals[0] = cpu_to_le32((keyidx << 16) + id);
 499         vals[1] = cpu_to_le32(mac[1] << 24 | mac[0] << 16 | ktype);
 500         vals[2] = cpu_to_le32(mac[5] << 24 | mac[4] << 16 |
 501                               mac[3] << 8 | mac[2]);
 502         memset(&vals[3], 0, 16);
 503         if (keydata)
 504                 memcpy(&vals[3], keydata, keylen);
 505
 506         return ar->exec_cmd(ar, AR9170_CMD_EKEY,
 507                             sizeof(vals), (u8 *)vals,
 508                             1, &dummy);
 509 }
 510
 511 int ar9170_disable_key(struct ar9170 *ar, u8 id)
 512 {
 513         __le32 val = cpu_to_le32(id);
 514         u8 dummy;
 515
 516         return ar->exec_cmd(ar, AR9170_CMD_EKEY,
 517                             sizeof(val), (u8 *)&val,
 518                             1, &dummy);
 519 }