drm/radeon/kms: unify i2c handling
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / gpu / drm / radeon / radeon_mode.h
blob02d4e2af6180e3bd8655d979ed9dc42831f7d923
1 /*
2 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
3 * VA Linux Systems Inc., Fremont, California.
4 * Copyright 2008 Red Hat Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
24 * Original Authors:
25 * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
27 * Kernel port Author: Dave Airlie
30 #ifndef RADEON_MODE_H
31 #define RADEON_MODE_H
33 #include <drm_crtc.h>
34 #include <drm_mode.h>
35 #include <drm_edid.h>
36 #include <drm_dp_helper.h>
37 #include <drm_fixed.h>
38 #include <linux/i2c.h>
39 #include <linux/i2c-id.h>
40 #include <linux/i2c-algo-bit.h>
42 struct radeon_bo;
43 struct radeon_device;
45 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
46 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
47 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
48 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
50 enum radeon_rmx_type {
51 RMX_OFF,
52 RMX_FULL,
53 RMX_CENTER,
54 RMX_ASPECT
57 enum radeon_tv_std {
58 TV_STD_NTSC,
59 TV_STD_PAL,
60 TV_STD_PAL_M,
61 TV_STD_PAL_60,
62 TV_STD_NTSC_J,
63 TV_STD_SCART_PAL,
64 TV_STD_SECAM,
65 TV_STD_PAL_CN,
66 TV_STD_PAL_N,
69 enum radeon_underscan_type {
70 UNDERSCAN_OFF,
71 UNDERSCAN_ON,
72 UNDERSCAN_AUTO,
75 enum radeon_hpd_id {
76 RADEON_HPD_1 = 0,
77 RADEON_HPD_2,
78 RADEON_HPD_3,
79 RADEON_HPD_4,
80 RADEON_HPD_5,
81 RADEON_HPD_6,
82 RADEON_HPD_NONE = 0xff,
85 #define RADEON_MAX_I2C_BUS 16
87 /* radeon gpio-based i2c
88 * 1. "mask" reg and bits
89 * grabs the gpio pins for software use
90 * 0=not held 1=held
91 * 2. "a" reg and bits
92 * output pin value
93 * 0=low 1=high
94 * 3. "en" reg and bits
95 * sets the pin direction
96 * 0=input 1=output
97 * 4. "y" reg and bits
98 * input pin value
99 * 0=low 1=high
101 struct radeon_i2c_bus_rec {
102 bool valid;
103 /* id used by atom */
104 uint8_t i2c_id;
105 /* id used by atom */
106 enum radeon_hpd_id hpd;
107 /* can be used with hw i2c engine */
108 bool hw_capable;
109 /* uses multi-media i2c engine */
110 bool mm_i2c;
111 /* regs and bits */
112 uint32_t mask_clk_reg;
113 uint32_t mask_data_reg;
114 uint32_t a_clk_reg;
115 uint32_t a_data_reg;
116 uint32_t en_clk_reg;
117 uint32_t en_data_reg;
118 uint32_t y_clk_reg;
119 uint32_t y_data_reg;
120 uint32_t mask_clk_mask;
121 uint32_t mask_data_mask;
122 uint32_t a_clk_mask;
123 uint32_t a_data_mask;
124 uint32_t en_clk_mask;
125 uint32_t en_data_mask;
126 uint32_t y_clk_mask;
127 uint32_t y_data_mask;
130 struct radeon_tmds_pll {
131 uint32_t freq;
132 uint32_t value;
135 #define RADEON_MAX_BIOS_CONNECTOR 16
137 /* pll flags */
138 #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
139 #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
140 #define RADEON_PLL_USE_REF_DIV (1 << 2)
141 #define RADEON_PLL_LEGACY (1 << 3)
142 #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
143 #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
144 #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
145 #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
146 #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
147 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
148 #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
149 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
150 #define RADEON_PLL_USE_POST_DIV (1 << 12)
151 #define RADEON_PLL_IS_LCD (1 << 13)
153 /* pll algo */
154 enum radeon_pll_algo {
155 PLL_ALGO_LEGACY,
156 PLL_ALGO_NEW
159 struct radeon_pll {
160 /* reference frequency */
161 uint32_t reference_freq;
163 /* fixed dividers */
164 uint32_t reference_div;
165 uint32_t post_div;
167 /* pll in/out limits */
168 uint32_t pll_in_min;
169 uint32_t pll_in_max;
170 uint32_t pll_out_min;
171 uint32_t pll_out_max;
172 uint32_t lcd_pll_out_min;
173 uint32_t lcd_pll_out_max;
174 uint32_t best_vco;
176 /* divider limits */
177 uint32_t min_ref_div;
178 uint32_t max_ref_div;
179 uint32_t min_post_div;
180 uint32_t max_post_div;
181 uint32_t min_feedback_div;
182 uint32_t max_feedback_div;
183 uint32_t min_frac_feedback_div;
184 uint32_t max_frac_feedback_div;
186 /* flags for the current clock */
187 uint32_t flags;
189 /* pll id */
190 uint32_t id;
191 /* pll algo */
192 enum radeon_pll_algo algo;
195 struct radeon_i2c_chan {
196 struct i2c_adapter adapter;
197 struct drm_device *dev;
198 union {
199 struct i2c_algo_bit_data bit;
200 struct i2c_algo_dp_aux_data dp;
201 } algo;
202 struct radeon_i2c_bus_rec rec;
205 /* mostly for macs, but really any system without connector tables */
206 enum radeon_connector_table {
207 CT_NONE,
208 CT_GENERIC,
209 CT_IBOOK,
210 CT_POWERBOOK_EXTERNAL,
211 CT_POWERBOOK_INTERNAL,
212 CT_POWERBOOK_VGA,
213 CT_MINI_EXTERNAL,
214 CT_MINI_INTERNAL,
215 CT_IMAC_G5_ISIGHT,
216 CT_EMAC,
217 CT_RN50_POWER,
220 enum radeon_dvo_chip {
221 DVO_SIL164,
222 DVO_SIL1178,
225 struct radeon_fbdev;
227 struct radeon_mode_info {
228 struct atom_context *atom_context;
229 struct card_info *atom_card_info;
230 enum radeon_connector_table connector_table;
231 bool mode_config_initialized;
232 struct radeon_crtc *crtcs[6];
233 /* DVI-I properties */
234 struct drm_property *coherent_mode_property;
235 /* DAC enable load detect */
236 struct drm_property *load_detect_property;
237 /* TV standard */
238 struct drm_property *tv_std_property;
239 /* legacy TMDS PLL detect */
240 struct drm_property *tmds_pll_property;
241 /* underscan */
242 struct drm_property *underscan_property;
243 /* hardcoded DFP edid from BIOS */
244 struct edid *bios_hardcoded_edid;
246 /* pointer to fbdev info structure */
247 struct radeon_fbdev *rfbdev;
250 #define MAX_H_CODE_TIMING_LEN 32
251 #define MAX_V_CODE_TIMING_LEN 32
253 /* need to store these as reading
254 back code tables is excessive */
255 struct radeon_tv_regs {
256 uint32_t tv_uv_adr;
257 uint32_t timing_cntl;
258 uint32_t hrestart;
259 uint32_t vrestart;
260 uint32_t frestart;
261 uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
262 uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
265 struct radeon_crtc {
266 struct drm_crtc base;
267 int crtc_id;
268 u16 lut_r[256], lut_g[256], lut_b[256];
269 bool enabled;
270 bool can_tile;
271 uint32_t crtc_offset;
272 struct drm_gem_object *cursor_bo;
273 uint64_t cursor_addr;
274 int cursor_width;
275 int cursor_height;
276 uint32_t legacy_display_base_addr;
277 uint32_t legacy_cursor_offset;
278 enum radeon_rmx_type rmx_type;
279 u8 h_border;
280 u8 v_border;
281 fixed20_12 vsc;
282 fixed20_12 hsc;
283 struct drm_display_mode native_mode;
284 int pll_id;
287 struct radeon_encoder_primary_dac {
288 /* legacy primary dac */
289 uint32_t ps2_pdac_adj;
292 struct radeon_encoder_lvds {
293 /* legacy lvds */
294 uint16_t panel_vcc_delay;
295 uint8_t panel_pwr_delay;
296 uint8_t panel_digon_delay;
297 uint8_t panel_blon_delay;
298 uint16_t panel_ref_divider;
299 uint8_t panel_post_divider;
300 uint16_t panel_fb_divider;
301 bool use_bios_dividers;
302 uint32_t lvds_gen_cntl;
303 /* panel mode */
304 struct drm_display_mode native_mode;
307 struct radeon_encoder_tv_dac {
308 /* legacy tv dac */
309 uint32_t ps2_tvdac_adj;
310 uint32_t ntsc_tvdac_adj;
311 uint32_t pal_tvdac_adj;
313 int h_pos;
314 int v_pos;
315 int h_size;
316 int supported_tv_stds;
317 bool tv_on;
318 enum radeon_tv_std tv_std;
319 struct radeon_tv_regs tv;
322 struct radeon_encoder_int_tmds {
323 /* legacy int tmds */
324 struct radeon_tmds_pll tmds_pll[4];
327 struct radeon_encoder_ext_tmds {
328 /* tmds over dvo */
329 struct radeon_i2c_chan *i2c_bus;
330 uint8_t slave_addr;
331 enum radeon_dvo_chip dvo_chip;
334 /* spread spectrum */
335 struct radeon_atom_ss {
336 uint16_t percentage;
337 uint8_t type;
338 uint8_t step;
339 uint8_t delay;
340 uint8_t range;
341 uint8_t refdiv;
344 struct radeon_encoder_atom_dig {
345 /* atom dig */
346 bool coherent_mode;
347 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB */
348 /* atom lvds */
349 uint32_t lvds_misc;
350 uint16_t panel_pwr_delay;
351 enum radeon_pll_algo pll_algo;
352 struct radeon_atom_ss *ss;
353 /* panel mode */
354 struct drm_display_mode native_mode;
357 struct radeon_encoder_atom_dac {
358 enum radeon_tv_std tv_std;
361 struct radeon_encoder {
362 struct drm_encoder base;
363 uint32_t encoder_id;
364 uint32_t devices;
365 uint32_t active_device;
366 uint32_t flags;
367 uint32_t pixel_clock;
368 enum radeon_rmx_type rmx_type;
369 enum radeon_underscan_type underscan_type;
370 struct drm_display_mode native_mode;
371 void *enc_priv;
372 int audio_polling_active;
373 int hdmi_offset;
374 int hdmi_config_offset;
375 int hdmi_audio_workaround;
376 int hdmi_buffer_status;
379 struct radeon_connector_atom_dig {
380 uint32_t igp_lane_info;
381 bool linkb;
382 /* displayport */
383 struct radeon_i2c_chan *dp_i2c_bus;
384 u8 dpcd[8];
385 u8 dp_sink_type;
386 int dp_clock;
387 int dp_lane_count;
390 struct radeon_gpio_rec {
391 bool valid;
392 u8 id;
393 u32 reg;
394 u32 mask;
397 struct radeon_hpd {
398 enum radeon_hpd_id hpd;
399 u8 plugged_state;
400 struct radeon_gpio_rec gpio;
403 struct radeon_connector {
404 struct drm_connector base;
405 uint32_t connector_id;
406 uint32_t devices;
407 struct radeon_i2c_chan *ddc_bus;
408 /* some systems have an hdmi and vga port with a shared ddc line */
409 bool shared_ddc;
410 bool use_digital;
411 /* we need to mind the EDID between detect
412 and get modes due to analog/digital/tvencoder */
413 struct edid *edid;
414 void *con_priv;
415 bool dac_load_detect;
416 uint16_t connector_object_id;
417 struct radeon_hpd hpd;
420 struct radeon_framebuffer {
421 struct drm_framebuffer base;
422 struct drm_gem_object *obj;
425 extern enum radeon_tv_std
426 radeon_combios_get_tv_info(struct radeon_device *rdev);
427 extern enum radeon_tv_std
428 radeon_atombios_get_tv_info(struct radeon_device *rdev);
430 extern struct drm_connector *
431 radeon_get_connector_for_encoder(struct drm_encoder *encoder);
433 extern void radeon_connector_hotplug(struct drm_connector *connector);
434 extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
435 extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector,
436 struct drm_display_mode *mode);
437 extern void radeon_dp_set_link_config(struct drm_connector *connector,
438 struct drm_display_mode *mode);
439 extern void dp_link_train(struct drm_encoder *encoder,
440 struct drm_connector *connector);
441 extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
442 extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
443 extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action);
444 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
445 int action, uint8_t lane_num,
446 uint8_t lane_set);
447 extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
448 uint8_t write_byte, uint8_t *read_byte);
450 extern void radeon_i2c_init(struct radeon_device *rdev);
451 extern void radeon_i2c_fini(struct radeon_device *rdev);
452 extern void radeon_combios_i2c_init(struct radeon_device *rdev);
453 extern void radeon_atombios_i2c_init(struct radeon_device *rdev);
454 extern void radeon_i2c_add(struct radeon_device *rdev,
455 struct radeon_i2c_bus_rec *rec,
456 const char *name);
457 extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev,
458 struct radeon_i2c_bus_rec *i2c_bus);
459 extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
460 struct radeon_i2c_bus_rec *rec,
461 const char *name);
462 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
463 struct radeon_i2c_bus_rec *rec,
464 const char *name);
465 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
466 extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus,
467 u8 slave_addr,
468 u8 addr,
469 u8 *val);
470 extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
471 u8 slave_addr,
472 u8 addr,
473 u8 val);
474 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
475 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
477 extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
479 extern void radeon_compute_pll(struct radeon_pll *pll,
480 uint64_t freq,
481 uint32_t *dot_clock_p,
482 uint32_t *fb_div_p,
483 uint32_t *frac_fb_div_p,
484 uint32_t *ref_div_p,
485 uint32_t *post_div_p);
487 extern void radeon_setup_encoder_clones(struct drm_device *dev);
489 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
490 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
491 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
492 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
493 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
494 extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
495 extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
496 extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
497 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
499 extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
500 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
501 struct drm_framebuffer *old_fb);
502 extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
503 struct drm_display_mode *mode,
504 struct drm_display_mode *adjusted_mode,
505 int x, int y,
506 struct drm_framebuffer *old_fb);
507 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
509 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
510 struct drm_framebuffer *old_fb);
512 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
513 struct drm_file *file_priv,
514 uint32_t handle,
515 uint32_t width,
516 uint32_t height);
517 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
518 int x, int y);
520 extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
521 extern struct edid *
522 radeon_combios_get_hardcoded_edid(struct radeon_device *rdev);
523 extern bool radeon_atom_get_clock_info(struct drm_device *dev);
524 extern bool radeon_combios_get_clock_info(struct drm_device *dev);
525 extern struct radeon_encoder_atom_dig *
526 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
527 extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
528 struct radeon_encoder_int_tmds *tmds);
529 extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
530 struct radeon_encoder_int_tmds *tmds);
531 extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
532 struct radeon_encoder_int_tmds *tmds);
533 extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
534 struct radeon_encoder_ext_tmds *tmds);
535 extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
536 struct radeon_encoder_ext_tmds *tmds);
537 extern struct radeon_encoder_primary_dac *
538 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
539 extern struct radeon_encoder_tv_dac *
540 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
541 extern struct radeon_encoder_lvds *
542 radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
543 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
544 extern struct radeon_encoder_tv_dac *
545 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
546 extern struct radeon_encoder_primary_dac *
547 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
548 extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
549 extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
550 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
551 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
552 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
553 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
554 extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
555 extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
556 extern void
557 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
558 extern void
559 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
560 extern void
561 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
562 extern void
563 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
564 extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
565 u16 blue, int regno);
566 extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
567 u16 *blue, int regno);
568 void radeon_framebuffer_init(struct drm_device *dev,
569 struct radeon_framebuffer *rfb,
570 struct drm_mode_fb_cmd *mode_cmd,
571 struct drm_gem_object *obj);
573 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
574 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
575 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
576 void radeon_atombios_init_crtc(struct drm_device *dev,
577 struct radeon_crtc *radeon_crtc);
578 void radeon_legacy_init_crtc(struct drm_device *dev,
579 struct radeon_crtc *radeon_crtc);
581 void radeon_get_clock_info(struct drm_device *dev);
583 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
584 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
586 void radeon_enc_destroy(struct drm_encoder *encoder);
587 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
588 void radeon_combios_asic_init(struct drm_device *dev);
589 extern int radeon_static_clocks_init(struct drm_device *dev);
590 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
591 struct drm_display_mode *mode,
592 struct drm_display_mode *adjusted_mode);
593 void radeon_panel_mode_fixup(struct drm_encoder *encoder,
594 struct drm_display_mode *adjusted_mode);
595 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
597 /* legacy tv */
598 void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
599 uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
600 uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
601 void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
602 uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
603 uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
604 void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
605 uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
606 uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
607 void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
608 struct drm_display_mode *mode,
609 struct drm_display_mode *adjusted_mode);
611 /* fbdev layer */
612 int radeon_fbdev_init(struct radeon_device *rdev);
613 void radeon_fbdev_fini(struct radeon_device *rdev);
614 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state);
615 int radeon_fbdev_total_size(struct radeon_device *rdev);
616 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj);
618 void radeon_fb_output_poll_changed(struct radeon_device *rdev);
619 #endif