3 * Broadcom B43legacy wireless driver
5 * Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
6 * Copyright (c) 2005 Stefano Brivio <st3@riseup.net>
7 * Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
8 * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
9 * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10 * Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
12 * Some parts of the code in this file are derived from the ipw2200
13 * driver Copyright(c) 2003 - 2004 Intel Corporation.
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; see the file COPYING. If not, write to
27 * the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
28 * Boston, MA 02110-1301, USA.
32 #include <linux/delay.h>
33 #include <linux/init.h>
34 #include <linux/moduleparam.h>
35 #include <linux/if_arp.h>
36 #include <linux/etherdevice.h>
37 #include <linux/version.h>
38 #include <linux/firmware.h>
39 #include <linux/wireless.h>
40 #include <linux/workqueue.h>
41 #include <linux/skbuff.h>
42 #include <linux/dma-mapping.h>
44 #include <asm/unaligned.h>
46 #include "b43legacy.h"
57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
58 MODULE_AUTHOR("Martin Langer");
59 MODULE_AUTHOR("Stefano Brivio");
60 MODULE_AUTHOR("Michael Buesch");
61 MODULE_LICENSE("GPL");
63 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
64 static int modparam_pio
;
65 module_param_named(pio
, modparam_pio
, int, 0444);
66 MODULE_PARM_DESC(pio
, "enable(1) / disable(0) PIO mode");
67 #elif defined(CONFIG_B43LEGACY_DMA)
68 # define modparam_pio 0
69 #elif defined(CONFIG_B43LEGACY_PIO)
70 # define modparam_pio 1
73 static int modparam_bad_frames_preempt
;
74 module_param_named(bad_frames_preempt
, modparam_bad_frames_preempt
, int, 0444);
75 MODULE_PARM_DESC(bad_frames_preempt
, "enable(1) / disable(0) Bad Frames"
78 static int modparam_short_retry
= B43legacy_DEFAULT_SHORT_RETRY_LIMIT
;
79 module_param_named(short_retry
, modparam_short_retry
, int, 0444);
80 MODULE_PARM_DESC(short_retry
, "Short-Retry-Limit (0 - 15)");
82 static int modparam_long_retry
= B43legacy_DEFAULT_LONG_RETRY_LIMIT
;
83 module_param_named(long_retry
, modparam_long_retry
, int, 0444);
84 MODULE_PARM_DESC(long_retry
, "Long-Retry-Limit (0 - 15)");
86 static char modparam_fwpostfix
[16];
87 module_param_string(fwpostfix
, modparam_fwpostfix
, 16, 0444);
88 MODULE_PARM_DESC(fwpostfix
, "Postfix for the firmware files to load.");
90 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
91 static const struct ssb_device_id b43legacy_ssb_tbl
[] = {
92 SSB_DEVICE(SSB_VENDOR_BROADCOM
, SSB_DEV_80211
, 2),
93 SSB_DEVICE(SSB_VENDOR_BROADCOM
, SSB_DEV_80211
, 4),
96 MODULE_DEVICE_TABLE(ssb
, b43legacy_ssb_tbl
);
99 /* Channel and ratetables are shared for all devices.
100 * They can't be const, because ieee80211 puts some precalculated
101 * data in there. This data is the same for all devices, so we don't
102 * get concurrency issues */
103 #define RATETAB_ENT(_rateid, _flags) \
105 .rate = B43legacy_RATE_TO_100KBPS(_rateid), \
110 static struct ieee80211_rate __b43legacy_ratetable
[] = {
111 RATETAB_ENT(B43legacy_CCK_RATE_1MB
, IEEE80211_RATE_CCK
),
112 RATETAB_ENT(B43legacy_CCK_RATE_2MB
, IEEE80211_RATE_CCK_2
),
113 RATETAB_ENT(B43legacy_CCK_RATE_5MB
, IEEE80211_RATE_CCK_2
),
114 RATETAB_ENT(B43legacy_CCK_RATE_11MB
, IEEE80211_RATE_CCK_2
),
115 RATETAB_ENT(B43legacy_OFDM_RATE_6MB
, IEEE80211_RATE_OFDM
),
116 RATETAB_ENT(B43legacy_OFDM_RATE_9MB
, IEEE80211_RATE_OFDM
),
117 RATETAB_ENT(B43legacy_OFDM_RATE_12MB
, IEEE80211_RATE_OFDM
),
118 RATETAB_ENT(B43legacy_OFDM_RATE_18MB
, IEEE80211_RATE_OFDM
),
119 RATETAB_ENT(B43legacy_OFDM_RATE_24MB
, IEEE80211_RATE_OFDM
),
120 RATETAB_ENT(B43legacy_OFDM_RATE_36MB
, IEEE80211_RATE_OFDM
),
121 RATETAB_ENT(B43legacy_OFDM_RATE_48MB
, IEEE80211_RATE_OFDM
),
122 RATETAB_ENT(B43legacy_OFDM_RATE_54MB
, IEEE80211_RATE_OFDM
),
124 #define b43legacy_a_ratetable (__b43legacy_ratetable + 4)
125 #define b43legacy_a_ratetable_size 8
126 #define b43legacy_b_ratetable (__b43legacy_ratetable + 0)
127 #define b43legacy_b_ratetable_size 4
128 #define b43legacy_g_ratetable (__b43legacy_ratetable + 0)
129 #define b43legacy_g_ratetable_size 12
131 #define CHANTAB_ENT(_chanid, _freq) \
136 .flag = IEEE80211_CHAN_W_SCAN | \
137 IEEE80211_CHAN_W_ACTIVE_SCAN | \
138 IEEE80211_CHAN_W_IBSS, \
139 .power_level = 0x0A, \
140 .antenna_max = 0xFF, \
142 static struct ieee80211_channel b43legacy_bg_chantable
[] = {
143 CHANTAB_ENT(1, 2412),
144 CHANTAB_ENT(2, 2417),
145 CHANTAB_ENT(3, 2422),
146 CHANTAB_ENT(4, 2427),
147 CHANTAB_ENT(5, 2432),
148 CHANTAB_ENT(6, 2437),
149 CHANTAB_ENT(7, 2442),
150 CHANTAB_ENT(8, 2447),
151 CHANTAB_ENT(9, 2452),
152 CHANTAB_ENT(10, 2457),
153 CHANTAB_ENT(11, 2462),
154 CHANTAB_ENT(12, 2467),
155 CHANTAB_ENT(13, 2472),
156 CHANTAB_ENT(14, 2484),
158 #define b43legacy_bg_chantable_size ARRAY_SIZE(b43legacy_bg_chantable)
160 static void b43legacy_wireless_core_exit(struct b43legacy_wldev
*dev
);
161 static int b43legacy_wireless_core_init(struct b43legacy_wldev
*dev
);
162 static void b43legacy_wireless_core_stop(struct b43legacy_wldev
*dev
);
163 static int b43legacy_wireless_core_start(struct b43legacy_wldev
*dev
);
166 static int b43legacy_ratelimit(struct b43legacy_wl
*wl
)
168 if (!wl
|| !wl
->current_dev
)
170 if (b43legacy_status(wl
->current_dev
) < B43legacy_STAT_STARTED
)
172 /* We are up and running.
173 * Ratelimit the messages to avoid DoS over the net. */
174 return net_ratelimit();
177 void b43legacyinfo(struct b43legacy_wl
*wl
, const char *fmt
, ...)
181 if (!b43legacy_ratelimit(wl
))
184 printk(KERN_INFO
"b43legacy-%s: ",
185 (wl
&& wl
->hw
) ? wiphy_name(wl
->hw
->wiphy
) : "wlan");
190 void b43legacyerr(struct b43legacy_wl
*wl
, const char *fmt
, ...)
194 if (!b43legacy_ratelimit(wl
))
197 printk(KERN_ERR
"b43legacy-%s ERROR: ",
198 (wl
&& wl
->hw
) ? wiphy_name(wl
->hw
->wiphy
) : "wlan");
203 void b43legacywarn(struct b43legacy_wl
*wl
, const char *fmt
, ...)
207 if (!b43legacy_ratelimit(wl
))
210 printk(KERN_WARNING
"b43legacy-%s warning: ",
211 (wl
&& wl
->hw
) ? wiphy_name(wl
->hw
->wiphy
) : "wlan");
217 void b43legacydbg(struct b43legacy_wl
*wl
, const char *fmt
, ...)
222 printk(KERN_DEBUG
"b43legacy-%s debug: ",
223 (wl
&& wl
->hw
) ? wiphy_name(wl
->hw
->wiphy
) : "wlan");
229 static void b43legacy_ram_write(struct b43legacy_wldev
*dev
, u16 offset
,
234 B43legacy_WARN_ON(offset
% 4 != 0);
236 status
= b43legacy_read32(dev
, B43legacy_MMIO_STATUS_BITFIELD
);
237 if (status
& B43legacy_SBF_XFER_REG_BYTESWAP
)
240 b43legacy_write32(dev
, B43legacy_MMIO_RAM_CONTROL
, offset
);
242 b43legacy_write32(dev
, B43legacy_MMIO_RAM_DATA
, val
);
246 void b43legacy_shm_control_word(struct b43legacy_wldev
*dev
,
247 u16 routing
, u16 offset
)
251 /* "offset" is the WORD offset. */
256 b43legacy_write32(dev
, B43legacy_MMIO_SHM_CONTROL
, control
);
259 u32
b43legacy_shm_read32(struct b43legacy_wldev
*dev
,
260 u16 routing
, u16 offset
)
264 if (routing
== B43legacy_SHM_SHARED
) {
265 B43legacy_WARN_ON((offset
& 0x0001) != 0);
266 if (offset
& 0x0003) {
267 /* Unaligned access */
268 b43legacy_shm_control_word(dev
, routing
, offset
>> 2);
269 ret
= b43legacy_read16(dev
,
270 B43legacy_MMIO_SHM_DATA_UNALIGNED
);
272 b43legacy_shm_control_word(dev
, routing
,
274 ret
|= b43legacy_read16(dev
, B43legacy_MMIO_SHM_DATA
);
280 b43legacy_shm_control_word(dev
, routing
, offset
);
281 ret
= b43legacy_read32(dev
, B43legacy_MMIO_SHM_DATA
);
286 u16
b43legacy_shm_read16(struct b43legacy_wldev
*dev
,
287 u16 routing
, u16 offset
)
291 if (routing
== B43legacy_SHM_SHARED
) {
292 B43legacy_WARN_ON((offset
& 0x0001) != 0);
293 if (offset
& 0x0003) {
294 /* Unaligned access */
295 b43legacy_shm_control_word(dev
, routing
, offset
>> 2);
296 ret
= b43legacy_read16(dev
,
297 B43legacy_MMIO_SHM_DATA_UNALIGNED
);
303 b43legacy_shm_control_word(dev
, routing
, offset
);
304 ret
= b43legacy_read16(dev
, B43legacy_MMIO_SHM_DATA
);
309 void b43legacy_shm_write32(struct b43legacy_wldev
*dev
,
310 u16 routing
, u16 offset
,
313 if (routing
== B43legacy_SHM_SHARED
) {
314 B43legacy_WARN_ON((offset
& 0x0001) != 0);
315 if (offset
& 0x0003) {
316 /* Unaligned access */
317 b43legacy_shm_control_word(dev
, routing
, offset
>> 2);
319 b43legacy_write16(dev
,
320 B43legacy_MMIO_SHM_DATA_UNALIGNED
,
321 (value
>> 16) & 0xffff);
323 b43legacy_shm_control_word(dev
, routing
,
326 b43legacy_write16(dev
, B43legacy_MMIO_SHM_DATA
,
332 b43legacy_shm_control_word(dev
, routing
, offset
);
334 b43legacy_write32(dev
, B43legacy_MMIO_SHM_DATA
, value
);
337 void b43legacy_shm_write16(struct b43legacy_wldev
*dev
, u16 routing
, u16 offset
,
340 if (routing
== B43legacy_SHM_SHARED
) {
341 B43legacy_WARN_ON((offset
& 0x0001) != 0);
342 if (offset
& 0x0003) {
343 /* Unaligned access */
344 b43legacy_shm_control_word(dev
, routing
, offset
>> 2);
346 b43legacy_write16(dev
,
347 B43legacy_MMIO_SHM_DATA_UNALIGNED
,
353 b43legacy_shm_control_word(dev
, routing
, offset
);
355 b43legacy_write16(dev
, B43legacy_MMIO_SHM_DATA
, value
);
359 u32
b43legacy_hf_read(struct b43legacy_wldev
*dev
)
363 ret
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
364 B43legacy_SHM_SH_HOSTFHI
);
366 ret
|= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
367 B43legacy_SHM_SH_HOSTFLO
);
372 /* Write HostFlags */
373 void b43legacy_hf_write(struct b43legacy_wldev
*dev
, u32 value
)
375 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
376 B43legacy_SHM_SH_HOSTFLO
,
377 (value
& 0x0000FFFF));
378 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
379 B43legacy_SHM_SH_HOSTFHI
,
380 ((value
& 0xFFFF0000) >> 16));
383 void b43legacy_tsf_read(struct b43legacy_wldev
*dev
, u64
*tsf
)
385 /* We need to be careful. As we read the TSF from multiple
386 * registers, we should take care of register overflows.
387 * In theory, the whole tsf read process should be atomic.
388 * We try to be atomic here, by restaring the read process,
389 * if any of the high registers changed (overflew).
391 if (dev
->dev
->id
.revision
>= 3) {
397 high
= b43legacy_read32(dev
,
398 B43legacy_MMIO_REV3PLUS_TSF_HIGH
);
399 low
= b43legacy_read32(dev
,
400 B43legacy_MMIO_REV3PLUS_TSF_LOW
);
401 high2
= b43legacy_read32(dev
,
402 B43legacy_MMIO_REV3PLUS_TSF_HIGH
);
403 } while (unlikely(high
!= high2
));
419 v3
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_3
);
420 v2
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_2
);
421 v1
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_1
);
422 v0
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_0
);
424 test3
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_3
);
425 test2
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_2
);
426 test1
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_1
);
427 } while (v3
!= test3
|| v2
!= test2
|| v1
!= test1
);
441 static void b43legacy_time_lock(struct b43legacy_wldev
*dev
)
445 status
= b43legacy_read32(dev
, B43legacy_MMIO_STATUS_BITFIELD
);
446 status
|= B43legacy_SBF_TIME_UPDATE
;
447 b43legacy_write32(dev
, B43legacy_MMIO_STATUS_BITFIELD
, status
);
451 static void b43legacy_time_unlock(struct b43legacy_wldev
*dev
)
455 status
= b43legacy_read32(dev
, B43legacy_MMIO_STATUS_BITFIELD
);
456 status
&= ~B43legacy_SBF_TIME_UPDATE
;
457 b43legacy_write32(dev
, B43legacy_MMIO_STATUS_BITFIELD
, status
);
460 static void b43legacy_tsf_write_locked(struct b43legacy_wldev
*dev
, u64 tsf
)
462 /* Be careful with the in-progress timer.
463 * First zero out the low register, so we have a full
464 * register-overflow duration to complete the operation.
466 if (dev
->dev
->id
.revision
>= 3) {
467 u32 lo
= (tsf
& 0x00000000FFFFFFFFULL
);
468 u32 hi
= (tsf
& 0xFFFFFFFF00000000ULL
) >> 32;
470 b43legacy_write32(dev
, B43legacy_MMIO_REV3PLUS_TSF_LOW
, 0);
472 b43legacy_write32(dev
, B43legacy_MMIO_REV3PLUS_TSF_HIGH
,
475 b43legacy_write32(dev
, B43legacy_MMIO_REV3PLUS_TSF_LOW
,
478 u16 v0
= (tsf
& 0x000000000000FFFFULL
);
479 u16 v1
= (tsf
& 0x00000000FFFF0000ULL
) >> 16;
480 u16 v2
= (tsf
& 0x0000FFFF00000000ULL
) >> 32;
481 u16 v3
= (tsf
& 0xFFFF000000000000ULL
) >> 48;
483 b43legacy_write16(dev
, B43legacy_MMIO_TSF_0
, 0);
485 b43legacy_write16(dev
, B43legacy_MMIO_TSF_3
, v3
);
487 b43legacy_write16(dev
, B43legacy_MMIO_TSF_2
, v2
);
489 b43legacy_write16(dev
, B43legacy_MMIO_TSF_1
, v1
);
491 b43legacy_write16(dev
, B43legacy_MMIO_TSF_0
, v0
);
495 void b43legacy_tsf_write(struct b43legacy_wldev
*dev
, u64 tsf
)
497 b43legacy_time_lock(dev
);
498 b43legacy_tsf_write_locked(dev
, tsf
);
499 b43legacy_time_unlock(dev
);
503 void b43legacy_macfilter_set(struct b43legacy_wldev
*dev
,
504 u16 offset
, const u8
*mac
)
506 static const u8 zero_addr
[ETH_ALEN
] = { 0 };
513 b43legacy_write16(dev
, B43legacy_MMIO_MACFILTER_CONTROL
, offset
);
517 b43legacy_write16(dev
, B43legacy_MMIO_MACFILTER_DATA
, data
);
520 b43legacy_write16(dev
, B43legacy_MMIO_MACFILTER_DATA
, data
);
523 b43legacy_write16(dev
, B43legacy_MMIO_MACFILTER_DATA
, data
);
526 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev
*dev
)
528 static const u8 zero_addr
[ETH_ALEN
] = { 0 };
529 const u8
*mac
= dev
->wl
->mac_addr
;
530 const u8
*bssid
= dev
->wl
->bssid
;
531 u8 mac_bssid
[ETH_ALEN
* 2];
540 b43legacy_macfilter_set(dev
, B43legacy_MACFILTER_BSSID
, bssid
);
542 memcpy(mac_bssid
, mac
, ETH_ALEN
);
543 memcpy(mac_bssid
+ ETH_ALEN
, bssid
, ETH_ALEN
);
545 /* Write our MAC address and BSSID to template ram */
546 for (i
= 0; i
< ARRAY_SIZE(mac_bssid
); i
+= sizeof(u32
)) {
547 tmp
= (u32
)(mac_bssid
[i
+ 0]);
548 tmp
|= (u32
)(mac_bssid
[i
+ 1]) << 8;
549 tmp
|= (u32
)(mac_bssid
[i
+ 2]) << 16;
550 tmp
|= (u32
)(mac_bssid
[i
+ 3]) << 24;
551 b43legacy_ram_write(dev
, 0x20 + i
, tmp
);
552 b43legacy_ram_write(dev
, 0x78 + i
, tmp
);
553 b43legacy_ram_write(dev
, 0x478 + i
, tmp
);
557 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev
*dev
)
559 b43legacy_write_mac_bssid_templates(dev
);
560 b43legacy_macfilter_set(dev
, B43legacy_MACFILTER_SELF
,
564 static void b43legacy_set_slot_time(struct b43legacy_wldev
*dev
,
567 /* slot_time is in usec. */
568 if (dev
->phy
.type
!= B43legacy_PHYTYPE_G
)
570 b43legacy_write16(dev
, 0x684, 510 + slot_time
);
571 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x0010,
575 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev
*dev
)
577 b43legacy_set_slot_time(dev
, 9);
581 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev
*dev
)
583 b43legacy_set_slot_time(dev
, 20);
587 /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
588 * Returns the _previously_ enabled IRQ mask.
590 static inline u32
b43legacy_interrupt_enable(struct b43legacy_wldev
*dev
,
595 old_mask
= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
);
596 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
, old_mask
|
602 /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
603 * Returns the _previously_ enabled IRQ mask.
605 static inline u32
b43legacy_interrupt_disable(struct b43legacy_wldev
*dev
,
610 old_mask
= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
);
611 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
, old_mask
& ~mask
);
616 /* Synchronize IRQ top- and bottom-half.
617 * IRQs must be masked before calling this.
618 * This must not be called with the irq_lock held.
620 static void b43legacy_synchronize_irq(struct b43legacy_wldev
*dev
)
622 synchronize_irq(dev
->dev
->irq
);
623 tasklet_kill(&dev
->isr_tasklet
);
626 /* DummyTransmission function, as documented on
627 * http://bcm-specs.sipsolutions.net/DummyTransmission
629 void b43legacy_dummy_transmission(struct b43legacy_wldev
*dev
)
631 struct b43legacy_phy
*phy
= &dev
->phy
;
633 unsigned int max_loop
;
644 case B43legacy_PHYTYPE_B
:
645 case B43legacy_PHYTYPE_G
:
647 buffer
[0] = 0x000B846E;
654 for (i
= 0; i
< 5; i
++)
655 b43legacy_ram_write(dev
, i
* 4, buffer
[i
]);
657 /* dummy read follows */
658 b43legacy_read32(dev
, B43legacy_MMIO_STATUS_BITFIELD
);
660 b43legacy_write16(dev
, 0x0568, 0x0000);
661 b43legacy_write16(dev
, 0x07C0, 0x0000);
662 b43legacy_write16(dev
, 0x050C, 0x0000);
663 b43legacy_write16(dev
, 0x0508, 0x0000);
664 b43legacy_write16(dev
, 0x050A, 0x0000);
665 b43legacy_write16(dev
, 0x054C, 0x0000);
666 b43legacy_write16(dev
, 0x056A, 0x0014);
667 b43legacy_write16(dev
, 0x0568, 0x0826);
668 b43legacy_write16(dev
, 0x0500, 0x0000);
669 b43legacy_write16(dev
, 0x0502, 0x0030);
671 if (phy
->radio_ver
== 0x2050 && phy
->radio_rev
<= 0x5)
672 b43legacy_radio_write16(dev
, 0x0051, 0x0017);
673 for (i
= 0x00; i
< max_loop
; i
++) {
674 value
= b43legacy_read16(dev
, 0x050E);
679 for (i
= 0x00; i
< 0x0A; i
++) {
680 value
= b43legacy_read16(dev
, 0x050E);
685 for (i
= 0x00; i
< 0x0A; i
++) {
686 value
= b43legacy_read16(dev
, 0x0690);
687 if (!(value
& 0x0100))
691 if (phy
->radio_ver
== 0x2050 && phy
->radio_rev
<= 0x5)
692 b43legacy_radio_write16(dev
, 0x0051, 0x0037);
695 /* Turn the Analog ON/OFF */
696 static void b43legacy_switch_analog(struct b43legacy_wldev
*dev
, int on
)
698 b43legacy_write16(dev
, B43legacy_MMIO_PHY0
, on
? 0 : 0xF4);
701 void b43legacy_wireless_core_reset(struct b43legacy_wldev
*dev
, u32 flags
)
706 flags
|= B43legacy_TMSLOW_PHYCLKEN
;
707 flags
|= B43legacy_TMSLOW_PHYRESET
;
708 ssb_device_enable(dev
->dev
, flags
);
709 msleep(2); /* Wait for the PLL to turn on. */
711 /* Now take the PHY out of Reset again */
712 tmslow
= ssb_read32(dev
->dev
, SSB_TMSLOW
);
713 tmslow
|= SSB_TMSLOW_FGC
;
714 tmslow
&= ~B43legacy_TMSLOW_PHYRESET
;
715 ssb_write32(dev
->dev
, SSB_TMSLOW
, tmslow
);
716 ssb_read32(dev
->dev
, SSB_TMSLOW
); /* flush */
718 tmslow
&= ~SSB_TMSLOW_FGC
;
719 ssb_write32(dev
->dev
, SSB_TMSLOW
, tmslow
);
720 ssb_read32(dev
->dev
, SSB_TMSLOW
); /* flush */
724 b43legacy_switch_analog(dev
, 1);
726 macctl
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
727 macctl
&= ~B43legacy_MACCTL_GMODE
;
728 if (flags
& B43legacy_TMSLOW_GMODE
) {
729 macctl
|= B43legacy_MACCTL_GMODE
;
733 macctl
|= B43legacy_MACCTL_IHR_ENABLED
;
734 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, macctl
);
737 static void handle_irq_transmit_status(struct b43legacy_wldev
*dev
)
742 struct b43legacy_txstatus stat
;
745 v0
= b43legacy_read32(dev
, B43legacy_MMIO_XMITSTAT_0
);
746 if (!(v0
& 0x00000001))
748 v1
= b43legacy_read32(dev
, B43legacy_MMIO_XMITSTAT_1
);
750 stat
.cookie
= (v0
>> 16);
751 stat
.seq
= (v1
& 0x0000FFFF);
752 stat
.phy_stat
= ((v1
& 0x00FF0000) >> 16);
753 tmp
= (v0
& 0x0000FFFF);
754 stat
.frame_count
= ((tmp
& 0xF000) >> 12);
755 stat
.rts_count
= ((tmp
& 0x0F00) >> 8);
756 stat
.supp_reason
= ((tmp
& 0x001C) >> 2);
757 stat
.pm_indicated
= !!(tmp
& 0x0080);
758 stat
.intermediate
= !!(tmp
& 0x0040);
759 stat
.for_ampdu
= !!(tmp
& 0x0020);
760 stat
.acked
= !!(tmp
& 0x0002);
762 b43legacy_handle_txstatus(dev
, &stat
);
766 static void drain_txstatus_queue(struct b43legacy_wldev
*dev
)
770 if (dev
->dev
->id
.revision
< 5)
772 /* Read all entries from the microcode TXstatus FIFO
773 * and throw them away.
776 dummy
= b43legacy_read32(dev
, B43legacy_MMIO_XMITSTAT_0
);
777 if (!(dummy
& 0x00000001))
779 dummy
= b43legacy_read32(dev
, B43legacy_MMIO_XMITSTAT_1
);
783 static u32
b43legacy_jssi_read(struct b43legacy_wldev
*dev
)
787 val
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
, 0x40A);
789 val
|= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
, 0x408);
794 static void b43legacy_jssi_write(struct b43legacy_wldev
*dev
, u32 jssi
)
796 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x408,
797 (jssi
& 0x0000FFFF));
798 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x40A,
799 (jssi
& 0xFFFF0000) >> 16);
802 static void b43legacy_generate_noise_sample(struct b43legacy_wldev
*dev
)
804 b43legacy_jssi_write(dev
, 0x7F7F7F7F);
805 b43legacy_write32(dev
, B43legacy_MMIO_STATUS2_BITFIELD
,
806 b43legacy_read32(dev
,
807 B43legacy_MMIO_STATUS2_BITFIELD
)
809 B43legacy_WARN_ON(dev
->noisecalc
.channel_at_start
!=
813 static void b43legacy_calculate_link_quality(struct b43legacy_wldev
*dev
)
815 /* Top half of Link Quality calculation. */
817 if (dev
->noisecalc
.calculation_running
)
819 dev
->noisecalc
.channel_at_start
= dev
->phy
.channel
;
820 dev
->noisecalc
.calculation_running
= 1;
821 dev
->noisecalc
.nr_samples
= 0;
823 b43legacy_generate_noise_sample(dev
);
826 static void handle_irq_noise(struct b43legacy_wldev
*dev
)
828 struct b43legacy_phy
*phy
= &dev
->phy
;
835 /* Bottom half of Link Quality calculation. */
837 B43legacy_WARN_ON(!dev
->noisecalc
.calculation_running
);
838 if (dev
->noisecalc
.channel_at_start
!= phy
->channel
)
839 goto drop_calculation
;
840 *((__le32
*)noise
) = cpu_to_le32(b43legacy_jssi_read(dev
));
841 if (noise
[0] == 0x7F || noise
[1] == 0x7F ||
842 noise
[2] == 0x7F || noise
[3] == 0x7F)
845 /* Get the noise samples. */
846 B43legacy_WARN_ON(dev
->noisecalc
.nr_samples
>= 8);
847 i
= dev
->noisecalc
.nr_samples
;
848 noise
[0] = limit_value(noise
[0], 0, ARRAY_SIZE(phy
->nrssi_lt
) - 1);
849 noise
[1] = limit_value(noise
[1], 0, ARRAY_SIZE(phy
->nrssi_lt
) - 1);
850 noise
[2] = limit_value(noise
[2], 0, ARRAY_SIZE(phy
->nrssi_lt
) - 1);
851 noise
[3] = limit_value(noise
[3], 0, ARRAY_SIZE(phy
->nrssi_lt
) - 1);
852 dev
->noisecalc
.samples
[i
][0] = phy
->nrssi_lt
[noise
[0]];
853 dev
->noisecalc
.samples
[i
][1] = phy
->nrssi_lt
[noise
[1]];
854 dev
->noisecalc
.samples
[i
][2] = phy
->nrssi_lt
[noise
[2]];
855 dev
->noisecalc
.samples
[i
][3] = phy
->nrssi_lt
[noise
[3]];
856 dev
->noisecalc
.nr_samples
++;
857 if (dev
->noisecalc
.nr_samples
== 8) {
858 /* Calculate the Link Quality by the noise samples. */
860 for (i
= 0; i
< 8; i
++) {
861 for (j
= 0; j
< 4; j
++)
862 average
+= dev
->noisecalc
.samples
[i
][j
];
868 tmp
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
870 tmp
= (tmp
/ 128) & 0x1F;
880 dev
->stats
.link_noise
= average
;
882 dev
->noisecalc
.calculation_running
= 0;
886 b43legacy_generate_noise_sample(dev
);
889 static void handle_irq_tbtt_indication(struct b43legacy_wldev
*dev
)
891 if (b43legacy_is_mode(dev
->wl
, IEEE80211_IF_TYPE_AP
)) {
894 if (1/*FIXME: the last PSpoll frame was sent successfully */)
895 b43legacy_power_saving_ctl_bits(dev
, -1, -1);
897 dev
->reg124_set_0x4
= 0;
898 if (b43legacy_is_mode(dev
->wl
, IEEE80211_IF_TYPE_IBSS
))
899 dev
->reg124_set_0x4
= 1;
902 static void handle_irq_atim_end(struct b43legacy_wldev
*dev
)
904 if (!dev
->reg124_set_0x4
) /*FIXME rename this variable*/
906 b43legacy_write32(dev
, B43legacy_MMIO_STATUS2_BITFIELD
,
907 b43legacy_read32(dev
, B43legacy_MMIO_STATUS2_BITFIELD
)
911 static void handle_irq_pmq(struct b43legacy_wldev
*dev
)
918 tmp
= b43legacy_read32(dev
, B43legacy_MMIO_PS_STATUS
);
919 if (!(tmp
& 0x00000008))
922 /* 16bit write is odd, but correct. */
923 b43legacy_write16(dev
, B43legacy_MMIO_PS_STATUS
, 0x0002);
926 static void b43legacy_write_template_common(struct b43legacy_wldev
*dev
,
927 const u8
*data
, u16 size
,
929 u16 shm_size_offset
, u8 rate
)
933 struct b43legacy_plcp_hdr4 plcp
;
936 b43legacy_generate_plcp_hdr(&plcp
, size
+ FCS_LEN
, rate
);
937 b43legacy_ram_write(dev
, ram_offset
, le32_to_cpu(plcp
.data
));
938 ram_offset
+= sizeof(u32
);
939 /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
940 * So leave the first two bytes of the next write blank.
942 tmp
= (u32
)(data
[0]) << 16;
943 tmp
|= (u32
)(data
[1]) << 24;
944 b43legacy_ram_write(dev
, ram_offset
, tmp
);
945 ram_offset
+= sizeof(u32
);
946 for (i
= 2; i
< size
; i
+= sizeof(u32
)) {
947 tmp
= (u32
)(data
[i
+ 0]);
949 tmp
|= (u32
)(data
[i
+ 1]) << 8;
951 tmp
|= (u32
)(data
[i
+ 2]) << 16;
953 tmp
|= (u32
)(data
[i
+ 3]) << 24;
954 b43legacy_ram_write(dev
, ram_offset
+ i
- 2, tmp
);
956 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, shm_size_offset
,
957 size
+ sizeof(struct b43legacy_plcp_hdr6
));
960 static void b43legacy_write_beacon_template(struct b43legacy_wldev
*dev
,
962 u16 shm_size_offset
, u8 rate
)
967 B43legacy_WARN_ON(!dev
->cached_beacon
);
968 len
= min((size_t)dev
->cached_beacon
->len
,
969 0x200 - sizeof(struct b43legacy_plcp_hdr6
));
970 data
= (const u8
*)(dev
->cached_beacon
->data
);
971 b43legacy_write_template_common(dev
, data
,
973 shm_size_offset
, rate
);
976 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev
*dev
,
977 u16 shm_offset
, u16 size
,
980 struct b43legacy_plcp_hdr4 plcp
;
985 b43legacy_generate_plcp_hdr(&plcp
, size
+ FCS_LEN
, rate
);
986 dur
= ieee80211_generic_frame_duration(dev
->wl
->hw
,
989 B43legacy_RATE_TO_100KBPS(rate
));
990 /* Write PLCP in two parts and timing for packet transfer */
991 tmp
= le32_to_cpu(plcp
.data
);
992 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, shm_offset
,
994 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, shm_offset
+ 2,
996 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, shm_offset
+ 6,
1000 /* Instead of using custom probe response template, this function
1001 * just patches custom beacon template by:
1002 * 1) Changing packet type
1003 * 2) Patching duration field
1006 static u8
*b43legacy_generate_probe_resp(struct b43legacy_wldev
*dev
,
1007 u16
*dest_size
, u8 rate
)
1016 struct ieee80211_hdr
*hdr
;
1018 B43legacy_WARN_ON(!dev
->cached_beacon
);
1019 src_size
= dev
->cached_beacon
->len
;
1020 src_data
= (const u8
*)dev
->cached_beacon
->data
;
1022 if (unlikely(src_size
< 0x24)) {
1023 b43legacydbg(dev
->wl
, "b43legacy_generate_probe_resp: "
1024 "invalid beacon\n");
1028 dest_data
= kmalloc(src_size
, GFP_ATOMIC
);
1029 if (unlikely(!dest_data
))
1032 /* 0x24 is offset of first variable-len Information-Element
1035 memcpy(dest_data
, src_data
, 0x24);
1038 for (; src_pos
< src_size
- 2; src_pos
+= elem_size
) {
1039 elem_size
= src_data
[src_pos
+ 1] + 2;
1040 if (src_data
[src_pos
] != 0x05) { /* TIM */
1041 memcpy(dest_data
+ dest_pos
, src_data
+ src_pos
,
1043 dest_pos
+= elem_size
;
1046 *dest_size
= dest_pos
;
1047 hdr
= (struct ieee80211_hdr
*)dest_data
;
1049 /* Set the frame control. */
1050 hdr
->frame_control
= cpu_to_le16(IEEE80211_FTYPE_MGMT
|
1051 IEEE80211_STYPE_PROBE_RESP
);
1052 dur
= ieee80211_generic_frame_duration(dev
->wl
->hw
,
1055 B43legacy_RATE_TO_100KBPS(rate
));
1056 hdr
->duration_id
= dur
;
1061 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev
*dev
,
1063 u16 shm_size_offset
, u8 rate
)
1065 u8
*probe_resp_data
;
1068 B43legacy_WARN_ON(!dev
->cached_beacon
);
1069 size
= dev
->cached_beacon
->len
;
1070 probe_resp_data
= b43legacy_generate_probe_resp(dev
, &size
, rate
);
1071 if (unlikely(!probe_resp_data
))
1074 /* Looks like PLCP headers plus packet timings are stored for
1075 * all possible basic rates
1077 b43legacy_write_probe_resp_plcp(dev
, 0x31A, size
,
1078 B43legacy_CCK_RATE_1MB
);
1079 b43legacy_write_probe_resp_plcp(dev
, 0x32C, size
,
1080 B43legacy_CCK_RATE_2MB
);
1081 b43legacy_write_probe_resp_plcp(dev
, 0x33E, size
,
1082 B43legacy_CCK_RATE_5MB
);
1083 b43legacy_write_probe_resp_plcp(dev
, 0x350, size
,
1084 B43legacy_CCK_RATE_11MB
);
1086 size
= min((size_t)size
,
1087 0x200 - sizeof(struct b43legacy_plcp_hdr6
));
1088 b43legacy_write_template_common(dev
, probe_resp_data
,
1090 shm_size_offset
, rate
);
1091 kfree(probe_resp_data
);
1094 static int b43legacy_refresh_cached_beacon(struct b43legacy_wldev
*dev
,
1095 struct sk_buff
*beacon
)
1097 if (dev
->cached_beacon
)
1098 kfree_skb(dev
->cached_beacon
);
1099 dev
->cached_beacon
= beacon
;
1104 static void b43legacy_update_templates(struct b43legacy_wldev
*dev
)
1108 B43legacy_WARN_ON(!dev
->cached_beacon
);
1110 b43legacy_write_beacon_template(dev
, 0x68, 0x18,
1111 B43legacy_CCK_RATE_1MB
);
1112 b43legacy_write_beacon_template(dev
, 0x468, 0x1A,
1113 B43legacy_CCK_RATE_1MB
);
1114 b43legacy_write_probe_resp_template(dev
, 0x268, 0x4A,
1115 B43legacy_CCK_RATE_11MB
);
1117 status
= b43legacy_read32(dev
, B43legacy_MMIO_STATUS2_BITFIELD
);
1119 b43legacy_write32(dev
, B43legacy_MMIO_STATUS2_BITFIELD
, status
);
1122 static void b43legacy_refresh_templates(struct b43legacy_wldev
*dev
,
1123 struct sk_buff
*beacon
)
1127 err
= b43legacy_refresh_cached_beacon(dev
, beacon
);
1130 b43legacy_update_templates(dev
);
1133 static void b43legacy_set_ssid(struct b43legacy_wldev
*dev
,
1134 const u8
*ssid
, u8 ssid_len
)
1140 len
= min((u16
)ssid_len
, (u16
)0x100);
1141 for (i
= 0; i
< len
; i
+= sizeof(u32
)) {
1142 tmp
= (u32
)(ssid
[i
+ 0]);
1144 tmp
|= (u32
)(ssid
[i
+ 1]) << 8;
1146 tmp
|= (u32
)(ssid
[i
+ 2]) << 16;
1148 tmp
|= (u32
)(ssid
[i
+ 3]) << 24;
1149 b43legacy_shm_write32(dev
, B43legacy_SHM_SHARED
,
1152 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
1156 static void b43legacy_set_beacon_int(struct b43legacy_wldev
*dev
,
1159 b43legacy_time_lock(dev
);
1160 if (dev
->dev
->id
.revision
>= 3)
1161 b43legacy_write32(dev
, 0x188, (beacon_int
<< 16));
1163 b43legacy_write16(dev
, 0x606, (beacon_int
>> 6));
1164 b43legacy_write16(dev
, 0x610, beacon_int
);
1166 b43legacy_time_unlock(dev
);
1169 static void handle_irq_beacon(struct b43legacy_wldev
*dev
)
1173 if (!b43legacy_is_mode(dev
->wl
, IEEE80211_IF_TYPE_AP
))
1176 dev
->irq_savedstate
&= ~B43legacy_IRQ_BEACON
;
1177 status
= b43legacy_read32(dev
, B43legacy_MMIO_STATUS2_BITFIELD
);
1179 if (!dev
->cached_beacon
|| ((status
& 0x1) && (status
& 0x2))) {
1180 /* ACK beacon IRQ. */
1181 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
,
1182 B43legacy_IRQ_BEACON
);
1183 dev
->irq_savedstate
|= B43legacy_IRQ_BEACON
;
1184 if (dev
->cached_beacon
)
1185 kfree_skb(dev
->cached_beacon
);
1186 dev
->cached_beacon
= NULL
;
1189 if (!(status
& 0x1)) {
1190 b43legacy_write_beacon_template(dev
, 0x68, 0x18,
1191 B43legacy_CCK_RATE_1MB
);
1193 b43legacy_write32(dev
, B43legacy_MMIO_STATUS2_BITFIELD
,
1196 if (!(status
& 0x2)) {
1197 b43legacy_write_beacon_template(dev
, 0x468, 0x1A,
1198 B43legacy_CCK_RATE_1MB
);
1200 b43legacy_write32(dev
, B43legacy_MMIO_STATUS2_BITFIELD
,
1205 static void handle_irq_ucode_debug(struct b43legacy_wldev
*dev
)
1209 /* Interrupt handler bottom-half */
1210 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev
*dev
)
1213 u32 dma_reason
[ARRAY_SIZE(dev
->dma_reason
)];
1214 u32 merged_dma_reason
= 0;
1216 unsigned long flags
;
1218 spin_lock_irqsave(&dev
->wl
->irq_lock
, flags
);
1220 B43legacy_WARN_ON(b43legacy_status(dev
) <
1221 B43legacy_STAT_INITIALIZED
);
1223 reason
= dev
->irq_reason
;
1224 for (i
= 0; i
< ARRAY_SIZE(dma_reason
); i
++) {
1225 dma_reason
[i
] = dev
->dma_reason
[i
];
1226 merged_dma_reason
|= dma_reason
[i
];
1229 if (unlikely(reason
& B43legacy_IRQ_MAC_TXERR
))
1230 b43legacyerr(dev
->wl
, "MAC transmission error\n");
1232 if (unlikely(reason
& B43legacy_IRQ_PHY_TXERR
))
1233 b43legacyerr(dev
->wl
, "PHY transmission error\n");
1235 if (unlikely(merged_dma_reason
& (B43legacy_DMAIRQ_FATALMASK
|
1236 B43legacy_DMAIRQ_NONFATALMASK
))) {
1237 if (merged_dma_reason
& B43legacy_DMAIRQ_FATALMASK
) {
1238 b43legacyerr(dev
->wl
, "Fatal DMA error: "
1239 "0x%08X, 0x%08X, 0x%08X, "
1240 "0x%08X, 0x%08X, 0x%08X\n",
1241 dma_reason
[0], dma_reason
[1],
1242 dma_reason
[2], dma_reason
[3],
1243 dma_reason
[4], dma_reason
[5]);
1244 b43legacy_controller_restart(dev
, "DMA error");
1246 spin_unlock_irqrestore(&dev
->wl
->irq_lock
, flags
);
1249 if (merged_dma_reason
& B43legacy_DMAIRQ_NONFATALMASK
)
1250 b43legacyerr(dev
->wl
, "DMA error: "
1251 "0x%08X, 0x%08X, 0x%08X, "
1252 "0x%08X, 0x%08X, 0x%08X\n",
1253 dma_reason
[0], dma_reason
[1],
1254 dma_reason
[2], dma_reason
[3],
1255 dma_reason
[4], dma_reason
[5]);
1258 if (unlikely(reason
& B43legacy_IRQ_UCODE_DEBUG
))
1259 handle_irq_ucode_debug(dev
);
1260 if (reason
& B43legacy_IRQ_TBTT_INDI
)
1261 handle_irq_tbtt_indication(dev
);
1262 if (reason
& B43legacy_IRQ_ATIM_END
)
1263 handle_irq_atim_end(dev
);
1264 if (reason
& B43legacy_IRQ_BEACON
)
1265 handle_irq_beacon(dev
);
1266 if (reason
& B43legacy_IRQ_PMQ
)
1267 handle_irq_pmq(dev
);
1268 if (reason
& B43legacy_IRQ_TXFIFO_FLUSH_OK
)
1270 if (reason
& B43legacy_IRQ_NOISESAMPLE_OK
)
1271 handle_irq_noise(dev
);
1273 /* Check the DMA reason registers for received data. */
1274 if (dma_reason
[0] & B43legacy_DMAIRQ_RX_DONE
) {
1275 if (b43legacy_using_pio(dev
))
1276 b43legacy_pio_rx(dev
->pio
.queue0
);
1278 b43legacy_dma_rx(dev
->dma
.rx_ring0
);
1280 B43legacy_WARN_ON(dma_reason
[1] & B43legacy_DMAIRQ_RX_DONE
);
1281 B43legacy_WARN_ON(dma_reason
[2] & B43legacy_DMAIRQ_RX_DONE
);
1282 if (dma_reason
[3] & B43legacy_DMAIRQ_RX_DONE
) {
1283 if (b43legacy_using_pio(dev
))
1284 b43legacy_pio_rx(dev
->pio
.queue3
);
1286 b43legacy_dma_rx(dev
->dma
.rx_ring3
);
1288 B43legacy_WARN_ON(dma_reason
[4] & B43legacy_DMAIRQ_RX_DONE
);
1289 B43legacy_WARN_ON(dma_reason
[5] & B43legacy_DMAIRQ_RX_DONE
);
1291 if (reason
& B43legacy_IRQ_TX_OK
)
1292 handle_irq_transmit_status(dev
);
1294 b43legacy_interrupt_enable(dev
, dev
->irq_savedstate
);
1296 spin_unlock_irqrestore(&dev
->wl
->irq_lock
, flags
);
1299 static void pio_irq_workaround(struct b43legacy_wldev
*dev
,
1300 u16 base
, int queueidx
)
1304 rxctl
= b43legacy_read16(dev
, base
+ B43legacy_PIO_RXCTL
);
1305 if (rxctl
& B43legacy_PIO_RXCTL_DATAAVAILABLE
)
1306 dev
->dma_reason
[queueidx
] |= B43legacy_DMAIRQ_RX_DONE
;
1308 dev
->dma_reason
[queueidx
] &= ~B43legacy_DMAIRQ_RX_DONE
;
1311 static void b43legacy_interrupt_ack(struct b43legacy_wldev
*dev
, u32 reason
)
1313 if (b43legacy_using_pio(dev
) &&
1314 (dev
->dev
->id
.revision
< 3) &&
1315 (!(reason
& B43legacy_IRQ_PIO_WORKAROUND
))) {
1316 /* Apply a PIO specific workaround to the dma_reasons */
1317 pio_irq_workaround(dev
, B43legacy_MMIO_PIO1_BASE
, 0);
1318 pio_irq_workaround(dev
, B43legacy_MMIO_PIO2_BASE
, 1);
1319 pio_irq_workaround(dev
, B43legacy_MMIO_PIO3_BASE
, 2);
1320 pio_irq_workaround(dev
, B43legacy_MMIO_PIO4_BASE
, 3);
1323 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
, reason
);
1325 b43legacy_write32(dev
, B43legacy_MMIO_DMA0_REASON
,
1326 dev
->dma_reason
[0]);
1327 b43legacy_write32(dev
, B43legacy_MMIO_DMA1_REASON
,
1328 dev
->dma_reason
[1]);
1329 b43legacy_write32(dev
, B43legacy_MMIO_DMA2_REASON
,
1330 dev
->dma_reason
[2]);
1331 b43legacy_write32(dev
, B43legacy_MMIO_DMA3_REASON
,
1332 dev
->dma_reason
[3]);
1333 b43legacy_write32(dev
, B43legacy_MMIO_DMA4_REASON
,
1334 dev
->dma_reason
[4]);
1335 b43legacy_write32(dev
, B43legacy_MMIO_DMA5_REASON
,
1336 dev
->dma_reason
[5]);
1339 /* Interrupt handler top-half */
1340 static irqreturn_t
b43legacy_interrupt_handler(int irq
, void *dev_id
)
1342 irqreturn_t ret
= IRQ_NONE
;
1343 struct b43legacy_wldev
*dev
= dev_id
;
1349 spin_lock(&dev
->wl
->irq_lock
);
1351 if (b43legacy_status(dev
) < B43legacy_STAT_STARTED
)
1353 reason
= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
1354 if (reason
== 0xffffffff) /* shared IRQ */
1357 reason
&= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
);
1361 dev
->dma_reason
[0] = b43legacy_read32(dev
,
1362 B43legacy_MMIO_DMA0_REASON
)
1364 dev
->dma_reason
[1] = b43legacy_read32(dev
,
1365 B43legacy_MMIO_DMA1_REASON
)
1367 dev
->dma_reason
[2] = b43legacy_read32(dev
,
1368 B43legacy_MMIO_DMA2_REASON
)
1370 dev
->dma_reason
[3] = b43legacy_read32(dev
,
1371 B43legacy_MMIO_DMA3_REASON
)
1373 dev
->dma_reason
[4] = b43legacy_read32(dev
,
1374 B43legacy_MMIO_DMA4_REASON
)
1376 dev
->dma_reason
[5] = b43legacy_read32(dev
,
1377 B43legacy_MMIO_DMA5_REASON
)
1380 b43legacy_interrupt_ack(dev
, reason
);
1381 /* disable all IRQs. They are enabled again in the bottom half. */
1382 dev
->irq_savedstate
= b43legacy_interrupt_disable(dev
,
1384 /* save the reason code and call our bottom half. */
1385 dev
->irq_reason
= reason
;
1386 tasklet_schedule(&dev
->isr_tasklet
);
1389 spin_unlock(&dev
->wl
->irq_lock
);
1394 static void b43legacy_release_firmware(struct b43legacy_wldev
*dev
)
1396 release_firmware(dev
->fw
.ucode
);
1397 dev
->fw
.ucode
= NULL
;
1398 release_firmware(dev
->fw
.pcm
);
1400 release_firmware(dev
->fw
.initvals
);
1401 dev
->fw
.initvals
= NULL
;
1402 release_firmware(dev
->fw
.initvals_band
);
1403 dev
->fw
.initvals_band
= NULL
;
1406 static void b43legacy_print_fw_helptext(struct b43legacy_wl
*wl
)
1408 b43legacyerr(wl
, "You must go to http://linuxwireless.org/en/users/"
1409 "Drivers/b43#devicefirmware "
1410 "and download the correct firmware (version 3).\n");
1413 static int do_request_fw(struct b43legacy_wldev
*dev
,
1415 const struct firmware
**fw
)
1417 char path
[sizeof(modparam_fwpostfix
) + 32];
1418 struct b43legacy_fw_header
*hdr
;
1425 snprintf(path
, ARRAY_SIZE(path
),
1426 "b43legacy%s/%s.fw",
1427 modparam_fwpostfix
, name
);
1428 err
= request_firmware(fw
, path
, dev
->dev
->dev
);
1430 b43legacyerr(dev
->wl
, "Firmware file \"%s\" not found "
1431 "or load failed.\n", path
);
1434 if ((*fw
)->size
< sizeof(struct b43legacy_fw_header
))
1436 hdr
= (struct b43legacy_fw_header
*)((*fw
)->data
);
1437 switch (hdr
->type
) {
1438 case B43legacy_FW_TYPE_UCODE
:
1439 case B43legacy_FW_TYPE_PCM
:
1440 size
= be32_to_cpu(hdr
->size
);
1441 if (size
!= (*fw
)->size
- sizeof(struct b43legacy_fw_header
))
1444 case B43legacy_FW_TYPE_IV
:
1455 b43legacyerr(dev
->wl
, "Firmware file \"%s\" format error.\n", path
);
1459 static int b43legacy_request_firmware(struct b43legacy_wldev
*dev
)
1461 struct b43legacy_firmware
*fw
= &dev
->fw
;
1462 const u8 rev
= dev
->dev
->id
.revision
;
1463 const char *filename
;
1467 tmshigh
= ssb_read32(dev
->dev
, SSB_TMSHIGH
);
1470 filename
= "ucode2";
1472 filename
= "ucode4";
1474 filename
= "ucode5";
1475 err
= do_request_fw(dev
, filename
, &fw
->ucode
);
1484 err
= do_request_fw(dev
, filename
, &fw
->pcm
);
1488 if (!fw
->initvals
) {
1489 switch (dev
->phy
.type
) {
1490 case B43legacy_PHYTYPE_G
:
1491 if ((rev
>= 5) && (rev
<= 10))
1492 filename
= "b0g0initvals5";
1493 else if (rev
== 2 || rev
== 4)
1494 filename
= "b0g0initvals2";
1496 goto err_no_initvals
;
1499 goto err_no_initvals
;
1501 err
= do_request_fw(dev
, filename
, &fw
->initvals
);
1505 if (!fw
->initvals_band
) {
1506 switch (dev
->phy
.type
) {
1507 case B43legacy_PHYTYPE_G
:
1508 if ((rev
>= 5) && (rev
<= 10))
1509 filename
= "b0g0bsinitvals5";
1512 else if (rev
== 2 || rev
== 4)
1515 goto err_no_initvals
;
1518 goto err_no_initvals
;
1520 err
= do_request_fw(dev
, filename
, &fw
->initvals_band
);
1528 b43legacy_print_fw_helptext(dev
->wl
);
1533 b43legacyerr(dev
->wl
, "No Initial Values firmware file for PHY %u, "
1534 "core rev %u\n", dev
->phy
.type
, rev
);
1538 b43legacy_release_firmware(dev
);
1542 static int b43legacy_upload_microcode(struct b43legacy_wldev
*dev
)
1544 const size_t hdr_len
= sizeof(struct b43legacy_fw_header
);
1555 /* Upload Microcode. */
1556 data
= (__be32
*) (dev
->fw
.ucode
->data
+ hdr_len
);
1557 len
= (dev
->fw
.ucode
->size
- hdr_len
) / sizeof(__be32
);
1558 b43legacy_shm_control_word(dev
,
1559 B43legacy_SHM_UCODE
|
1560 B43legacy_SHM_AUTOINC_W
,
1562 for (i
= 0; i
< len
; i
++) {
1563 b43legacy_write32(dev
, B43legacy_MMIO_SHM_DATA
,
1564 be32_to_cpu(data
[i
]));
1569 /* Upload PCM data. */
1570 data
= (__be32
*) (dev
->fw
.pcm
->data
+ hdr_len
);
1571 len
= (dev
->fw
.pcm
->size
- hdr_len
) / sizeof(__be32
);
1572 b43legacy_shm_control_word(dev
, B43legacy_SHM_HW
, 0x01EA);
1573 b43legacy_write32(dev
, B43legacy_MMIO_SHM_DATA
, 0x00004000);
1574 /* No need for autoinc bit in SHM_HW */
1575 b43legacy_shm_control_word(dev
, B43legacy_SHM_HW
, 0x01EB);
1576 for (i
= 0; i
< len
; i
++) {
1577 b43legacy_write32(dev
, B43legacy_MMIO_SHM_DATA
,
1578 be32_to_cpu(data
[i
]));
1583 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
,
1585 b43legacy_write32(dev
, B43legacy_MMIO_STATUS_BITFIELD
, 0x00020402);
1587 /* Wait for the microcode to load and respond */
1590 tmp
= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
1591 if (tmp
== B43legacy_IRQ_MAC_SUSPENDED
)
1594 if (i
>= B43legacy_IRQWAIT_MAX_RETRIES
) {
1595 b43legacyerr(dev
->wl
, "Microcode not responding\n");
1596 b43legacy_print_fw_helptext(dev
->wl
);
1602 /* dummy read follows */
1603 b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
1605 /* Get and check the revisions. */
1606 fwrev
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
1607 B43legacy_SHM_SH_UCODEREV
);
1608 fwpatch
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
1609 B43legacy_SHM_SH_UCODEPATCH
);
1610 fwdate
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
1611 B43legacy_SHM_SH_UCODEDATE
);
1612 fwtime
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
1613 B43legacy_SHM_SH_UCODETIME
);
1615 if (fwrev
> 0x128) {
1616 b43legacyerr(dev
->wl
, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1617 " Only firmware from binary drivers version 3.x"
1618 " is supported. You must change your firmware"
1620 b43legacy_print_fw_helptext(dev
->wl
);
1621 b43legacy_write32(dev
, B43legacy_MMIO_STATUS_BITFIELD
, 0);
1625 b43legacydbg(dev
->wl
, "Loading firmware version 0x%X, patch level %u "
1626 "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev
, fwpatch
,
1627 (fwdate
>> 12) & 0xF, (fwdate
>> 8) & 0xF, fwdate
& 0xFF,
1628 (fwtime
>> 11) & 0x1F, (fwtime
>> 5) & 0x3F, fwtime
& 0x1F);
1630 dev
->fw
.rev
= fwrev
;
1631 dev
->fw
.patch
= fwpatch
;
1637 static int b43legacy_write_initvals(struct b43legacy_wldev
*dev
,
1638 const struct b43legacy_iv
*ivals
,
1642 const struct b43legacy_iv
*iv
;
1647 BUILD_BUG_ON(sizeof(struct b43legacy_iv
) != 6);
1649 for (i
= 0; i
< count
; i
++) {
1650 if (array_size
< sizeof(iv
->offset_size
))
1652 array_size
-= sizeof(iv
->offset_size
);
1653 offset
= be16_to_cpu(iv
->offset_size
);
1654 bit32
= !!(offset
& B43legacy_IV_32BIT
);
1655 offset
&= B43legacy_IV_OFFSET_MASK
;
1656 if (offset
>= 0x1000)
1661 if (array_size
< sizeof(iv
->data
.d32
))
1663 array_size
-= sizeof(iv
->data
.d32
);
1665 value
= be32_to_cpu(get_unaligned(&iv
->data
.d32
));
1666 b43legacy_write32(dev
, offset
, value
);
1668 iv
= (const struct b43legacy_iv
*)((const uint8_t *)iv
+
1674 if (array_size
< sizeof(iv
->data
.d16
))
1676 array_size
-= sizeof(iv
->data
.d16
);
1678 value
= be16_to_cpu(iv
->data
.d16
);
1679 b43legacy_write16(dev
, offset
, value
);
1681 iv
= (const struct b43legacy_iv
*)((const uint8_t *)iv
+
1692 b43legacyerr(dev
->wl
, "Initial Values Firmware file-format error.\n");
1693 b43legacy_print_fw_helptext(dev
->wl
);
1698 static int b43legacy_upload_initvals(struct b43legacy_wldev
*dev
)
1700 const size_t hdr_len
= sizeof(struct b43legacy_fw_header
);
1701 const struct b43legacy_fw_header
*hdr
;
1702 struct b43legacy_firmware
*fw
= &dev
->fw
;
1703 const struct b43legacy_iv
*ivals
;
1707 hdr
= (const struct b43legacy_fw_header
*)(fw
->initvals
->data
);
1708 ivals
= (const struct b43legacy_iv
*)(fw
->initvals
->data
+ hdr_len
);
1709 count
= be32_to_cpu(hdr
->size
);
1710 err
= b43legacy_write_initvals(dev
, ivals
, count
,
1711 fw
->initvals
->size
- hdr_len
);
1714 if (fw
->initvals_band
) {
1715 hdr
= (const struct b43legacy_fw_header
*)
1716 (fw
->initvals_band
->data
);
1717 ivals
= (const struct b43legacy_iv
*)(fw
->initvals_band
->data
1719 count
= be32_to_cpu(hdr
->size
);
1720 err
= b43legacy_write_initvals(dev
, ivals
, count
,
1721 fw
->initvals_band
->size
- hdr_len
);
1730 /* Initialize the GPIOs
1731 * http://bcm-specs.sipsolutions.net/GPIO
1733 static int b43legacy_gpio_init(struct b43legacy_wldev
*dev
)
1735 struct ssb_bus
*bus
= dev
->dev
->bus
;
1736 struct ssb_device
*gpiodev
, *pcidev
= NULL
;
1740 b43legacy_write32(dev
, B43legacy_MMIO_STATUS_BITFIELD
,
1741 b43legacy_read32(dev
,
1742 B43legacy_MMIO_STATUS_BITFIELD
)
1745 b43legacy_write16(dev
, B43legacy_MMIO_GPIO_MASK
,
1746 b43legacy_read16(dev
,
1747 B43legacy_MMIO_GPIO_MASK
)
1752 if (dev
->dev
->bus
->chip_id
== 0x4301) {
1756 if (dev
->dev
->bus
->sprom
.r1
.boardflags_lo
& B43legacy_BFL_PACTRL
) {
1757 b43legacy_write16(dev
, B43legacy_MMIO_GPIO_MASK
,
1758 b43legacy_read16(dev
,
1759 B43legacy_MMIO_GPIO_MASK
)
1764 if (dev
->dev
->id
.revision
>= 2)
1765 mask
|= 0x0010; /* FIXME: This is redundant. */
1767 #ifdef CONFIG_SSB_DRIVER_PCICORE
1768 pcidev
= bus
->pcicore
.dev
;
1770 gpiodev
= bus
->chipco
.dev
? : pcidev
;
1773 ssb_write32(gpiodev
, B43legacy_GPIO_CONTROL
,
1774 (ssb_read32(gpiodev
, B43legacy_GPIO_CONTROL
)
1780 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1781 static void b43legacy_gpio_cleanup(struct b43legacy_wldev
*dev
)
1783 struct ssb_bus
*bus
= dev
->dev
->bus
;
1784 struct ssb_device
*gpiodev
, *pcidev
= NULL
;
1786 #ifdef CONFIG_SSB_DRIVER_PCICORE
1787 pcidev
= bus
->pcicore
.dev
;
1789 gpiodev
= bus
->chipco
.dev
? : pcidev
;
1792 ssb_write32(gpiodev
, B43legacy_GPIO_CONTROL
, 0);
1795 /* http://bcm-specs.sipsolutions.net/EnableMac */
1796 void b43legacy_mac_enable(struct b43legacy_wldev
*dev
)
1798 dev
->mac_suspended
--;
1799 B43legacy_WARN_ON(dev
->mac_suspended
< 0);
1800 B43legacy_WARN_ON(irqs_disabled());
1801 if (dev
->mac_suspended
== 0) {
1802 b43legacy_write32(dev
, B43legacy_MMIO_STATUS_BITFIELD
,
1803 b43legacy_read32(dev
,
1804 B43legacy_MMIO_STATUS_BITFIELD
)
1805 | B43legacy_SBF_MAC_ENABLED
);
1806 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
,
1807 B43legacy_IRQ_MAC_SUSPENDED
);
1808 /* the next two are dummy reads */
1809 b43legacy_read32(dev
, B43legacy_MMIO_STATUS_BITFIELD
);
1810 b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
1811 b43legacy_power_saving_ctl_bits(dev
, -1, -1);
1813 /* Re-enable IRQs. */
1814 spin_lock_irq(&dev
->wl
->irq_lock
);
1815 b43legacy_interrupt_enable(dev
, dev
->irq_savedstate
);
1816 spin_unlock_irq(&dev
->wl
->irq_lock
);
1820 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1821 void b43legacy_mac_suspend(struct b43legacy_wldev
*dev
)
1827 B43legacy_WARN_ON(irqs_disabled());
1828 B43legacy_WARN_ON(dev
->mac_suspended
< 0);
1830 if (dev
->mac_suspended
== 0) {
1831 /* Mask IRQs before suspending MAC. Otherwise
1832 * the MAC stays busy and won't suspend. */
1833 spin_lock_irq(&dev
->wl
->irq_lock
);
1834 tmp
= b43legacy_interrupt_disable(dev
, B43legacy_IRQ_ALL
);
1835 spin_unlock_irq(&dev
->wl
->irq_lock
);
1836 b43legacy_synchronize_irq(dev
);
1837 dev
->irq_savedstate
= tmp
;
1839 b43legacy_power_saving_ctl_bits(dev
, -1, 1);
1840 b43legacy_write32(dev
, B43legacy_MMIO_STATUS_BITFIELD
,
1841 b43legacy_read32(dev
,
1842 B43legacy_MMIO_STATUS_BITFIELD
)
1843 & ~B43legacy_SBF_MAC_ENABLED
);
1844 b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
1845 for (i
= 40; i
; i
--) {
1846 tmp
= b43legacy_read32(dev
,
1847 B43legacy_MMIO_GEN_IRQ_REASON
);
1848 if (tmp
& B43legacy_IRQ_MAC_SUSPENDED
)
1852 b43legacyerr(dev
->wl
, "MAC suspend failed\n");
1855 dev
->mac_suspended
++;
1858 static void b43legacy_adjust_opmode(struct b43legacy_wldev
*dev
)
1860 struct b43legacy_wl
*wl
= dev
->wl
;
1864 ctl
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
1865 /* Reset status to STA infrastructure mode. */
1866 ctl
&= ~B43legacy_MACCTL_AP
;
1867 ctl
&= ~B43legacy_MACCTL_KEEP_CTL
;
1868 ctl
&= ~B43legacy_MACCTL_KEEP_BADPLCP
;
1869 ctl
&= ~B43legacy_MACCTL_KEEP_BAD
;
1870 ctl
&= ~B43legacy_MACCTL_PROMISC
;
1871 ctl
&= ~B43legacy_MACCTL_BEACPROMISC
;
1872 ctl
|= B43legacy_MACCTL_INFRA
;
1874 if (b43legacy_is_mode(wl
, IEEE80211_IF_TYPE_AP
))
1875 ctl
|= B43legacy_MACCTL_AP
;
1876 else if (b43legacy_is_mode(wl
, IEEE80211_IF_TYPE_IBSS
))
1877 ctl
&= ~B43legacy_MACCTL_INFRA
;
1879 if (wl
->filter_flags
& FIF_CONTROL
)
1880 ctl
|= B43legacy_MACCTL_KEEP_CTL
;
1881 if (wl
->filter_flags
& FIF_FCSFAIL
)
1882 ctl
|= B43legacy_MACCTL_KEEP_BAD
;
1883 if (wl
->filter_flags
& FIF_PLCPFAIL
)
1884 ctl
|= B43legacy_MACCTL_KEEP_BADPLCP
;
1885 if (wl
->filter_flags
& FIF_PROMISC_IN_BSS
)
1886 ctl
|= B43legacy_MACCTL_PROMISC
;
1887 if (wl
->filter_flags
& FIF_BCN_PRBRESP_PROMISC
)
1888 ctl
|= B43legacy_MACCTL_BEACPROMISC
;
1890 /* Workaround: On old hardware the HW-MAC-address-filter
1891 * doesn't work properly, so always run promisc in filter
1892 * it in software. */
1893 if (dev
->dev
->id
.revision
<= 4)
1894 ctl
|= B43legacy_MACCTL_PROMISC
;
1896 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, ctl
);
1899 if ((ctl
& B43legacy_MACCTL_INFRA
) &&
1900 !(ctl
& B43legacy_MACCTL_AP
)) {
1901 if (dev
->dev
->bus
->chip_id
== 0x4306 &&
1902 dev
->dev
->bus
->chip_rev
== 3)
1907 b43legacy_write16(dev
, 0x612, cfp_pretbtt
);
1910 static void b43legacy_rate_memory_write(struct b43legacy_wldev
*dev
,
1918 offset
+= (b43legacy_plcp_get_ratecode_ofdm(rate
) & 0x000F) * 2;
1921 offset
+= (b43legacy_plcp_get_ratecode_cck(rate
) & 0x000F) * 2;
1923 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, offset
+ 0x20,
1924 b43legacy_shm_read16(dev
,
1925 B43legacy_SHM_SHARED
, offset
));
1928 static void b43legacy_rate_memory_init(struct b43legacy_wldev
*dev
)
1930 switch (dev
->phy
.type
) {
1931 case B43legacy_PHYTYPE_G
:
1932 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_6MB
, 1);
1933 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_12MB
, 1);
1934 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_18MB
, 1);
1935 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_24MB
, 1);
1936 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_36MB
, 1);
1937 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_48MB
, 1);
1938 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_54MB
, 1);
1940 case B43legacy_PHYTYPE_B
:
1941 b43legacy_rate_memory_write(dev
, B43legacy_CCK_RATE_1MB
, 0);
1942 b43legacy_rate_memory_write(dev
, B43legacy_CCK_RATE_2MB
, 0);
1943 b43legacy_rate_memory_write(dev
, B43legacy_CCK_RATE_5MB
, 0);
1944 b43legacy_rate_memory_write(dev
, B43legacy_CCK_RATE_11MB
, 0);
1947 B43legacy_BUG_ON(1);
1951 /* Set the TX-Antenna for management frames sent by firmware. */
1952 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev
*dev
,
1959 case B43legacy_ANTENNA0
:
1960 ant
|= B43legacy_TX4_PHY_ANT0
;
1962 case B43legacy_ANTENNA1
:
1963 ant
|= B43legacy_TX4_PHY_ANT1
;
1965 case B43legacy_ANTENNA_AUTO
:
1966 ant
|= B43legacy_TX4_PHY_ANTLAST
;
1969 B43legacy_BUG_ON(1);
1972 /* FIXME We also need to set the other flags of the PHY control
1973 * field somewhere. */
1976 tmp
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
1977 B43legacy_SHM_SH_BEACPHYCTL
);
1978 tmp
= (tmp
& ~B43legacy_TX4_PHY_ANT
) | ant
;
1979 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
1980 B43legacy_SHM_SH_BEACPHYCTL
, tmp
);
1982 tmp
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
1983 B43legacy_SHM_SH_ACKCTSPHYCTL
);
1984 tmp
= (tmp
& ~B43legacy_TX4_PHY_ANT
) | ant
;
1985 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
1986 B43legacy_SHM_SH_ACKCTSPHYCTL
, tmp
);
1987 /* For Probe Resposes */
1988 tmp
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
1989 B43legacy_SHM_SH_PRPHYCTL
);
1990 tmp
= (tmp
& ~B43legacy_TX4_PHY_ANT
) | ant
;
1991 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
1992 B43legacy_SHM_SH_PRPHYCTL
, tmp
);
1995 /* This is the opposite of b43legacy_chip_init() */
1996 static void b43legacy_chip_exit(struct b43legacy_wldev
*dev
)
1998 b43legacy_radio_turn_off(dev
, 1);
1999 b43legacy_leds_exit(dev
);
2000 b43legacy_gpio_cleanup(dev
);
2001 /* firmware is released later */
2004 /* Initialize the chip
2005 * http://bcm-specs.sipsolutions.net/ChipInit
2007 static int b43legacy_chip_init(struct b43legacy_wldev
*dev
)
2009 struct b43legacy_phy
*phy
= &dev
->phy
;
2015 b43legacy_write32(dev
, B43legacy_MMIO_STATUS_BITFIELD
,
2016 B43legacy_SBF_CORE_READY
2017 | B43legacy_SBF_400
);
2019 err
= b43legacy_request_firmware(dev
);
2022 err
= b43legacy_upload_microcode(dev
);
2024 goto out
; /* firmware is released later */
2026 err
= b43legacy_gpio_init(dev
);
2028 goto out
; /* firmware is released later */
2029 b43legacy_leds_init(dev
);
2031 err
= b43legacy_upload_initvals(dev
);
2034 b43legacy_radio_turn_on(dev
);
2036 b43legacy_write16(dev
, 0x03E6, 0x0000);
2037 err
= b43legacy_phy_init(dev
);
2041 /* Select initial Interference Mitigation. */
2042 tmp
= phy
->interfmode
;
2043 phy
->interfmode
= B43legacy_INTERFMODE_NONE
;
2044 b43legacy_radio_set_interference_mitigation(dev
, tmp
);
2046 b43legacy_phy_set_antenna_diversity(dev
);
2047 b43legacy_mgmtframe_txantenna(dev
, B43legacy_ANTENNA_DEFAULT
);
2049 if (phy
->type
== B43legacy_PHYTYPE_B
) {
2050 value16
= b43legacy_read16(dev
, 0x005E);
2052 b43legacy_write16(dev
, 0x005E, value16
);
2054 b43legacy_write32(dev
, 0x0100, 0x01000000);
2055 if (dev
->dev
->id
.revision
< 5)
2056 b43legacy_write32(dev
, 0x010C, 0x01000000);
2058 value32
= b43legacy_read32(dev
, B43legacy_MMIO_STATUS_BITFIELD
);
2059 value32
&= ~B43legacy_SBF_MODE_NOTADHOC
;
2060 b43legacy_write32(dev
, B43legacy_MMIO_STATUS_BITFIELD
, value32
);
2061 value32
= b43legacy_read32(dev
, B43legacy_MMIO_STATUS_BITFIELD
);
2062 value32
|= B43legacy_SBF_MODE_NOTADHOC
;
2063 b43legacy_write32(dev
, B43legacy_MMIO_STATUS_BITFIELD
, value32
);
2065 if (b43legacy_using_pio(dev
)) {
2066 b43legacy_write32(dev
, 0x0210, 0x00000100);
2067 b43legacy_write32(dev
, 0x0230, 0x00000100);
2068 b43legacy_write32(dev
, 0x0250, 0x00000100);
2069 b43legacy_write32(dev
, 0x0270, 0x00000100);
2070 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x0034,
2074 /* Probe Response Timeout value */
2075 /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2076 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x0074, 0x0000);
2078 /* Initially set the wireless operation mode. */
2079 b43legacy_adjust_opmode(dev
);
2081 if (dev
->dev
->id
.revision
< 3) {
2082 b43legacy_write16(dev
, 0x060E, 0x0000);
2083 b43legacy_write16(dev
, 0x0610, 0x8000);
2084 b43legacy_write16(dev
, 0x0604, 0x0000);
2085 b43legacy_write16(dev
, 0x0606, 0x0200);
2087 b43legacy_write32(dev
, 0x0188, 0x80000000);
2088 b43legacy_write32(dev
, 0x018C, 0x02000000);
2090 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
, 0x00004000);
2091 b43legacy_write32(dev
, B43legacy_MMIO_DMA0_IRQ_MASK
, 0x0001DC00);
2092 b43legacy_write32(dev
, B43legacy_MMIO_DMA1_IRQ_MASK
, 0x0000DC00);
2093 b43legacy_write32(dev
, B43legacy_MMIO_DMA2_IRQ_MASK
, 0x0000DC00);
2094 b43legacy_write32(dev
, B43legacy_MMIO_DMA3_IRQ_MASK
, 0x0001DC00);
2095 b43legacy_write32(dev
, B43legacy_MMIO_DMA4_IRQ_MASK
, 0x0000DC00);
2096 b43legacy_write32(dev
, B43legacy_MMIO_DMA5_IRQ_MASK
, 0x0000DC00);
2098 value32
= ssb_read32(dev
->dev
, SSB_TMSLOW
);
2099 value32
|= 0x00100000;
2100 ssb_write32(dev
->dev
, SSB_TMSLOW
, value32
);
2102 b43legacy_write16(dev
, B43legacy_MMIO_POWERUP_DELAY
,
2103 dev
->dev
->bus
->chipco
.fast_pwrup_delay
);
2105 B43legacy_WARN_ON(err
!= 0);
2106 b43legacydbg(dev
->wl
, "Chip initialized\n");
2111 b43legacy_radio_turn_off(dev
, 1);
2113 b43legacy_leds_exit(dev
);
2114 b43legacy_gpio_cleanup(dev
);
2118 static void b43legacy_periodic_every120sec(struct b43legacy_wldev
*dev
)
2120 struct b43legacy_phy
*phy
= &dev
->phy
;
2122 if (phy
->type
!= B43legacy_PHYTYPE_G
|| phy
->rev
< 2)
2125 b43legacy_mac_suspend(dev
);
2126 b43legacy_phy_lo_g_measure(dev
);
2127 b43legacy_mac_enable(dev
);
2130 static void b43legacy_periodic_every60sec(struct b43legacy_wldev
*dev
)
2132 b43legacy_phy_lo_mark_all_unused(dev
);
2133 if (dev
->dev
->bus
->sprom
.r1
.boardflags_lo
& B43legacy_BFL_RSSI
) {
2134 b43legacy_mac_suspend(dev
);
2135 b43legacy_calc_nrssi_slope(dev
);
2136 b43legacy_mac_enable(dev
);
2140 static void b43legacy_periodic_every30sec(struct b43legacy_wldev
*dev
)
2142 /* Update device statistics. */
2143 b43legacy_calculate_link_quality(dev
);
2146 static void b43legacy_periodic_every15sec(struct b43legacy_wldev
*dev
)
2148 b43legacy_phy_xmitpower(dev
); /* FIXME: unless scanning? */
2151 static void do_periodic_work(struct b43legacy_wldev
*dev
)
2155 state
= dev
->periodic_state
;
2157 b43legacy_periodic_every120sec(dev
);
2159 b43legacy_periodic_every60sec(dev
);
2161 b43legacy_periodic_every30sec(dev
);
2162 b43legacy_periodic_every15sec(dev
);
2165 /* Periodic work locking policy:
2166 * The whole periodic work handler is protected by
2167 * wl->mutex. If another lock is needed somewhere in the
2168 * pwork callchain, it's aquired in-place, where it's needed.
2170 static void b43legacy_periodic_work_handler(struct work_struct
*work
)
2172 struct b43legacy_wldev
*dev
= container_of(work
, struct b43legacy_wldev
,
2173 periodic_work
.work
);
2174 struct b43legacy_wl
*wl
= dev
->wl
;
2175 unsigned long delay
;
2177 mutex_lock(&wl
->mutex
);
2179 if (unlikely(b43legacy_status(dev
) != B43legacy_STAT_STARTED
))
2181 if (b43legacy_debug(dev
, B43legacy_DBG_PWORK_STOP
))
2184 do_periodic_work(dev
);
2186 dev
->periodic_state
++;
2188 if (b43legacy_debug(dev
, B43legacy_DBG_PWORK_FAST
))
2189 delay
= msecs_to_jiffies(50);
2191 delay
= round_jiffies_relative(HZ
* 15);
2192 queue_delayed_work(wl
->hw
->workqueue
, &dev
->periodic_work
, delay
);
2194 mutex_unlock(&wl
->mutex
);
2197 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev
*dev
)
2199 struct delayed_work
*work
= &dev
->periodic_work
;
2201 dev
->periodic_state
= 0;
2202 INIT_DELAYED_WORK(work
, b43legacy_periodic_work_handler
);
2203 queue_delayed_work(dev
->wl
->hw
->workqueue
, work
, 0);
2206 /* Validate access to the chip (SHM) */
2207 static int b43legacy_validate_chipaccess(struct b43legacy_wldev
*dev
)
2212 shm_backup
= b43legacy_shm_read32(dev
, B43legacy_SHM_SHARED
, 0);
2213 b43legacy_shm_write32(dev
, B43legacy_SHM_SHARED
, 0, 0xAA5555AA);
2214 if (b43legacy_shm_read32(dev
, B43legacy_SHM_SHARED
, 0) !=
2217 b43legacy_shm_write32(dev
, B43legacy_SHM_SHARED
, 0, 0x55AAAA55);
2218 if (b43legacy_shm_read32(dev
, B43legacy_SHM_SHARED
, 0) !=
2221 b43legacy_shm_write32(dev
, B43legacy_SHM_SHARED
, 0, shm_backup
);
2223 value
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
2224 if ((value
| B43legacy_MACCTL_GMODE
) !=
2225 (B43legacy_MACCTL_GMODE
| B43legacy_MACCTL_IHR_ENABLED
))
2228 value
= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
2234 b43legacyerr(dev
->wl
, "Failed to validate the chipaccess\n");
2238 static void b43legacy_security_init(struct b43legacy_wldev
*dev
)
2240 dev
->max_nr_keys
= (dev
->dev
->id
.revision
>= 5) ? 58 : 20;
2241 B43legacy_WARN_ON(dev
->max_nr_keys
> ARRAY_SIZE(dev
->key
));
2242 dev
->ktp
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
2244 /* KTP is a word address, but we address SHM bytewise.
2245 * So multiply by two.
2248 if (dev
->dev
->id
.revision
>= 5)
2249 /* Number of RCMTA address slots */
2250 b43legacy_write16(dev
, B43legacy_MMIO_RCMTA_COUNT
,
2251 dev
->max_nr_keys
- 8);
2254 static int b43legacy_rng_read(struct hwrng
*rng
, u32
*data
)
2256 struct b43legacy_wl
*wl
= (struct b43legacy_wl
*)rng
->priv
;
2257 unsigned long flags
;
2259 /* Don't take wl->mutex here, as it could deadlock with
2260 * hwrng internal locking. It's not needed to take
2261 * wl->mutex here, anyway. */
2263 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2264 *data
= b43legacy_read16(wl
->current_dev
, B43legacy_MMIO_RNG
);
2265 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2267 return (sizeof(u16
));
2270 static void b43legacy_rng_exit(struct b43legacy_wl
*wl
)
2272 if (wl
->rng_initialized
)
2273 hwrng_unregister(&wl
->rng
);
2276 static int b43legacy_rng_init(struct b43legacy_wl
*wl
)
2280 snprintf(wl
->rng_name
, ARRAY_SIZE(wl
->rng_name
),
2281 "%s_%s", KBUILD_MODNAME
, wiphy_name(wl
->hw
->wiphy
));
2282 wl
->rng
.name
= wl
->rng_name
;
2283 wl
->rng
.data_read
= b43legacy_rng_read
;
2284 wl
->rng
.priv
= (unsigned long)wl
;
2285 wl
->rng_initialized
= 1;
2286 err
= hwrng_register(&wl
->rng
);
2288 wl
->rng_initialized
= 0;
2289 b43legacyerr(wl
, "Failed to register the random "
2290 "number generator (%d)\n", err
);
2296 static int b43legacy_tx(struct ieee80211_hw
*hw
,
2297 struct sk_buff
*skb
,
2298 struct ieee80211_tx_control
*ctl
)
2300 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2301 struct b43legacy_wldev
*dev
= wl
->current_dev
;
2303 unsigned long flags
;
2307 if (unlikely(b43legacy_status(dev
) < B43legacy_STAT_STARTED
))
2309 /* DMA-TX is done without a global lock. */
2310 if (b43legacy_using_pio(dev
)) {
2311 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2312 err
= b43legacy_pio_tx(dev
, skb
, ctl
);
2313 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2315 err
= b43legacy_dma_tx(dev
, skb
, ctl
);
2318 return NETDEV_TX_BUSY
;
2319 return NETDEV_TX_OK
;
2322 static int b43legacy_conf_tx(struct ieee80211_hw
*hw
,
2324 const struct ieee80211_tx_queue_params
*params
)
2329 static int b43legacy_get_tx_stats(struct ieee80211_hw
*hw
,
2330 struct ieee80211_tx_queue_stats
*stats
)
2332 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2333 struct b43legacy_wldev
*dev
= wl
->current_dev
;
2334 unsigned long flags
;
2339 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2340 if (likely(b43legacy_status(dev
) >= B43legacy_STAT_STARTED
)) {
2341 if (b43legacy_using_pio(dev
))
2342 b43legacy_pio_get_tx_stats(dev
, stats
);
2344 b43legacy_dma_get_tx_stats(dev
, stats
);
2347 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2352 static int b43legacy_get_stats(struct ieee80211_hw
*hw
,
2353 struct ieee80211_low_level_stats
*stats
)
2355 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2356 unsigned long flags
;
2358 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2359 memcpy(stats
, &wl
->ieee_stats
, sizeof(*stats
));
2360 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2365 static const char *phymode_to_string(unsigned int phymode
)
2368 case B43legacy_PHYMODE_B
:
2370 case B43legacy_PHYMODE_G
:
2373 B43legacy_BUG_ON(1);
2378 static int find_wldev_for_phymode(struct b43legacy_wl
*wl
,
2379 unsigned int phymode
,
2380 struct b43legacy_wldev
**dev
,
2383 struct b43legacy_wldev
*d
;
2385 list_for_each_entry(d
, &wl
->devlist
, list
) {
2386 if (d
->phy
.possible_phymodes
& phymode
) {
2387 /* Ok, this device supports the PHY-mode.
2388 * Set the gmode bit. */
2399 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev
*dev
)
2401 struct ssb_device
*sdev
= dev
->dev
;
2404 tmslow
= ssb_read32(sdev
, SSB_TMSLOW
);
2405 tmslow
&= ~B43legacy_TMSLOW_GMODE
;
2406 tmslow
|= B43legacy_TMSLOW_PHYRESET
;
2407 tmslow
|= SSB_TMSLOW_FGC
;
2408 ssb_write32(sdev
, SSB_TMSLOW
, tmslow
);
2411 tmslow
= ssb_read32(sdev
, SSB_TMSLOW
);
2412 tmslow
&= ~SSB_TMSLOW_FGC
;
2413 tmslow
|= B43legacy_TMSLOW_PHYRESET
;
2414 ssb_write32(sdev
, SSB_TMSLOW
, tmslow
);
2418 /* Expects wl->mutex locked */
2419 static int b43legacy_switch_phymode(struct b43legacy_wl
*wl
,
2420 unsigned int new_mode
)
2422 struct b43legacy_wldev
*up_dev
;
2423 struct b43legacy_wldev
*down_dev
;
2428 err
= find_wldev_for_phymode(wl
, new_mode
, &up_dev
, &gmode
);
2430 b43legacyerr(wl
, "Could not find a device for %s-PHY mode\n",
2431 phymode_to_string(new_mode
));
2434 if ((up_dev
== wl
->current_dev
) &&
2435 (!!wl
->current_dev
->phy
.gmode
== !!gmode
))
2436 /* This device is already running. */
2438 b43legacydbg(wl
, "Reconfiguring PHYmode to %s-PHY\n",
2439 phymode_to_string(new_mode
));
2440 down_dev
= wl
->current_dev
;
2442 prev_status
= b43legacy_status(down_dev
);
2443 /* Shutdown the currently running core. */
2444 if (prev_status
>= B43legacy_STAT_STARTED
)
2445 b43legacy_wireless_core_stop(down_dev
);
2446 if (prev_status
>= B43legacy_STAT_INITIALIZED
)
2447 b43legacy_wireless_core_exit(down_dev
);
2449 if (down_dev
!= up_dev
)
2450 /* We switch to a different core, so we put PHY into
2451 * RESET on the old core. */
2452 b43legacy_put_phy_into_reset(down_dev
);
2454 /* Now start the new core. */
2455 up_dev
->phy
.gmode
= gmode
;
2456 if (prev_status
>= B43legacy_STAT_INITIALIZED
) {
2457 err
= b43legacy_wireless_core_init(up_dev
);
2459 b43legacyerr(wl
, "Fatal: Could not initialize device"
2460 " for newly selected %s-PHY mode\n",
2461 phymode_to_string(new_mode
));
2465 if (prev_status
>= B43legacy_STAT_STARTED
) {
2466 err
= b43legacy_wireless_core_start(up_dev
);
2468 b43legacyerr(wl
, "Fatal: Coult not start device for "
2469 "newly selected %s-PHY mode\n",
2470 phymode_to_string(new_mode
));
2471 b43legacy_wireless_core_exit(up_dev
);
2475 B43legacy_WARN_ON(b43legacy_status(up_dev
) != prev_status
);
2477 b43legacy_shm_write32(up_dev
, B43legacy_SHM_SHARED
, 0x003E, 0);
2479 wl
->current_dev
= up_dev
;
2483 /* Whoops, failed to init the new core. No core is operating now. */
2484 wl
->current_dev
= NULL
;
2488 static int b43legacy_antenna_from_ieee80211(u8 antenna
)
2491 case 0: /* default/diversity */
2492 return B43legacy_ANTENNA_DEFAULT
;
2493 case 1: /* Antenna 0 */
2494 return B43legacy_ANTENNA0
;
2495 case 2: /* Antenna 1 */
2496 return B43legacy_ANTENNA1
;
2498 return B43legacy_ANTENNA_DEFAULT
;
2502 static int b43legacy_dev_config(struct ieee80211_hw
*hw
,
2503 struct ieee80211_conf
*conf
)
2505 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2506 struct b43legacy_wldev
*dev
;
2507 struct b43legacy_phy
*phy
;
2508 unsigned long flags
;
2509 unsigned int new_phymode
= 0xFFFF;
2515 antenna_tx
= b43legacy_antenna_from_ieee80211(conf
->antenna_sel_tx
);
2516 antenna_rx
= b43legacy_antenna_from_ieee80211(conf
->antenna_sel_rx
);
2518 mutex_lock(&wl
->mutex
);
2520 /* Switch the PHY mode (if necessary). */
2521 switch (conf
->phymode
) {
2522 case MODE_IEEE80211B
:
2523 new_phymode
= B43legacy_PHYMODE_B
;
2525 case MODE_IEEE80211G
:
2526 new_phymode
= B43legacy_PHYMODE_G
;
2529 B43legacy_WARN_ON(1);
2531 err
= b43legacy_switch_phymode(wl
, new_phymode
);
2533 goto out_unlock_mutex
;
2534 dev
= wl
->current_dev
;
2537 /* Disable IRQs while reconfiguring the device.
2538 * This makes it possible to drop the spinlock throughout
2539 * the reconfiguration process. */
2540 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2541 if (b43legacy_status(dev
) < B43legacy_STAT_STARTED
) {
2542 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2543 goto out_unlock_mutex
;
2545 savedirqs
= b43legacy_interrupt_disable(dev
, B43legacy_IRQ_ALL
);
2546 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2547 b43legacy_synchronize_irq(dev
);
2549 /* Switch to the requested channel.
2550 * The firmware takes care of races with the TX handler. */
2551 if (conf
->channel_val
!= phy
->channel
)
2552 b43legacy_radio_selectchannel(dev
, conf
->channel_val
, 0);
2554 /* Enable/Disable ShortSlot timing. */
2555 if ((!!(conf
->flags
& IEEE80211_CONF_SHORT_SLOT_TIME
))
2556 != dev
->short_slot
) {
2557 B43legacy_WARN_ON(phy
->type
!= B43legacy_PHYTYPE_G
);
2558 if (conf
->flags
& IEEE80211_CONF_SHORT_SLOT_TIME
)
2559 b43legacy_short_slot_timing_enable(dev
);
2561 b43legacy_short_slot_timing_disable(dev
);
2564 /* Adjust the desired TX power level. */
2565 if (conf
->power_level
!= 0) {
2566 if (conf
->power_level
!= phy
->power_level
) {
2567 phy
->power_level
= conf
->power_level
;
2568 b43legacy_phy_xmitpower(dev
);
2572 /* Antennas for RX and management frame TX. */
2573 b43legacy_mgmtframe_txantenna(dev
, antenna_tx
);
2575 /* Update templates for AP mode. */
2576 if (b43legacy_is_mode(wl
, IEEE80211_IF_TYPE_AP
))
2577 b43legacy_set_beacon_int(dev
, conf
->beacon_int
);
2580 if (!!conf
->radio_enabled
!= phy
->radio_on
) {
2581 if (conf
->radio_enabled
) {
2582 b43legacy_radio_turn_on(dev
);
2583 b43legacyinfo(dev
->wl
, "Radio turned on by software\n");
2584 if (!dev
->radio_hw_enable
)
2585 b43legacyinfo(dev
->wl
, "The hardware RF-kill"
2586 " button still turns the radio"
2587 " physically off. Press the"
2588 " button to turn it on.\n");
2590 b43legacy_radio_turn_off(dev
, 0);
2591 b43legacyinfo(dev
->wl
, "Radio turned off by"
2596 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2597 b43legacy_interrupt_enable(dev
, savedirqs
);
2599 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2601 mutex_unlock(&wl
->mutex
);
2606 static int b43legacy_dev_set_key(struct ieee80211_hw
*hw
,
2607 enum set_key_cmd cmd
,
2608 const u8
*local_addr
, const u8
*addr
,
2609 struct ieee80211_key_conf
*key
)
2611 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2612 struct b43legacy_wldev
*dev
= wl
->current_dev
;
2613 unsigned long flags
;
2614 int err
= -EOPNOTSUPP
;
2615 DECLARE_MAC_BUF(mac
);
2619 mutex_lock(&wl
->mutex
);
2620 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2622 if (b43legacy_status(dev
) < B43legacy_STAT_INITIALIZED
) {
2625 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2626 mutex_unlock(&wl
->mutex
);
2627 b43legacydbg(wl
, "Using software based encryption for "
2628 "mac: %s\n", print_mac(mac
, addr
));
2632 static void b43legacy_configure_filter(struct ieee80211_hw
*hw
,
2633 unsigned int changed
,
2634 unsigned int *fflags
,
2636 struct dev_addr_list
*mc_list
)
2638 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2639 struct b43legacy_wldev
*dev
= wl
->current_dev
;
2640 unsigned long flags
;
2647 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2648 *fflags
&= FIF_PROMISC_IN_BSS
|
2654 FIF_BCN_PRBRESP_PROMISC
;
2656 changed
&= FIF_PROMISC_IN_BSS
|
2662 FIF_BCN_PRBRESP_PROMISC
;
2664 wl
->filter_flags
= *fflags
;
2666 if (changed
&& b43legacy_status(dev
) >= B43legacy_STAT_INITIALIZED
)
2667 b43legacy_adjust_opmode(dev
);
2668 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2671 static int b43legacy_config_interface(struct ieee80211_hw
*hw
,
2673 struct ieee80211_if_conf
*conf
)
2675 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2676 struct b43legacy_wldev
*dev
= wl
->current_dev
;
2677 unsigned long flags
;
2681 mutex_lock(&wl
->mutex
);
2682 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2683 B43legacy_WARN_ON(wl
->if_id
!= if_id
);
2685 memcpy(wl
->bssid
, conf
->bssid
, ETH_ALEN
);
2687 memset(wl
->bssid
, 0, ETH_ALEN
);
2688 if (b43legacy_status(dev
) >= B43legacy_STAT_INITIALIZED
) {
2689 if (b43legacy_is_mode(wl
, IEEE80211_IF_TYPE_AP
)) {
2690 B43legacy_WARN_ON(conf
->type
!= IEEE80211_IF_TYPE_AP
);
2691 b43legacy_set_ssid(dev
, conf
->ssid
, conf
->ssid_len
);
2693 b43legacy_refresh_templates(dev
, conf
->beacon
);
2695 b43legacy_write_mac_bssid_templates(dev
);
2697 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2698 mutex_unlock(&wl
->mutex
);
2703 /* Locking: wl->mutex */
2704 static void b43legacy_wireless_core_stop(struct b43legacy_wldev
*dev
)
2706 struct b43legacy_wl
*wl
= dev
->wl
;
2707 unsigned long flags
;
2709 if (b43legacy_status(dev
) < B43legacy_STAT_STARTED
)
2712 /* Disable and sync interrupts. We must do this before than
2713 * setting the status to INITIALIZED, as the interrupt handler
2714 * won't care about IRQs then. */
2715 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2716 dev
->irq_savedstate
= b43legacy_interrupt_disable(dev
,
2718 b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
); /* flush */
2719 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2720 b43legacy_synchronize_irq(dev
);
2722 b43legacy_set_status(dev
, B43legacy_STAT_INITIALIZED
);
2724 mutex_unlock(&wl
->mutex
);
2725 /* Must unlock as it would otherwise deadlock. No races here.
2726 * Cancel the possibly running self-rearming periodic work. */
2727 cancel_delayed_work_sync(&dev
->periodic_work
);
2728 mutex_lock(&wl
->mutex
);
2730 ieee80211_stop_queues(wl
->hw
); /* FIXME this could cause a deadlock */
2732 b43legacy_mac_suspend(dev
);
2733 free_irq(dev
->dev
->irq
, dev
);
2734 b43legacydbg(wl
, "Wireless interface stopped\n");
2737 /* Locking: wl->mutex */
2738 static int b43legacy_wireless_core_start(struct b43legacy_wldev
*dev
)
2742 B43legacy_WARN_ON(b43legacy_status(dev
) != B43legacy_STAT_INITIALIZED
);
2744 drain_txstatus_queue(dev
);
2745 err
= request_irq(dev
->dev
->irq
, b43legacy_interrupt_handler
,
2746 IRQF_SHARED
, KBUILD_MODNAME
, dev
);
2748 b43legacyerr(dev
->wl
, "Cannot request IRQ-%d\n",
2752 /* We are ready to run. */
2753 b43legacy_set_status(dev
, B43legacy_STAT_STARTED
);
2755 /* Start data flow (TX/RX) */
2756 b43legacy_mac_enable(dev
);
2757 b43legacy_interrupt_enable(dev
, dev
->irq_savedstate
);
2758 ieee80211_start_queues(dev
->wl
->hw
);
2760 /* Start maintenance work */
2761 b43legacy_periodic_tasks_setup(dev
);
2763 b43legacydbg(dev
->wl
, "Wireless interface started\n");
2768 /* Get PHY and RADIO versioning numbers */
2769 static int b43legacy_phy_versioning(struct b43legacy_wldev
*dev
)
2771 struct b43legacy_phy
*phy
= &dev
->phy
;
2779 int unsupported
= 0;
2781 /* Get PHY versioning */
2782 tmp
= b43legacy_read16(dev
, B43legacy_MMIO_PHY_VER
);
2783 analog_type
= (tmp
& B43legacy_PHYVER_ANALOG
)
2784 >> B43legacy_PHYVER_ANALOG_SHIFT
;
2785 phy_type
= (tmp
& B43legacy_PHYVER_TYPE
) >> B43legacy_PHYVER_TYPE_SHIFT
;
2786 phy_rev
= (tmp
& B43legacy_PHYVER_VERSION
);
2788 case B43legacy_PHYTYPE_B
:
2789 if (phy_rev
!= 2 && phy_rev
!= 4
2790 && phy_rev
!= 6 && phy_rev
!= 7)
2793 case B43legacy_PHYTYPE_G
:
2801 b43legacyerr(dev
->wl
, "FOUND UNSUPPORTED PHY "
2802 "(Analog %u, Type %u, Revision %u)\n",
2803 analog_type
, phy_type
, phy_rev
);
2806 b43legacydbg(dev
->wl
, "Found PHY: Analog %u, Type %u, Revision %u\n",
2807 analog_type
, phy_type
, phy_rev
);
2810 /* Get RADIO versioning */
2811 if (dev
->dev
->bus
->chip_id
== 0x4317) {
2812 if (dev
->dev
->bus
->chip_rev
== 0)
2814 else if (dev
->dev
->bus
->chip_rev
== 1)
2819 b43legacy_write16(dev
, B43legacy_MMIO_RADIO_CONTROL
,
2820 B43legacy_RADIOCTL_ID
);
2821 tmp
= b43legacy_read16(dev
, B43legacy_MMIO_RADIO_DATA_HIGH
);
2823 b43legacy_write16(dev
, B43legacy_MMIO_RADIO_CONTROL
,
2824 B43legacy_RADIOCTL_ID
);
2825 tmp
|= b43legacy_read16(dev
, B43legacy_MMIO_RADIO_DATA_LOW
);
2827 radio_manuf
= (tmp
& 0x00000FFF);
2828 radio_ver
= (tmp
& 0x0FFFF000) >> 12;
2829 radio_rev
= (tmp
& 0xF0000000) >> 28;
2831 case B43legacy_PHYTYPE_B
:
2832 if ((radio_ver
& 0xFFF0) != 0x2050)
2835 case B43legacy_PHYTYPE_G
:
2836 if (radio_ver
!= 0x2050)
2840 B43legacy_BUG_ON(1);
2843 b43legacyerr(dev
->wl
, "FOUND UNSUPPORTED RADIO "
2844 "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
2845 radio_manuf
, radio_ver
, radio_rev
);
2848 b43legacydbg(dev
->wl
, "Found Radio: Manuf 0x%X, Version 0x%X,"
2849 " Revision %u\n", radio_manuf
, radio_ver
, radio_rev
);
2852 phy
->radio_manuf
= radio_manuf
;
2853 phy
->radio_ver
= radio_ver
;
2854 phy
->radio_rev
= radio_rev
;
2856 phy
->analog
= analog_type
;
2857 phy
->type
= phy_type
;
2863 static void setup_struct_phy_for_init(struct b43legacy_wldev
*dev
,
2864 struct b43legacy_phy
*phy
)
2866 struct b43legacy_lopair
*lo
;
2869 memset(phy
->minlowsig
, 0xFF, sizeof(phy
->minlowsig
));
2870 memset(phy
->minlowsigpos
, 0, sizeof(phy
->minlowsigpos
));
2874 /* Assume the radio is enabled. If it's not enabled, the state will
2875 * immediately get fixed on the first periodic work run. */
2876 dev
->radio_hw_enable
= 1;
2878 phy
->savedpctlreg
= 0xFFFF;
2879 phy
->aci_enable
= 0;
2880 phy
->aci_wlan_automatic
= 0;
2881 phy
->aci_hw_rssi
= 0;
2883 lo
= phy
->_lo_pairs
;
2885 memset(lo
, 0, sizeof(struct b43legacy_lopair
) *
2886 B43legacy_LO_COUNT
);
2887 phy
->max_lb_gain
= 0;
2888 phy
->trsw_rx_gain
= 0;
2890 /* Set default attenuation values. */
2891 phy
->bbatt
= b43legacy_default_baseband_attenuation(dev
);
2892 phy
->rfatt
= b43legacy_default_radio_attenuation(dev
);
2893 phy
->txctl1
= b43legacy_default_txctl1(dev
);
2894 phy
->txpwr_offset
= 0;
2897 phy
->nrssislope
= 0;
2898 for (i
= 0; i
< ARRAY_SIZE(phy
->nrssi
); i
++)
2899 phy
->nrssi
[i
] = -1000;
2900 for (i
= 0; i
< ARRAY_SIZE(phy
->nrssi_lt
); i
++)
2901 phy
->nrssi_lt
[i
] = i
;
2903 phy
->lofcal
= 0xFFFF;
2904 phy
->initval
= 0xFFFF;
2906 spin_lock_init(&phy
->lock
);
2907 phy
->interfmode
= B43legacy_INTERFMODE_NONE
;
2908 phy
->channel
= 0xFF;
2911 static void setup_struct_wldev_for_init(struct b43legacy_wldev
*dev
)
2914 dev
->reg124_set_0x4
= 0;
2917 memset(&dev
->stats
, 0, sizeof(dev
->stats
));
2919 setup_struct_phy_for_init(dev
, &dev
->phy
);
2921 /* IRQ related flags */
2922 dev
->irq_reason
= 0;
2923 memset(dev
->dma_reason
, 0, sizeof(dev
->dma_reason
));
2924 dev
->irq_savedstate
= B43legacy_IRQ_MASKTEMPLATE
;
2926 dev
->mac_suspended
= 1;
2928 /* Noise calculation context */
2929 memset(&dev
->noisecalc
, 0, sizeof(dev
->noisecalc
));
2932 static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev
*dev
)
2934 #ifdef CONFIG_SSB_DRIVER_PCICORE
2935 struct ssb_bus
*bus
= dev
->dev
->bus
;
2938 if (bus
->pcicore
.dev
&&
2939 bus
->pcicore
.dev
->id
.coreid
== SSB_DEV_PCI
&&
2940 bus
->pcicore
.dev
->id
.revision
<= 5) {
2941 /* IMCFGLO timeouts workaround. */
2942 tmp
= ssb_read32(dev
->dev
, SSB_IMCFGLO
);
2943 tmp
&= ~SSB_IMCFGLO_REQTO
;
2944 tmp
&= ~SSB_IMCFGLO_SERTO
;
2945 switch (bus
->bustype
) {
2946 case SSB_BUSTYPE_PCI
:
2947 case SSB_BUSTYPE_PCMCIA
:
2950 case SSB_BUSTYPE_SSB
:
2954 ssb_write32(dev
->dev
, SSB_IMCFGLO
, tmp
);
2956 #endif /* CONFIG_SSB_DRIVER_PCICORE */
2959 /* Shutdown a wireless core */
2960 /* Locking: wl->mutex */
2961 static void b43legacy_wireless_core_exit(struct b43legacy_wldev
*dev
)
2963 struct b43legacy_wl
*wl
= dev
->wl
;
2964 struct b43legacy_phy
*phy
= &dev
->phy
;
2966 B43legacy_WARN_ON(b43legacy_status(dev
) > B43legacy_STAT_INITIALIZED
);
2967 if (b43legacy_status(dev
) != B43legacy_STAT_INITIALIZED
)
2969 b43legacy_set_status(dev
, B43legacy_STAT_UNINIT
);
2971 mutex_unlock(&wl
->mutex
);
2972 /* Must unlock as it would otherwise deadlock. No races here.
2973 * Cancel possibly pending workqueues. */
2974 cancel_work_sync(&dev
->restart_work
);
2975 mutex_lock(&wl
->mutex
);
2977 mutex_unlock(&dev
->wl
->mutex
);
2978 b43legacy_rfkill_exit(dev
);
2979 mutex_lock(&dev
->wl
->mutex
);
2981 b43legacy_rng_exit(dev
->wl
);
2982 b43legacy_pio_free(dev
);
2983 b43legacy_dma_free(dev
);
2984 b43legacy_chip_exit(dev
);
2985 b43legacy_radio_turn_off(dev
, 1);
2986 b43legacy_switch_analog(dev
, 0);
2987 if (phy
->dyn_tssi_tbl
)
2988 kfree(phy
->tssi2dbm
);
2989 kfree(phy
->lo_control
);
2990 phy
->lo_control
= NULL
;
2991 ssb_device_disable(dev
->dev
, 0);
2992 ssb_bus_may_powerdown(dev
->dev
->bus
);
2995 static void prepare_phy_data_for_init(struct b43legacy_wldev
*dev
)
2997 struct b43legacy_phy
*phy
= &dev
->phy
;
3000 /* Set default attenuation values. */
3001 phy
->bbatt
= b43legacy_default_baseband_attenuation(dev
);
3002 phy
->rfatt
= b43legacy_default_radio_attenuation(dev
);
3003 phy
->txctl1
= b43legacy_default_txctl1(dev
);
3004 phy
->txctl2
= 0xFFFF;
3005 phy
->txpwr_offset
= 0;
3008 phy
->nrssislope
= 0;
3009 for (i
= 0; i
< ARRAY_SIZE(phy
->nrssi
); i
++)
3010 phy
->nrssi
[i
] = -1000;
3011 for (i
= 0; i
< ARRAY_SIZE(phy
->nrssi_lt
); i
++)
3012 phy
->nrssi_lt
[i
] = i
;
3014 phy
->lofcal
= 0xFFFF;
3015 phy
->initval
= 0xFFFF;
3017 phy
->aci_enable
= 0;
3018 phy
->aci_wlan_automatic
= 0;
3019 phy
->aci_hw_rssi
= 0;
3021 phy
->antenna_diversity
= 0xFFFF;
3022 memset(phy
->minlowsig
, 0xFF, sizeof(phy
->minlowsig
));
3023 memset(phy
->minlowsigpos
, 0, sizeof(phy
->minlowsigpos
));
3026 phy
->calibrated
= 0;
3030 memset(phy
->_lo_pairs
, 0,
3031 sizeof(struct b43legacy_lopair
) * B43legacy_LO_COUNT
);
3032 memset(phy
->loopback_gain
, 0, sizeof(phy
->loopback_gain
));
3035 /* Initialize a wireless core */
3036 static int b43legacy_wireless_core_init(struct b43legacy_wldev
*dev
)
3038 struct b43legacy_wl
*wl
= dev
->wl
;
3039 struct ssb_bus
*bus
= dev
->dev
->bus
;
3040 struct b43legacy_phy
*phy
= &dev
->phy
;
3041 struct ssb_sprom
*sprom
= &dev
->dev
->bus
->sprom
;
3046 B43legacy_WARN_ON(b43legacy_status(dev
) != B43legacy_STAT_UNINIT
);
3048 err
= ssb_bus_powerup(bus
, 0);
3051 if (!ssb_device_is_enabled(dev
->dev
)) {
3052 tmp
= phy
->gmode
? B43legacy_TMSLOW_GMODE
: 0;
3053 b43legacy_wireless_core_reset(dev
, tmp
);
3056 if ((phy
->type
== B43legacy_PHYTYPE_B
) ||
3057 (phy
->type
== B43legacy_PHYTYPE_G
)) {
3058 phy
->_lo_pairs
= kzalloc(sizeof(struct b43legacy_lopair
)
3059 * B43legacy_LO_COUNT
,
3061 if (!phy
->_lo_pairs
)
3064 setup_struct_wldev_for_init(dev
);
3066 err
= b43legacy_phy_init_tssi2dbm_table(dev
);
3068 goto err_kfree_lo_control
;
3070 /* Enable IRQ routing to this device. */
3071 ssb_pcicore_dev_irqvecs_enable(&bus
->pcicore
, dev
->dev
);
3073 b43legacy_imcfglo_timeouts_workaround(dev
);
3074 prepare_phy_data_for_init(dev
);
3075 b43legacy_phy_calibrate(dev
);
3076 err
= b43legacy_chip_init(dev
);
3078 goto err_kfree_tssitbl
;
3079 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
3080 B43legacy_SHM_SH_WLCOREREV
,
3081 dev
->dev
->id
.revision
);
3082 hf
= b43legacy_hf_read(dev
);
3083 if (phy
->type
== B43legacy_PHYTYPE_G
) {
3084 hf
|= B43legacy_HF_SYMW
;
3086 hf
|= B43legacy_HF_GDCW
;
3087 if (sprom
->r1
.boardflags_lo
& B43legacy_BFL_PACTRL
)
3088 hf
|= B43legacy_HF_OFDMPABOOST
;
3089 } else if (phy
->type
== B43legacy_PHYTYPE_B
) {
3090 hf
|= B43legacy_HF_SYMW
;
3091 if (phy
->rev
>= 2 && phy
->radio_ver
== 0x2050)
3092 hf
&= ~B43legacy_HF_GDCW
;
3094 b43legacy_hf_write(dev
, hf
);
3096 /* Short/Long Retry Limit.
3097 * The retry-limit is a 4-bit counter. Enforce this to avoid overflowing
3098 * the chip-internal counter.
3100 tmp
= limit_value(modparam_short_retry
, 0, 0xF);
3101 b43legacy_shm_write16(dev
, B43legacy_SHM_WIRELESS
,
3103 tmp
= limit_value(modparam_long_retry
, 0, 0xF);
3104 b43legacy_shm_write16(dev
, B43legacy_SHM_WIRELESS
,
3107 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
3109 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
3112 /* Disable sending probe responses from firmware.
3113 * Setting the MaxTime to one usec will always trigger
3114 * a timeout, so we never send any probe resp.
3115 * A timeout of zero is infinite. */
3116 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
3117 B43legacy_SHM_SH_PRMAXTIME
, 1);
3119 b43legacy_rate_memory_init(dev
);
3121 /* Minimum Contention Window */
3122 if (phy
->type
== B43legacy_PHYTYPE_B
)
3123 b43legacy_shm_write16(dev
, B43legacy_SHM_WIRELESS
,
3126 b43legacy_shm_write16(dev
, B43legacy_SHM_WIRELESS
,
3128 /* Maximum Contention Window */
3129 b43legacy_shm_write16(dev
, B43legacy_SHM_WIRELESS
,
3133 if (b43legacy_using_pio(dev
))
3134 err
= b43legacy_pio_init(dev
);
3136 err
= b43legacy_dma_init(dev
);
3138 b43legacy_qos_init(dev
);
3140 } while (err
== -EAGAIN
);
3144 b43legacy_write16(dev
, 0x0612, 0x0050);
3145 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x0416, 0x0050);
3146 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x0414, 0x01F4);
3148 ssb_bus_powerup(bus
, 1); /* Enable dynamic PCTL */
3149 memset(wl
->bssid
, 0, ETH_ALEN
);
3150 memset(wl
->mac_addr
, 0, ETH_ALEN
);
3151 b43legacy_upload_card_macaddress(dev
);
3152 b43legacy_security_init(dev
);
3153 b43legacy_rfkill_init(dev
);
3154 b43legacy_rng_init(wl
);
3156 b43legacy_set_status(dev
, B43legacy_STAT_INITIALIZED
);
3162 b43legacy_chip_exit(dev
);
3164 if (phy
->dyn_tssi_tbl
)
3165 kfree(phy
->tssi2dbm
);
3166 err_kfree_lo_control
:
3167 kfree(phy
->lo_control
);
3168 phy
->lo_control
= NULL
;
3169 ssb_bus_may_powerdown(bus
);
3170 B43legacy_WARN_ON(b43legacy_status(dev
) != B43legacy_STAT_UNINIT
);
3174 static int b43legacy_add_interface(struct ieee80211_hw
*hw
,
3175 struct ieee80211_if_init_conf
*conf
)
3177 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
3178 struct b43legacy_wldev
*dev
;
3179 unsigned long flags
;
3180 int err
= -EOPNOTSUPP
;
3182 /* TODO: allow WDS/AP devices to coexist */
3184 if (conf
->type
!= IEEE80211_IF_TYPE_AP
&&
3185 conf
->type
!= IEEE80211_IF_TYPE_STA
&&
3186 conf
->type
!= IEEE80211_IF_TYPE_WDS
&&
3187 conf
->type
!= IEEE80211_IF_TYPE_IBSS
)
3190 mutex_lock(&wl
->mutex
);
3192 goto out_mutex_unlock
;
3194 b43legacydbg(wl
, "Adding Interface type %d\n", conf
->type
);
3196 dev
= wl
->current_dev
;
3198 wl
->if_id
= conf
->if_id
;
3199 wl
->if_type
= conf
->type
;
3200 memcpy(wl
->mac_addr
, conf
->mac_addr
, ETH_ALEN
);
3202 spin_lock_irqsave(&wl
->irq_lock
, flags
);
3203 b43legacy_adjust_opmode(dev
);
3204 b43legacy_upload_card_macaddress(dev
);
3205 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
3209 mutex_unlock(&wl
->mutex
);
3214 static void b43legacy_remove_interface(struct ieee80211_hw
*hw
,
3215 struct ieee80211_if_init_conf
*conf
)
3217 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
3218 struct b43legacy_wldev
*dev
= wl
->current_dev
;
3219 unsigned long flags
;
3221 b43legacydbg(wl
, "Removing Interface type %d\n", conf
->type
);
3223 mutex_lock(&wl
->mutex
);
3225 B43legacy_WARN_ON(!wl
->operating
);
3226 B43legacy_WARN_ON(wl
->if_id
!= conf
->if_id
);
3230 spin_lock_irqsave(&wl
->irq_lock
, flags
);
3231 b43legacy_adjust_opmode(dev
);
3232 memset(wl
->mac_addr
, 0, ETH_ALEN
);
3233 b43legacy_upload_card_macaddress(dev
);
3234 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
3236 mutex_unlock(&wl
->mutex
);
3239 static int b43legacy_start(struct ieee80211_hw
*hw
)
3241 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
3242 struct b43legacy_wldev
*dev
= wl
->current_dev
;
3246 mutex_lock(&wl
->mutex
);
3248 if (b43legacy_status(dev
) < B43legacy_STAT_INITIALIZED
) {
3249 err
= b43legacy_wireless_core_init(dev
);
3251 goto out_mutex_unlock
;
3255 if (b43legacy_status(dev
) < B43legacy_STAT_STARTED
) {
3256 err
= b43legacy_wireless_core_start(dev
);
3259 b43legacy_wireless_core_exit(dev
);
3260 goto out_mutex_unlock
;
3265 mutex_unlock(&wl
->mutex
);
3270 static void b43legacy_stop(struct ieee80211_hw
*hw
)
3272 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
3273 struct b43legacy_wldev
*dev
= wl
->current_dev
;
3275 mutex_lock(&wl
->mutex
);
3276 if (b43legacy_status(dev
) >= B43legacy_STAT_STARTED
)
3277 b43legacy_wireless_core_stop(dev
);
3278 b43legacy_wireless_core_exit(dev
);
3279 mutex_unlock(&wl
->mutex
);
3283 static const struct ieee80211_ops b43legacy_hw_ops
= {
3285 .conf_tx
= b43legacy_conf_tx
,
3286 .add_interface
= b43legacy_add_interface
,
3287 .remove_interface
= b43legacy_remove_interface
,
3288 .config
= b43legacy_dev_config
,
3289 .config_interface
= b43legacy_config_interface
,
3290 .set_key
= b43legacy_dev_set_key
,
3291 .configure_filter
= b43legacy_configure_filter
,
3292 .get_stats
= b43legacy_get_stats
,
3293 .get_tx_stats
= b43legacy_get_tx_stats
,
3294 .start
= b43legacy_start
,
3295 .stop
= b43legacy_stop
,
3298 /* Hard-reset the chip. Do not call this directly.
3299 * Use b43legacy_controller_restart()
3301 static void b43legacy_chip_reset(struct work_struct
*work
)
3303 struct b43legacy_wldev
*dev
=
3304 container_of(work
, struct b43legacy_wldev
, restart_work
);
3305 struct b43legacy_wl
*wl
= dev
->wl
;
3309 mutex_lock(&wl
->mutex
);
3311 prev_status
= b43legacy_status(dev
);
3312 /* Bring the device down... */
3313 if (prev_status
>= B43legacy_STAT_STARTED
)
3314 b43legacy_wireless_core_stop(dev
);
3315 if (prev_status
>= B43legacy_STAT_INITIALIZED
)
3316 b43legacy_wireless_core_exit(dev
);
3318 /* ...and up again. */
3319 if (prev_status
>= B43legacy_STAT_INITIALIZED
) {
3320 err
= b43legacy_wireless_core_init(dev
);
3324 if (prev_status
>= B43legacy_STAT_STARTED
) {
3325 err
= b43legacy_wireless_core_start(dev
);
3327 b43legacy_wireless_core_exit(dev
);
3332 mutex_unlock(&wl
->mutex
);
3334 b43legacyerr(wl
, "Controller restart FAILED\n");
3336 b43legacyinfo(wl
, "Controller restarted\n");
3339 static int b43legacy_setup_modes(struct b43legacy_wldev
*dev
,
3343 struct ieee80211_hw
*hw
= dev
->wl
->hw
;
3344 struct ieee80211_hw_mode
*mode
;
3345 struct b43legacy_phy
*phy
= &dev
->phy
;
3349 phy
->possible_phymodes
= 0;
3352 B43legacy_WARN_ON(cnt
>= B43legacy_MAX_PHYHWMODES
);
3353 mode
= &phy
->hwmodes
[cnt
];
3355 mode
->mode
= MODE_IEEE80211B
;
3356 mode
->num_channels
= b43legacy_bg_chantable_size
;
3357 mode
->channels
= b43legacy_bg_chantable
;
3358 mode
->num_rates
= b43legacy_b_ratetable_size
;
3359 mode
->rates
= b43legacy_b_ratetable
;
3360 err
= ieee80211_register_hwmode(hw
, mode
);
3364 phy
->possible_phymodes
|= B43legacy_PHYMODE_B
;
3369 B43legacy_WARN_ON(cnt
>= B43legacy_MAX_PHYHWMODES
);
3370 mode
= &phy
->hwmodes
[cnt
];
3372 mode
->mode
= MODE_IEEE80211G
;
3373 mode
->num_channels
= b43legacy_bg_chantable_size
;
3374 mode
->channels
= b43legacy_bg_chantable
;
3375 mode
->num_rates
= b43legacy_g_ratetable_size
;
3376 mode
->rates
= b43legacy_g_ratetable
;
3377 err
= ieee80211_register_hwmode(hw
, mode
);
3381 phy
->possible_phymodes
|= B43legacy_PHYMODE_G
;
3391 static void b43legacy_wireless_core_detach(struct b43legacy_wldev
*dev
)
3393 b43legacy_rfkill_free(dev
);
3394 /* We release firmware that late to not be required to re-request
3395 * is all the time when we reinit the core. */
3396 b43legacy_release_firmware(dev
);
3399 static int b43legacy_wireless_core_attach(struct b43legacy_wldev
*dev
)
3401 struct b43legacy_wl
*wl
= dev
->wl
;
3402 struct ssb_bus
*bus
= dev
->dev
->bus
;
3403 struct pci_dev
*pdev
= bus
->host_pci
;
3409 /* Do NOT do any device initialization here.
3410 * Do it in wireless_core_init() instead.
3411 * This function is for gathering basic information about the HW, only.
3412 * Also some structs may be set up here. But most likely you want to
3413 * have that in core_init(), too.
3416 err
= ssb_bus_powerup(bus
, 0);
3418 b43legacyerr(wl
, "Bus powerup failed\n");
3421 /* Get the PHY type. */
3422 if (dev
->dev
->id
.revision
>= 5) {
3425 tmshigh
= ssb_read32(dev
->dev
, SSB_TMSHIGH
);
3426 have_gphy
= !!(tmshigh
& B43legacy_TMSHIGH_GPHY
);
3429 } else if (dev
->dev
->id
.revision
== 4)
3434 dev
->phy
.gmode
= (have_gphy
|| have_bphy
);
3435 tmp
= dev
->phy
.gmode
? B43legacy_TMSLOW_GMODE
: 0;
3436 b43legacy_wireless_core_reset(dev
, tmp
);
3438 err
= b43legacy_phy_versioning(dev
);
3441 /* Check if this device supports multiband. */
3443 (pdev
->device
!= 0x4312 &&
3444 pdev
->device
!= 0x4319 &&
3445 pdev
->device
!= 0x4324)) {
3446 /* No multiband support. */
3449 switch (dev
->phy
.type
) {
3450 case B43legacy_PHYTYPE_B
:
3453 case B43legacy_PHYTYPE_G
:
3457 B43legacy_BUG_ON(1);
3460 dev
->phy
.gmode
= (have_gphy
|| have_bphy
);
3461 tmp
= dev
->phy
.gmode
? B43legacy_TMSLOW_GMODE
: 0;
3462 b43legacy_wireless_core_reset(dev
, tmp
);
3464 err
= b43legacy_validate_chipaccess(dev
);
3467 err
= b43legacy_setup_modes(dev
, have_bphy
, have_gphy
);
3471 /* Now set some default "current_dev" */
3472 if (!wl
->current_dev
)
3473 wl
->current_dev
= dev
;
3474 INIT_WORK(&dev
->restart_work
, b43legacy_chip_reset
);
3475 b43legacy_rfkill_alloc(dev
);
3477 b43legacy_radio_turn_off(dev
, 1);
3478 b43legacy_switch_analog(dev
, 0);
3479 ssb_device_disable(dev
->dev
, 0);
3480 ssb_bus_may_powerdown(bus
);
3486 ssb_bus_may_powerdown(bus
);
3490 static void b43legacy_one_core_detach(struct ssb_device
*dev
)
3492 struct b43legacy_wldev
*wldev
;
3493 struct b43legacy_wl
*wl
;
3495 wldev
= ssb_get_drvdata(dev
);
3497 cancel_work_sync(&wldev
->restart_work
);
3498 b43legacy_debugfs_remove_device(wldev
);
3499 b43legacy_wireless_core_detach(wldev
);
3500 list_del(&wldev
->list
);
3502 ssb_set_drvdata(dev
, NULL
);
3506 static int b43legacy_one_core_attach(struct ssb_device
*dev
,
3507 struct b43legacy_wl
*wl
)
3509 struct b43legacy_wldev
*wldev
;
3510 struct pci_dev
*pdev
;
3513 if (!list_empty(&wl
->devlist
)) {
3514 /* We are not the first core on this chip. */
3515 pdev
= dev
->bus
->host_pci
;
3516 /* Only special chips support more than one wireless
3517 * core, although some of the other chips have more than
3518 * one wireless core as well. Check for this and
3522 ((pdev
->device
!= 0x4321) &&
3523 (pdev
->device
!= 0x4313) &&
3524 (pdev
->device
!= 0x431A))) {
3525 b43legacydbg(wl
, "Ignoring unconnected 802.11 core\n");
3530 wldev
= kzalloc(sizeof(*wldev
), GFP_KERNEL
);
3536 b43legacy_set_status(wldev
, B43legacy_STAT_UNINIT
);
3537 wldev
->bad_frames_preempt
= modparam_bad_frames_preempt
;
3538 tasklet_init(&wldev
->isr_tasklet
,
3539 (void (*)(unsigned long))b43legacy_interrupt_tasklet
,
3540 (unsigned long)wldev
);
3542 wldev
->__using_pio
= 1;
3543 INIT_LIST_HEAD(&wldev
->list
);
3545 err
= b43legacy_wireless_core_attach(wldev
);
3547 goto err_kfree_wldev
;
3549 list_add(&wldev
->list
, &wl
->devlist
);
3551 ssb_set_drvdata(dev
, wldev
);
3552 b43legacy_debugfs_add_device(wldev
);
3561 static void b43legacy_sprom_fixup(struct ssb_bus
*bus
)
3563 /* boardflags workarounds */
3564 if (bus
->boardinfo
.vendor
== PCI_VENDOR_ID_APPLE
&&
3565 bus
->boardinfo
.type
== 0x4E &&
3566 bus
->boardinfo
.rev
> 0x40)
3567 bus
->sprom
.r1
.boardflags_lo
|= B43legacy_BFL_PACTRL
;
3569 /* Convert Antennagain values to Q5.2 */
3570 if (bus
->sprom
.r1
.antenna_gain_bg
== 0xFF)
3571 bus
->sprom
.r1
.antenna_gain_bg
= 2; /* if unset, use 2 dBm */
3572 bus
->sprom
.r1
.antenna_gain_bg
<<= 2;
3575 static void b43legacy_wireless_exit(struct ssb_device
*dev
,
3576 struct b43legacy_wl
*wl
)
3578 struct ieee80211_hw
*hw
= wl
->hw
;
3580 ssb_set_devtypedata(dev
, NULL
);
3581 ieee80211_free_hw(hw
);
3584 static int b43legacy_wireless_init(struct ssb_device
*dev
)
3586 struct ssb_sprom
*sprom
= &dev
->bus
->sprom
;
3587 struct ieee80211_hw
*hw
;
3588 struct b43legacy_wl
*wl
;
3591 b43legacy_sprom_fixup(dev
->bus
);
3593 hw
= ieee80211_alloc_hw(sizeof(*wl
), &b43legacy_hw_ops
);
3595 b43legacyerr(NULL
, "Could not allocate ieee80211 device\n");
3600 hw
->flags
= IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE
|
3601 IEEE80211_HW_RX_INCLUDES_FCS
;
3602 hw
->max_signal
= 100;
3603 hw
->max_rssi
= -110;
3604 hw
->max_noise
= -110;
3605 hw
->queues
= 1; /* FIXME: hardware has more queues */
3606 SET_IEEE80211_DEV(hw
, dev
->dev
);
3607 if (is_valid_ether_addr(sprom
->r1
.et1mac
))
3608 SET_IEEE80211_PERM_ADDR(hw
, sprom
->r1
.et1mac
);
3610 SET_IEEE80211_PERM_ADDR(hw
, sprom
->r1
.il0mac
);
3612 /* Get and initialize struct b43legacy_wl */
3613 wl
= hw_to_b43legacy_wl(hw
);
3614 memset(wl
, 0, sizeof(*wl
));
3616 spin_lock_init(&wl
->irq_lock
);
3617 spin_lock_init(&wl
->leds_lock
);
3618 mutex_init(&wl
->mutex
);
3619 INIT_LIST_HEAD(&wl
->devlist
);
3621 ssb_set_devtypedata(dev
, wl
);
3622 b43legacyinfo(wl
, "Broadcom %04X WLAN found\n", dev
->bus
->chip_id
);
3628 static int b43legacy_probe(struct ssb_device
*dev
,
3629 const struct ssb_device_id
*id
)
3631 struct b43legacy_wl
*wl
;
3635 wl
= ssb_get_devtypedata(dev
);
3637 /* Probing the first core - setup common struct b43legacy_wl */
3639 err
= b43legacy_wireless_init(dev
);
3642 wl
= ssb_get_devtypedata(dev
);
3643 B43legacy_WARN_ON(!wl
);
3645 err
= b43legacy_one_core_attach(dev
, wl
);
3647 goto err_wireless_exit
;
3650 err
= ieee80211_register_hw(wl
->hw
);
3652 goto err_one_core_detach
;
3658 err_one_core_detach
:
3659 b43legacy_one_core_detach(dev
);
3662 b43legacy_wireless_exit(dev
, wl
);
3666 static void b43legacy_remove(struct ssb_device
*dev
)
3668 struct b43legacy_wl
*wl
= ssb_get_devtypedata(dev
);
3669 struct b43legacy_wldev
*wldev
= ssb_get_drvdata(dev
);
3671 B43legacy_WARN_ON(!wl
);
3672 if (wl
->current_dev
== wldev
)
3673 ieee80211_unregister_hw(wl
->hw
);
3675 b43legacy_one_core_detach(dev
);
3677 if (list_empty(&wl
->devlist
))
3678 /* Last core on the chip unregistered.
3679 * We can destroy common struct b43legacy_wl.
3681 b43legacy_wireless_exit(dev
, wl
);
3684 /* Perform a hardware reset. This can be called from any context. */
3685 void b43legacy_controller_restart(struct b43legacy_wldev
*dev
,
3688 /* Must avoid requeueing, if we are in shutdown. */
3689 if (b43legacy_status(dev
) < B43legacy_STAT_INITIALIZED
)
3691 b43legacyinfo(dev
->wl
, "Controller RESET (%s) ...\n", reason
);
3692 queue_work(dev
->wl
->hw
->workqueue
, &dev
->restart_work
);
3697 static int b43legacy_suspend(struct ssb_device
*dev
, pm_message_t state
)
3699 struct b43legacy_wldev
*wldev
= ssb_get_drvdata(dev
);
3700 struct b43legacy_wl
*wl
= wldev
->wl
;
3702 b43legacydbg(wl
, "Suspending...\n");
3704 mutex_lock(&wl
->mutex
);
3705 wldev
->suspend_init_status
= b43legacy_status(wldev
);
3706 if (wldev
->suspend_init_status
>= B43legacy_STAT_STARTED
)
3707 b43legacy_wireless_core_stop(wldev
);
3708 if (wldev
->suspend_init_status
>= B43legacy_STAT_INITIALIZED
)
3709 b43legacy_wireless_core_exit(wldev
);
3710 mutex_unlock(&wl
->mutex
);
3712 b43legacydbg(wl
, "Device suspended.\n");
3717 static int b43legacy_resume(struct ssb_device
*dev
)
3719 struct b43legacy_wldev
*wldev
= ssb_get_drvdata(dev
);
3720 struct b43legacy_wl
*wl
= wldev
->wl
;
3723 b43legacydbg(wl
, "Resuming...\n");
3725 mutex_lock(&wl
->mutex
);
3726 if (wldev
->suspend_init_status
>= B43legacy_STAT_INITIALIZED
) {
3727 err
= b43legacy_wireless_core_init(wldev
);
3729 b43legacyerr(wl
, "Resume failed at core init\n");
3733 if (wldev
->suspend_init_status
>= B43legacy_STAT_STARTED
) {
3734 err
= b43legacy_wireless_core_start(wldev
);
3736 b43legacy_wireless_core_exit(wldev
);
3737 b43legacyerr(wl
, "Resume failed at core start\n");
3741 mutex_unlock(&wl
->mutex
);
3743 b43legacydbg(wl
, "Device resumed.\n");
3748 #else /* CONFIG_PM */
3749 # define b43legacy_suspend NULL
3750 # define b43legacy_resume NULL
3751 #endif /* CONFIG_PM */
3753 static struct ssb_driver b43legacy_ssb_driver
= {
3754 .name
= KBUILD_MODNAME
,
3755 .id_table
= b43legacy_ssb_tbl
,
3756 .probe
= b43legacy_probe
,
3757 .remove
= b43legacy_remove
,
3758 .suspend
= b43legacy_suspend
,
3759 .resume
= b43legacy_resume
,
3762 static int __init
b43legacy_init(void)
3766 b43legacy_debugfs_init();
3768 err
= ssb_driver_register(&b43legacy_ssb_driver
);
3775 b43legacy_debugfs_exit();
3779 static void __exit
b43legacy_exit(void)
3781 ssb_driver_unregister(&b43legacy_ssb_driver
);
3782 b43legacy_debugfs_exit();
3785 module_init(b43legacy_init
)
3786 module_exit(b43legacy_exit
)