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bnx2x: Use pr_fmt and message logging cleanups
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / ethernet / broadcom / bnx2x / bnx2x_dcb.c
blob9525b936cf629b778ac2f53a4594687d55070d86
1 /* bnx2x_dcb.c: Broadcom Everest network driver.
2 *
3 * Copyright 2009-2011 Broadcom Corporation
4 *
5 * Unless you and Broadcom execute a separate written software license
6 * agreement governing use of this software, this software is licensed to you
7 * under the terms of the GNU General Public License version 2, available
8 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
9 *
10 * Notwithstanding the above, under no circumstances may you combine this
11 * software in any way with any other Broadcom software provided under a
12 * license other than the GPL, without Broadcom's express prior written
13 * consent.
14 *
15 * Maintained by: Eilon Greenstein <eilong@broadcom.com>
16 * Written by: Dmitry Kravkov
17 *
18 */
19
20 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
21
22 #include <linux/netdevice.h>
23 #include <linux/types.h>
24 #include <linux/errno.h>
25 #include <linux/rtnetlink.h>
26 #include <net/dcbnl.h>
27
28 #include "bnx2x.h"
29 #include "bnx2x_cmn.h"
30 #include "bnx2x_dcb.h"
31
32 /* forward declarations of dcbx related functions */
33 static int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp);
34 static void bnx2x_pfc_set_pfc(struct bnx2x *bp);
35 static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp);
36 static int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp);
37 static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp,
38 u32 *set_configuration_ets_pg,
39 u32 *pri_pg_tbl);
40 static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp,
41 u32 *pg_pri_orginal_spread,
42 struct pg_help_data *help_data);
43 static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp,
44 struct pg_help_data *help_data,
45 struct dcbx_ets_feature *ets,
46 u32 *pg_pri_orginal_spread);
47 static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp,
48 struct cos_help_data *cos_data,
49 u32 *pg_pri_orginal_spread,
50 struct dcbx_ets_feature *ets);
51 static void bnx2x_dcbx_fw_struct(struct bnx2x *bp,
52 struct bnx2x_func_tx_start_params*);
53
54 /* helpers: read/write len bytes from addr into buff by REG_RD/REG_WR */
55 static void bnx2x_read_data(struct bnx2x *bp, u32 *buff,
56 u32 addr, u32 len)
57 {
58 int i;
59 for (i = 0; i < len; i += 4, buff++)
60 *buff = REG_RD(bp, addr + i);
61 }
62
63 static void bnx2x_write_data(struct bnx2x *bp, u32 *buff,
64 u32 addr, u32 len)
65 {
66 int i;
67 for (i = 0; i < len; i += 4, buff++)
68 REG_WR(bp, addr + i, *buff);
69 }
70
71 static void bnx2x_pfc_set(struct bnx2x *bp)
72 {
73 struct bnx2x_nig_brb_pfc_port_params pfc_params = {0};
74 u32 pri_bit, val = 0;
75 int i;
76
77 pfc_params.num_of_rx_cos_priority_mask =
78 bp->dcbx_port_params.ets.num_of_cos;
79
80 /* Tx COS configuration */
81 for (i = 0; i < bp->dcbx_port_params.ets.num_of_cos; i++)
82 /*
83 * We configure only the pauseable bits (non pauseable aren't
84 * configured at all) it's done to avoid false pauses from
85 * network
86 */
87 pfc_params.rx_cos_priority_mask[i] =
88 bp->dcbx_port_params.ets.cos_params[i].pri_bitmask
89 & DCBX_PFC_PRI_PAUSE_MASK(bp);
90
91 /*
92 * Rx COS configuration
93 * Changing PFC RX configuration .
94 * In RX COS0 will always be configured to lossy and COS1 to lossless
95 */
96 for (i = 0 ; i < MAX_PFC_PRIORITIES ; i++) {
97 pri_bit = 1 << i;
98
99 if (pri_bit & DCBX_PFC_PRI_PAUSE_MASK(bp))
100 val |= 1 << (i * 4);
101 }
102
103 pfc_params.pkt_priority_to_cos = val;
104
105 /* RX COS0 */
106 pfc_params.llfc_low_priority_classes = 0;
107 /* RX COS1 */
108 pfc_params.llfc_high_priority_classes = DCBX_PFC_PRI_PAUSE_MASK(bp);
109
110 /* BRB configuration */
111 pfc_params.cos0_pauseable = false;
112 pfc_params.cos1_pauseable = true;
113
114 bnx2x_acquire_phy_lock(bp);
115 bp->link_params.feature_config_flags |= FEATURE_CONFIG_PFC_ENABLED;
116 bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &pfc_params);
117 bnx2x_release_phy_lock(bp);
118 }
119
120 static void bnx2x_pfc_clear(struct bnx2x *bp)
121 {
122 struct bnx2x_nig_brb_pfc_port_params nig_params = {0};
123 nig_params.pause_enable = 1;
124 #ifdef BNX2X_SAFC
125 if (bp->flags & SAFC_TX_FLAG) {
126 u32 high = 0, low = 0;
127 int i;
128
129 for (i = 0; i < BNX2X_MAX_PRIORITY; i++) {
130 if (bp->pri_map[i] == 1)
131 high |= (1 << i);
132 if (bp->pri_map[i] == 0)
133 low |= (1 << i);
134 }
135
136 nig_params.llfc_low_priority_classes = high;
137 nig_params.llfc_low_priority_classes = low;
138
139 nig_params.pause_enable = 0;
140 nig_params.llfc_enable = 1;
141 nig_params.llfc_out_en = 1;
142 }
143 #endif /* BNX2X_SAFC */
144 bnx2x_acquire_phy_lock(bp);
145 bp->link_params.feature_config_flags &= ~FEATURE_CONFIG_PFC_ENABLED;
146 bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &nig_params);
147 bnx2x_release_phy_lock(bp);
148 }
149
150 static void bnx2x_dump_dcbx_drv_param(struct bnx2x *bp,
151 struct dcbx_features *features,
152 u32 error)
153 {
154 u8 i = 0;
155 DP(NETIF_MSG_LINK, "local_mib.error %x\n", error);
156
157 /* PG */
158 DP(NETIF_MSG_LINK,
159 "local_mib.features.ets.enabled %x\n", features->ets.enabled);
160 for (i = 0; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++)
161 DP(NETIF_MSG_LINK,
162 "local_mib.features.ets.pg_bw_tbl[%d] %d\n", i,
163 DCBX_PG_BW_GET(features->ets.pg_bw_tbl, i));
164 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++)
165 DP(NETIF_MSG_LINK,
166 "local_mib.features.ets.pri_pg_tbl[%d] %d\n", i,
167 DCBX_PRI_PG_GET(features->ets.pri_pg_tbl, i));
168
169 /* pfc */
170 DP(NETIF_MSG_LINK, "dcbx_features.pfc.pri_en_bitmap %x\n",
171 features->pfc.pri_en_bitmap);
172 DP(NETIF_MSG_LINK, "dcbx_features.pfc.pfc_caps %x\n",
173 features->pfc.pfc_caps);
174 DP(NETIF_MSG_LINK, "dcbx_features.pfc.enabled %x\n",
175 features->pfc.enabled);
176
177 DP(NETIF_MSG_LINK, "dcbx_features.app.default_pri %x\n",
178 features->app.default_pri);
179 DP(NETIF_MSG_LINK, "dcbx_features.app.tc_supported %x\n",
180 features->app.tc_supported);
181 DP(NETIF_MSG_LINK, "dcbx_features.app.enabled %x\n",
182 features->app.enabled);
183 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
184 DP(NETIF_MSG_LINK,
185 "dcbx_features.app.app_pri_tbl[%x].app_id %x\n",
186 i, features->app.app_pri_tbl[i].app_id);
187 DP(NETIF_MSG_LINK,
188 "dcbx_features.app.app_pri_tbl[%x].pri_bitmap %x\n",
189 i, features->app.app_pri_tbl[i].pri_bitmap);
190 DP(NETIF_MSG_LINK,
191 "dcbx_features.app.app_pri_tbl[%x].appBitfield %x\n",
192 i, features->app.app_pri_tbl[i].appBitfield);
193 }
194 }
195
196 static void bnx2x_dcbx_get_ap_priority(struct bnx2x *bp,
197 u8 pri_bitmap,
198 u8 llfc_traf_type)
199 {
200 u32 pri = MAX_PFC_PRIORITIES;
201 u32 index = MAX_PFC_PRIORITIES - 1;
202 u32 pri_mask;
203 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
204
205 /* Choose the highest priority */
206 while ((MAX_PFC_PRIORITIES == pri) && (0 != index)) {
207 pri_mask = 1 << index;
208 if (GET_FLAGS(pri_bitmap, pri_mask))
209 pri = index ;
210 index--;
211 }
212
213 if (pri < MAX_PFC_PRIORITIES)
214 ttp[llfc_traf_type] = max_t(u32, ttp[llfc_traf_type], pri);
215 }
216
217 static void bnx2x_dcbx_get_ap_feature(struct bnx2x *bp,
218 struct dcbx_app_priority_feature *app,
219 u32 error) {
220 u8 index;
221 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
222
223 if (GET_FLAGS(error, DCBX_LOCAL_APP_ERROR))
224 DP(NETIF_MSG_LINK, "DCBX_LOCAL_APP_ERROR\n");
225
226 if (GET_FLAGS(error, DCBX_LOCAL_APP_MISMATCH))
227 DP(NETIF_MSG_LINK, "DCBX_LOCAL_APP_MISMATCH\n");
228
229 if (app->enabled &&
230 !GET_FLAGS(error, DCBX_LOCAL_APP_ERROR | DCBX_LOCAL_APP_MISMATCH)) {
231
232 bp->dcbx_port_params.app.enabled = true;
233
234 for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++)
235 ttp[index] = 0;
236
237 if (app->default_pri < MAX_PFC_PRIORITIES)
238 ttp[LLFC_TRAFFIC_TYPE_NW] = app->default_pri;
239
240 for (index = 0 ; index < DCBX_MAX_APP_PROTOCOL; index++) {
241 struct dcbx_app_priority_entry *entry =
242 app->app_pri_tbl;
243
244 if (GET_FLAGS(entry[index].appBitfield,
245 DCBX_APP_SF_ETH_TYPE) &&
246 ETH_TYPE_FCOE == entry[index].app_id)
247 bnx2x_dcbx_get_ap_priority(bp,
248 entry[index].pri_bitmap,
249 LLFC_TRAFFIC_TYPE_FCOE);
250
251 if (GET_FLAGS(entry[index].appBitfield,
252 DCBX_APP_SF_PORT) &&
253 TCP_PORT_ISCSI == entry[index].app_id)
254 bnx2x_dcbx_get_ap_priority(bp,
255 entry[index].pri_bitmap,
256 LLFC_TRAFFIC_TYPE_ISCSI);
257 }
258 } else {
259 DP(NETIF_MSG_LINK, "DCBX_LOCAL_APP_DISABLED\n");
260 bp->dcbx_port_params.app.enabled = false;
261 for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++)
262 ttp[index] = INVALID_TRAFFIC_TYPE_PRIORITY;
263 }
264 }
265
266 static void bnx2x_dcbx_get_ets_feature(struct bnx2x *bp,
267 struct dcbx_ets_feature *ets,
268 u32 error) {
269 int i = 0;
270 u32 pg_pri_orginal_spread[DCBX_MAX_NUM_PG_BW_ENTRIES] = {0};
271 struct pg_help_data pg_help_data;
272 struct bnx2x_dcbx_cos_params *cos_params =
273 bp->dcbx_port_params.ets.cos_params;
274
275 memset(&pg_help_data, 0, sizeof(struct pg_help_data));
276
277
278 if (GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR))
279 DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_ERROR\n");
280
281
282 /* Clean up old settings of ets on COS */
283 for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params) ; i++) {
284 cos_params[i].pauseable = false;
285 cos_params[i].strict = BNX2X_DCBX_STRICT_INVALID;
286 cos_params[i].bw_tbl = DCBX_INVALID_COS_BW;
287 cos_params[i].pri_bitmask = 0;
288 }
289
290 if (bp->dcbx_port_params.app.enabled &&
291 !GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR) &&
292 ets->enabled) {
293 DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_ENABLE\n");
294 bp->dcbx_port_params.ets.enabled = true;
295
296 bnx2x_dcbx_get_ets_pri_pg_tbl(bp,
297 pg_pri_orginal_spread,
298 ets->pri_pg_tbl);
299
300 bnx2x_dcbx_get_num_pg_traf_type(bp,
301 pg_pri_orginal_spread,
302 &pg_help_data);
303
304 bnx2x_dcbx_fill_cos_params(bp, &pg_help_data,
305 ets, pg_pri_orginal_spread);
306
307 } else {
308 DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_DISABLED\n");
309 bp->dcbx_port_params.ets.enabled = false;
310 ets->pri_pg_tbl[0] = 0;
311
312 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES ; i++)
313 DCBX_PG_BW_SET(ets->pg_bw_tbl, i, 1);
314 }
315 }
316
317 static void bnx2x_dcbx_get_pfc_feature(struct bnx2x *bp,
318 struct dcbx_pfc_feature *pfc, u32 error)
319 {
320
321 if (GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR))
322 DP(NETIF_MSG_LINK, "DCBX_LOCAL_PFC_ERROR\n");
323
324 if (bp->dcbx_port_params.app.enabled &&
325 !GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR | DCBX_LOCAL_PFC_MISMATCH) &&
326 pfc->enabled) {
327 bp->dcbx_port_params.pfc.enabled = true;
328 bp->dcbx_port_params.pfc.priority_non_pauseable_mask =
329 ~(pfc->pri_en_bitmap);
330 } else {
331 DP(NETIF_MSG_LINK, "DCBX_LOCAL_PFC_DISABLED\n");
332 bp->dcbx_port_params.pfc.enabled = false;
333 bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 0;
334 }
335 }
336
337 /* maps unmapped priorities to to the same COS as L2 */
338 static void bnx2x_dcbx_map_nw(struct bnx2x *bp)
339 {
340 int i;
341 u32 unmapped = (1 << MAX_PFC_PRIORITIES) - 1; /* all ones */
342 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
343 u32 nw_prio = 1 << ttp[LLFC_TRAFFIC_TYPE_NW];
344 struct bnx2x_dcbx_cos_params *cos_params =
345 bp->dcbx_port_params.ets.cos_params;
346
347 /* get unmapped priorities by clearing mapped bits */
348 for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++)
349 unmapped &= ~(1 << ttp[i]);
350
351 /* find cos for nw prio and extend it with unmapped */
352 for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params); i++) {
353 if (cos_params[i].pri_bitmask & nw_prio) {
354 /* extend the bitmask with unmapped */
355 DP(NETIF_MSG_LINK,
356 "cos %d extended with 0x%08x\n", i, unmapped);
357 cos_params[i].pri_bitmask |= unmapped;
358 break;
359 }
360 }
361 }
362
363 static void bnx2x_get_dcbx_drv_param(struct bnx2x *bp,
364 struct dcbx_features *features,
365 u32 error)
366 {
367 bnx2x_dcbx_get_ap_feature(bp, &features->app, error);
368
369 bnx2x_dcbx_get_pfc_feature(bp, &features->pfc, error);
370
371 bnx2x_dcbx_get_ets_feature(bp, &features->ets, error);
372
373 bnx2x_dcbx_map_nw(bp);
374 }
375
376 #define DCBX_LOCAL_MIB_MAX_TRY_READ (100)
377 static int bnx2x_dcbx_read_mib(struct bnx2x *bp,
378 u32 *base_mib_addr,
379 u32 offset,
380 int read_mib_type)
381 {
382 int max_try_read = 0;
383 u32 mib_size, prefix_seq_num, suffix_seq_num;
384 struct lldp_remote_mib *remote_mib ;
385 struct lldp_local_mib *local_mib;
386
387
388 switch (read_mib_type) {
389 case DCBX_READ_LOCAL_MIB:
390 mib_size = sizeof(struct lldp_local_mib);
391 break;
392 case DCBX_READ_REMOTE_MIB:
393 mib_size = sizeof(struct lldp_remote_mib);
394 break;
395 default:
396 return 1; /*error*/
397 }
398
399 offset += BP_PORT(bp) * mib_size;
400
401 do {
402 bnx2x_read_data(bp, base_mib_addr, offset, mib_size);
403
404 max_try_read++;
405
406 switch (read_mib_type) {
407 case DCBX_READ_LOCAL_MIB:
408 local_mib = (struct lldp_local_mib *) base_mib_addr;
409 prefix_seq_num = local_mib->prefix_seq_num;
410 suffix_seq_num = local_mib->suffix_seq_num;
411 break;
412 case DCBX_READ_REMOTE_MIB:
413 remote_mib = (struct lldp_remote_mib *) base_mib_addr;
414 prefix_seq_num = remote_mib->prefix_seq_num;
415 suffix_seq_num = remote_mib->suffix_seq_num;
416 break;
417 default:
418 return 1; /*error*/
419 }
420 } while ((prefix_seq_num != suffix_seq_num) &&
421 (max_try_read < DCBX_LOCAL_MIB_MAX_TRY_READ));
422
423 if (max_try_read >= DCBX_LOCAL_MIB_MAX_TRY_READ) {
424 BNX2X_ERR("MIB could not be read\n");
425 return 1;
426 }
427
428 return 0;
429 }
430
431 static void bnx2x_pfc_set_pfc(struct bnx2x *bp)
432 {
433 if (bp->dcbx_port_params.pfc.enabled &&
434 !(bp->dcbx_error & DCBX_REMOTE_MIB_ERROR))
435 /*
436 * 1. Fills up common PFC structures if required
437 * 2. Configure NIG, MAC and BRB via the elink
438 */
439 bnx2x_pfc_set(bp);
440 else
441 bnx2x_pfc_clear(bp);
442 }
443
444 static int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp)
445 {
446 struct bnx2x_func_state_params func_params = {0};
447
448 func_params.f_obj = &bp->func_obj;
449 func_params.cmd = BNX2X_F_CMD_TX_STOP;
450
451 DP(NETIF_MSG_LINK, "STOP TRAFFIC\n");
452 return bnx2x_func_state_change(bp, &func_params);
453 }
454
455 static int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp)
456 {
457 struct bnx2x_func_state_params func_params = {0};
458 struct bnx2x_func_tx_start_params *tx_params =
459 &func_params.params.tx_start;
460
461 func_params.f_obj = &bp->func_obj;
462 func_params.cmd = BNX2X_F_CMD_TX_START;
463
464 bnx2x_dcbx_fw_struct(bp, tx_params);
465
466 DP(NETIF_MSG_LINK, "START TRAFFIC\n");
467 return bnx2x_func_state_change(bp, &func_params);
468 }
469
470 static void bnx2x_dcbx_2cos_limit_update_ets_config(struct bnx2x *bp)
471 {
472 struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets);
473 int rc = 0;
474
475 if (ets->num_of_cos == 0 || ets->num_of_cos > DCBX_COS_MAX_NUM_E2) {
476 BNX2X_ERR("Illegal number of COSes %d\n", ets->num_of_cos);
477 return;
478 }
479
480 /* valid COS entries */
481 if (ets->num_of_cos == 1) /* no ETS */
482 return;
483
484 /* sanity */
485 if (((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[0].strict) &&
486 (DCBX_INVALID_COS_BW == ets->cos_params[0].bw_tbl)) ||
487 ((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[1].strict) &&
488 (DCBX_INVALID_COS_BW == ets->cos_params[1].bw_tbl))) {
489 BNX2X_ERR("all COS should have at least bw_limit or strict"
490 "ets->cos_params[0].strict= %x"
491 "ets->cos_params[0].bw_tbl= %x"
492 "ets->cos_params[1].strict= %x"
493 "ets->cos_params[1].bw_tbl= %x",
494 ets->cos_params[0].strict,
495 ets->cos_params[0].bw_tbl,
496 ets->cos_params[1].strict,
497 ets->cos_params[1].bw_tbl);
498 return;
499 }
500 /* If we join a group and there is bw_tbl and strict then bw rules */
501 if ((DCBX_INVALID_COS_BW != ets->cos_params[0].bw_tbl) &&
502 (DCBX_INVALID_COS_BW != ets->cos_params[1].bw_tbl)) {
503 u32 bw_tbl_0 = ets->cos_params[0].bw_tbl;
504 u32 bw_tbl_1 = ets->cos_params[1].bw_tbl;
505 /* Do not allow 0-100 configuration
506 * since PBF does not support it
507 * force 1-99 instead
508 */
509 if (bw_tbl_0 == 0) {
510 bw_tbl_0 = 1;
511 bw_tbl_1 = 99;
512 } else if (bw_tbl_1 == 0) {
513 bw_tbl_1 = 1;
514 bw_tbl_0 = 99;
515 }
516
517 bnx2x_ets_bw_limit(&bp->link_params, bw_tbl_0, bw_tbl_1);
518 } else {
519 if (ets->cos_params[0].strict == BNX2X_DCBX_STRICT_COS_HIGHEST)
520 rc = bnx2x_ets_strict(&bp->link_params, 0);
521 else if (ets->cos_params[1].strict
522 == BNX2X_DCBX_STRICT_COS_HIGHEST)
523 rc = bnx2x_ets_strict(&bp->link_params, 1);
524 if (rc)
525 BNX2X_ERR("update_ets_params failed\n");
526 }
527 }
528
529 /*
530 * In E3B0 the configuration may have more than 2 COS.
531 */
532 void bnx2x_dcbx_update_ets_config(struct bnx2x *bp)
533 {
534 struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets);
535 struct bnx2x_ets_params ets_params = { 0 };
536 u8 i;
537
538 ets_params.num_of_cos = ets->num_of_cos;
539
540 for (i = 0; i < ets->num_of_cos; i++) {
541 /* COS is SP */
542 if (ets->cos_params[i].strict != BNX2X_DCBX_STRICT_INVALID) {
543 if (ets->cos_params[i].bw_tbl != DCBX_INVALID_COS_BW) {
544 BNX2X_ERR("COS can't be not BW and not SP\n");
545 return;
546 }
547
548 ets_params.cos[i].state = bnx2x_cos_state_strict;
549 ets_params.cos[i].params.sp_params.pri =
550 ets->cos_params[i].strict;
551 } else { /* COS is BW */
552 if (ets->cos_params[i].bw_tbl == DCBX_INVALID_COS_BW) {
553 BNX2X_ERR("COS can't be not BW and not SP\n");
554 return;
555 }
556 ets_params.cos[i].state = bnx2x_cos_state_bw;
557 ets_params.cos[i].params.bw_params.bw =
558 (u8)ets->cos_params[i].bw_tbl;
559 }
560 }
561
562 /* Configure the ETS in HW */
563 if (bnx2x_ets_e3b0_config(&bp->link_params, &bp->link_vars,
564 &ets_params)) {
565 BNX2X_ERR("bnx2x_ets_e3b0_config failed\n");
566 bnx2x_ets_disabled(&bp->link_params, &bp->link_vars);
567 }
568 }
569
570 static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp)
571 {
572 bnx2x_ets_disabled(&bp->link_params, &bp->link_vars);
573
574 if (!bp->dcbx_port_params.ets.enabled ||
575 (bp->dcbx_error & DCBX_REMOTE_MIB_ERROR))
576 return;
577
578 if (CHIP_IS_E3B0(bp))
579 bnx2x_dcbx_update_ets_config(bp);
580 else
581 bnx2x_dcbx_2cos_limit_update_ets_config(bp);
582 }
583
584 #ifdef BCM_DCBNL
585 static int bnx2x_dcbx_read_shmem_remote_mib(struct bnx2x *bp)
586 {
587 struct lldp_remote_mib remote_mib = {0};
588 u32 dcbx_remote_mib_offset = SHMEM2_RD(bp, dcbx_remote_mib_offset);
589 int rc;
590
591 DP(NETIF_MSG_LINK, "dcbx_remote_mib_offset 0x%x\n",
592 dcbx_remote_mib_offset);
593
594 if (SHMEM_DCBX_REMOTE_MIB_NONE == dcbx_remote_mib_offset) {
595 BNX2X_ERR("FW doesn't support dcbx_remote_mib_offset\n");
596 return -EINVAL;
597 }
598
599 rc = bnx2x_dcbx_read_mib(bp, (u32 *)&remote_mib, dcbx_remote_mib_offset,
600 DCBX_READ_REMOTE_MIB);
601
602 if (rc) {
603 BNX2X_ERR("Faild to read remote mib from FW\n");
604 return rc;
605 }
606
607 /* save features and flags */
608 bp->dcbx_remote_feat = remote_mib.features;
609 bp->dcbx_remote_flags = remote_mib.flags;
610 return 0;
611 }
612 #endif
613
614 static int bnx2x_dcbx_read_shmem_neg_results(struct bnx2x *bp)
615 {
616 struct lldp_local_mib local_mib = {0};
617 u32 dcbx_neg_res_offset = SHMEM2_RD(bp, dcbx_neg_res_offset);
618 int rc;
619
620 DP(NETIF_MSG_LINK, "dcbx_neg_res_offset 0x%x\n", dcbx_neg_res_offset);
621
622 if (SHMEM_DCBX_NEG_RES_NONE == dcbx_neg_res_offset) {
623 BNX2X_ERR("FW doesn't support dcbx_neg_res_offset\n");
624 return -EINVAL;
625 }
626
627 rc = bnx2x_dcbx_read_mib(bp, (u32 *)&local_mib, dcbx_neg_res_offset,
628 DCBX_READ_LOCAL_MIB);
629
630 if (rc) {
631 BNX2X_ERR("Faild to read local mib from FW\n");
632 return rc;
633 }
634
635 /* save features and error */
636 bp->dcbx_local_feat = local_mib.features;
637 bp->dcbx_error = local_mib.error;
638 return 0;
639 }
640
641
642 #ifdef BCM_DCBNL
643 static inline
644 u8 bnx2x_dcbx_dcbnl_app_up(struct dcbx_app_priority_entry *ent)
645 {
646 u8 pri;
647
648 /* Choose the highest priority */
649 for (pri = MAX_PFC_PRIORITIES - 1; pri > 0; pri--)
650 if (ent->pri_bitmap & (1 << pri))
651 break;
652 return pri;
653 }
654
655 static inline
656 u8 bnx2x_dcbx_dcbnl_app_idtype(struct dcbx_app_priority_entry *ent)
657 {
658 return ((ent->appBitfield & DCBX_APP_ENTRY_SF_MASK) ==
659 DCBX_APP_SF_PORT) ? DCB_APP_IDTYPE_PORTNUM :
660 DCB_APP_IDTYPE_ETHTYPE;
661 }
662
663 int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall)
664 {
665 int i, err = 0;
666
667 for (i = 0; i < DCBX_MAX_APP_PROTOCOL && err == 0; i++) {
668 struct dcbx_app_priority_entry *ent =
669 &bp->dcbx_local_feat.app.app_pri_tbl[i];
670
671 if (ent->appBitfield & DCBX_APP_ENTRY_VALID) {
672 u8 up = bnx2x_dcbx_dcbnl_app_up(ent);
673
674 /* avoid invalid user-priority */
675 if (up) {
676 struct dcb_app app;
677 app.selector = bnx2x_dcbx_dcbnl_app_idtype(ent);
678 app.protocol = ent->app_id;
679 app.priority = delall ? 0 : up;
680 err = dcb_setapp(bp->dev, &app);
681 }
682 }
683 }
684 return err;
685 }
686 #endif
687
688 static inline void bnx2x_update_drv_flags(struct bnx2x *bp, u32 flags, u32 set)
689 {
690 if (SHMEM2_HAS(bp, drv_flags)) {
691 u32 drv_flags;
692 bnx2x_acquire_hw_lock(bp, HW_LOCK_DRV_FLAGS);
693 drv_flags = SHMEM2_RD(bp, drv_flags);
694
695 if (set)
696 SET_FLAGS(drv_flags, flags);
697 else
698 RESET_FLAGS(drv_flags, flags);
699
700 SHMEM2_WR(bp, drv_flags, drv_flags);
701 DP(NETIF_MSG_HW, "drv_flags 0x%08x\n", drv_flags);
702 bnx2x_release_hw_lock(bp, HW_LOCK_DRV_FLAGS);
703 }
704 }
705
706 static inline void bnx2x_dcbx_update_tc_mapping(struct bnx2x *bp)
707 {
708 u8 prio, cos;
709 for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) {
710 for (prio = 0; prio < BNX2X_MAX_PRIORITY; prio++) {
711 if (bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask
712 & (1 << prio)) {
713 bp->prio_to_cos[prio] = cos;
714 DP(NETIF_MSG_LINK,
715 "tx_mapping %d --> %d\n", prio, cos);
716 }
717 }
718 }
719
720 /* setup tc must be called under rtnl lock, but we can't take it here
721 * as we are handling an attetntion on a work queue which must be
722 * flushed at some rtnl-locked contexts (e.g. if down)
723 */
724 if (!test_and_set_bit(BNX2X_SP_RTNL_SETUP_TC, &bp->sp_rtnl_state))
725 schedule_delayed_work(&bp->sp_rtnl_task, 0);
726 }
727
728 void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state)
729 {
730 switch (state) {
731 case BNX2X_DCBX_STATE_NEG_RECEIVED:
732 {
733 DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_NEG_RECEIVED\n");
734 #ifdef BCM_DCBNL
735 /**
736 * Delete app tlvs from dcbnl before reading new
737 * negotiation results
738 */
739 bnx2x_dcbnl_update_applist(bp, true);
740
741 /* Read rmeote mib if dcbx is in the FW */
742 if (bnx2x_dcbx_read_shmem_remote_mib(bp))
743 return;
744 #endif
745 /* Read neg results if dcbx is in the FW */
746 if (bnx2x_dcbx_read_shmem_neg_results(bp))
747 return;
748
749 bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat,
750 bp->dcbx_error);
751
752 bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat,
753 bp->dcbx_error);
754
755 /* mark DCBX result for PMF migration */
756 bnx2x_update_drv_flags(bp, DRV_FLAGS_DCB_CONFIGURED, 1);
757 #ifdef BCM_DCBNL
758 /**
759 * Add new app tlvs to dcbnl
760 */
761 bnx2x_dcbnl_update_applist(bp, false);
762 #endif
763 bnx2x_dcbx_stop_hw_tx(bp);
764
765 /* reconfigure the netdevice with the results of the new
766 * dcbx negotiation.
767 */
768 bnx2x_dcbx_update_tc_mapping(bp);
769
770 return;
771 }
772 case BNX2X_DCBX_STATE_TX_PAUSED:
773 DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_TX_PAUSED\n");
774 bnx2x_pfc_set_pfc(bp);
775
776 bnx2x_dcbx_update_ets_params(bp);
777 bnx2x_dcbx_resume_hw_tx(bp);
778 return;
779 case BNX2X_DCBX_STATE_TX_RELEASED:
780 DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_TX_RELEASED\n");
781 bnx2x_fw_command(bp, DRV_MSG_CODE_DCBX_PMF_DRV_OK, 0);
782 #ifdef BCM_DCBNL
783 /*
784 * Send a notification for the new negotiated parameters
785 */
786 dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0);
787 #endif
788 return;
789 default:
790 BNX2X_ERR("Unknown DCBX_STATE\n");
791 }
792 }
793
794 #define LLDP_ADMIN_MIB_OFFSET(bp) (PORT_MAX*sizeof(struct lldp_params) + \
795 BP_PORT(bp)*sizeof(struct lldp_admin_mib))
796
797 static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp,
798 u32 dcbx_lldp_params_offset)
799 {
800 struct lldp_admin_mib admin_mib;
801 u32 i, other_traf_type = PREDEFINED_APP_IDX_MAX, traf_type = 0;
802 u32 offset = dcbx_lldp_params_offset + LLDP_ADMIN_MIB_OFFSET(bp);
803
804 /*shortcuts*/
805 struct dcbx_features *af = &admin_mib.features;
806 struct bnx2x_config_dcbx_params *dp = &bp->dcbx_config_params;
807
808 memset(&admin_mib, 0, sizeof(struct lldp_admin_mib));
809
810 /* Read the data first */
811 bnx2x_read_data(bp, (u32 *)&admin_mib, offset,
812 sizeof(struct lldp_admin_mib));
813
814 if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON)
815 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED);
816 else
817 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED);
818
819 if (dp->overwrite_settings == BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE) {
820
821 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_CEE_VERSION_MASK);
822 admin_mib.ver_cfg_flags |=
823 (dp->admin_dcbx_version << DCBX_CEE_VERSION_SHIFT) &
824 DCBX_CEE_VERSION_MASK;
825
826 af->ets.enabled = (u8)dp->admin_ets_enable;
827
828 af->pfc.enabled = (u8)dp->admin_pfc_enable;
829
830 /* FOR IEEE dp->admin_tc_supported_tx_enable */
831 if (dp->admin_ets_configuration_tx_enable)
832 SET_FLAGS(admin_mib.ver_cfg_flags,
833 DCBX_ETS_CONFIG_TX_ENABLED);
834 else
835 RESET_FLAGS(admin_mib.ver_cfg_flags,
836 DCBX_ETS_CONFIG_TX_ENABLED);
837 /* For IEEE admin_ets_recommendation_tx_enable */
838 if (dp->admin_pfc_tx_enable)
839 SET_FLAGS(admin_mib.ver_cfg_flags,
840 DCBX_PFC_CONFIG_TX_ENABLED);
841 else
842 RESET_FLAGS(admin_mib.ver_cfg_flags,
843 DCBX_PFC_CONFIG_TX_ENABLED);
844
845 if (dp->admin_application_priority_tx_enable)
846 SET_FLAGS(admin_mib.ver_cfg_flags,
847 DCBX_APP_CONFIG_TX_ENABLED);
848 else
849 RESET_FLAGS(admin_mib.ver_cfg_flags,
850 DCBX_APP_CONFIG_TX_ENABLED);
851
852 if (dp->admin_ets_willing)
853 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING);
854 else
855 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING);
856 /* For IEEE admin_ets_reco_valid */
857 if (dp->admin_pfc_willing)
858 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING);
859 else
860 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING);
861
862 if (dp->admin_app_priority_willing)
863 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING);
864 else
865 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING);
866
867 for (i = 0 ; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) {
868 DCBX_PG_BW_SET(af->ets.pg_bw_tbl, i,
869 (u8)dp->admin_configuration_bw_precentage[i]);
870
871 DP(NETIF_MSG_LINK, "pg_bw_tbl[%d] = %02x\n",
872 i, DCBX_PG_BW_GET(af->ets.pg_bw_tbl, i));
873 }
874
875 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) {
876 DCBX_PRI_PG_SET(af->ets.pri_pg_tbl, i,
877 (u8)dp->admin_configuration_ets_pg[i]);
878
879 DP(NETIF_MSG_LINK, "pri_pg_tbl[%d] = %02x\n",
880 i, DCBX_PRI_PG_GET(af->ets.pri_pg_tbl, i));
881 }
882
883 /*For IEEE admin_recommendation_bw_precentage
884 *For IEEE admin_recommendation_ets_pg */
885 af->pfc.pri_en_bitmap = (u8)dp->admin_pfc_bitmap;
886 for (i = 0; i < 4; i++) {
887 if (dp->admin_priority_app_table[i].valid) {
888 struct bnx2x_admin_priority_app_table *table =
889 dp->admin_priority_app_table;
890 if ((ETH_TYPE_FCOE == table[i].app_id) &&
891 (TRAFFIC_TYPE_ETH == table[i].traffic_type))
892 traf_type = FCOE_APP_IDX;
893 else if ((TCP_PORT_ISCSI == table[i].app_id) &&
894 (TRAFFIC_TYPE_PORT == table[i].traffic_type))
895 traf_type = ISCSI_APP_IDX;
896 else
897 traf_type = other_traf_type++;
898
899 af->app.app_pri_tbl[traf_type].app_id =
900 table[i].app_id;
901
902 af->app.app_pri_tbl[traf_type].pri_bitmap =
903 (u8)(1 << table[i].priority);
904
905 af->app.app_pri_tbl[traf_type].appBitfield =
906 (DCBX_APP_ENTRY_VALID);
907
908 af->app.app_pri_tbl[traf_type].appBitfield |=
909 (TRAFFIC_TYPE_ETH == table[i].traffic_type) ?
910 DCBX_APP_SF_ETH_TYPE : DCBX_APP_SF_PORT;
911 }
912 }
913
914 af->app.default_pri = (u8)dp->admin_default_priority;
915
916 }
917
918 /* Write the data. */
919 bnx2x_write_data(bp, (u32 *)&admin_mib, offset,
920 sizeof(struct lldp_admin_mib));
921
922 }
923
924 void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled)
925 {
926 if (!CHIP_IS_E1x(bp)) {
927 bp->dcb_state = dcb_on;
928 bp->dcbx_enabled = dcbx_enabled;
929 } else {
930 bp->dcb_state = false;
931 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_INVALID;
932 }
933 DP(NETIF_MSG_LINK, "DCB state [%s:%s]\n",
934 dcb_on ? "ON" : "OFF",
935 dcbx_enabled == BNX2X_DCBX_ENABLED_OFF ? "user-mode" :
936 dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF ? "on-chip static" :
937 dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON ?
938 "on-chip with negotiation" : "invalid");
939 }
940
941 void bnx2x_dcbx_init_params(struct bnx2x *bp)
942 {
943 bp->dcbx_config_params.admin_dcbx_version = 0x0; /* 0 - CEE; 1 - IEEE */
944 bp->dcbx_config_params.admin_ets_willing = 1;
945 bp->dcbx_config_params.admin_pfc_willing = 1;
946 bp->dcbx_config_params.overwrite_settings = 1;
947 bp->dcbx_config_params.admin_ets_enable = 1;
948 bp->dcbx_config_params.admin_pfc_enable = 1;
949 bp->dcbx_config_params.admin_tc_supported_tx_enable = 1;
950 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
951 bp->dcbx_config_params.admin_pfc_tx_enable = 1;
952 bp->dcbx_config_params.admin_application_priority_tx_enable = 1;
953 bp->dcbx_config_params.admin_ets_reco_valid = 1;
954 bp->dcbx_config_params.admin_app_priority_willing = 1;
955 bp->dcbx_config_params.admin_configuration_bw_precentage[0] = 00;
956 bp->dcbx_config_params.admin_configuration_bw_precentage[1] = 50;
957 bp->dcbx_config_params.admin_configuration_bw_precentage[2] = 50;
958 bp->dcbx_config_params.admin_configuration_bw_precentage[3] = 0;
959 bp->dcbx_config_params.admin_configuration_bw_precentage[4] = 0;
960 bp->dcbx_config_params.admin_configuration_bw_precentage[5] = 0;
961 bp->dcbx_config_params.admin_configuration_bw_precentage[6] = 0;
962 bp->dcbx_config_params.admin_configuration_bw_precentage[7] = 0;
963 bp->dcbx_config_params.admin_configuration_ets_pg[0] = 1;
964 bp->dcbx_config_params.admin_configuration_ets_pg[1] = 0;
965 bp->dcbx_config_params.admin_configuration_ets_pg[2] = 0;
966 bp->dcbx_config_params.admin_configuration_ets_pg[3] = 2;
967 bp->dcbx_config_params.admin_configuration_ets_pg[4] = 0;
968 bp->dcbx_config_params.admin_configuration_ets_pg[5] = 0;
969 bp->dcbx_config_params.admin_configuration_ets_pg[6] = 0;
970 bp->dcbx_config_params.admin_configuration_ets_pg[7] = 0;
971 bp->dcbx_config_params.admin_recommendation_bw_precentage[0] = 0;
972 bp->dcbx_config_params.admin_recommendation_bw_precentage[1] = 1;
973 bp->dcbx_config_params.admin_recommendation_bw_precentage[2] = 2;
974 bp->dcbx_config_params.admin_recommendation_bw_precentage[3] = 0;
975 bp->dcbx_config_params.admin_recommendation_bw_precentage[4] = 7;
976 bp->dcbx_config_params.admin_recommendation_bw_precentage[5] = 5;
977 bp->dcbx_config_params.admin_recommendation_bw_precentage[6] = 6;
978 bp->dcbx_config_params.admin_recommendation_bw_precentage[7] = 7;
979 bp->dcbx_config_params.admin_recommendation_ets_pg[0] = 0;
980 bp->dcbx_config_params.admin_recommendation_ets_pg[1] = 1;
981 bp->dcbx_config_params.admin_recommendation_ets_pg[2] = 2;
982 bp->dcbx_config_params.admin_recommendation_ets_pg[3] = 3;
983 bp->dcbx_config_params.admin_recommendation_ets_pg[4] = 4;
984 bp->dcbx_config_params.admin_recommendation_ets_pg[5] = 5;
985 bp->dcbx_config_params.admin_recommendation_ets_pg[6] = 6;
986 bp->dcbx_config_params.admin_recommendation_ets_pg[7] = 7;
987 bp->dcbx_config_params.admin_pfc_bitmap = 0x8; /* FCoE(3) enable */
988 bp->dcbx_config_params.admin_priority_app_table[0].valid = 1;
989 bp->dcbx_config_params.admin_priority_app_table[1].valid = 1;
990 bp->dcbx_config_params.admin_priority_app_table[2].valid = 0;
991 bp->dcbx_config_params.admin_priority_app_table[3].valid = 0;
992 bp->dcbx_config_params.admin_priority_app_table[0].priority = 3;
993 bp->dcbx_config_params.admin_priority_app_table[1].priority = 0;
994 bp->dcbx_config_params.admin_priority_app_table[2].priority = 0;
995 bp->dcbx_config_params.admin_priority_app_table[3].priority = 0;
996 bp->dcbx_config_params.admin_priority_app_table[0].traffic_type = 0;
997 bp->dcbx_config_params.admin_priority_app_table[1].traffic_type = 1;
998 bp->dcbx_config_params.admin_priority_app_table[2].traffic_type = 0;
999 bp->dcbx_config_params.admin_priority_app_table[3].traffic_type = 0;
1000 bp->dcbx_config_params.admin_priority_app_table[0].app_id = 0x8906;
1001 bp->dcbx_config_params.admin_priority_app_table[1].app_id = 3260;
1002 bp->dcbx_config_params.admin_priority_app_table[2].app_id = 0;
1003 bp->dcbx_config_params.admin_priority_app_table[3].app_id = 0;
1004 bp->dcbx_config_params.admin_default_priority =
1005 bp->dcbx_config_params.admin_priority_app_table[1].priority;
1006 }
1007
1008 void bnx2x_dcbx_init(struct bnx2x *bp)
1009 {
1010 u32 dcbx_lldp_params_offset = SHMEM_LLDP_DCBX_PARAMS_NONE;
1011
1012 if (bp->dcbx_enabled <= 0)
1013 return;
1014
1015 /* validate:
1016 * chip of good for dcbx version,
1017 * dcb is wanted
1018 * the function is pmf
1019 * shmem2 contains DCBX support fields
1020 */
1021 DP(NETIF_MSG_LINK, "dcb_state %d bp->port.pmf %d\n",
1022 bp->dcb_state, bp->port.pmf);
1023
1024 if (bp->dcb_state == BNX2X_DCB_STATE_ON && bp->port.pmf &&
1025 SHMEM2_HAS(bp, dcbx_lldp_params_offset)) {
1026 dcbx_lldp_params_offset =
1027 SHMEM2_RD(bp, dcbx_lldp_params_offset);
1028
1029 DP(NETIF_MSG_LINK, "dcbx_lldp_params_offset 0x%x\n",
1030 dcbx_lldp_params_offset);
1031
1032 bnx2x_update_drv_flags(bp, DRV_FLAGS_DCB_CONFIGURED, 0);
1033
1034 if (SHMEM_LLDP_DCBX_PARAMS_NONE != dcbx_lldp_params_offset) {
1035 bnx2x_dcbx_admin_mib_updated_params(bp,
1036 dcbx_lldp_params_offset);
1037
1038 /* Let HW start negotiation */
1039 bnx2x_fw_command(bp,
1040 DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG, 0);
1041 }
1042 }
1043 }
1044 static void
1045 bnx2x_dcbx_print_cos_params(struct bnx2x *bp,
1046 struct bnx2x_func_tx_start_params *pfc_fw_cfg)
1047 {
1048 u8 pri = 0;
1049 u8 cos = 0;
1050
1051 DP(NETIF_MSG_LINK,
1052 "pfc_fw_cfg->dcb_version %x\n", pfc_fw_cfg->dcb_version);
1053 DP(NETIF_MSG_LINK,
1054 "pdev->params.dcbx_port_params.pfc."
1055 "priority_non_pauseable_mask %x\n",
1056 bp->dcbx_port_params.pfc.priority_non_pauseable_mask);
1057
1058 for (cos = 0 ; cos < bp->dcbx_port_params.ets.num_of_cos ; cos++) {
1059 DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
1060 "cos_params[%d].pri_bitmask %x\n", cos,
1061 bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask);
1062
1063 DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
1064 "cos_params[%d].bw_tbl %x\n", cos,
1065 bp->dcbx_port_params.ets.cos_params[cos].bw_tbl);
1066
1067 DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
1068 "cos_params[%d].strict %x\n", cos,
1069 bp->dcbx_port_params.ets.cos_params[cos].strict);
1070
1071 DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
1072 "cos_params[%d].pauseable %x\n", cos,
1073 bp->dcbx_port_params.ets.cos_params[cos].pauseable);
1074 }
1075
1076 for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) {
1077 DP(NETIF_MSG_LINK,
1078 "pfc_fw_cfg->traffic_type_to_priority_cos[%d]."
1079 "priority %x\n", pri,
1080 pfc_fw_cfg->traffic_type_to_priority_cos[pri].priority);
1081
1082 DP(NETIF_MSG_LINK,
1083 "pfc_fw_cfg->traffic_type_to_priority_cos[%d].cos %x\n",
1084 pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].cos);
1085 }
1086 }
1087
1088 /* fills help_data according to pg_info */
1089 static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp,
1090 u32 *pg_pri_orginal_spread,
1091 struct pg_help_data *help_data)
1092 {
1093 bool pg_found = false;
1094 u32 i, traf_type, add_traf_type, add_pg;
1095 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
1096 struct pg_entry_help_data *data = help_data->data; /*shotcut*/
1097
1098 /* Set to invalid */
1099 for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++)
1100 data[i].pg = DCBX_ILLEGAL_PG;
1101
1102 for (add_traf_type = 0;
1103 add_traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; add_traf_type++) {
1104 pg_found = false;
1105 if (ttp[add_traf_type] < MAX_PFC_PRIORITIES) {
1106 add_pg = (u8)pg_pri_orginal_spread[ttp[add_traf_type]];
1107 for (traf_type = 0;
1108 traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX;
1109 traf_type++) {
1110 if (data[traf_type].pg == add_pg) {
1111 if (!(data[traf_type].pg_priority &
1112 (1 << ttp[add_traf_type])))
1113 data[traf_type].
1114 num_of_dif_pri++;
1115 data[traf_type].pg_priority |=
1116 (1 << ttp[add_traf_type]);
1117 pg_found = true;
1118 break;
1119 }
1120 }
1121 if (false == pg_found) {
1122 data[help_data->num_of_pg].pg = add_pg;
1123 data[help_data->num_of_pg].pg_priority =
1124 (1 << ttp[add_traf_type]);
1125 data[help_data->num_of_pg].num_of_dif_pri = 1;
1126 help_data->num_of_pg++;
1127 }
1128 }
1129 DP(NETIF_MSG_LINK,
1130 "add_traf_type %d pg_found %s num_of_pg %d\n",
1131 add_traf_type, (false == pg_found) ? "NO" : "YES",
1132 help_data->num_of_pg);
1133 }
1134 }
1135
1136 static void bnx2x_dcbx_ets_disabled_entry_data(struct bnx2x *bp,
1137 struct cos_help_data *cos_data,
1138 u32 pri_join_mask)
1139 {
1140 /* Only one priority than only one COS */
1141 cos_data->data[0].pausable =
1142 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
1143 cos_data->data[0].pri_join_mask = pri_join_mask;
1144 cos_data->data[0].cos_bw = 100;
1145 cos_data->num_of_cos = 1;
1146 }
1147
1148 static inline void bnx2x_dcbx_add_to_cos_bw(struct bnx2x *bp,
1149 struct cos_entry_help_data *data,
1150 u8 pg_bw)
1151 {
1152 if (data->cos_bw == DCBX_INVALID_COS_BW)
1153 data->cos_bw = pg_bw;
1154 else
1155 data->cos_bw += pg_bw;
1156 }
1157
1158 static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp,
1159 struct cos_help_data *cos_data,
1160 u32 *pg_pri_orginal_spread,
1161 struct dcbx_ets_feature *ets)
1162 {
1163 u32 pri_tested = 0;
1164 u8 i = 0;
1165 u8 entry = 0;
1166 u8 pg_entry = 0;
1167 u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX;
1168
1169 cos_data->data[0].pausable = true;
1170 cos_data->data[1].pausable = false;
1171 cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0;
1172
1173 for (i = 0 ; i < num_of_pri ; i++) {
1174 pri_tested = 1 << bp->dcbx_port_params.
1175 app.traffic_type_priority[i];
1176
1177 if (pri_tested & DCBX_PFC_PRI_NON_PAUSE_MASK(bp)) {
1178 cos_data->data[1].pri_join_mask |= pri_tested;
1179 entry = 1;
1180 } else {
1181 cos_data->data[0].pri_join_mask |= pri_tested;
1182 entry = 0;
1183 }
1184 pg_entry = (u8)pg_pri_orginal_spread[bp->dcbx_port_params.
1185 app.traffic_type_priority[i]];
1186 /* There can be only one strict pg */
1187 if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES)
1188 bnx2x_dcbx_add_to_cos_bw(bp, &cos_data->data[entry],
1189 DCBX_PG_BW_GET(ets->pg_bw_tbl, pg_entry));
1190 else
1191 /* If we join a group and one is strict
1192 * than the bw rulls */
1193 cos_data->data[entry].strict =
1194 BNX2X_DCBX_STRICT_COS_HIGHEST;
1195 }
1196 if ((0 == cos_data->data[0].pri_join_mask) &&
1197 (0 == cos_data->data[1].pri_join_mask))
1198 BNX2X_ERR("dcbx error: Both groups must have priorities\n");
1199 }
1200
1201
1202 #ifndef POWER_OF_2
1203 #define POWER_OF_2(x) ((0 != x) && (0 == (x & (x-1))))
1204 #endif
1205
1206 static void bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(struct bnx2x *bp,
1207 struct pg_help_data *pg_help_data,
1208 struct cos_help_data *cos_data,
1209 u32 pri_join_mask,
1210 u8 num_of_dif_pri)
1211 {
1212 u8 i = 0;
1213 u32 pri_tested = 0;
1214 u32 pri_mask_without_pri = 0;
1215 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
1216 /*debug*/
1217 if (num_of_dif_pri == 1) {
1218 bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, pri_join_mask);
1219 return;
1220 }
1221 /* single priority group */
1222 if (pg_help_data->data[0].pg < DCBX_MAX_NUM_PG_BW_ENTRIES) {
1223 /* If there are both pauseable and non-pauseable priorities,
1224 * the pauseable priorities go to the first queue and
1225 * the non-pauseable priorities go to the second queue.
1226 */
1227 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
1228 /* Pauseable */
1229 cos_data->data[0].pausable = true;
1230 /* Non pauseable.*/
1231 cos_data->data[1].pausable = false;
1232
1233 if (2 == num_of_dif_pri) {
1234 cos_data->data[0].cos_bw = 50;
1235 cos_data->data[1].cos_bw = 50;
1236 }
1237
1238 if (3 == num_of_dif_pri) {
1239 if (POWER_OF_2(DCBX_PFC_PRI_GET_PAUSE(bp,
1240 pri_join_mask))) {
1241 cos_data->data[0].cos_bw = 33;
1242 cos_data->data[1].cos_bw = 67;
1243 } else {
1244 cos_data->data[0].cos_bw = 67;
1245 cos_data->data[1].cos_bw = 33;
1246 }
1247 }
1248
1249 } else if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask)) {
1250 /* If there are only pauseable priorities,
1251 * then one/two priorities go to the first queue
1252 * and one priority goes to the second queue.
1253 */
1254 if (2 == num_of_dif_pri) {
1255 cos_data->data[0].cos_bw = 50;
1256 cos_data->data[1].cos_bw = 50;
1257 } else {
1258 cos_data->data[0].cos_bw = 67;
1259 cos_data->data[1].cos_bw = 33;
1260 }
1261 cos_data->data[1].pausable = true;
1262 cos_data->data[0].pausable = true;
1263 /* All priorities except FCOE */
1264 cos_data->data[0].pri_join_mask = (pri_join_mask &
1265 ((u8)~(1 << ttp[LLFC_TRAFFIC_TYPE_FCOE])));
1266 /* Only FCOE priority.*/
1267 cos_data->data[1].pri_join_mask =
1268 (1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]);
1269 } else
1270 /* If there are only non-pauseable priorities,
1271 * they will all go to the same queue.
1272 */
1273 bnx2x_dcbx_ets_disabled_entry_data(bp,
1274 cos_data, pri_join_mask);
1275 } else {
1276 /* priority group which is not BW limited (PG#15):*/
1277 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
1278 /* If there are both pauseable and non-pauseable
1279 * priorities, the pauseable priorities go to the first
1280 * queue and the non-pauseable priorities
1281 * go to the second queue.
1282 */
1283 if (DCBX_PFC_PRI_GET_PAUSE(bp, pri_join_mask) >
1284 DCBX_PFC_PRI_GET_NON_PAUSE(bp, pri_join_mask)) {
1285 cos_data->data[0].strict =
1286 BNX2X_DCBX_STRICT_COS_HIGHEST;
1287 cos_data->data[1].strict =
1288 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
1289 BNX2X_DCBX_STRICT_COS_HIGHEST);
1290 } else {
1291 cos_data->data[0].strict =
1292 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
1293 BNX2X_DCBX_STRICT_COS_HIGHEST);
1294 cos_data->data[1].strict =
1295 BNX2X_DCBX_STRICT_COS_HIGHEST;
1296 }
1297 /* Pauseable */
1298 cos_data->data[0].pausable = true;
1299 /* Non pause-able.*/
1300 cos_data->data[1].pausable = false;
1301 } else {
1302 /* If there are only pauseable priorities or
1303 * only non-pauseable,* the lower priorities go
1304 * to the first queue and the higherpriorities go
1305 * to the second queue.
1306 */
1307 cos_data->data[0].pausable =
1308 cos_data->data[1].pausable =
1309 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
1310
1311 for (i = 0 ; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) {
1312 pri_tested = 1 << bp->dcbx_port_params.
1313 app.traffic_type_priority[i];
1314 /* Remove priority tested */
1315 pri_mask_without_pri =
1316 (pri_join_mask & ((u8)(~pri_tested)));
1317 if (pri_mask_without_pri < pri_tested)
1318 break;
1319 }
1320
1321 if (i == LLFC_DRIVER_TRAFFIC_TYPE_MAX)
1322 BNX2X_ERR("Invalid value for pri_join_mask -"
1323 " could not find a priority\n");
1324
1325 cos_data->data[0].pri_join_mask = pri_mask_without_pri;
1326 cos_data->data[1].pri_join_mask = pri_tested;
1327 /* Both queues are strict priority,
1328 * and that with the highest priority
1329 * gets the highest strict priority in the arbiter.
1330 */
1331 cos_data->data[0].strict =
1332 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
1333 BNX2X_DCBX_STRICT_COS_HIGHEST);
1334 cos_data->data[1].strict =
1335 BNX2X_DCBX_STRICT_COS_HIGHEST;
1336 }
1337 }
1338 }
1339
1340 static void bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params(
1341 struct bnx2x *bp,
1342 struct pg_help_data *pg_help_data,
1343 struct dcbx_ets_feature *ets,
1344 struct cos_help_data *cos_data,
1345 u32 *pg_pri_orginal_spread,
1346 u32 pri_join_mask,
1347 u8 num_of_dif_pri)
1348 {
1349 u8 i = 0;
1350 u8 pg[DCBX_COS_MAX_NUM_E2] = { 0 };
1351
1352 /* If there are both pauseable and non-pauseable priorities,
1353 * the pauseable priorities go to the first queue and
1354 * the non-pauseable priorities go to the second queue.
1355 */
1356 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
1357 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp,
1358 pg_help_data->data[0].pg_priority) ||
1359 IS_DCBX_PFC_PRI_MIX_PAUSE(bp,
1360 pg_help_data->data[1].pg_priority)) {
1361 /* If one PG contains both pauseable and
1362 * non-pauseable priorities then ETS is disabled.
1363 */
1364 bnx2x_dcbx_separate_pauseable_from_non(bp, cos_data,
1365 pg_pri_orginal_spread, ets);
1366 bp->dcbx_port_params.ets.enabled = false;
1367 return;
1368 }
1369
1370 /* Pauseable */
1371 cos_data->data[0].pausable = true;
1372 /* Non pauseable. */
1373 cos_data->data[1].pausable = false;
1374 if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp,
1375 pg_help_data->data[0].pg_priority)) {
1376 /* 0 is pauseable */
1377 cos_data->data[0].pri_join_mask =
1378 pg_help_data->data[0].pg_priority;
1379 pg[0] = pg_help_data->data[0].pg;
1380 cos_data->data[1].pri_join_mask =
1381 pg_help_data->data[1].pg_priority;
1382 pg[1] = pg_help_data->data[1].pg;
1383 } else {/* 1 is pauseable */
1384 cos_data->data[0].pri_join_mask =
1385 pg_help_data->data[1].pg_priority;
1386 pg[0] = pg_help_data->data[1].pg;
1387 cos_data->data[1].pri_join_mask =
1388 pg_help_data->data[0].pg_priority;
1389 pg[1] = pg_help_data->data[0].pg;
1390 }
1391 } else {
1392 /* If there are only pauseable priorities or
1393 * only non-pauseable, each PG goes to a queue.
1394 */
1395 cos_data->data[0].pausable = cos_data->data[1].pausable =
1396 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
1397 cos_data->data[0].pri_join_mask =
1398 pg_help_data->data[0].pg_priority;
1399 pg[0] = pg_help_data->data[0].pg;
1400 cos_data->data[1].pri_join_mask =
1401 pg_help_data->data[1].pg_priority;
1402 pg[1] = pg_help_data->data[1].pg;
1403 }
1404
1405 /* There can be only one strict pg */
1406 for (i = 0 ; i < ARRAY_SIZE(pg); i++) {
1407 if (pg[i] < DCBX_MAX_NUM_PG_BW_ENTRIES)
1408 cos_data->data[i].cos_bw =
1409 DCBX_PG_BW_GET(ets->pg_bw_tbl, pg[i]);
1410 else
1411 cos_data->data[i].strict =
1412 BNX2X_DCBX_STRICT_COS_HIGHEST;
1413 }
1414 }
1415
1416 static int bnx2x_dcbx_join_pgs(
1417 struct bnx2x *bp,
1418 struct dcbx_ets_feature *ets,
1419 struct pg_help_data *pg_help_data,
1420 u8 required_num_of_pg)
1421 {
1422 u8 entry_joined = pg_help_data->num_of_pg - 1;
1423 u8 entry_removed = entry_joined + 1;
1424 u8 pg_joined = 0;
1425
1426 if (required_num_of_pg == 0 || ARRAY_SIZE(pg_help_data->data)
1427 <= pg_help_data->num_of_pg) {
1428
1429 BNX2X_ERR("required_num_of_pg can't be zero\n");
1430 return -EINVAL;
1431 }
1432
1433 while (required_num_of_pg < pg_help_data->num_of_pg) {
1434 entry_joined = pg_help_data->num_of_pg - 2;
1435 entry_removed = entry_joined + 1;
1436 /* protect index */
1437 entry_removed %= ARRAY_SIZE(pg_help_data->data);
1438
1439 pg_help_data->data[entry_joined].pg_priority |=
1440 pg_help_data->data[entry_removed].pg_priority;
1441
1442 pg_help_data->data[entry_joined].num_of_dif_pri +=
1443 pg_help_data->data[entry_removed].num_of_dif_pri;
1444
1445 if (pg_help_data->data[entry_joined].pg == DCBX_STRICT_PRI_PG ||
1446 pg_help_data->data[entry_removed].pg == DCBX_STRICT_PRI_PG)
1447 /* Entries joined strict priority rules */
1448 pg_help_data->data[entry_joined].pg =
1449 DCBX_STRICT_PRI_PG;
1450 else {
1451 /* Entries can be joined join BW */
1452 pg_joined = DCBX_PG_BW_GET(ets->pg_bw_tbl,
1453 pg_help_data->data[entry_joined].pg) +
1454 DCBX_PG_BW_GET(ets->pg_bw_tbl,
1455 pg_help_data->data[entry_removed].pg);
1456
1457 DCBX_PG_BW_SET(ets->pg_bw_tbl,
1458 pg_help_data->data[entry_joined].pg, pg_joined);
1459 }
1460 /* Joined the entries */
1461 pg_help_data->num_of_pg--;
1462 }
1463
1464 return 0;
1465 }
1466
1467 static void bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params(
1468 struct bnx2x *bp,
1469 struct pg_help_data *pg_help_data,
1470 struct dcbx_ets_feature *ets,
1471 struct cos_help_data *cos_data,
1472 u32 *pg_pri_orginal_spread,
1473 u32 pri_join_mask,
1474 u8 num_of_dif_pri)
1475 {
1476 u8 i = 0;
1477 u32 pri_tested = 0;
1478 u8 entry = 0;
1479 u8 pg_entry = 0;
1480 bool b_found_strict = false;
1481 u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX;
1482
1483 cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0;
1484 /* If there are both pauseable and non-pauseable priorities,
1485 * the pauseable priorities go to the first queue and the
1486 * non-pauseable priorities go to the second queue.
1487 */
1488 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask))
1489 bnx2x_dcbx_separate_pauseable_from_non(bp,
1490 cos_data, pg_pri_orginal_spread, ets);
1491 else {
1492 /* If two BW-limited PG-s were combined to one queue,
1493 * the BW is their sum.
1494 *
1495 * If there are only pauseable priorities or only non-pauseable,
1496 * and there are both BW-limited and non-BW-limited PG-s,
1497 * the BW-limited PG/s go to one queue and the non-BW-limited
1498 * PG/s go to the second queue.
1499 *
1500 * If there are only pauseable priorities or only non-pauseable
1501 * and all are BW limited, then two priorities go to the first
1502 * queue and one priority goes to the second queue.
1503 *
1504 * We will join this two cases:
1505 * if one is BW limited it will go to the secoend queue
1506 * otherwise the last priority will get it
1507 */
1508
1509 cos_data->data[0].pausable = cos_data->data[1].pausable =
1510 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
1511
1512 for (i = 0 ; i < num_of_pri; i++) {
1513 pri_tested = 1 << bp->dcbx_port_params.
1514 app.traffic_type_priority[i];
1515 pg_entry = (u8)pg_pri_orginal_spread[bp->
1516 dcbx_port_params.app.traffic_type_priority[i]];
1517
1518 if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) {
1519 entry = 0;
1520
1521 if (i == (num_of_pri-1) &&
1522 false == b_found_strict)
1523 /* last entry will be handled separately
1524 * If no priority is strict than last
1525 * enty goes to last queue.*/
1526 entry = 1;
1527 cos_data->data[entry].pri_join_mask |=
1528 pri_tested;
1529 bnx2x_dcbx_add_to_cos_bw(bp,
1530 &cos_data->data[entry],
1531 DCBX_PG_BW_GET(ets->pg_bw_tbl,
1532 pg_entry));
1533 } else {
1534 b_found_strict = true;
1535 cos_data->data[1].pri_join_mask |= pri_tested;
1536 /* If we join a group and one is strict
1537 * than the bw rulls */
1538 cos_data->data[1].strict =
1539 BNX2X_DCBX_STRICT_COS_HIGHEST;
1540 }
1541 }
1542 }
1543 }
1544
1545
1546 static void bnx2x_dcbx_2cos_limit_cee_fill_cos_params(struct bnx2x *bp,
1547 struct pg_help_data *help_data,
1548 struct dcbx_ets_feature *ets,
1549 struct cos_help_data *cos_data,
1550 u32 *pg_pri_orginal_spread,
1551 u32 pri_join_mask,
1552 u8 num_of_dif_pri)
1553 {
1554
1555 /* default E2 settings */
1556 cos_data->num_of_cos = DCBX_COS_MAX_NUM_E2;
1557
1558 switch (help_data->num_of_pg) {
1559 case 1:
1560 bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(
1561 bp,
1562 help_data,
1563 cos_data,
1564 pri_join_mask,
1565 num_of_dif_pri);
1566 break;
1567 case 2:
1568 bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params(
1569 bp,
1570 help_data,
1571 ets,
1572 cos_data,
1573 pg_pri_orginal_spread,
1574 pri_join_mask,
1575 num_of_dif_pri);
1576 break;
1577
1578 case 3:
1579 bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params(
1580 bp,
1581 help_data,
1582 ets,
1583 cos_data,
1584 pg_pri_orginal_spread,
1585 pri_join_mask,
1586 num_of_dif_pri);
1587 break;
1588 default:
1589 BNX2X_ERR("Wrong pg_help_data.num_of_pg\n");
1590 bnx2x_dcbx_ets_disabled_entry_data(bp,
1591 cos_data, pri_join_mask);
1592 }
1593 }
1594
1595 static int bnx2x_dcbx_spread_strict_pri(struct bnx2x *bp,
1596 struct cos_help_data *cos_data,
1597 u8 entry,
1598 u8 num_spread_of_entries,
1599 u8 strict_app_pris)
1600 {
1601 u8 strict_pri = BNX2X_DCBX_STRICT_COS_HIGHEST;
1602 u8 num_of_app_pri = MAX_PFC_PRIORITIES;
1603 u8 app_pri_bit = 0;
1604
1605 while (num_spread_of_entries && num_of_app_pri > 0) {
1606 app_pri_bit = 1 << (num_of_app_pri - 1);
1607 if (app_pri_bit & strict_app_pris) {
1608 struct cos_entry_help_data *data = &cos_data->
1609 data[entry];
1610 num_spread_of_entries--;
1611 if (num_spread_of_entries == 0) {
1612 /* last entry needed put all the entries left */
1613 data->cos_bw = DCBX_INVALID_COS_BW;
1614 data->strict = strict_pri;
1615 data->pri_join_mask = strict_app_pris;
1616 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
1617 data->pri_join_mask);
1618 } else {
1619 strict_app_pris &= ~app_pri_bit;
1620
1621 data->cos_bw = DCBX_INVALID_COS_BW;
1622 data->strict = strict_pri;
1623 data->pri_join_mask = app_pri_bit;
1624 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
1625 data->pri_join_mask);
1626 }
1627
1628 strict_pri =
1629 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(strict_pri);
1630 entry++;
1631 }
1632
1633 num_of_app_pri--;
1634 }
1635
1636 if (num_spread_of_entries)
1637 return -EINVAL;
1638
1639 return 0;
1640 }
1641
1642 static u8 bnx2x_dcbx_cee_fill_strict_pri(struct bnx2x *bp,
1643 struct cos_help_data *cos_data,
1644 u8 entry,
1645 u8 num_spread_of_entries,
1646 u8 strict_app_pris)
1647 {
1648
1649 if (bnx2x_dcbx_spread_strict_pri(bp, cos_data, entry,
1650 num_spread_of_entries,
1651 strict_app_pris)) {
1652 struct cos_entry_help_data *data = &cos_data->
1653 data[entry];
1654 /* Fill BW entry */
1655 data->cos_bw = DCBX_INVALID_COS_BW;
1656 data->strict = BNX2X_DCBX_STRICT_COS_HIGHEST;
1657 data->pri_join_mask = strict_app_pris;
1658 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
1659 data->pri_join_mask);
1660 return 1;
1661 }
1662
1663 return num_spread_of_entries;
1664 }
1665
1666 static void bnx2x_dcbx_cee_fill_cos_params(struct bnx2x *bp,
1667 struct pg_help_data *help_data,
1668 struct dcbx_ets_feature *ets,
1669 struct cos_help_data *cos_data,
1670 u32 pri_join_mask)
1671
1672 {
1673 u8 need_num_of_entries = 0;
1674 u8 i = 0;
1675 u8 entry = 0;
1676
1677 /*
1678 * if the number of requested PG-s in CEE is greater than 3
1679 * then the results are not determined since this is a violation
1680 * of the standard.
1681 */
1682 if (help_data->num_of_pg > DCBX_COS_MAX_NUM_E3B0) {
1683 if (bnx2x_dcbx_join_pgs(bp, ets, help_data,
1684 DCBX_COS_MAX_NUM_E3B0)) {
1685 BNX2X_ERR("Unable to reduce the number of PGs -"
1686 "we will disables ETS\n");
1687 bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data,
1688 pri_join_mask);
1689 return;
1690 }
1691 }
1692
1693 for (i = 0 ; i < help_data->num_of_pg; i++) {
1694 struct pg_entry_help_data *pg = &help_data->data[i];
1695 if (pg->pg < DCBX_MAX_NUM_PG_BW_ENTRIES) {
1696 struct cos_entry_help_data *data = &cos_data->
1697 data[entry];
1698 /* Fill BW entry */
1699 data->cos_bw = DCBX_PG_BW_GET(ets->pg_bw_tbl, pg->pg);
1700 data->strict = BNX2X_DCBX_STRICT_INVALID;
1701 data->pri_join_mask = pg->pg_priority;
1702 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
1703 data->pri_join_mask);
1704
1705 entry++;
1706 } else {
1707 need_num_of_entries = min_t(u8,
1708 (u8)pg->num_of_dif_pri,
1709 (u8)DCBX_COS_MAX_NUM_E3B0 -
1710 help_data->num_of_pg + 1);
1711 /*
1712 * If there are still VOQ-s which have no associated PG,
1713 * then associate these VOQ-s to PG15. These PG-s will
1714 * be used for SP between priorities on PG15.
1715 */
1716 entry += bnx2x_dcbx_cee_fill_strict_pri(bp, cos_data,
1717 entry, need_num_of_entries, pg->pg_priority);
1718 }
1719 }
1720
1721 /* the entry will represent the number of COSes used */
1722 cos_data->num_of_cos = entry;
1723 }
1724 static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp,
1725 struct pg_help_data *help_data,
1726 struct dcbx_ets_feature *ets,
1727 u32 *pg_pri_orginal_spread)
1728 {
1729 struct cos_help_data cos_data;
1730 u8 i = 0;
1731 u32 pri_join_mask = 0;
1732 u8 num_of_dif_pri = 0;
1733
1734 memset(&cos_data, 0, sizeof(cos_data));
1735
1736 /* Validate the pg value */
1737 for (i = 0; i < help_data->num_of_pg ; i++) {
1738 if (DCBX_STRICT_PRIORITY != help_data->data[i].pg &&
1739 DCBX_MAX_NUM_PG_BW_ENTRIES <= help_data->data[i].pg)
1740 BNX2X_ERR("Invalid pg[%d] data %x\n", i,
1741 help_data->data[i].pg);
1742 pri_join_mask |= help_data->data[i].pg_priority;
1743 num_of_dif_pri += help_data->data[i].num_of_dif_pri;
1744 }
1745
1746 /* defaults */
1747 cos_data.num_of_cos = 1;
1748 for (i = 0; i < ARRAY_SIZE(cos_data.data); i++) {
1749 cos_data.data[i].pri_join_mask = 0;
1750 cos_data.data[i].pausable = false;
1751 cos_data.data[i].strict = BNX2X_DCBX_STRICT_INVALID;
1752 cos_data.data[i].cos_bw = DCBX_INVALID_COS_BW;
1753 }
1754
1755 if (CHIP_IS_E3B0(bp))
1756 bnx2x_dcbx_cee_fill_cos_params(bp, help_data, ets,
1757 &cos_data, pri_join_mask);
1758 else /* E2 + E3A0 */
1759 bnx2x_dcbx_2cos_limit_cee_fill_cos_params(bp,
1760 help_data, ets,
1761 &cos_data,
1762 pg_pri_orginal_spread,
1763 pri_join_mask,
1764 num_of_dif_pri);
1765
1766 for (i = 0; i < cos_data.num_of_cos ; i++) {
1767 struct bnx2x_dcbx_cos_params *p =
1768 &bp->dcbx_port_params.ets.cos_params[i];
1769
1770 p->strict = cos_data.data[i].strict;
1771 p->bw_tbl = cos_data.data[i].cos_bw;
1772 p->pri_bitmask = cos_data.data[i].pri_join_mask;
1773 p->pauseable = cos_data.data[i].pausable;
1774
1775 /* sanity */
1776 if (p->bw_tbl != DCBX_INVALID_COS_BW ||
1777 p->strict != BNX2X_DCBX_STRICT_INVALID) {
1778 if (p->pri_bitmask == 0)
1779 BNX2X_ERR("Invalid pri_bitmask for %d\n", i);
1780
1781 if (CHIP_IS_E2(bp) || CHIP_IS_E3A0(bp)) {
1782
1783 if (p->pauseable &&
1784 DCBX_PFC_PRI_GET_NON_PAUSE(bp,
1785 p->pri_bitmask) != 0)
1786 BNX2X_ERR("Inconsistent config for "
1787 "pausable COS %d\n", i);
1788
1789 if (!p->pauseable &&
1790 DCBX_PFC_PRI_GET_PAUSE(bp,
1791 p->pri_bitmask) != 0)
1792 BNX2X_ERR("Inconsistent config for "
1793 "nonpausable COS %d\n", i);
1794 }
1795 }
1796
1797 if (p->pauseable)
1798 DP(NETIF_MSG_LINK, "COS %d PAUSABLE prijoinmask 0x%x\n",
1799 i, cos_data.data[i].pri_join_mask);
1800 else
1801 DP(NETIF_MSG_LINK, "COS %d NONPAUSABLE prijoinmask "
1802 "0x%x\n",
1803 i, cos_data.data[i].pri_join_mask);
1804 }
1805
1806 bp->dcbx_port_params.ets.num_of_cos = cos_data.num_of_cos ;
1807 }
1808
1809 static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp,
1810 u32 *set_configuration_ets_pg,
1811 u32 *pri_pg_tbl)
1812 {
1813 int i;
1814
1815 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) {
1816 set_configuration_ets_pg[i] = DCBX_PRI_PG_GET(pri_pg_tbl, i);
1817
1818 DP(NETIF_MSG_LINK, "set_configuration_ets_pg[%d] = 0x%x\n",
1819 i, set_configuration_ets_pg[i]);
1820 }
1821 }
1822
1823 static void bnx2x_dcbx_fw_struct(struct bnx2x *bp,
1824 struct bnx2x_func_tx_start_params *pfc_fw_cfg)
1825 {
1826 u16 pri_bit = 0;
1827 u8 cos = 0, pri = 0;
1828 struct priority_cos *tt2cos;
1829 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
1830
1831 memset(pfc_fw_cfg, 0, sizeof(*pfc_fw_cfg));
1832
1833 /* to disable DCB - the structure must be zeroed */
1834 if (bp->dcbx_error & DCBX_REMOTE_MIB_ERROR)
1835 return;
1836
1837 /*shortcut*/
1838 tt2cos = pfc_fw_cfg->traffic_type_to_priority_cos;
1839
1840 /* Fw version should be incremented each update */
1841 pfc_fw_cfg->dcb_version = ++bp->dcb_version;
1842 pfc_fw_cfg->dcb_enabled = 1;
1843
1844 /* Fill priority parameters */
1845 for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) {
1846 tt2cos[pri].priority = ttp[pri];
1847 pri_bit = 1 << tt2cos[pri].priority;
1848
1849 /* Fill COS parameters based on COS calculated to
1850 * make it more general for future use */
1851 for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++)
1852 if (bp->dcbx_port_params.ets.cos_params[cos].
1853 pri_bitmask & pri_bit)
1854 tt2cos[pri].cos = cos;
1855 }
1856
1857 /* we never want the FW to add a 0 vlan tag */
1858 pfc_fw_cfg->dont_add_pri_0_en = 1;
1859
1860 bnx2x_dcbx_print_cos_params(bp, pfc_fw_cfg);
1861 }
1862
1863 void bnx2x_dcbx_pmf_update(struct bnx2x *bp)
1864 {
1865 /* if we need to syncronize DCBX result from prev PMF
1866 * read it from shmem and update bp accordingly
1867 */
1868 if (SHMEM2_HAS(bp, drv_flags) &&
1869 GET_FLAGS(SHMEM2_RD(bp, drv_flags), DRV_FLAGS_DCB_CONFIGURED)) {
1870 /* Read neg results if dcbx is in the FW */
1871 if (bnx2x_dcbx_read_shmem_neg_results(bp))
1872 return;
1873
1874 bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat,
1875 bp->dcbx_error);
1876 bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat,
1877 bp->dcbx_error);
1878 }
1879 }
1880
1881 /* DCB netlink */
1882 #ifdef BCM_DCBNL
1883
1884 #define BNX2X_DCBX_CAPS (DCB_CAP_DCBX_LLD_MANAGED | \
1885 DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_STATIC)
1886
1887 static inline bool bnx2x_dcbnl_set_valid(struct bnx2x *bp)
1888 {
1889 /* validate dcbnl call that may change HW state:
1890 * DCB is on and DCBX mode was SUCCESSFULLY set by the user.
1891 */
1892 return bp->dcb_state && bp->dcbx_mode_uset;
1893 }
1894
1895 static u8 bnx2x_dcbnl_get_state(struct net_device *netdev)
1896 {
1897 struct bnx2x *bp = netdev_priv(netdev);
1898 DP(NETIF_MSG_LINK, "state = %d\n", bp->dcb_state);
1899 return bp->dcb_state;
1900 }
1901
1902 static u8 bnx2x_dcbnl_set_state(struct net_device *netdev, u8 state)
1903 {
1904 struct bnx2x *bp = netdev_priv(netdev);
1905 DP(NETIF_MSG_LINK, "state = %s\n", state ? "on" : "off");
1906
1907 bnx2x_dcbx_set_state(bp, (state ? true : false), bp->dcbx_enabled);
1908 return 0;
1909 }
1910
1911 static void bnx2x_dcbnl_get_perm_hw_addr(struct net_device *netdev,
1912 u8 *perm_addr)
1913 {
1914 struct bnx2x *bp = netdev_priv(netdev);
1915 DP(NETIF_MSG_LINK, "GET-PERM-ADDR\n");
1916
1917 /* first the HW mac address */
1918 memcpy(perm_addr, netdev->dev_addr, netdev->addr_len);
1919
1920 #ifdef BCM_CNIC
1921 /* second SAN address */
1922 memcpy(perm_addr+netdev->addr_len, bp->fip_mac, netdev->addr_len);
1923 #endif
1924 }
1925
1926 static void bnx2x_dcbnl_set_pg_tccfg_tx(struct net_device *netdev, int prio,
1927 u8 prio_type, u8 pgid, u8 bw_pct,
1928 u8 up_map)
1929 {
1930 struct bnx2x *bp = netdev_priv(netdev);
1931
1932 DP(NETIF_MSG_LINK, "prio[%d] = %d\n", prio, pgid);
1933 if (!bnx2x_dcbnl_set_valid(bp) || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES)
1934 return;
1935
1936 /**
1937 * bw_pct ingnored - band-width percentage devision between user
1938 * priorities within the same group is not
1939 * standard and hence not supported
1940 *
1941 * prio_type igonred - priority levels within the same group are not
1942 * standard and hence are not supported. According
1943 * to the standard pgid 15 is dedicated to strict
1944 * prioirty traffic (on the port level).
1945 *
1946 * up_map ignored
1947 */
1948
1949 bp->dcbx_config_params.admin_configuration_ets_pg[prio] = pgid;
1950 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
1951 }
1952
1953 static void bnx2x_dcbnl_set_pg_bwgcfg_tx(struct net_device *netdev,
1954 int pgid, u8 bw_pct)
1955 {
1956 struct bnx2x *bp = netdev_priv(netdev);
1957 DP(NETIF_MSG_LINK, "pgid[%d] = %d\n", pgid, bw_pct);
1958
1959 if (!bnx2x_dcbnl_set_valid(bp) || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES)
1960 return;
1961
1962 bp->dcbx_config_params.admin_configuration_bw_precentage[pgid] = bw_pct;
1963 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
1964 }
1965
1966 static void bnx2x_dcbnl_set_pg_tccfg_rx(struct net_device *netdev, int prio,
1967 u8 prio_type, u8 pgid, u8 bw_pct,
1968 u8 up_map)
1969 {
1970 struct bnx2x *bp = netdev_priv(netdev);
1971 DP(NETIF_MSG_LINK, "Nothing to set; No RX support\n");
1972 }
1973
1974 static void bnx2x_dcbnl_set_pg_bwgcfg_rx(struct net_device *netdev,
1975 int pgid, u8 bw_pct)
1976 {
1977 struct bnx2x *bp = netdev_priv(netdev);
1978 DP(NETIF_MSG_LINK, "Nothing to set; No RX support\n");
1979 }
1980
1981 static void bnx2x_dcbnl_get_pg_tccfg_tx(struct net_device *netdev, int prio,
1982 u8 *prio_type, u8 *pgid, u8 *bw_pct,
1983 u8 *up_map)
1984 {
1985 struct bnx2x *bp = netdev_priv(netdev);
1986 DP(NETIF_MSG_LINK, "prio = %d\n", prio);
1987
1988 /**
1989 * bw_pct ingnored - band-width percentage devision between user
1990 * priorities within the same group is not
1991 * standard and hence not supported
1992 *
1993 * prio_type igonred - priority levels within the same group are not
1994 * standard and hence are not supported. According
1995 * to the standard pgid 15 is dedicated to strict
1996 * prioirty traffic (on the port level).
1997 *
1998 * up_map ignored
1999 */
2000 *up_map = *bw_pct = *prio_type = *pgid = 0;
2001
2002 if (!bp->dcb_state || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES)
2003 return;
2004
2005 *pgid = DCBX_PRI_PG_GET(bp->dcbx_local_feat.ets.pri_pg_tbl, prio);
2006 }
2007
2008 static void bnx2x_dcbnl_get_pg_bwgcfg_tx(struct net_device *netdev,
2009 int pgid, u8 *bw_pct)
2010 {
2011 struct bnx2x *bp = netdev_priv(netdev);
2012 DP(NETIF_MSG_LINK, "pgid = %d\n", pgid);
2013
2014 *bw_pct = 0;
2015
2016 if (!bp->dcb_state || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES)
2017 return;
2018
2019 *bw_pct = DCBX_PG_BW_GET(bp->dcbx_local_feat.ets.pg_bw_tbl, pgid);
2020 }
2021
2022 static void bnx2x_dcbnl_get_pg_tccfg_rx(struct net_device *netdev, int prio,
2023 u8 *prio_type, u8 *pgid, u8 *bw_pct,
2024 u8 *up_map)
2025 {
2026 struct bnx2x *bp = netdev_priv(netdev);
2027 DP(NETIF_MSG_LINK, "Nothing to get; No RX support\n");
2028
2029 *prio_type = *pgid = *bw_pct = *up_map = 0;
2030 }
2031
2032 static void bnx2x_dcbnl_get_pg_bwgcfg_rx(struct net_device *netdev,
2033 int pgid, u8 *bw_pct)
2034 {
2035 struct bnx2x *bp = netdev_priv(netdev);
2036 DP(NETIF_MSG_LINK, "Nothing to get; No RX support\n");
2037
2038 *bw_pct = 0;
2039 }
2040
2041 static void bnx2x_dcbnl_set_pfc_cfg(struct net_device *netdev, int prio,
2042 u8 setting)
2043 {
2044 struct bnx2x *bp = netdev_priv(netdev);
2045 DP(NETIF_MSG_LINK, "prio[%d] = %d\n", prio, setting);
2046
2047 if (!bnx2x_dcbnl_set_valid(bp) || prio >= MAX_PFC_PRIORITIES)
2048 return;
2049
2050 bp->dcbx_config_params.admin_pfc_bitmap |= ((setting ? 1 : 0) << prio);
2051
2052 if (setting)
2053 bp->dcbx_config_params.admin_pfc_tx_enable = 1;
2054 }
2055
2056 static void bnx2x_dcbnl_get_pfc_cfg(struct net_device *netdev, int prio,
2057 u8 *setting)
2058 {
2059 struct bnx2x *bp = netdev_priv(netdev);
2060 DP(NETIF_MSG_LINK, "prio = %d\n", prio);
2061
2062 *setting = 0;
2063
2064 if (!bp->dcb_state || prio >= MAX_PFC_PRIORITIES)
2065 return;
2066
2067 *setting = (bp->dcbx_local_feat.pfc.pri_en_bitmap >> prio) & 0x1;
2068 }
2069
2070 static u8 bnx2x_dcbnl_set_all(struct net_device *netdev)
2071 {
2072 struct bnx2x *bp = netdev_priv(netdev);
2073 int rc = 0;
2074
2075 DP(NETIF_MSG_LINK, "SET-ALL\n");
2076
2077 if (!bnx2x_dcbnl_set_valid(bp))
2078 return 1;
2079
2080 if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
2081 netdev_err(bp->dev, "Handling parity error recovery. "
2082 "Try again later\n");
2083 return 1;
2084 }
2085 if (netif_running(bp->dev)) {
2086 bnx2x_nic_unload(bp, UNLOAD_NORMAL);
2087 rc = bnx2x_nic_load(bp, LOAD_NORMAL);
2088 }
2089 DP(NETIF_MSG_LINK, "set_dcbx_params done (%d)\n", rc);
2090 if (rc)
2091 return 1;
2092
2093 return 0;
2094 }
2095
2096 static u8 bnx2x_dcbnl_get_cap(struct net_device *netdev, int capid, u8 *cap)
2097 {
2098 struct bnx2x *bp = netdev_priv(netdev);
2099 u8 rval = 0;
2100
2101 if (bp->dcb_state) {
2102 switch (capid) {
2103 case DCB_CAP_ATTR_PG:
2104 *cap = true;
2105 break;
2106 case DCB_CAP_ATTR_PFC:
2107 *cap = true;
2108 break;
2109 case DCB_CAP_ATTR_UP2TC:
2110 *cap = false;
2111 break;
2112 case DCB_CAP_ATTR_PG_TCS:
2113 *cap = 0x80; /* 8 priorities for PGs */
2114 break;
2115 case DCB_CAP_ATTR_PFC_TCS:
2116 *cap = 0x80; /* 8 priorities for PFC */
2117 break;
2118 case DCB_CAP_ATTR_GSP:
2119 *cap = true;
2120 break;
2121 case DCB_CAP_ATTR_BCN:
2122 *cap = false;
2123 break;
2124 case DCB_CAP_ATTR_DCBX:
2125 *cap = BNX2X_DCBX_CAPS;
2126 default:
2127 rval = -EINVAL;
2128 break;
2129 }
2130 } else
2131 rval = -EINVAL;
2132
2133 DP(NETIF_MSG_LINK, "capid %d:%x\n", capid, *cap);
2134 return rval;
2135 }
2136
2137 static u8 bnx2x_dcbnl_get_numtcs(struct net_device *netdev, int tcid, u8 *num)
2138 {
2139 struct bnx2x *bp = netdev_priv(netdev);
2140 u8 rval = 0;
2141
2142 DP(NETIF_MSG_LINK, "tcid %d\n", tcid);
2143
2144 if (bp->dcb_state) {
2145 switch (tcid) {
2146 case DCB_NUMTCS_ATTR_PG:
2147 *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 :
2148 DCBX_COS_MAX_NUM_E2;
2149 break;
2150 case DCB_NUMTCS_ATTR_PFC:
2151 *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 :
2152 DCBX_COS_MAX_NUM_E2;
2153 break;
2154 default:
2155 rval = -EINVAL;
2156 break;
2157 }
2158 } else
2159 rval = -EINVAL;
2160
2161 return rval;
2162 }
2163
2164 static u8 bnx2x_dcbnl_set_numtcs(struct net_device *netdev, int tcid, u8 num)
2165 {
2166 struct bnx2x *bp = netdev_priv(netdev);
2167 DP(NETIF_MSG_LINK, "num tcs = %d; Not supported\n", num);
2168 return -EINVAL;
2169 }
2170
2171 static u8 bnx2x_dcbnl_get_pfc_state(struct net_device *netdev)
2172 {
2173 struct bnx2x *bp = netdev_priv(netdev);
2174 DP(NETIF_MSG_LINK, "state = %d\n", bp->dcbx_local_feat.pfc.enabled);
2175
2176 if (!bp->dcb_state)
2177 return 0;
2178
2179 return bp->dcbx_local_feat.pfc.enabled;
2180 }
2181
2182 static void bnx2x_dcbnl_set_pfc_state(struct net_device *netdev, u8 state)
2183 {
2184 struct bnx2x *bp = netdev_priv(netdev);
2185 DP(NETIF_MSG_LINK, "state = %s\n", state ? "on" : "off");
2186
2187 if (!bnx2x_dcbnl_set_valid(bp))
2188 return;
2189
2190 bp->dcbx_config_params.admin_pfc_tx_enable =
2191 bp->dcbx_config_params.admin_pfc_enable = (state ? 1 : 0);
2192 }
2193
2194 static void bnx2x_admin_app_set_ent(
2195 struct bnx2x_admin_priority_app_table *app_ent,
2196 u8 idtype, u16 idval, u8 up)
2197 {
2198 app_ent->valid = 1;
2199
2200 switch (idtype) {
2201 case DCB_APP_IDTYPE_ETHTYPE:
2202 app_ent->traffic_type = TRAFFIC_TYPE_ETH;
2203 break;
2204 case DCB_APP_IDTYPE_PORTNUM:
2205 app_ent->traffic_type = TRAFFIC_TYPE_PORT;
2206 break;
2207 default:
2208 break; /* never gets here */
2209 }
2210 app_ent->app_id = idval;
2211 app_ent->priority = up;
2212 }
2213
2214 static bool bnx2x_admin_app_is_equal(
2215 struct bnx2x_admin_priority_app_table *app_ent,
2216 u8 idtype, u16 idval)
2217 {
2218 if (!app_ent->valid)
2219 return false;
2220
2221 switch (idtype) {
2222 case DCB_APP_IDTYPE_ETHTYPE:
2223 if (app_ent->traffic_type != TRAFFIC_TYPE_ETH)
2224 return false;
2225 break;
2226 case DCB_APP_IDTYPE_PORTNUM:
2227 if (app_ent->traffic_type != TRAFFIC_TYPE_PORT)
2228 return false;
2229 break;
2230 default:
2231 return false;
2232 }
2233 if (app_ent->app_id != idval)
2234 return false;
2235
2236 return true;
2237 }
2238
2239 static int bnx2x_set_admin_app_up(struct bnx2x *bp, u8 idtype, u16 idval, u8 up)
2240 {
2241 int i, ff;
2242
2243 /* iterate over the app entries looking for idtype and idval */
2244 for (i = 0, ff = -1; i < 4; i++) {
2245 struct bnx2x_admin_priority_app_table *app_ent =
2246 &bp->dcbx_config_params.admin_priority_app_table[i];
2247 if (bnx2x_admin_app_is_equal(app_ent, idtype, idval))
2248 break;
2249
2250 if (ff < 0 && !app_ent->valid)
2251 ff = i;
2252 }
2253 if (i < 4)
2254 /* if found overwrite up */
2255 bp->dcbx_config_params.
2256 admin_priority_app_table[i].priority = up;
2257 else if (ff >= 0)
2258 /* not found use first-free */
2259 bnx2x_admin_app_set_ent(
2260 &bp->dcbx_config_params.admin_priority_app_table[ff],
2261 idtype, idval, up);
2262 else
2263 /* app table is full */
2264 return -EBUSY;
2265
2266 /* up configured, if not 0 make sure feature is enabled */
2267 if (up)
2268 bp->dcbx_config_params.admin_application_priority_tx_enable = 1;
2269
2270 return 0;
2271 }
2272
2273 static u8 bnx2x_dcbnl_set_app_up(struct net_device *netdev, u8 idtype,
2274 u16 idval, u8 up)
2275 {
2276 struct bnx2x *bp = netdev_priv(netdev);
2277
2278 DP(NETIF_MSG_LINK, "app_type %d, app_id %x, prio bitmap %d\n",
2279 idtype, idval, up);
2280
2281 if (!bnx2x_dcbnl_set_valid(bp))
2282 return -EINVAL;
2283
2284 /* verify idtype */
2285 switch (idtype) {
2286 case DCB_APP_IDTYPE_ETHTYPE:
2287 case DCB_APP_IDTYPE_PORTNUM:
2288 break;
2289 default:
2290 return -EINVAL;
2291 }
2292 return bnx2x_set_admin_app_up(bp, idtype, idval, up);
2293 }
2294
2295 static u8 bnx2x_dcbnl_get_dcbx(struct net_device *netdev)
2296 {
2297 struct bnx2x *bp = netdev_priv(netdev);
2298 u8 state;
2299
2300 state = DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE;
2301
2302 if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF)
2303 state |= DCB_CAP_DCBX_STATIC;
2304
2305 return state;
2306 }
2307
2308 static u8 bnx2x_dcbnl_set_dcbx(struct net_device *netdev, u8 state)
2309 {
2310 struct bnx2x *bp = netdev_priv(netdev);
2311 DP(NETIF_MSG_LINK, "state = %02x\n", state);
2312
2313 /* set dcbx mode */
2314
2315 if ((state & BNX2X_DCBX_CAPS) != state) {
2316 BNX2X_ERR("Requested DCBX mode %x is beyond advertised "
2317 "capabilities\n", state);
2318 return 1;
2319 }
2320
2321 if (bp->dcb_state != BNX2X_DCB_STATE_ON) {
2322 BNX2X_ERR("DCB turned off, DCBX configuration is invalid\n");
2323 return 1;
2324 }
2325
2326 if (state & DCB_CAP_DCBX_STATIC)
2327 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_OFF;
2328 else
2329 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_ON;
2330
2331 bp->dcbx_mode_uset = true;
2332 return 0;
2333 }
2334
2335 static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid,
2336 u8 *flags)
2337 {
2338 struct bnx2x *bp = netdev_priv(netdev);
2339 u8 rval = 0;
2340
2341 DP(NETIF_MSG_LINK, "featid %d\n", featid);
2342
2343 if (bp->dcb_state) {
2344 *flags = 0;
2345 switch (featid) {
2346 case DCB_FEATCFG_ATTR_PG:
2347 if (bp->dcbx_local_feat.ets.enabled)
2348 *flags |= DCB_FEATCFG_ENABLE;
2349 if (bp->dcbx_error & DCBX_LOCAL_ETS_ERROR)
2350 *flags |= DCB_FEATCFG_ERROR;
2351 break;
2352 case DCB_FEATCFG_ATTR_PFC:
2353 if (bp->dcbx_local_feat.pfc.enabled)
2354 *flags |= DCB_FEATCFG_ENABLE;
2355 if (bp->dcbx_error & (DCBX_LOCAL_PFC_ERROR |
2356 DCBX_LOCAL_PFC_MISMATCH))
2357 *flags |= DCB_FEATCFG_ERROR;
2358 break;
2359 case DCB_FEATCFG_ATTR_APP:
2360 if (bp->dcbx_local_feat.app.enabled)
2361 *flags |= DCB_FEATCFG_ENABLE;
2362 if (bp->dcbx_error & (DCBX_LOCAL_APP_ERROR |
2363 DCBX_LOCAL_APP_MISMATCH))
2364 *flags |= DCB_FEATCFG_ERROR;
2365 break;
2366 default:
2367 rval = -EINVAL;
2368 break;
2369 }
2370 } else
2371 rval = -EINVAL;
2372
2373 return rval;
2374 }
2375
2376 static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid,
2377 u8 flags)
2378 {
2379 struct bnx2x *bp = netdev_priv(netdev);
2380 u8 rval = 0;
2381
2382 DP(NETIF_MSG_LINK, "featid = %d flags = %02x\n", featid, flags);
2383
2384 /* ignore the 'advertise' flag */
2385 if (bnx2x_dcbnl_set_valid(bp)) {
2386 switch (featid) {
2387 case DCB_FEATCFG_ATTR_PG:
2388 bp->dcbx_config_params.admin_ets_enable =
2389 flags & DCB_FEATCFG_ENABLE ? 1 : 0;
2390 bp->dcbx_config_params.admin_ets_willing =
2391 flags & DCB_FEATCFG_WILLING ? 1 : 0;
2392 break;
2393 case DCB_FEATCFG_ATTR_PFC:
2394 bp->dcbx_config_params.admin_pfc_enable =
2395 flags & DCB_FEATCFG_ENABLE ? 1 : 0;
2396 bp->dcbx_config_params.admin_pfc_willing =
2397 flags & DCB_FEATCFG_WILLING ? 1 : 0;
2398 break;
2399 case DCB_FEATCFG_ATTR_APP:
2400 /* ignore enable, always enabled */
2401 bp->dcbx_config_params.admin_app_priority_willing =
2402 flags & DCB_FEATCFG_WILLING ? 1 : 0;
2403 break;
2404 default:
2405 rval = -EINVAL;
2406 break;
2407 }
2408 } else
2409 rval = -EINVAL;
2410
2411 return rval;
2412 }
2413
2414 static int bnx2x_peer_appinfo(struct net_device *netdev,
2415 struct dcb_peer_app_info *info, u16* app_count)
2416 {
2417 int i;
2418 struct bnx2x *bp = netdev_priv(netdev);
2419
2420 DP(NETIF_MSG_LINK, "APP-INFO\n");
2421
2422 info->willing = (bp->dcbx_remote_flags & DCBX_APP_REM_WILLING) ?: 0;
2423 info->error = (bp->dcbx_remote_flags & DCBX_APP_RX_ERROR) ?: 0;
2424 *app_count = 0;
2425
2426 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++)
2427 if (bp->dcbx_remote_feat.app.app_pri_tbl[i].appBitfield &
2428 DCBX_APP_ENTRY_VALID)
2429 (*app_count)++;
2430 return 0;
2431 }
2432
2433 static int bnx2x_peer_apptable(struct net_device *netdev,
2434 struct dcb_app *table)
2435 {
2436 int i, j;
2437 struct bnx2x *bp = netdev_priv(netdev);
2438
2439 DP(NETIF_MSG_LINK, "APP-TABLE\n");
2440
2441 for (i = 0, j = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
2442 struct dcbx_app_priority_entry *ent =
2443 &bp->dcbx_remote_feat.app.app_pri_tbl[i];
2444
2445 if (ent->appBitfield & DCBX_APP_ENTRY_VALID) {
2446 table[j].selector = bnx2x_dcbx_dcbnl_app_idtype(ent);
2447 table[j].priority = bnx2x_dcbx_dcbnl_app_up(ent);
2448 table[j++].protocol = ent->app_id;
2449 }
2450 }
2451 return 0;
2452 }
2453
2454 static int bnx2x_cee_peer_getpg(struct net_device *netdev, struct cee_pg *pg)
2455 {
2456 int i;
2457 struct bnx2x *bp = netdev_priv(netdev);
2458
2459 pg->willing = (bp->dcbx_remote_flags & DCBX_ETS_REM_WILLING) ?: 0;
2460
2461 for (i = 0; i < CEE_DCBX_MAX_PGS; i++) {
2462 pg->pg_bw[i] =
2463 DCBX_PG_BW_GET(bp->dcbx_remote_feat.ets.pg_bw_tbl, i);
2464 pg->prio_pg[i] =
2465 DCBX_PRI_PG_GET(bp->dcbx_remote_feat.ets.pri_pg_tbl, i);
2466 }
2467 return 0;
2468 }
2469
2470 static int bnx2x_cee_peer_getpfc(struct net_device *netdev,
2471 struct cee_pfc *pfc)
2472 {
2473 struct bnx2x *bp = netdev_priv(netdev);
2474 pfc->tcs_supported = bp->dcbx_remote_feat.pfc.pfc_caps;
2475 pfc->pfc_en = bp->dcbx_remote_feat.pfc.pri_en_bitmap;
2476 return 0;
2477 }
2478
2479 const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops = {
2480 .getstate = bnx2x_dcbnl_get_state,
2481 .setstate = bnx2x_dcbnl_set_state,
2482 .getpermhwaddr = bnx2x_dcbnl_get_perm_hw_addr,
2483 .setpgtccfgtx = bnx2x_dcbnl_set_pg_tccfg_tx,
2484 .setpgbwgcfgtx = bnx2x_dcbnl_set_pg_bwgcfg_tx,
2485 .setpgtccfgrx = bnx2x_dcbnl_set_pg_tccfg_rx,
2486 .setpgbwgcfgrx = bnx2x_dcbnl_set_pg_bwgcfg_rx,
2487 .getpgtccfgtx = bnx2x_dcbnl_get_pg_tccfg_tx,
2488 .getpgbwgcfgtx = bnx2x_dcbnl_get_pg_bwgcfg_tx,
2489 .getpgtccfgrx = bnx2x_dcbnl_get_pg_tccfg_rx,
2490 .getpgbwgcfgrx = bnx2x_dcbnl_get_pg_bwgcfg_rx,
2491 .setpfccfg = bnx2x_dcbnl_set_pfc_cfg,
2492 .getpfccfg = bnx2x_dcbnl_get_pfc_cfg,
2493 .setall = bnx2x_dcbnl_set_all,
2494 .getcap = bnx2x_dcbnl_get_cap,
2495 .getnumtcs = bnx2x_dcbnl_get_numtcs,
2496 .setnumtcs = bnx2x_dcbnl_set_numtcs,
2497 .getpfcstate = bnx2x_dcbnl_get_pfc_state,
2498 .setpfcstate = bnx2x_dcbnl_set_pfc_state,
2499 .setapp = bnx2x_dcbnl_set_app_up,
2500 .getdcbx = bnx2x_dcbnl_get_dcbx,
2501 .setdcbx = bnx2x_dcbnl_set_dcbx,
2502 .getfeatcfg = bnx2x_dcbnl_get_featcfg,
2503 .setfeatcfg = bnx2x_dcbnl_set_featcfg,
2504 .peer_getappinfo = bnx2x_peer_appinfo,
2505 .peer_getapptable = bnx2x_peer_apptable,
2506 .cee_peer_getpg = bnx2x_cee_peer_getpg,
2507 .cee_peer_getpfc = bnx2x_cee_peer_getpfc,
2508 };
2509
2510 #endif /* BCM_DCBNL */
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree