2 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
3 * Copyright (C) 2010, Paul Cercueil <paul@crapouillou.net>
4 * JZ4740 SoC RTC driver
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
11 * You should have received a copy of the GNU General Public License along
12 * with this program; if not, write to the Free Software Foundation, Inc.,
13 * 675 Mass Ave, Cambridge, MA 02139, USA.
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/rtc.h>
21 #include <linux/slab.h>
22 #include <linux/spinlock.h>
24 #define JZ_REG_RTC_CTRL 0x00
25 #define JZ_REG_RTC_SEC 0x04
26 #define JZ_REG_RTC_SEC_ALARM 0x08
27 #define JZ_REG_RTC_REGULATOR 0x0C
28 #define JZ_REG_RTC_HIBERNATE 0x20
29 #define JZ_REG_RTC_SCRATCHPAD 0x34
31 #define JZ_RTC_CTRL_WRDY BIT(7)
32 #define JZ_RTC_CTRL_1HZ BIT(6)
33 #define JZ_RTC_CTRL_1HZ_IRQ BIT(5)
34 #define JZ_RTC_CTRL_AF BIT(4)
35 #define JZ_RTC_CTRL_AF_IRQ BIT(3)
36 #define JZ_RTC_CTRL_AE BIT(2)
37 #define JZ_RTC_CTRL_ENABLE BIT(0)
43 struct rtc_device
*rtc
;
50 static inline uint32_t jz4740_rtc_reg_read(struct jz4740_rtc
*rtc
, size_t reg
)
52 return readl(rtc
->base
+ reg
);
55 static int jz4740_rtc_wait_write_ready(struct jz4740_rtc
*rtc
)
61 ctrl
= jz4740_rtc_reg_read(rtc
, JZ_REG_RTC_CTRL
);
62 } while (!(ctrl
& JZ_RTC_CTRL_WRDY
) && --timeout
);
64 return timeout
? 0 : -EIO
;
67 static inline int jz4740_rtc_reg_write(struct jz4740_rtc
*rtc
, size_t reg
,
71 ret
= jz4740_rtc_wait_write_ready(rtc
);
73 writel(val
, rtc
->base
+ reg
);
78 static int jz4740_rtc_ctrl_set_bits(struct jz4740_rtc
*rtc
, uint32_t mask
,
85 spin_lock_irqsave(&rtc
->lock
, flags
);
87 ctrl
= jz4740_rtc_reg_read(rtc
, JZ_REG_RTC_CTRL
);
89 /* Don't clear interrupt flags by accident */
90 ctrl
|= JZ_RTC_CTRL_1HZ
| JZ_RTC_CTRL_AF
;
97 ret
= jz4740_rtc_reg_write(rtc
, JZ_REG_RTC_CTRL
, ctrl
);
99 spin_unlock_irqrestore(&rtc
->lock
, flags
);
104 static int jz4740_rtc_read_time(struct device
*dev
, struct rtc_time
*time
)
106 struct jz4740_rtc
*rtc
= dev_get_drvdata(dev
);
107 uint32_t secs
, secs2
;
110 /* If the seconds register is read while it is updated, it can contain a
111 * bogus value. This can be avoided by making sure that two consecutive
112 * reads have the same value.
114 secs
= jz4740_rtc_reg_read(rtc
, JZ_REG_RTC_SEC
);
115 secs2
= jz4740_rtc_reg_read(rtc
, JZ_REG_RTC_SEC
);
117 while (secs
!= secs2
&& --timeout
) {
119 secs2
= jz4740_rtc_reg_read(rtc
, JZ_REG_RTC_SEC
);
125 rtc_time_to_tm(secs
, time
);
127 return rtc_valid_tm(time
);
130 static int jz4740_rtc_set_mmss(struct device
*dev
, unsigned long secs
)
132 struct jz4740_rtc
*rtc
= dev_get_drvdata(dev
);
134 return jz4740_rtc_reg_write(rtc
, JZ_REG_RTC_SEC
, secs
);
137 static int jz4740_rtc_read_alarm(struct device
*dev
, struct rtc_wkalrm
*alrm
)
139 struct jz4740_rtc
*rtc
= dev_get_drvdata(dev
);
143 secs
= jz4740_rtc_reg_read(rtc
, JZ_REG_RTC_SEC_ALARM
);
145 ctrl
= jz4740_rtc_reg_read(rtc
, JZ_REG_RTC_CTRL
);
147 alrm
->enabled
= !!(ctrl
& JZ_RTC_CTRL_AE
);
148 alrm
->pending
= !!(ctrl
& JZ_RTC_CTRL_AF
);
150 rtc_time_to_tm(secs
, &alrm
->time
);
152 return rtc_valid_tm(&alrm
->time
);
155 static int jz4740_rtc_set_alarm(struct device
*dev
, struct rtc_wkalrm
*alrm
)
158 struct jz4740_rtc
*rtc
= dev_get_drvdata(dev
);
161 rtc_tm_to_time(&alrm
->time
, &secs
);
163 ret
= jz4740_rtc_reg_write(rtc
, JZ_REG_RTC_SEC_ALARM
, secs
);
165 ret
= jz4740_rtc_ctrl_set_bits(rtc
,
166 JZ_RTC_CTRL_AE
| JZ_RTC_CTRL_AF_IRQ
, alrm
->enabled
);
171 static int jz4740_rtc_update_irq_enable(struct device
*dev
, unsigned int enable
)
173 struct jz4740_rtc
*rtc
= dev_get_drvdata(dev
);
174 return jz4740_rtc_ctrl_set_bits(rtc
, JZ_RTC_CTRL_1HZ_IRQ
, enable
);
177 static int jz4740_rtc_alarm_irq_enable(struct device
*dev
, unsigned int enable
)
179 struct jz4740_rtc
*rtc
= dev_get_drvdata(dev
);
180 return jz4740_rtc_ctrl_set_bits(rtc
, JZ_RTC_CTRL_AF_IRQ
, enable
);
183 static struct rtc_class_ops jz4740_rtc_ops
= {
184 .read_time
= jz4740_rtc_read_time
,
185 .set_mmss
= jz4740_rtc_set_mmss
,
186 .read_alarm
= jz4740_rtc_read_alarm
,
187 .set_alarm
= jz4740_rtc_set_alarm
,
188 .update_irq_enable
= jz4740_rtc_update_irq_enable
,
189 .alarm_irq_enable
= jz4740_rtc_alarm_irq_enable
,
192 static irqreturn_t
jz4740_rtc_irq(int irq
, void *data
)
194 struct jz4740_rtc
*rtc
= data
;
196 unsigned long events
= 0;
198 ctrl
= jz4740_rtc_reg_read(rtc
, JZ_REG_RTC_CTRL
);
200 if (ctrl
& JZ_RTC_CTRL_1HZ
)
201 events
|= (RTC_UF
| RTC_IRQF
);
203 if (ctrl
& JZ_RTC_CTRL_AF
)
204 events
|= (RTC_AF
| RTC_IRQF
);
206 rtc_update_irq(rtc
->rtc
, 1, events
);
208 jz4740_rtc_ctrl_set_bits(rtc
, JZ_RTC_CTRL_1HZ
| JZ_RTC_CTRL_AF
, false);
213 void jz4740_rtc_poweroff(struct device
*dev
)
215 struct jz4740_rtc
*rtc
= dev_get_drvdata(dev
);
216 jz4740_rtc_reg_write(rtc
, JZ_REG_RTC_HIBERNATE
, 1);
218 EXPORT_SYMBOL_GPL(jz4740_rtc_poweroff
);
220 static int __devinit
jz4740_rtc_probe(struct platform_device
*pdev
)
223 struct jz4740_rtc
*rtc
;
226 rtc
= kzalloc(sizeof(*rtc
), GFP_KERNEL
);
230 rtc
->irq
= platform_get_irq(pdev
, 0);
233 dev_err(&pdev
->dev
, "Failed to get platform irq\n");
237 rtc
->mem
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
240 dev_err(&pdev
->dev
, "Failed to get platform mmio memory\n");
244 rtc
->mem
= request_mem_region(rtc
->mem
->start
, resource_size(rtc
->mem
),
248 dev_err(&pdev
->dev
, "Failed to request mmio memory region\n");
252 rtc
->base
= ioremap_nocache(rtc
->mem
->start
, resource_size(rtc
->mem
));
255 dev_err(&pdev
->dev
, "Failed to ioremap mmio memory\n");
256 goto err_release_mem_region
;
259 spin_lock_init(&rtc
->lock
);
261 platform_set_drvdata(pdev
, rtc
);
263 device_init_wakeup(&pdev
->dev
, 1);
265 rtc
->rtc
= rtc_device_register(pdev
->name
, &pdev
->dev
, &jz4740_rtc_ops
,
267 if (IS_ERR(rtc
->rtc
)) {
268 ret
= PTR_ERR(rtc
->rtc
);
269 dev_err(&pdev
->dev
, "Failed to register rtc device: %d\n", ret
);
273 ret
= request_irq(rtc
->irq
, jz4740_rtc_irq
, 0,
276 dev_err(&pdev
->dev
, "Failed to request rtc irq: %d\n", ret
);
277 goto err_unregister_rtc
;
280 scratchpad
= jz4740_rtc_reg_read(rtc
, JZ_REG_RTC_SCRATCHPAD
);
281 if (scratchpad
!= 0x12345678) {
282 ret
= jz4740_rtc_reg_write(rtc
, JZ_REG_RTC_SCRATCHPAD
, 0x12345678);
283 ret
= jz4740_rtc_reg_write(rtc
, JZ_REG_RTC_SEC
, 0);
285 dev_err(&pdev
->dev
, "Could not write write to RTC registers\n");
293 free_irq(rtc
->irq
, rtc
);
295 rtc_device_unregister(rtc
->rtc
);
297 platform_set_drvdata(pdev
, NULL
);
299 err_release_mem_region
:
300 release_mem_region(rtc
->mem
->start
, resource_size(rtc
->mem
));
307 static int __devexit
jz4740_rtc_remove(struct platform_device
*pdev
)
309 struct jz4740_rtc
*rtc
= platform_get_drvdata(pdev
);
311 free_irq(rtc
->irq
, rtc
);
313 rtc_device_unregister(rtc
->rtc
);
316 release_mem_region(rtc
->mem
->start
, resource_size(rtc
->mem
));
320 platform_set_drvdata(pdev
, NULL
);
327 static int jz4740_rtc_suspend(struct device
*dev
)
329 struct jz4740_rtc
*rtc
= dev_get_drvdata(dev
);
331 if (device_may_wakeup(dev
))
332 enable_irq_wake(rtc
->irq
);
336 static int jz4740_rtc_resume(struct device
*dev
)
338 struct jz4740_rtc
*rtc
= dev_get_drvdata(dev
);
340 if (device_may_wakeup(dev
))
341 disable_irq_wake(rtc
->irq
);
345 static const struct dev_pm_ops jz4740_pm_ops
= {
346 .suspend
= jz4740_rtc_suspend
,
347 .resume
= jz4740_rtc_resume
,
349 #define JZ4740_RTC_PM_OPS (&jz4740_pm_ops)
352 #define JZ4740_RTC_PM_OPS NULL
353 #endif /* CONFIG_PM */
355 struct platform_driver jz4740_rtc_driver
= {
356 .probe
= jz4740_rtc_probe
,
357 .remove
= __devexit_p(jz4740_rtc_remove
),
359 .name
= "jz4740-rtc",
360 .owner
= THIS_MODULE
,
361 .pm
= JZ4740_RTC_PM_OPS
,
365 static int __init
jz4740_rtc_init(void)
367 return platform_driver_register(&jz4740_rtc_driver
);
369 module_init(jz4740_rtc_init
);
371 static void __exit
jz4740_rtc_exit(void)
373 platform_driver_unregister(&jz4740_rtc_driver
);
375 module_exit(jz4740_rtc_exit
);
377 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
378 MODULE_LICENSE("GPL");
379 MODULE_DESCRIPTION("RTC driver for the JZ4740 SoC\n");
380 MODULE_ALIAS("platform:jz4740-rtc");