m68k: ptrace fixes
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / rtc / rtc-cmos.c
blobf7a4701bf863695d567340451f4b98a13ce6e14b
1 /*
2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
5 * Copyright (C) 2006 David Brownell (convert to new framework)
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
15 * That defined the register interface now provided by all PCs, some
16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
17 * integrate an MC146818 clone in their southbridge, and boards use
18 * that instead of discrete clones like the DS12887 or M48T86. There
19 * are also clones that connect using the LPC bus.
21 * That register API is also used directly by various other drivers
22 * (notably for integrated NVRAM), infrastructure (x86 has code to
23 * bypass the RTC framework, directly reading the RTC during boot
24 * and updating minutes/seconds for systems using NTP synch) and
25 * utilities (like userspace 'hwclock', if no /dev node exists).
27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
28 * interrupts disabled, holding the global rtc_lock, to exclude those
29 * other drivers and utilities on correctly configured systems.
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/interrupt.h>
35 #include <linux/spinlock.h>
36 #include <linux/platform_device.h>
37 #include <linux/mod_devicetable.h>
38 #include <linux/log2.h>
40 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
41 #include <asm-generic/rtc.h>
43 struct cmos_rtc {
44 struct rtc_device *rtc;
45 struct device *dev;
46 int irq;
47 struct resource *iomem;
49 void (*wake_on)(struct device *);
50 void (*wake_off)(struct device *);
52 u8 enabled_wake;
53 u8 suspend_ctrl;
55 /* newer hardware extends the original register set */
56 u8 day_alrm;
57 u8 mon_alrm;
58 u8 century;
61 /* both platform and pnp busses use negative numbers for invalid irqs */
62 #define is_valid_irq(n) ((n) > 0)
64 static const char driver_name[] = "rtc_cmos";
66 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
67 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
68 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
70 #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
72 static inline int is_intr(u8 rtc_intr)
74 if (!(rtc_intr & RTC_IRQF))
75 return 0;
76 return rtc_intr & RTC_IRQMASK;
79 /*----------------------------------------------------------------*/
81 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
82 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
83 * used in a broken "legacy replacement" mode. The breakage includes
84 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
85 * other (better) use.
87 * When that broken mode is in use, platform glue provides a partial
88 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
89 * want to use HPET for anything except those IRQs though...
91 #ifdef CONFIG_HPET_EMULATE_RTC
92 #include <asm/hpet.h>
93 #else
95 static inline int is_hpet_enabled(void)
97 return 0;
100 static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
102 return 0;
105 static inline int hpet_set_rtc_irq_bit(unsigned long mask)
107 return 0;
110 static inline int
111 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
113 return 0;
116 static inline int hpet_set_periodic_freq(unsigned long freq)
118 return 0;
121 static inline int hpet_rtc_dropped_irq(void)
123 return 0;
126 static inline int hpet_rtc_timer_init(void)
128 return 0;
131 extern irq_handler_t hpet_rtc_interrupt;
133 static inline int hpet_register_irq_handler(irq_handler_t handler)
135 return 0;
138 static inline int hpet_unregister_irq_handler(irq_handler_t handler)
140 return 0;
143 #endif
145 /*----------------------------------------------------------------*/
147 #ifdef RTC_PORT
149 /* Most newer x86 systems have two register banks, the first used
150 * for RTC and NVRAM and the second only for NVRAM. Caller must
151 * own rtc_lock ... and we won't worry about access during NMI.
153 #define can_bank2 true
155 static inline unsigned char cmos_read_bank2(unsigned char addr)
157 outb(addr, RTC_PORT(2));
158 return inb(RTC_PORT(3));
161 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
163 outb(addr, RTC_PORT(2));
164 outb(val, RTC_PORT(2));
167 #else
169 #define can_bank2 false
171 static inline unsigned char cmos_read_bank2(unsigned char addr)
173 return 0;
176 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
180 #endif
182 /*----------------------------------------------------------------*/
184 static int cmos_read_time(struct device *dev, struct rtc_time *t)
186 /* REVISIT: if the clock has a "century" register, use
187 * that instead of the heuristic in get_rtc_time().
188 * That'll make Y3K compatility (year > 2070) easy!
190 get_rtc_time(t);
191 return 0;
194 static int cmos_set_time(struct device *dev, struct rtc_time *t)
196 /* REVISIT: set the "century" register if available
198 * NOTE: this ignores the issue whereby updating the seconds
199 * takes effect exactly 500ms after we write the register.
200 * (Also queueing and other delays before we get this far.)
202 return set_rtc_time(t);
205 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
207 struct cmos_rtc *cmos = dev_get_drvdata(dev);
208 unsigned char rtc_control;
210 if (!is_valid_irq(cmos->irq))
211 return -EIO;
213 /* Basic alarms only support hour, minute, and seconds fields.
214 * Some also support day and month, for alarms up to a year in
215 * the future.
217 t->time.tm_mday = -1;
218 t->time.tm_mon = -1;
220 spin_lock_irq(&rtc_lock);
221 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
222 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
223 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
225 if (cmos->day_alrm) {
226 /* ignore upper bits on readback per ACPI spec */
227 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
228 if (!t->time.tm_mday)
229 t->time.tm_mday = -1;
231 if (cmos->mon_alrm) {
232 t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
233 if (!t->time.tm_mon)
234 t->time.tm_mon = -1;
238 rtc_control = CMOS_READ(RTC_CONTROL);
239 spin_unlock_irq(&rtc_lock);
241 /* REVISIT this assumes PC style usage: always BCD */
243 if (((unsigned)t->time.tm_sec) < 0x60)
244 t->time.tm_sec = bcd2bin(t->time.tm_sec);
245 else
246 t->time.tm_sec = -1;
247 if (((unsigned)t->time.tm_min) < 0x60)
248 t->time.tm_min = bcd2bin(t->time.tm_min);
249 else
250 t->time.tm_min = -1;
251 if (((unsigned)t->time.tm_hour) < 0x24)
252 t->time.tm_hour = bcd2bin(t->time.tm_hour);
253 else
254 t->time.tm_hour = -1;
256 if (cmos->day_alrm) {
257 if (((unsigned)t->time.tm_mday) <= 0x31)
258 t->time.tm_mday = bcd2bin(t->time.tm_mday);
259 else
260 t->time.tm_mday = -1;
261 if (cmos->mon_alrm) {
262 if (((unsigned)t->time.tm_mon) <= 0x12)
263 t->time.tm_mon = bcd2bin(t->time.tm_mon) - 1;
264 else
265 t->time.tm_mon = -1;
268 t->time.tm_year = -1;
270 t->enabled = !!(rtc_control & RTC_AIE);
271 t->pending = 0;
273 return 0;
276 static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
278 unsigned char rtc_intr;
280 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
281 * allegedly some older rtcs need that to handle irqs properly
283 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
285 if (is_hpet_enabled())
286 return;
288 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
289 if (is_intr(rtc_intr))
290 rtc_update_irq(cmos->rtc, 1, rtc_intr);
293 static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
295 unsigned char rtc_control;
297 /* flush any pending IRQ status, notably for update irqs,
298 * before we enable new IRQs
300 rtc_control = CMOS_READ(RTC_CONTROL);
301 cmos_checkintr(cmos, rtc_control);
303 rtc_control |= mask;
304 CMOS_WRITE(rtc_control, RTC_CONTROL);
305 hpet_set_rtc_irq_bit(mask);
307 cmos_checkintr(cmos, rtc_control);
310 static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
312 unsigned char rtc_control;
314 rtc_control = CMOS_READ(RTC_CONTROL);
315 rtc_control &= ~mask;
316 CMOS_WRITE(rtc_control, RTC_CONTROL);
317 hpet_mask_rtc_irq_bit(mask);
319 cmos_checkintr(cmos, rtc_control);
322 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
324 struct cmos_rtc *cmos = dev_get_drvdata(dev);
325 unsigned char mon, mday, hrs, min, sec;
327 if (!is_valid_irq(cmos->irq))
328 return -EIO;
330 /* REVISIT this assumes PC style usage: always BCD */
332 /* Writing 0xff means "don't care" or "match all". */
334 mon = t->time.tm_mon + 1;
335 mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
337 mday = t->time.tm_mday;
338 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
340 hrs = t->time.tm_hour;
341 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
343 min = t->time.tm_min;
344 min = (min < 60) ? bin2bcd(min) : 0xff;
346 sec = t->time.tm_sec;
347 sec = (sec < 60) ? bin2bcd(sec) : 0xff;
349 spin_lock_irq(&rtc_lock);
351 /* next rtc irq must not be from previous alarm setting */
352 cmos_irq_disable(cmos, RTC_AIE);
354 /* update alarm */
355 CMOS_WRITE(hrs, RTC_HOURS_ALARM);
356 CMOS_WRITE(min, RTC_MINUTES_ALARM);
357 CMOS_WRITE(sec, RTC_SECONDS_ALARM);
359 /* the system may support an "enhanced" alarm */
360 if (cmos->day_alrm) {
361 CMOS_WRITE(mday, cmos->day_alrm);
362 if (cmos->mon_alrm)
363 CMOS_WRITE(mon, cmos->mon_alrm);
366 /* FIXME the HPET alarm glue currently ignores day_alrm
367 * and mon_alrm ...
369 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
371 if (t->enabled)
372 cmos_irq_enable(cmos, RTC_AIE);
374 spin_unlock_irq(&rtc_lock);
376 return 0;
379 static int cmos_irq_set_freq(struct device *dev, int freq)
381 struct cmos_rtc *cmos = dev_get_drvdata(dev);
382 int f;
383 unsigned long flags;
385 if (!is_valid_irq(cmos->irq))
386 return -ENXIO;
388 if (!is_power_of_2(freq))
389 return -EINVAL;
390 /* 0 = no irqs; 1 = 2^15 Hz ... 15 = 2^0 Hz */
391 f = ffs(freq);
392 if (f-- > 16)
393 return -EINVAL;
394 f = 16 - f;
396 spin_lock_irqsave(&rtc_lock, flags);
397 hpet_set_periodic_freq(freq);
398 CMOS_WRITE(RTC_REF_CLCK_32KHZ | f, RTC_FREQ_SELECT);
399 spin_unlock_irqrestore(&rtc_lock, flags);
401 return 0;
404 static int cmos_irq_set_state(struct device *dev, int enabled)
406 struct cmos_rtc *cmos = dev_get_drvdata(dev);
407 unsigned long flags;
409 if (!is_valid_irq(cmos->irq))
410 return -ENXIO;
412 spin_lock_irqsave(&rtc_lock, flags);
414 if (enabled)
415 cmos_irq_enable(cmos, RTC_PIE);
416 else
417 cmos_irq_disable(cmos, RTC_PIE);
419 spin_unlock_irqrestore(&rtc_lock, flags);
420 return 0;
423 #if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE)
425 static int
426 cmos_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
428 struct cmos_rtc *cmos = dev_get_drvdata(dev);
429 unsigned long flags;
431 switch (cmd) {
432 case RTC_AIE_OFF:
433 case RTC_AIE_ON:
434 case RTC_UIE_OFF:
435 case RTC_UIE_ON:
436 if (!is_valid_irq(cmos->irq))
437 return -EINVAL;
438 break;
439 /* PIE ON/OFF is handled by cmos_irq_set_state() */
440 default:
441 return -ENOIOCTLCMD;
444 spin_lock_irqsave(&rtc_lock, flags);
445 switch (cmd) {
446 case RTC_AIE_OFF: /* alarm off */
447 cmos_irq_disable(cmos, RTC_AIE);
448 break;
449 case RTC_AIE_ON: /* alarm on */
450 cmos_irq_enable(cmos, RTC_AIE);
451 break;
452 case RTC_UIE_OFF: /* update off */
453 cmos_irq_disable(cmos, RTC_UIE);
454 break;
455 case RTC_UIE_ON: /* update on */
456 cmos_irq_enable(cmos, RTC_UIE);
457 break;
459 spin_unlock_irqrestore(&rtc_lock, flags);
460 return 0;
463 #else
464 #define cmos_rtc_ioctl NULL
465 #endif
467 #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
469 static int cmos_procfs(struct device *dev, struct seq_file *seq)
471 struct cmos_rtc *cmos = dev_get_drvdata(dev);
472 unsigned char rtc_control, valid;
474 spin_lock_irq(&rtc_lock);
475 rtc_control = CMOS_READ(RTC_CONTROL);
476 valid = CMOS_READ(RTC_VALID);
477 spin_unlock_irq(&rtc_lock);
479 /* NOTE: at least ICH6 reports battery status using a different
480 * (non-RTC) bit; and SQWE is ignored on many current systems.
482 return seq_printf(seq,
483 "periodic_IRQ\t: %s\n"
484 "update_IRQ\t: %s\n"
485 "HPET_emulated\t: %s\n"
486 // "square_wave\t: %s\n"
487 // "BCD\t\t: %s\n"
488 "DST_enable\t: %s\n"
489 "periodic_freq\t: %d\n"
490 "batt_status\t: %s\n",
491 (rtc_control & RTC_PIE) ? "yes" : "no",
492 (rtc_control & RTC_UIE) ? "yes" : "no",
493 is_hpet_enabled() ? "yes" : "no",
494 // (rtc_control & RTC_SQWE) ? "yes" : "no",
495 // (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
496 (rtc_control & RTC_DST_EN) ? "yes" : "no",
497 cmos->rtc->irq_freq,
498 (valid & RTC_VRT) ? "okay" : "dead");
501 #else
502 #define cmos_procfs NULL
503 #endif
505 static const struct rtc_class_ops cmos_rtc_ops = {
506 .ioctl = cmos_rtc_ioctl,
507 .read_time = cmos_read_time,
508 .set_time = cmos_set_time,
509 .read_alarm = cmos_read_alarm,
510 .set_alarm = cmos_set_alarm,
511 .proc = cmos_procfs,
512 .irq_set_freq = cmos_irq_set_freq,
513 .irq_set_state = cmos_irq_set_state,
516 /*----------------------------------------------------------------*/
519 * All these chips have at least 64 bytes of address space, shared by
520 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
521 * by boot firmware. Modern chips have 128 or 256 bytes.
524 #define NVRAM_OFFSET (RTC_REG_D + 1)
526 static ssize_t
527 cmos_nvram_read(struct kobject *kobj, struct bin_attribute *attr,
528 char *buf, loff_t off, size_t count)
530 int retval;
532 if (unlikely(off >= attr->size))
533 return 0;
534 if (unlikely(off < 0))
535 return -EINVAL;
536 if ((off + count) > attr->size)
537 count = attr->size - off;
539 off += NVRAM_OFFSET;
540 spin_lock_irq(&rtc_lock);
541 for (retval = 0; count; count--, off++, retval++) {
542 if (off < 128)
543 *buf++ = CMOS_READ(off);
544 else if (can_bank2)
545 *buf++ = cmos_read_bank2(off);
546 else
547 break;
549 spin_unlock_irq(&rtc_lock);
551 return retval;
554 static ssize_t
555 cmos_nvram_write(struct kobject *kobj, struct bin_attribute *attr,
556 char *buf, loff_t off, size_t count)
558 struct cmos_rtc *cmos;
559 int retval;
561 cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
562 if (unlikely(off >= attr->size))
563 return -EFBIG;
564 if (unlikely(off < 0))
565 return -EINVAL;
566 if ((off + count) > attr->size)
567 count = attr->size - off;
569 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
570 * checksum on part of the NVRAM data. That's currently ignored
571 * here. If userspace is smart enough to know what fields of
572 * NVRAM to update, updating checksums is also part of its job.
574 off += NVRAM_OFFSET;
575 spin_lock_irq(&rtc_lock);
576 for (retval = 0; count; count--, off++, retval++) {
577 /* don't trash RTC registers */
578 if (off == cmos->day_alrm
579 || off == cmos->mon_alrm
580 || off == cmos->century)
581 buf++;
582 else if (off < 128)
583 CMOS_WRITE(*buf++, off);
584 else if (can_bank2)
585 cmos_write_bank2(*buf++, off);
586 else
587 break;
589 spin_unlock_irq(&rtc_lock);
591 return retval;
594 static struct bin_attribute nvram = {
595 .attr = {
596 .name = "nvram",
597 .mode = S_IRUGO | S_IWUSR,
600 .read = cmos_nvram_read,
601 .write = cmos_nvram_write,
602 /* size gets set up later */
605 /*----------------------------------------------------------------*/
607 static struct cmos_rtc cmos_rtc;
609 static irqreturn_t cmos_interrupt(int irq, void *p)
611 u8 irqstat;
612 u8 rtc_control;
614 spin_lock(&rtc_lock);
616 /* When the HPET interrupt handler calls us, the interrupt
617 * status is passed as arg1 instead of the irq number. But
618 * always clear irq status, even when HPET is in the way.
620 * Note that HPET and RTC are almost certainly out of phase,
621 * giving different IRQ status ...
623 irqstat = CMOS_READ(RTC_INTR_FLAGS);
624 rtc_control = CMOS_READ(RTC_CONTROL);
625 if (is_hpet_enabled())
626 irqstat = (unsigned long)irq & 0xF0;
627 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
629 /* All Linux RTC alarms should be treated as if they were oneshot.
630 * Similar code may be needed in system wakeup paths, in case the
631 * alarm woke the system.
633 if (irqstat & RTC_AIE) {
634 rtc_control &= ~RTC_AIE;
635 CMOS_WRITE(rtc_control, RTC_CONTROL);
636 hpet_mask_rtc_irq_bit(RTC_AIE);
638 CMOS_READ(RTC_INTR_FLAGS);
640 spin_unlock(&rtc_lock);
642 if (is_intr(irqstat)) {
643 rtc_update_irq(p, 1, irqstat);
644 return IRQ_HANDLED;
645 } else
646 return IRQ_NONE;
649 #ifdef CONFIG_PNP
650 #define INITSECTION
652 #else
653 #define INITSECTION __init
654 #endif
656 static int INITSECTION
657 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
659 struct cmos_rtc_board_info *info = dev->platform_data;
660 int retval = 0;
661 unsigned char rtc_control;
662 unsigned address_space;
664 /* there can be only one ... */
665 if (cmos_rtc.dev)
666 return -EBUSY;
668 if (!ports)
669 return -ENODEV;
671 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
673 * REVISIT non-x86 systems may instead use memory space resources
674 * (needing ioremap etc), not i/o space resources like this ...
676 ports = request_region(ports->start,
677 ports->end + 1 - ports->start,
678 driver_name);
679 if (!ports) {
680 dev_dbg(dev, "i/o registers already in use\n");
681 return -EBUSY;
684 cmos_rtc.irq = rtc_irq;
685 cmos_rtc.iomem = ports;
687 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
688 * driver did, but don't reject unknown configs. Old hardware
689 * won't address 128 bytes. Newer chips have multiple banks,
690 * though they may not be listed in one I/O resource.
692 #if defined(CONFIG_ATARI)
693 address_space = 64;
694 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) || defined(__sparc__)
695 address_space = 128;
696 #else
697 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
698 address_space = 128;
699 #endif
700 if (can_bank2 && ports->end > (ports->start + 1))
701 address_space = 256;
703 /* For ACPI systems extension info comes from the FADT. On others,
704 * board specific setup provides it as appropriate. Systems where
705 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
706 * some almost-clones) can provide hooks to make that behave.
708 * Note that ACPI doesn't preclude putting these registers into
709 * "extended" areas of the chip, including some that we won't yet
710 * expect CMOS_READ and friends to handle.
712 if (info) {
713 if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
714 cmos_rtc.day_alrm = info->rtc_day_alarm;
715 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
716 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
717 if (info->rtc_century && info->rtc_century < 128)
718 cmos_rtc.century = info->rtc_century;
720 if (info->wake_on && info->wake_off) {
721 cmos_rtc.wake_on = info->wake_on;
722 cmos_rtc.wake_off = info->wake_off;
726 cmos_rtc.rtc = rtc_device_register(driver_name, dev,
727 &cmos_rtc_ops, THIS_MODULE);
728 if (IS_ERR(cmos_rtc.rtc)) {
729 retval = PTR_ERR(cmos_rtc.rtc);
730 goto cleanup0;
733 cmos_rtc.dev = dev;
734 dev_set_drvdata(dev, &cmos_rtc);
735 rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
737 spin_lock_irq(&rtc_lock);
739 /* force periodic irq to CMOS reset default of 1024Hz;
741 * REVISIT it's been reported that at least one x86_64 ALI mobo
742 * doesn't use 32KHz here ... for portability we might need to
743 * do something about other clock frequencies.
745 cmos_rtc.rtc->irq_freq = 1024;
746 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
747 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
749 /* disable irqs */
750 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
752 rtc_control = CMOS_READ(RTC_CONTROL);
754 spin_unlock_irq(&rtc_lock);
756 /* FIXME teach the alarm code how to handle binary mode;
757 * <asm-generic/rtc.h> doesn't know 12-hour mode either.
759 if (is_valid_irq(rtc_irq) &&
760 (!(rtc_control & RTC_24H) || (rtc_control & (RTC_DM_BINARY)))) {
761 dev_dbg(dev, "only 24-hr BCD mode supported\n");
762 retval = -ENXIO;
763 goto cleanup1;
766 if (is_valid_irq(rtc_irq)) {
767 irq_handler_t rtc_cmos_int_handler;
769 if (is_hpet_enabled()) {
770 int err;
772 rtc_cmos_int_handler = hpet_rtc_interrupt;
773 err = hpet_register_irq_handler(cmos_interrupt);
774 if (err != 0) {
775 printk(KERN_WARNING "hpet_register_irq_handler "
776 " failed in rtc_init().");
777 goto cleanup1;
779 } else
780 rtc_cmos_int_handler = cmos_interrupt;
782 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
783 IRQF_DISABLED, dev_name(&cmos_rtc.rtc->dev),
784 cmos_rtc.rtc);
785 if (retval < 0) {
786 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
787 goto cleanup1;
790 hpet_rtc_timer_init();
792 /* export at least the first block of NVRAM */
793 nvram.size = address_space - NVRAM_OFFSET;
794 retval = sysfs_create_bin_file(&dev->kobj, &nvram);
795 if (retval < 0) {
796 dev_dbg(dev, "can't create nvram file? %d\n", retval);
797 goto cleanup2;
800 pr_info("%s: %s%s, %zd bytes nvram%s\n",
801 dev_name(&cmos_rtc.rtc->dev),
802 !is_valid_irq(rtc_irq) ? "no alarms" :
803 cmos_rtc.mon_alrm ? "alarms up to one year" :
804 cmos_rtc.day_alrm ? "alarms up to one month" :
805 "alarms up to one day",
806 cmos_rtc.century ? ", y3k" : "",
807 nvram.size,
808 is_hpet_enabled() ? ", hpet irqs" : "");
810 return 0;
812 cleanup2:
813 if (is_valid_irq(rtc_irq))
814 free_irq(rtc_irq, cmos_rtc.rtc);
815 cleanup1:
816 cmos_rtc.dev = NULL;
817 rtc_device_unregister(cmos_rtc.rtc);
818 cleanup0:
819 release_region(ports->start, ports->end + 1 - ports->start);
820 return retval;
823 static void cmos_do_shutdown(void)
825 spin_lock_irq(&rtc_lock);
826 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
827 spin_unlock_irq(&rtc_lock);
830 static void __exit cmos_do_remove(struct device *dev)
832 struct cmos_rtc *cmos = dev_get_drvdata(dev);
833 struct resource *ports;
835 cmos_do_shutdown();
837 sysfs_remove_bin_file(&dev->kobj, &nvram);
839 if (is_valid_irq(cmos->irq)) {
840 free_irq(cmos->irq, cmos->rtc);
841 hpet_unregister_irq_handler(cmos_interrupt);
844 rtc_device_unregister(cmos->rtc);
845 cmos->rtc = NULL;
847 ports = cmos->iomem;
848 release_region(ports->start, ports->end + 1 - ports->start);
849 cmos->iomem = NULL;
851 cmos->dev = NULL;
852 dev_set_drvdata(dev, NULL);
855 #ifdef CONFIG_PM
857 static int cmos_suspend(struct device *dev, pm_message_t mesg)
859 struct cmos_rtc *cmos = dev_get_drvdata(dev);
860 unsigned char tmp;
862 /* only the alarm might be a wakeup event source */
863 spin_lock_irq(&rtc_lock);
864 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
865 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
866 unsigned char mask;
868 if (device_may_wakeup(dev))
869 mask = RTC_IRQMASK & ~RTC_AIE;
870 else
871 mask = RTC_IRQMASK;
872 tmp &= ~mask;
873 CMOS_WRITE(tmp, RTC_CONTROL);
874 hpet_mask_rtc_irq_bit(mask);
876 cmos_checkintr(cmos, tmp);
878 spin_unlock_irq(&rtc_lock);
880 if (tmp & RTC_AIE) {
881 cmos->enabled_wake = 1;
882 if (cmos->wake_on)
883 cmos->wake_on(dev);
884 else
885 enable_irq_wake(cmos->irq);
888 pr_debug("%s: suspend%s, ctrl %02x\n",
889 dev_name(&cmos_rtc.rtc->dev),
890 (tmp & RTC_AIE) ? ", alarm may wake" : "",
891 tmp);
893 return 0;
896 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
897 * after a detour through G3 "mechanical off", although the ACPI spec
898 * says wakeup should only work from G1/S4 "hibernate". To most users,
899 * distinctions between S4 and S5 are pointless. So when the hardware
900 * allows, don't draw that distinction.
902 static inline int cmos_poweroff(struct device *dev)
904 return cmos_suspend(dev, PMSG_HIBERNATE);
907 static int cmos_resume(struct device *dev)
909 struct cmos_rtc *cmos = dev_get_drvdata(dev);
910 unsigned char tmp = cmos->suspend_ctrl;
912 /* re-enable any irqs previously active */
913 if (tmp & RTC_IRQMASK) {
914 unsigned char mask;
916 if (cmos->enabled_wake) {
917 if (cmos->wake_off)
918 cmos->wake_off(dev);
919 else
920 disable_irq_wake(cmos->irq);
921 cmos->enabled_wake = 0;
924 spin_lock_irq(&rtc_lock);
925 do {
926 CMOS_WRITE(tmp, RTC_CONTROL);
927 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
929 mask = CMOS_READ(RTC_INTR_FLAGS);
930 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
931 if (!is_hpet_enabled() || !is_intr(mask))
932 break;
934 /* force one-shot behavior if HPET blocked
935 * the wake alarm's irq
937 rtc_update_irq(cmos->rtc, 1, mask);
938 tmp &= ~RTC_AIE;
939 hpet_mask_rtc_irq_bit(RTC_AIE);
940 } while (mask & RTC_AIE);
941 spin_unlock_irq(&rtc_lock);
944 pr_debug("%s: resume, ctrl %02x\n",
945 dev_name(&cmos_rtc.rtc->dev),
946 tmp);
948 return 0;
951 #else
952 #define cmos_suspend NULL
953 #define cmos_resume NULL
955 static inline int cmos_poweroff(struct device *dev)
957 return -ENOSYS;
960 #endif
962 /*----------------------------------------------------------------*/
964 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
965 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
966 * probably list them in similar PNPBIOS tables; so PNP is more common.
968 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
969 * predate even PNPBIOS should set up platform_bus devices.
972 #ifdef CONFIG_ACPI
974 #include <linux/acpi.h>
976 #ifdef CONFIG_PM
977 static u32 rtc_handler(void *context)
979 acpi_clear_event(ACPI_EVENT_RTC);
980 acpi_disable_event(ACPI_EVENT_RTC, 0);
981 return ACPI_INTERRUPT_HANDLED;
984 static inline void rtc_wake_setup(void)
986 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, NULL);
988 * After the RTC handler is installed, the Fixed_RTC event should
989 * be disabled. Only when the RTC alarm is set will it be enabled.
991 acpi_clear_event(ACPI_EVENT_RTC);
992 acpi_disable_event(ACPI_EVENT_RTC, 0);
995 static void rtc_wake_on(struct device *dev)
997 acpi_clear_event(ACPI_EVENT_RTC);
998 acpi_enable_event(ACPI_EVENT_RTC, 0);
1001 static void rtc_wake_off(struct device *dev)
1003 acpi_disable_event(ACPI_EVENT_RTC, 0);
1005 #else
1006 #define rtc_wake_setup() do{}while(0)
1007 #define rtc_wake_on NULL
1008 #define rtc_wake_off NULL
1009 #endif
1011 /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
1012 * its device node and pass extra config data. This helps its driver use
1013 * capabilities that the now-obsolete mc146818 didn't have, and informs it
1014 * that this board's RTC is wakeup-capable (per ACPI spec).
1016 static struct cmos_rtc_board_info acpi_rtc_info;
1018 static void __devinit
1019 cmos_wake_setup(struct device *dev)
1021 if (acpi_disabled)
1022 return;
1024 rtc_wake_setup();
1025 acpi_rtc_info.wake_on = rtc_wake_on;
1026 acpi_rtc_info.wake_off = rtc_wake_off;
1028 /* workaround bug in some ACPI tables */
1029 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
1030 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
1031 acpi_gbl_FADT.month_alarm);
1032 acpi_gbl_FADT.month_alarm = 0;
1035 acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
1036 acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
1037 acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
1039 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
1040 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
1041 dev_info(dev, "RTC can wake from S4\n");
1043 dev->platform_data = &acpi_rtc_info;
1045 /* RTC always wakes from S1/S2/S3, and often S4/STD */
1046 device_init_wakeup(dev, 1);
1049 #else
1051 static void __devinit
1052 cmos_wake_setup(struct device *dev)
1056 #endif
1058 #ifdef CONFIG_PNP
1060 #include <linux/pnp.h>
1062 static int __devinit
1063 cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1065 cmos_wake_setup(&pnp->dev);
1067 if (pnp_port_start(pnp,0) == 0x70 && !pnp_irq_valid(pnp,0))
1068 /* Some machines contain a PNP entry for the RTC, but
1069 * don't define the IRQ. It should always be safe to
1070 * hardcode it in these cases
1072 return cmos_do_probe(&pnp->dev,
1073 pnp_get_resource(pnp, IORESOURCE_IO, 0), 8);
1074 else
1075 return cmos_do_probe(&pnp->dev,
1076 pnp_get_resource(pnp, IORESOURCE_IO, 0),
1077 pnp_irq(pnp, 0));
1080 static void __exit cmos_pnp_remove(struct pnp_dev *pnp)
1082 cmos_do_remove(&pnp->dev);
1085 #ifdef CONFIG_PM
1087 static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg)
1089 return cmos_suspend(&pnp->dev, mesg);
1092 static int cmos_pnp_resume(struct pnp_dev *pnp)
1094 return cmos_resume(&pnp->dev);
1097 #else
1098 #define cmos_pnp_suspend NULL
1099 #define cmos_pnp_resume NULL
1100 #endif
1102 static void cmos_pnp_shutdown(struct device *pdev)
1104 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(pdev))
1105 return;
1107 cmos_do_shutdown();
1110 static const struct pnp_device_id rtc_ids[] = {
1111 { .id = "PNP0b00", },
1112 { .id = "PNP0b01", },
1113 { .id = "PNP0b02", },
1114 { },
1116 MODULE_DEVICE_TABLE(pnp, rtc_ids);
1118 static struct pnp_driver cmos_pnp_driver = {
1119 .name = (char *) driver_name,
1120 .id_table = rtc_ids,
1121 .probe = cmos_pnp_probe,
1122 .remove = __exit_p(cmos_pnp_remove),
1124 /* flag ensures resume() gets called, and stops syslog spam */
1125 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1126 .suspend = cmos_pnp_suspend,
1127 .resume = cmos_pnp_resume,
1128 .driver = {
1129 .name = (char *)driver_name,
1130 .shutdown = cmos_pnp_shutdown,
1134 #endif /* CONFIG_PNP */
1136 /*----------------------------------------------------------------*/
1138 /* Platform setup should have set up an RTC device, when PNP is
1139 * unavailable ... this could happen even on (older) PCs.
1142 static int __init cmos_platform_probe(struct platform_device *pdev)
1144 cmos_wake_setup(&pdev->dev);
1145 return cmos_do_probe(&pdev->dev,
1146 platform_get_resource(pdev, IORESOURCE_IO, 0),
1147 platform_get_irq(pdev, 0));
1150 static int __exit cmos_platform_remove(struct platform_device *pdev)
1152 cmos_do_remove(&pdev->dev);
1153 return 0;
1156 static void cmos_platform_shutdown(struct platform_device *pdev)
1158 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pdev->dev))
1159 return;
1161 cmos_do_shutdown();
1164 /* work with hotplug and coldplug */
1165 MODULE_ALIAS("platform:rtc_cmos");
1167 static struct platform_driver cmos_platform_driver = {
1168 .remove = __exit_p(cmos_platform_remove),
1169 .shutdown = cmos_platform_shutdown,
1170 .driver = {
1171 .name = (char *) driver_name,
1172 .suspend = cmos_suspend,
1173 .resume = cmos_resume,
1177 #ifdef CONFIG_PNP
1178 static bool pnp_driver_registered;
1179 #endif
1180 static bool platform_driver_registered;
1182 static int __init cmos_init(void)
1184 int retval = 0;
1186 #ifdef CONFIG_PNP
1187 retval = pnp_register_driver(&cmos_pnp_driver);
1188 if (retval == 0)
1189 pnp_driver_registered = true;
1190 #endif
1192 if (!cmos_rtc.dev) {
1193 retval = platform_driver_probe(&cmos_platform_driver,
1194 cmos_platform_probe);
1195 if (retval == 0)
1196 platform_driver_registered = true;
1199 if (retval == 0)
1200 return 0;
1202 #ifdef CONFIG_PNP
1203 if (pnp_driver_registered)
1204 pnp_unregister_driver(&cmos_pnp_driver);
1205 #endif
1206 return retval;
1208 module_init(cmos_init);
1210 static void __exit cmos_exit(void)
1212 #ifdef CONFIG_PNP
1213 if (pnp_driver_registered)
1214 pnp_unregister_driver(&cmos_pnp_driver);
1215 #endif
1216 if (platform_driver_registered)
1217 platform_driver_unregister(&cmos_platform_driver);
1219 module_exit(cmos_exit);
1222 MODULE_AUTHOR("David Brownell");
1223 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1224 MODULE_LICENSE("GPL");