powerpc: Rename LWSYNC_ON_SMP to PPC_RELEASE_BARRIER, ISYNC_ON_SMP to PPC_ACQUIRE_BARRIER
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / powerpc / include / asm / bitops.h
blob30964ae2d096a9c754407d7fd33a6e96ab9c9692
1 /*
2 * PowerPC atomic bit operations.
4 * Merged version by David Gibson <david@gibson.dropbear.id.au>.
5 * Based on ppc64 versions by: Dave Engebretsen, Todd Inglett, Don
6 * Reed, Pat McCarthy, Peter Bergner, Anton Blanchard. They
7 * originally took it from the ppc32 code.
9 * Within a word, bits are numbered LSB first. Lot's of places make
10 * this assumption by directly testing bits with (val & (1<<nr)).
11 * This can cause confusion for large (> 1 word) bitmaps on a
12 * big-endian system because, unlike little endian, the number of each
13 * bit depends on the word size.
15 * The bitop functions are defined to work on unsigned longs, so for a
16 * ppc64 system the bits end up numbered:
17 * |63..............0|127............64|191...........128|255...........196|
18 * and on ppc32:
19 * |31.....0|63....31|95....64|127...96|159..128|191..160|223..192|255..224|
21 * There are a few little-endian macros used mostly for filesystem
22 * bitmaps, these work on similar bit arrays layouts, but
23 * byte-oriented:
24 * |7...0|15...8|23...16|31...24|39...32|47...40|55...48|63...56|
26 * The main difference is that bit 3-5 (64b) or 3-4 (32b) in the bit
27 * number field needs to be reversed compared to the big-endian bit
28 * fields. This can be achieved by XOR with 0x38 (64b) or 0x18 (32b).
30 * This program is free software; you can redistribute it and/or
31 * modify it under the terms of the GNU General Public License
32 * as published by the Free Software Foundation; either version
33 * 2 of the License, or (at your option) any later version.
36 #ifndef _ASM_POWERPC_BITOPS_H
37 #define _ASM_POWERPC_BITOPS_H
39 #ifdef __KERNEL__
41 #ifndef _LINUX_BITOPS_H
42 #error only <linux/bitops.h> can be included directly
43 #endif
45 #include <linux/compiler.h>
46 #include <asm/asm-compat.h>
47 #include <asm/synch.h>
50 * clear_bit doesn't imply a memory barrier
52 #define smp_mb__before_clear_bit() smp_mb()
53 #define smp_mb__after_clear_bit() smp_mb()
55 #define BITOP_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
56 #define BITOP_WORD(nr) ((nr) / BITS_PER_LONG)
57 #define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7)
59 /* Macro for generating the ***_bits() functions */
60 #define DEFINE_BITOP(fn, op, prefix, postfix) \
61 static __inline__ void fn(unsigned long mask, \
62 volatile unsigned long *_p) \
63 { \
64 unsigned long old; \
65 unsigned long *p = (unsigned long *)_p; \
66 __asm__ __volatile__ ( \
67 prefix \
68 "1:" PPC_LLARX(%0,0,%3,0) "\n" \
69 stringify_in_c(op) "%0,%0,%2\n" \
70 PPC405_ERR77(0,%3) \
71 PPC_STLCX "%0,0,%3\n" \
72 "bne- 1b\n" \
73 postfix \
74 : "=&r" (old), "+m" (*p) \
75 : "r" (mask), "r" (p) \
76 : "cc", "memory"); \
79 DEFINE_BITOP(set_bits, or, "", "")
80 DEFINE_BITOP(clear_bits, andc, "", "")
81 DEFINE_BITOP(clear_bits_unlock, andc, PPC_RELEASE_BARRIER, "")
82 DEFINE_BITOP(change_bits, xor, "", "")
84 static __inline__ void set_bit(int nr, volatile unsigned long *addr)
86 set_bits(BITOP_MASK(nr), addr + BITOP_WORD(nr));
89 static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
91 clear_bits(BITOP_MASK(nr), addr + BITOP_WORD(nr));
94 static __inline__ void clear_bit_unlock(int nr, volatile unsigned long *addr)
96 clear_bits_unlock(BITOP_MASK(nr), addr + BITOP_WORD(nr));
99 static __inline__ void change_bit(int nr, volatile unsigned long *addr)
101 change_bits(BITOP_MASK(nr), addr + BITOP_WORD(nr));
104 /* Like DEFINE_BITOP(), with changes to the arguments to 'op' and the output
105 * operands. */
106 #define DEFINE_TESTOP(fn, op, prefix, postfix, eh) \
107 static __inline__ unsigned long fn( \
108 unsigned long mask, \
109 volatile unsigned long *_p) \
111 unsigned long old, t; \
112 unsigned long *p = (unsigned long *)_p; \
113 __asm__ __volatile__ ( \
114 prefix \
115 "1:" PPC_LLARX(%0,0,%3,eh) "\n" \
116 stringify_in_c(op) "%1,%0,%2\n" \
117 PPC405_ERR77(0,%3) \
118 PPC_STLCX "%1,0,%3\n" \
119 "bne- 1b\n" \
120 postfix \
121 : "=&r" (old), "=&r" (t) \
122 : "r" (mask), "r" (p) \
123 : "cc", "memory"); \
124 return (old & mask); \
127 DEFINE_TESTOP(test_and_set_bits, or, PPC_RELEASE_BARRIER,
128 PPC_ACQUIRE_BARRIER, 0)
129 DEFINE_TESTOP(test_and_set_bits_lock, or, "",
130 PPC_ACQUIRE_BARRIER, 1)
131 DEFINE_TESTOP(test_and_clear_bits, andc, PPC_RELEASE_BARRIER,
132 PPC_ACQUIRE_BARRIER, 0)
133 DEFINE_TESTOP(test_and_change_bits, xor, PPC_RELEASE_BARRIER,
134 PPC_ACQUIRE_BARRIER, 0)
136 static __inline__ int test_and_set_bit(unsigned long nr,
137 volatile unsigned long *addr)
139 return test_and_set_bits(BITOP_MASK(nr), addr + BITOP_WORD(nr)) != 0;
142 static __inline__ int test_and_set_bit_lock(unsigned long nr,
143 volatile unsigned long *addr)
145 return test_and_set_bits_lock(BITOP_MASK(nr),
146 addr + BITOP_WORD(nr)) != 0;
149 static __inline__ int test_and_clear_bit(unsigned long nr,
150 volatile unsigned long *addr)
152 return test_and_clear_bits(BITOP_MASK(nr), addr + BITOP_WORD(nr)) != 0;
155 static __inline__ int test_and_change_bit(unsigned long nr,
156 volatile unsigned long *addr)
158 return test_and_change_bits(BITOP_MASK(nr), addr + BITOP_WORD(nr)) != 0;
161 #include <asm-generic/bitops/non-atomic.h>
163 static __inline__ void __clear_bit_unlock(int nr, volatile unsigned long *addr)
165 __asm__ __volatile__(PPC_RELEASE_BARRIER "" ::: "memory");
166 __clear_bit(nr, addr);
170 * Return the zero-based bit position (LE, not IBM bit numbering) of
171 * the most significant 1-bit in a double word.
173 static __inline__ __attribute__((const))
174 int __ilog2(unsigned long x)
176 int lz;
178 asm (PPC_CNTLZL "%0,%1" : "=r" (lz) : "r" (x));
179 return BITS_PER_LONG - 1 - lz;
182 static inline __attribute__((const))
183 int __ilog2_u32(u32 n)
185 int bit;
186 asm ("cntlzw %0,%1" : "=r" (bit) : "r" (n));
187 return 31 - bit;
190 #ifdef __powerpc64__
191 static inline __attribute__((const))
192 int __ilog2_u64(u64 n)
194 int bit;
195 asm ("cntlzd %0,%1" : "=r" (bit) : "r" (n));
196 return 63 - bit;
198 #endif
201 * Determines the bit position of the least significant 0 bit in the
202 * specified double word. The returned bit position will be
203 * zero-based, starting from the right side (63/31 - 0).
205 static __inline__ unsigned long ffz(unsigned long x)
207 /* no zero exists anywhere in the 8 byte area. */
208 if ((x = ~x) == 0)
209 return BITS_PER_LONG;
212 * Calculate the bit position of the least signficant '1' bit in x
213 * (since x has been changed this will actually be the least signficant
214 * '0' bit in * the original x). Note: (x & -x) gives us a mask that
215 * is the least significant * (RIGHT-most) 1-bit of the value in x.
217 return __ilog2(x & -x);
220 static __inline__ int __ffs(unsigned long x)
222 return __ilog2(x & -x);
226 * ffs: find first bit set. This is defined the same way as
227 * the libc and compiler builtin ffs routines, therefore
228 * differs in spirit from the above ffz (man ffs).
230 static __inline__ int ffs(int x)
232 unsigned long i = (unsigned long)x;
233 return __ilog2(i & -i) + 1;
237 * fls: find last (most-significant) bit set.
238 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
240 static __inline__ int fls(unsigned int x)
242 int lz;
244 asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
245 return 32 - lz;
248 static __inline__ unsigned long __fls(unsigned long x)
250 return __ilog2(x);
254 * 64-bit can do this using one cntlzd (count leading zeroes doubleword)
255 * instruction; for 32-bit we use the generic version, which does two
256 * 32-bit fls calls.
258 #ifdef __powerpc64__
259 static __inline__ int fls64(__u64 x)
261 int lz;
263 asm ("cntlzd %0,%1" : "=r" (lz) : "r" (x));
264 return 64 - lz;
266 #else
267 #include <asm-generic/bitops/fls64.h>
268 #endif /* __powerpc64__ */
270 #include <asm-generic/bitops/hweight.h>
271 #include <asm-generic/bitops/find.h>
273 /* Little-endian versions */
275 static __inline__ int test_le_bit(unsigned long nr,
276 __const__ unsigned long *addr)
278 __const__ unsigned char *tmp = (__const__ unsigned char *) addr;
279 return (tmp[nr >> 3] >> (nr & 7)) & 1;
282 #define __set_le_bit(nr, addr) \
283 __set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
284 #define __clear_le_bit(nr, addr) \
285 __clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
287 #define test_and_set_le_bit(nr, addr) \
288 test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
289 #define test_and_clear_le_bit(nr, addr) \
290 test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
292 #define __test_and_set_le_bit(nr, addr) \
293 __test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
294 #define __test_and_clear_le_bit(nr, addr) \
295 __test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
297 #define find_first_zero_le_bit(addr, size) generic_find_next_zero_le_bit((addr), (size), 0)
298 unsigned long generic_find_next_zero_le_bit(const unsigned long *addr,
299 unsigned long size, unsigned long offset);
301 unsigned long generic_find_next_le_bit(const unsigned long *addr,
302 unsigned long size, unsigned long offset);
303 /* Bitmap functions for the ext2 filesystem */
305 #define ext2_set_bit(nr,addr) \
306 __test_and_set_le_bit((nr), (unsigned long*)addr)
307 #define ext2_clear_bit(nr, addr) \
308 __test_and_clear_le_bit((nr), (unsigned long*)addr)
310 #define ext2_set_bit_atomic(lock, nr, addr) \
311 test_and_set_le_bit((nr), (unsigned long*)addr)
312 #define ext2_clear_bit_atomic(lock, nr, addr) \
313 test_and_clear_le_bit((nr), (unsigned long*)addr)
315 #define ext2_test_bit(nr, addr) test_le_bit((nr),(unsigned long*)addr)
317 #define ext2_find_first_zero_bit(addr, size) \
318 find_first_zero_le_bit((unsigned long*)addr, size)
319 #define ext2_find_next_zero_bit(addr, size, off) \
320 generic_find_next_zero_le_bit((unsigned long*)addr, size, off)
322 #define ext2_find_next_bit(addr, size, off) \
323 generic_find_next_le_bit((unsigned long *)addr, size, off)
324 /* Bitmap functions for the minix filesystem. */
326 #define minix_test_and_set_bit(nr,addr) \
327 __test_and_set_le_bit(nr, (unsigned long *)addr)
328 #define minix_set_bit(nr,addr) \
329 __set_le_bit(nr, (unsigned long *)addr)
330 #define minix_test_and_clear_bit(nr,addr) \
331 __test_and_clear_le_bit(nr, (unsigned long *)addr)
332 #define minix_test_bit(nr,addr) \
333 test_le_bit(nr, (unsigned long *)addr)
335 #define minix_find_first_zero_bit(addr,size) \
336 find_first_zero_le_bit((unsigned long *)addr, size)
338 #include <asm-generic/bitops/sched.h>
340 #endif /* __KERNEL__ */
342 #endif /* _ASM_POWERPC_BITOPS_H */