2 * Author: MontaVista Software, Inc.
5 * Based on the OMAP devices.c
7 * 2005 (c) MontaVista Software, Inc. This file is licensed under the
8 * terms of the GNU General Public License version 2. This program is
9 * licensed "as is" without any warranty of any kind, whether express
12 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
13 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version 2
18 * of the License, or (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
29 #include <linux/module.h>
30 #include <linux/kernel.h>
31 #include <linux/init.h>
32 #include <linux/platform_device.h>
33 #include <linux/gpio.h>
35 #include <mach/irqs.h>
36 #include <mach/hardware.h>
37 #include <mach/common.h>
43 * SPI master controller
45 * - i.MX1: 2 channel (slighly different register setting)
49 #define DEFINE_IMX_SPI_DEVICE(n, baseaddr, irq) \
50 static struct resource mxc_spi_resources ## n[] = { \
53 .end = baseaddr + SZ_4K - 1, \
54 .flags = IORESOURCE_MEM, \
58 .flags = IORESOURCE_IRQ, \
62 struct platform_device mxc_spi_device ## n = { \
65 .num_resources = ARRAY_SIZE(mxc_spi_resources ## n), \
66 .resource = mxc_spi_resources ## n, \
69 DEFINE_IMX_SPI_DEVICE(0, MX2x_CSPI1_BASE_ADDR
, MX2x_INT_CSPI1
);
70 DEFINE_IMX_SPI_DEVICE(1, MX2x_CSPI2_BASE_ADDR
, MX2x_INT_CSPI2
);
72 #ifdef CONFIG_MACH_MX27
73 DEFINE_IMX_SPI_DEVICE(2, MX27_CSPI3_BASE_ADDR
, MX27_INT_CSPI3
);
77 * General Purpose Timer
81 #define DEFINE_IMX_GPT_DEVICE(n, baseaddr, irq) \
82 static struct resource timer ## n ##_resources[] = { \
85 .end = baseaddr + SZ_4K - 1, \
86 .flags = IORESOURCE_MEM, \
90 .flags = IORESOURCE_IRQ, \
94 struct platform_device mxc_gpt ## n = { \
97 .num_resources = ARRAY_SIZE(timer ## n ## _resources), \
98 .resource = timer ## n ## _resources, \
101 /* We use gpt1 as system timer, so do not add a device for this one */
102 DEFINE_IMX_GPT_DEVICE(1, MX2x_GPT2_BASE_ADDR
, MX2x_INT_GPT2
);
103 DEFINE_IMX_GPT_DEVICE(2, MX2x_GPT3_BASE_ADDR
, MX2x_INT_GPT3
);
105 #ifdef CONFIG_MACH_MX27
106 DEFINE_IMX_GPT_DEVICE(3, MX27_GPT4_BASE_ADDR
, MX27_INT_GPT4
);
107 DEFINE_IMX_GPT_DEVICE(4, MX27_GPT5_BASE_ADDR
, MX27_INT_GPT5
);
108 DEFINE_IMX_GPT_DEVICE(5, MX27_GPT6_BASE_ADDR
, MX27_INT_GPT6
);
117 static struct resource mxc_wdt_resources
[] = {
119 .start
= MX2x_WDOG_BASE_ADDR
,
120 .end
= MX2x_WDOG_BASE_ADDR
+ SZ_4K
- 1,
121 .flags
= IORESOURCE_MEM
,
125 struct platform_device mxc_wdt
= {
128 .num_resources
= ARRAY_SIZE(mxc_wdt_resources
),
129 .resource
= mxc_wdt_resources
,
132 static struct resource mxc_w1_master_resources
[] = {
134 .start
= MX2x_OWIRE_BASE_ADDR
,
135 .end
= MX2x_OWIRE_BASE_ADDR
+ SZ_4K
- 1,
136 .flags
= IORESOURCE_MEM
,
140 struct platform_device mxc_w1_master_device
= {
143 .num_resources
= ARRAY_SIZE(mxc_w1_master_resources
),
144 .resource
= mxc_w1_master_resources
,
147 #define DEFINE_MXC_NAND_DEVICE(pfx, baseaddr, irq) \
148 static struct resource pfx ## _nand_resources[] = { \
151 .end = baseaddr + SZ_4K - 1, \
152 .flags = IORESOURCE_MEM, \
156 .flags = IORESOURCE_IRQ, \
160 struct platform_device pfx ## _nand_device = { \
161 .name = "mxc_nand", \
163 .num_resources = ARRAY_SIZE(pfx ## _nand_resources), \
164 .resource = pfx ## _nand_resources, \
167 #ifdef CONFIG_MACH_MX21
168 DEFINE_MXC_NAND_DEVICE(imx21
, MX21_NFC_BASE_ADDR
, MX21_INT_NANDFC
);
171 #ifdef CONFIG_MACH_MX27
172 DEFINE_MXC_NAND_DEVICE(imx27
, MX27_NFC_BASE_ADDR
, MX27_INT_NANDFC
);
177 * - i.MX1: the basic controller
178 * - i.MX21: to be checked
179 * - i.MX27: like i.MX1, with slightly variations
181 static struct resource mxc_fb
[] = {
183 .start
= MX2x_LCDC_BASE_ADDR
,
184 .end
= MX2x_LCDC_BASE_ADDR
+ SZ_4K
- 1,
185 .flags
= IORESOURCE_MEM
,
187 .start
= MX2x_INT_LCDC
,
188 .end
= MX2x_INT_LCDC
,
189 .flags
= IORESOURCE_IRQ
,
194 struct platform_device mxc_fb_device
= {
197 .num_resources
= ARRAY_SIZE(mxc_fb
),
200 .coherent_dma_mask
= 0xFFFFFFFF,
204 #ifdef CONFIG_MACH_MX27
205 static struct resource mxc_fec_resources
[] = {
207 .start
= MX27_FEC_BASE_ADDR
,
208 .end
= MX27_FEC_BASE_ADDR
+ SZ_4K
- 1,
209 .flags
= IORESOURCE_MEM
,
211 .start
= MX27_INT_FEC
,
213 .flags
= IORESOURCE_IRQ
,
217 struct platform_device mxc_fec_device
= {
220 .num_resources
= ARRAY_SIZE(mxc_fec_resources
),
221 .resource
= mxc_fec_resources
,
225 #define DEFINE_IMX_I2C_DEVICE(n, baseaddr, irq) \
226 static struct resource mxc_i2c_resources ## n[] = { \
229 .end = baseaddr + SZ_4K - 1, \
230 .flags = IORESOURCE_MEM, \
234 .flags = IORESOURCE_IRQ, \
238 struct platform_device mxc_i2c_device ## n = { \
241 .num_resources = ARRAY_SIZE(mxc_i2c_resources ## n), \
242 .resource = mxc_i2c_resources ## n, \
245 DEFINE_IMX_I2C_DEVICE(0, MX2x_I2C_BASE_ADDR
, MX2x_INT_I2C
);
247 #ifdef CONFIG_MACH_MX27
248 DEFINE_IMX_I2C_DEVICE(1, MX27_I2C2_BASE_ADDR
, MX27_INT_I2C2
);
251 static struct resource mxc_pwm_resources
[] = {
253 .start
= MX2x_PWM_BASE_ADDR
,
254 .end
= MX2x_PWM_BASE_ADDR
+ SZ_4K
- 1,
255 .flags
= IORESOURCE_MEM
,
257 .start
= MX2x_INT_PWM
,
259 .flags
= IORESOURCE_IRQ
,
263 struct platform_device mxc_pwm_device
= {
266 .num_resources
= ARRAY_SIZE(mxc_pwm_resources
),
267 .resource
= mxc_pwm_resources
,
271 * Resource definition for the MXC SDHC
273 #define DEFINE_MXC_MMC_DEVICE(n, baseaddr, irq, dmareq) \
274 static struct resource mxc_sdhc_resources ## n[] = { \
277 .end = baseaddr + SZ_4K - 1, \
278 .flags = IORESOURCE_MEM, \
282 .flags = IORESOURCE_IRQ, \
286 .flags = IORESOURCE_DMA, \
290 static u64 mxc_sdhc ## n ## _dmamask = 0xffffffffUL; \
292 struct platform_device mxc_sdhc_device ## n = { \
296 .dma_mask = &mxc_sdhc ## n ## _dmamask, \
297 .coherent_dma_mask = 0xffffffff, \
299 .num_resources = ARRAY_SIZE(mxc_sdhc_resources ## n), \
300 .resource = mxc_sdhc_resources ## n, \
303 DEFINE_MXC_MMC_DEVICE(0, MX2x_SDHC1_BASE_ADDR
, MX2x_INT_SDHC1
, MX2x_DMA_REQ_SDHC1
);
304 DEFINE_MXC_MMC_DEVICE(1, MX2x_SDHC2_BASE_ADDR
, MX2x_INT_SDHC2
, MX2x_DMA_REQ_SDHC2
);
306 #ifdef CONFIG_MACH_MX27
307 static struct resource otg_resources
[] = {
309 .start
= MX27_USBOTG_BASE_ADDR
,
310 .end
= MX27_USBOTG_BASE_ADDR
+ 0x1ff,
311 .flags
= IORESOURCE_MEM
,
313 .start
= MX27_INT_USB3
,
314 .end
= MX27_INT_USB3
,
315 .flags
= IORESOURCE_IRQ
,
319 static u64 otg_dmamask
= 0xffffffffUL
;
321 /* OTG gadget device */
322 struct platform_device mxc_otg_udc_device
= {
323 .name
= "fsl-usb2-udc",
326 .dma_mask
= &otg_dmamask
,
327 .coherent_dma_mask
= 0xffffffffUL
,
329 .resource
= otg_resources
,
330 .num_resources
= ARRAY_SIZE(otg_resources
),
334 struct platform_device mxc_otg_host
= {
338 .coherent_dma_mask
= 0xffffffff,
339 .dma_mask
= &otg_dmamask
,
341 .resource
= otg_resources
,
342 .num_resources
= ARRAY_SIZE(otg_resources
),
347 static u64 usbh1_dmamask
= 0xffffffffUL
;
349 static struct resource mxc_usbh1_resources
[] = {
351 .start
= MX27_USBOTG_BASE_ADDR
+ 0x200,
352 .end
= MX27_USBOTG_BASE_ADDR
+ 0x3ff,
353 .flags
= IORESOURCE_MEM
,
355 .start
= MX27_INT_USB1
,
356 .end
= MX27_INT_USB1
,
357 .flags
= IORESOURCE_IRQ
,
361 struct platform_device mxc_usbh1
= {
365 .coherent_dma_mask
= 0xffffffff,
366 .dma_mask
= &usbh1_dmamask
,
368 .resource
= mxc_usbh1_resources
,
369 .num_resources
= ARRAY_SIZE(mxc_usbh1_resources
),
373 static u64 usbh2_dmamask
= 0xffffffffUL
;
375 static struct resource mxc_usbh2_resources
[] = {
377 .start
= MX27_USBOTG_BASE_ADDR
+ 0x400,
378 .end
= MX27_USBOTG_BASE_ADDR
+ 0x5ff,
379 .flags
= IORESOURCE_MEM
,
381 .start
= MX27_INT_USB2
,
382 .end
= MX27_INT_USB2
,
383 .flags
= IORESOURCE_IRQ
,
387 struct platform_device mxc_usbh2
= {
391 .coherent_dma_mask
= 0xffffffff,
392 .dma_mask
= &usbh2_dmamask
,
394 .resource
= mxc_usbh2_resources
,
395 .num_resources
= ARRAY_SIZE(mxc_usbh2_resources
),
399 #define DEFINE_IMX_SSI_DMARES(_name, ssin, suffix) \
402 .start = MX2x_DMA_REQ_SSI ## ssin ## _ ## suffix, \
403 .end = MX2x_DMA_REQ_SSI ## ssin ## _ ## suffix, \
404 .flags = IORESOURCE_DMA, \
407 #define DEFINE_IMX_SSI_DEVICE(n, ssin, baseaddr, irq) \
408 static struct resource imx_ssi_resources ## n[] = { \
410 .start = MX2x_SSI ## ssin ## _BASE_ADDR, \
411 .end = MX2x_SSI ## ssin ## _BASE_ADDR + 0x6f, \
412 .flags = IORESOURCE_MEM, \
414 .start = MX2x_INT_SSI1, \
415 .end = MX2x_INT_SSI1, \
416 .flags = IORESOURCE_IRQ, \
418 DEFINE_IMX_SSI_DMARES("tx0", ssin, TX0), \
419 DEFINE_IMX_SSI_DMARES("rx0", ssin, RX0), \
420 DEFINE_IMX_SSI_DMARES("tx1", ssin, TX1), \
421 DEFINE_IMX_SSI_DMARES("rx1", ssin, RX1), \
424 struct platform_device imx_ssi_device ## n = { \
427 .num_resources = ARRAY_SIZE(imx_ssi_resources ## n), \
428 .resource = imx_ssi_resources ## n, \
431 DEFINE_IMX_SSI_DEVICE(0, 1, MX2x_SSI1_BASE_ADDR
, MX2x_INT_SSI1
);
432 DEFINE_IMX_SSI_DEVICE(1, 2, MX2x_SSI1_BASE_ADDR
, MX2x_INT_SSI1
);
434 /* GPIO port description */
435 static struct mxc_gpio_port imx_gpio_ports
[] = {
437 .chip
.label
= "gpio-0",
438 .irq
= MX2x_INT_GPIO
,
439 .base
= IO_ADDRESS(MX2x_GPIO_BASE_ADDR
),
440 .virtual_irq_start
= MXC_GPIO_IRQ_START
,
442 .chip
.label
= "gpio-1",
443 .base
= IO_ADDRESS(MX2x_GPIO_BASE_ADDR
+ 0x100),
444 .virtual_irq_start
= MXC_GPIO_IRQ_START
+ 32,
446 .chip
.label
= "gpio-2",
447 .base
= IO_ADDRESS(MX2x_GPIO_BASE_ADDR
+ 0x200),
448 .virtual_irq_start
= MXC_GPIO_IRQ_START
+ 64,
450 .chip
.label
= "gpio-3",
451 .base
= IO_ADDRESS(MX2x_GPIO_BASE_ADDR
+ 0x300),
452 .virtual_irq_start
= MXC_GPIO_IRQ_START
+ 96,
454 .chip
.label
= "gpio-4",
455 .base
= IO_ADDRESS(MX2x_GPIO_BASE_ADDR
+ 0x400),
456 .virtual_irq_start
= MXC_GPIO_IRQ_START
+ 128,
458 .chip
.label
= "gpio-5",
459 .base
= IO_ADDRESS(MX2x_GPIO_BASE_ADDR
+ 0x500),
460 .virtual_irq_start
= MXC_GPIO_IRQ_START
+ 160,
464 int __init
mxc_register_gpios(void)
466 return mxc_gpio_init(imx_gpio_ports
, ARRAY_SIZE(imx_gpio_ports
));