crypto: omap - Updates omap sham device related platform code
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / arm / mach-omap2 / io.c
blob402e8f0d0f211085838d14f4cb3bf84c93ea25ed
1 /*
2 * linux/arch/arm/mach-omap2/io.c
4 * OMAP2 I/O mapping code
6 * Copyright (C) 2005 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments
9 * Author:
10 * Juha Yrjola <juha.yrjola@nokia.com>
11 * Syed Khasim <x0khasim@ti.com>
13 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
20 #include <linux/module.h>
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/io.h>
24 #include <linux/clk.h>
25 #include <linux/omapfb.h>
27 #include <asm/tlb.h>
29 #include <asm/mach/map.h>
31 #include <plat/mux.h>
32 #include <plat/sram.h>
33 #include <plat/sdrc.h>
34 #include <plat/gpmc.h>
35 #include <plat/serial.h>
36 #include <plat/vram.h>
38 #include "clock2xxx.h"
39 #include "clock3xxx.h"
40 #include "clock44xx.h"
42 #include <plat/omap-pm.h>
43 #include <plat/powerdomain.h>
44 #include "powerdomains.h"
46 #include <plat/clockdomain.h>
47 #include "clockdomains.h"
48 #include <plat/omap_hwmod.h>
51 * The machine specific code may provide the extra mapping besides the
52 * default mapping provided here.
55 #ifdef CONFIG_ARCH_OMAP2
56 static struct map_desc omap24xx_io_desc[] __initdata = {
58 .virtual = L3_24XX_VIRT,
59 .pfn = __phys_to_pfn(L3_24XX_PHYS),
60 .length = L3_24XX_SIZE,
61 .type = MT_DEVICE
64 .virtual = L4_24XX_VIRT,
65 .pfn = __phys_to_pfn(L4_24XX_PHYS),
66 .length = L4_24XX_SIZE,
67 .type = MT_DEVICE
71 #ifdef CONFIG_ARCH_OMAP2420
72 static struct map_desc omap242x_io_desc[] __initdata = {
74 .virtual = DSP_MEM_2420_VIRT,
75 .pfn = __phys_to_pfn(DSP_MEM_2420_PHYS),
76 .length = DSP_MEM_2420_SIZE,
77 .type = MT_DEVICE
80 .virtual = DSP_IPI_2420_VIRT,
81 .pfn = __phys_to_pfn(DSP_IPI_2420_PHYS),
82 .length = DSP_IPI_2420_SIZE,
83 .type = MT_DEVICE
86 .virtual = DSP_MMU_2420_VIRT,
87 .pfn = __phys_to_pfn(DSP_MMU_2420_PHYS),
88 .length = DSP_MMU_2420_SIZE,
89 .type = MT_DEVICE
93 #endif
95 #ifdef CONFIG_ARCH_OMAP2430
96 static struct map_desc omap243x_io_desc[] __initdata = {
98 .virtual = L4_WK_243X_VIRT,
99 .pfn = __phys_to_pfn(L4_WK_243X_PHYS),
100 .length = L4_WK_243X_SIZE,
101 .type = MT_DEVICE
104 .virtual = OMAP243X_GPMC_VIRT,
105 .pfn = __phys_to_pfn(OMAP243X_GPMC_PHYS),
106 .length = OMAP243X_GPMC_SIZE,
107 .type = MT_DEVICE
110 .virtual = OMAP243X_SDRC_VIRT,
111 .pfn = __phys_to_pfn(OMAP243X_SDRC_PHYS),
112 .length = OMAP243X_SDRC_SIZE,
113 .type = MT_DEVICE
116 .virtual = OMAP243X_SMS_VIRT,
117 .pfn = __phys_to_pfn(OMAP243X_SMS_PHYS),
118 .length = OMAP243X_SMS_SIZE,
119 .type = MT_DEVICE
122 #endif
123 #endif
125 #ifdef CONFIG_ARCH_OMAP3
126 static struct map_desc omap34xx_io_desc[] __initdata = {
128 .virtual = L3_34XX_VIRT,
129 .pfn = __phys_to_pfn(L3_34XX_PHYS),
130 .length = L3_34XX_SIZE,
131 .type = MT_DEVICE
134 .virtual = L4_34XX_VIRT,
135 .pfn = __phys_to_pfn(L4_34XX_PHYS),
136 .length = L4_34XX_SIZE,
137 .type = MT_DEVICE
140 .virtual = OMAP34XX_GPMC_VIRT,
141 .pfn = __phys_to_pfn(OMAP34XX_GPMC_PHYS),
142 .length = OMAP34XX_GPMC_SIZE,
143 .type = MT_DEVICE
146 .virtual = OMAP343X_SMS_VIRT,
147 .pfn = __phys_to_pfn(OMAP343X_SMS_PHYS),
148 .length = OMAP343X_SMS_SIZE,
149 .type = MT_DEVICE
152 .virtual = OMAP343X_SDRC_VIRT,
153 .pfn = __phys_to_pfn(OMAP343X_SDRC_PHYS),
154 .length = OMAP343X_SDRC_SIZE,
155 .type = MT_DEVICE
158 .virtual = L4_PER_34XX_VIRT,
159 .pfn = __phys_to_pfn(L4_PER_34XX_PHYS),
160 .length = L4_PER_34XX_SIZE,
161 .type = MT_DEVICE
164 .virtual = L4_EMU_34XX_VIRT,
165 .pfn = __phys_to_pfn(L4_EMU_34XX_PHYS),
166 .length = L4_EMU_34XX_SIZE,
167 .type = MT_DEVICE
170 #endif
171 #ifdef CONFIG_ARCH_OMAP4
172 static struct map_desc omap44xx_io_desc[] __initdata = {
174 .virtual = L3_44XX_VIRT,
175 .pfn = __phys_to_pfn(L3_44XX_PHYS),
176 .length = L3_44XX_SIZE,
177 .type = MT_DEVICE,
180 .virtual = L4_44XX_VIRT,
181 .pfn = __phys_to_pfn(L4_44XX_PHYS),
182 .length = L4_44XX_SIZE,
183 .type = MT_DEVICE,
186 .virtual = OMAP44XX_GPMC_VIRT,
187 .pfn = __phys_to_pfn(OMAP44XX_GPMC_PHYS),
188 .length = OMAP44XX_GPMC_SIZE,
189 .type = MT_DEVICE,
192 .virtual = OMAP44XX_EMIF1_VIRT,
193 .pfn = __phys_to_pfn(OMAP44XX_EMIF1_PHYS),
194 .length = OMAP44XX_EMIF1_SIZE,
195 .type = MT_DEVICE,
198 .virtual = OMAP44XX_EMIF2_VIRT,
199 .pfn = __phys_to_pfn(OMAP44XX_EMIF2_PHYS),
200 .length = OMAP44XX_EMIF2_SIZE,
201 .type = MT_DEVICE,
204 .virtual = OMAP44XX_DMM_VIRT,
205 .pfn = __phys_to_pfn(OMAP44XX_DMM_PHYS),
206 .length = OMAP44XX_DMM_SIZE,
207 .type = MT_DEVICE,
210 .virtual = L4_PER_44XX_VIRT,
211 .pfn = __phys_to_pfn(L4_PER_44XX_PHYS),
212 .length = L4_PER_44XX_SIZE,
213 .type = MT_DEVICE,
216 .virtual = L4_EMU_44XX_VIRT,
217 .pfn = __phys_to_pfn(L4_EMU_44XX_PHYS),
218 .length = L4_EMU_44XX_SIZE,
219 .type = MT_DEVICE,
222 #endif
224 static void __init _omap2_map_common_io(void)
226 /* Normally devicemaps_init() would flush caches and tlb after
227 * mdesc->map_io(), but we must also do it here because of the CPU
228 * revision check below.
230 local_flush_tlb_all();
231 flush_cache_all();
233 omap2_check_revision();
234 omap_sram_init();
235 omapfb_reserve_sdram();
236 omap_vram_reserve_sdram();
239 #ifdef CONFIG_ARCH_OMAP2420
240 void __init omap242x_map_common_io()
242 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
243 iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
244 _omap2_map_common_io();
246 #endif
248 #ifdef CONFIG_ARCH_OMAP2430
249 void __init omap243x_map_common_io()
251 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
252 iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
253 _omap2_map_common_io();
255 #endif
257 #ifdef CONFIG_ARCH_OMAP3
258 void __init omap34xx_map_common_io()
260 iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
261 _omap2_map_common_io();
263 #endif
265 #ifdef CONFIG_ARCH_OMAP4
266 void __init omap44xx_map_common_io()
268 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
269 _omap2_map_common_io();
271 #endif
274 * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters
276 * Sets the CORE DPLL3 M2 divider to the same value that it's at
277 * currently. This has the effect of setting the SDRC SDRAM AC timing
278 * registers to the values currently defined by the kernel. Currently
279 * only defined for OMAP3; will return 0 if called on OMAP2. Returns
280 * -EINVAL if the dpll3_m2_ck cannot be found, 0 if called on OMAP2,
281 * or passes along the return value of clk_set_rate().
283 static int __init _omap2_init_reprogram_sdrc(void)
285 struct clk *dpll3_m2_ck;
286 int v = -EINVAL;
287 long rate;
289 if (!cpu_is_omap34xx())
290 return 0;
292 dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
293 if (!dpll3_m2_ck)
294 return -EINVAL;
296 rate = clk_get_rate(dpll3_m2_ck);
297 pr_info("Reprogramming SDRC clock to %ld Hz\n", rate);
298 v = clk_set_rate(dpll3_m2_ck, rate);
299 if (v)
300 pr_err("dpll3_m2_clk rate change failed: %d\n", v);
302 clk_put(dpll3_m2_ck);
304 return v;
307 void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
308 struct omap_sdrc_params *sdrc_cs1)
310 pwrdm_init(powerdomains_omap);
311 clkdm_init(clockdomains_omap, clkdm_autodeps);
312 #ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once the clkdev is ready */
313 if (cpu_is_omap242x())
314 omap2420_hwmod_init();
315 else if (cpu_is_omap243x())
316 omap2430_hwmod_init();
317 else if (cpu_is_omap34xx())
318 omap3xxx_hwmod_init();
319 omap2_mux_init();
320 /* The OPP tables have to be registered before a clk init */
321 omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps);
322 #endif
324 if (cpu_is_omap2420())
325 omap2420_clk_init();
326 else if (cpu_is_omap2430())
327 omap2430_clk_init();
328 else if (cpu_is_omap34xx())
329 omap3xxx_clk_init();
330 else if (cpu_is_omap44xx())
331 omap4xxx_clk_init();
332 else
333 pr_err("Could not init clock framework - unknown CPU\n");
335 omap_serial_early_init();
336 #ifndef CONFIG_ARCH_OMAP4
337 omap_hwmod_late_init();
338 omap_pm_if_init();
339 omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
340 _omap2_init_reprogram_sdrc();
341 #endif
342 gpmc_init();