arch/arm/mach-omap2/id.c

   1 /*
   2  * linux/arch/arm/mach-omap2/id.c
   3  *
   4  * OMAP2 CPU identification code
   5  *
   6  * Copyright (C) 2005 Nokia Corporation
   7  * Written by Tony Lindgren <tony@atomide.com>
   8  *
   9  * Copyright (C) 2009 Texas Instruments
  10  * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/init.h>
  20 #include <linux/io.h>
  21
  22 #include <asm/cputype.h>
  23
  24 #include <plat/common.h>
  25 #include <plat/control.h>
  26 #include <plat/cpu.h>
  27
  28 static struct omap_chip_id omap_chip;
  29 static unsigned int omap_revision;
  30
  31 u32 omap3_features;
  32
  33 unsigned int omap_rev(void)
  34 {
  35         return omap_revision;
  36 }
  37 EXPORT_SYMBOL(omap_rev);
  38
  39 /**
  40  * omap_chip_is - test whether currently running OMAP matches a chip type
  41  * @oc: omap_chip_t to test against
  42  *
  43  * Test whether the currently-running OMAP chip matches the supplied
  44  * chip type 'oc'.  Returns 1 upon a match; 0 upon failure.
  45  */
  46 int omap_chip_is(struct omap_chip_id oci)
  47 {
  48         return (oci.oc & omap_chip.oc) ? 1 : 0;
  49 }
  50 EXPORT_SYMBOL(omap_chip_is);
  51
  52 int omap_type(void)
  53 {
  54         u32 val = 0;
  55
  56         if (cpu_is_omap24xx()) {
  57                 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
  58         } else if (cpu_is_omap34xx()) {
  59                 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
  60         } else if (cpu_is_omap44xx()) {
  61                 val = omap_ctrl_readl(OMAP44XX_CONTROL_STATUS);
  62         } else {
  63                 pr_err("Cannot detect omap type!\n");
  64                 goto out;
  65         }
  66
  67         val &= OMAP2_DEVICETYPE_MASK;
  68         val >>= 8;
  69
  70 out:
  71         return val;
  72 }
  73 EXPORT_SYMBOL(omap_type);
  74
  75
  76 /*----------------------------------------------------------------------------*/
  77
  78 #define OMAP_TAP_IDCODE         0x0204
  79 #define OMAP_TAP_DIE_ID_0       0x0218
  80 #define OMAP_TAP_DIE_ID_1       0x021C
  81 #define OMAP_TAP_DIE_ID_2       0x0220
  82 #define OMAP_TAP_DIE_ID_3       0x0224
  83
  84 #define read_tap_reg(reg)       __raw_readl(tap_base  + (reg))
  85
  86 struct omap_id {
  87         u16     hawkeye;        /* Silicon type (Hawkeye id) */
  88         u8      dev;            /* Device type from production_id reg */
  89         u32     type;           /* Combined type id copied to omap_revision */
  90 };
  91
  92 /* Register values to detect the OMAP version */
  93 static struct omap_id omap_ids[] __initdata = {
  94         { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200024 },
  95         { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201024 },
  96         { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202024 },
  97         { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220024 },
  98         { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230024 },
  99         { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300024 },
 100 };
 101
 102 static void __iomem *tap_base;
 103 static u16 tap_prod_id;
 104
 105 void __init omap24xx_check_revision(void)
 106 {
 107         int i, j;
 108         u32 idcode, prod_id;
 109         u16 hawkeye;
 110         u8  dev_type, rev;
 111
 112         idcode = read_tap_reg(OMAP_TAP_IDCODE);
 113         prod_id = read_tap_reg(tap_prod_id);
 114         hawkeye = (idcode >> 12) & 0xffff;
 115         rev = (idcode >> 28) & 0x0f;
 116         dev_type = (prod_id >> 16) & 0x0f;
 117
 118         pr_debug("OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n",
 119                  idcode, rev, hawkeye, (idcode >> 1) & 0x7ff);
 120         pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n",
 121                  read_tap_reg(OMAP_TAP_DIE_ID_0));
 122         pr_debug("OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n",
 123                  read_tap_reg(OMAP_TAP_DIE_ID_1),
 124                  (read_tap_reg(OMAP_TAP_DIE_ID_1) >> 28) & 0xf);
 125         pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n",
 126                  read_tap_reg(OMAP_TAP_DIE_ID_2));
 127         pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n",
 128                  read_tap_reg(OMAP_TAP_DIE_ID_3));
 129         pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
 130                  prod_id, dev_type);
 131
 132         /* Check hawkeye ids */
 133         for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
 134                 if (hawkeye == omap_ids[i].hawkeye)
 135                         break;
 136         }
 137
 138         if (i == ARRAY_SIZE(omap_ids)) {
 139                 printk(KERN_ERR "Unknown OMAP CPU id\n");
 140                 return;
 141         }
 142
 143         for (j = i; j < ARRAY_SIZE(omap_ids); j++) {
 144                 if (dev_type == omap_ids[j].dev)
 145                         break;
 146         }
 147
 148         if (j == ARRAY_SIZE(omap_ids)) {
 149                 printk(KERN_ERR "Unknown OMAP device type. "
 150                                 "Handling it as OMAP%04x\n",
 151                                 omap_ids[i].type >> 16);
 152                 j = i;
 153         }
 154
 155         pr_info("OMAP%04x", omap_rev() >> 16);
 156         if ((omap_rev() >> 8) & 0x0f)
 157                 pr_info("ES%x", (omap_rev() >> 12) & 0xf);
 158         pr_info("\n");
 159 }
 160
 161 #define OMAP3_CHECK_FEATURE(status,feat)                                \
 162         if (((status & OMAP3_ ##feat## _MASK)                           \
 163                 >> OMAP3_ ##feat## _SHIFT) != FEAT_ ##feat## _NONE) {   \
 164                 omap3_features |= OMAP3_HAS_ ##feat;                    \
 165         }
 166
 167 void __init omap3_check_features(void)
 168 {
 169         u32 status;
 170
 171         omap3_features = 0;
 172
 173         status = omap_ctrl_readl(OMAP3_CONTROL_OMAP_STATUS);
 174
 175         OMAP3_CHECK_FEATURE(status, L2CACHE);
 176         OMAP3_CHECK_FEATURE(status, IVA);
 177         OMAP3_CHECK_FEATURE(status, SGX);
 178         OMAP3_CHECK_FEATURE(status, NEON);
 179         OMAP3_CHECK_FEATURE(status, ISP);
 180         if (cpu_is_omap3630())
 181                 omap3_features |= OMAP3_HAS_192MHZ_CLK;
 182
 183         /*
 184          * TODO: Get additional info (where applicable)
 185          *       e.g. Size of L2 cache.
 186          */
 187 }
 188
 189 void __init omap3_check_revision(void)
 190 {
 191         u32 cpuid, idcode;
 192         u16 hawkeye;
 193         u8 rev;
 194
 195         omap_chip.oc = CHIP_IS_OMAP3430;
 196
 197         /*
 198          * We cannot access revision registers on ES1.0.
 199          * If the processor type is Cortex-A8 and the revision is 0x0
 200          * it means its Cortex r0p0 which is 3430 ES1.0.
 201          */
 202         cpuid = read_cpuid(CPUID_ID);
 203         if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
 204                 omap_revision = OMAP3430_REV_ES1_0;
 205                 omap_chip.oc |= CHIP_IS_OMAP3430ES1;
 206                 return;
 207         }
 208
 209         /*
 210          * Detection for 34xx ES2.0 and above can be done with just
 211          * hawkeye and rev. See TRM 1.5.2 Device Identification.
 212          * Note that rev does not map directly to our defined processor
 213          * revision numbers as ES1.0 uses value 0.
 214          */
 215         idcode = read_tap_reg(OMAP_TAP_IDCODE);
 216         hawkeye = (idcode >> 12) & 0xffff;
 217         rev = (idcode >> 28) & 0xff;
 218
 219         switch (hawkeye) {
 220         case 0xb7ae:
 221                 /* Handle 34xx/35xx devices */
 222                 switch (rev) {
 223                 case 0: /* Take care of early samples */
 224                 case 1:
 225                         omap_revision = OMAP3430_REV_ES2_0;
 226                         omap_chip.oc |= CHIP_IS_OMAP3430ES2;
 227                         break;
 228                 case 2:
 229                         omap_revision = OMAP3430_REV_ES2_1;
 230                         omap_chip.oc |= CHIP_IS_OMAP3430ES2;
 231                         break;
 232                 case 3:
 233                         omap_revision = OMAP3430_REV_ES3_0;
 234                         omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
 235                         break;
 236                 case 4:
 237                         omap_revision = OMAP3430_REV_ES3_1;
 238                         omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
 239                         break;
 240                 case 7:
 241                 /* FALLTHROUGH */
 242                 default:
 243                         /* Use the latest known revision as default */
 244                         omap_revision = OMAP3430_REV_ES3_1_2;
 245
 246                         /* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */
 247                         omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
 248                 }
 249                 break;
 250         case 0xb868:
 251                 /* Handle OMAP35xx/AM35xx devices
 252                  *
 253                  * Set the device to be OMAP3505 here. Actual device
 254                  * is identified later based on the features.
 255                  *
 256                  * REVISIT: AM3505/AM3517 should have their own CHIP_IS
 257                  */
 258                 omap_revision = OMAP3505_REV(rev);
 259                 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
 260                 break;
 261         case 0xb891:
 262         /* FALLTHROUGH */
 263         default:
 264                 /* Unknown default to latest silicon rev as default*/
 265                 omap_revision = OMAP3630_REV_ES1_0;
 266                 omap_chip.oc |= CHIP_IS_OMAP3630ES1;
 267         }
 268 }
 269
 270 void __init omap4_check_revision(void)
 271 {
 272         u32 idcode;
 273         u16 hawkeye;
 274         u8 rev;
 275         char *rev_name = "ES1.0";
 276
 277         /*
 278          * The IC rev detection is done with hawkeye and rev.
 279          * Note that rev does not map directly to defined processor
 280          * revision numbers as ES1.0 uses value 0.
 281          */
 282         idcode = read_tap_reg(OMAP_TAP_IDCODE);
 283         hawkeye = (idcode >> 12) & 0xffff;
 284         rev = (idcode >> 28) & 0xff;
 285
 286         if ((hawkeye == 0xb852) && (rev == 0x0)) {
 287                 omap_revision = OMAP4430_REV_ES1_0;
 288                 omap_chip.oc |= CHIP_IS_OMAP4430ES1;
 289                 pr_info("OMAP%04x %s\n", omap_rev() >> 16, rev_name);
 290                 return;
 291         }
 292
 293         pr_err("Unknown OMAP4 CPU id\n");
 294 }
 295
 296 #define OMAP3_SHOW_FEATURE(feat)                \
 297         if (omap3_has_ ##feat())                \
 298                 printk(#feat" ");
 299
 300 void __init omap3_cpuinfo(void)
 301 {
 302         u8 rev = GET_OMAP_REVISION();
 303         char cpu_name[16], cpu_rev[16];
 304
 305         /* OMAP3430 and OMAP3530 are assumed to be same.
 306          *
 307          * OMAP3525, OMAP3515 and OMAP3503 can be detected only based
 308          * on available features. Upon detection, update the CPU id
 309          * and CPU class bits.
 310          */
 311         if (cpu_is_omap3630()) {
 312                 strcpy(cpu_name, "OMAP3630");
 313         } else if (cpu_is_omap3505()) {
 314                 /*
 315                  * AM35xx devices
 316                  */
 317                 if (omap3_has_sgx()) {
 318                         omap_revision = OMAP3517_REV(rev);
 319                         strcpy(cpu_name, "AM3517");
 320                 } else {
 321                         /* Already set in omap3_check_revision() */
 322                         strcpy(cpu_name, "AM3505");
 323                 }
 324         } else if (omap3_has_iva() && omap3_has_sgx()) {
 325                 /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
 326                 strcpy(cpu_name, "OMAP3430/3530");
 327         } else if (omap3_has_iva()) {
 328                 omap_revision = OMAP3525_REV(rev);
 329                 strcpy(cpu_name, "OMAP3525");
 330         } else if (omap3_has_sgx()) {
 331                 omap_revision = OMAP3515_REV(rev);
 332                 strcpy(cpu_name, "OMAP3515");
 333         } else {
 334                 omap_revision = OMAP3503_REV(rev);
 335                 strcpy(cpu_name, "OMAP3503");
 336         }
 337
 338         switch (rev) {
 339         case OMAP_REVBITS_00:
 340                 strcpy(cpu_rev, "1.0");
 341                 break;
 342         case OMAP_REVBITS_10:
 343                 strcpy(cpu_rev, "2.0");
 344                 break;
 345         case OMAP_REVBITS_20:
 346                 strcpy(cpu_rev, "2.1");
 347                 break;
 348         case OMAP_REVBITS_30:
 349                 strcpy(cpu_rev, "3.0");
 350                 break;
 351         case OMAP_REVBITS_40:
 352         /* FALLTHROUGH */
 353         default:
 354                 /* Use the latest known revision as default */
 355                 strcpy(cpu_rev, "3.1");
 356         }
 357
 358         /* Print verbose information */
 359         pr_info("%s ES%s (", cpu_name, cpu_rev);
 360
 361         OMAP3_SHOW_FEATURE(l2cache);
 362         OMAP3_SHOW_FEATURE(iva);
 363         OMAP3_SHOW_FEATURE(sgx);
 364         OMAP3_SHOW_FEATURE(neon);
 365         OMAP3_SHOW_FEATURE(isp);
 366         OMAP3_SHOW_FEATURE(192mhz_clk);
 367
 368         printk(")\n");
 369 }
 370
 371 /*
 372  * Try to detect the exact revision of the omap we're running on
 373  */
 374 void __init omap2_check_revision(void)
 375 {
 376         /*
 377          * At this point we have an idea about the processor revision set
 378          * earlier with omap2_set_globals_tap().
 379          */
 380         if (cpu_is_omap24xx()) {
 381                 omap24xx_check_revision();
 382         } else if (cpu_is_omap34xx()) {
 383                 omap3_check_revision();
 384                 omap3_check_features();
 385                 omap3_cpuinfo();
 386                 return;
 387         } else if (cpu_is_omap44xx()) {
 388                 omap4_check_revision();
 389                 return;
 390         } else {
 391                 pr_err("OMAP revision unknown, please fix!\n");
 392         }
 393
 394         /*
 395          * OK, now we know the exact revision. Initialize omap_chip bits
 396          * for powerdowmain and clockdomain code.
 397          */
 398         if (cpu_is_omap243x()) {
 399                 /* Currently only supports 2430ES2.1 and 2430-all */
 400                 omap_chip.oc |= CHIP_IS_OMAP2430;
 401                 return;
 402         } else if (cpu_is_omap242x()) {
 403                 /* Currently only supports 2420ES2.1.1 and 2420-all */
 404                 omap_chip.oc |= CHIP_IS_OMAP2420;
 405                 return;
 406         }
 407
 408         pr_err("Uninitialized omap_chip, please fix!\n");
 409 }
 410
 411 /*
 412  * Set up things for map_io and processor detection later on. Gets called
 413  * pretty much first thing from board init. For multi-omap, this gets
 414  * cpu_is_omapxxxx() working accurately enough for map_io. Then we'll try to
 415  * detect the exact revision later on in omap2_detect_revision() once map_io
 416  * is done.
 417  */
 418 void __init omap2_set_globals_tap(struct omap_globals *omap2_globals)
 419 {
 420         omap_revision = omap2_globals->class;
 421         tap_base = omap2_globals->tap;
 422
 423         if (cpu_is_omap34xx())
 424                 tap_prod_id = 0x0210;
 425         else
 426                 tap_prod_id = 0x0208;
 427 }