2 * OMAP2xxx DVFS virtual clock functions
4 * Copyright (C) 2005-2008 Texas Instruments, Inc.
5 * Copyright (C) 2004-2010 Nokia Corporation
8 * Richard Woodruff <r-woodruff2@ti.com>
11 * Based on earlier work by Tuukka Tikkanen, Tony Lindgren,
12 * Gordon McNutt and RidgeRun, Inc.
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
18 * XXX Some of this code should be replaceable by the upcoming OPP layer
19 * code. However, some notion of "rate set" is probably still necessary
20 * for OMAP2xxx at least. Rate sets should be generalized so they can be
21 * used for any OMAP chip, not just OMAP2xxx. In particular, Richard Woodruff
22 * has in the past expressed a preference to use rate sets for OPP changes,
23 * rather than dynamically recalculating the clock tree, so if someone wants
24 * this badly enough to write the code to handle it, we should support it
29 #include <linux/kernel.h>
30 #include <linux/errno.h>
31 #include <linux/clk.h>
33 #include <linux/cpufreq.h>
34 #include <linux/slab.h>
36 #include <plat/clock.h>
37 #include <plat/sram.h>
38 #include <plat/sdrc.h>
41 #include "clock2xxx.h"
44 #include "cm-regbits-24xx.h"
46 const struct prcm_config
*curr_prcm_set
;
47 const struct prcm_config
*rate_table
;
50 * omap2_table_mpu_recalc - just return the MPU speed
51 * @clk: virt_prcm_set struct clk
53 * Set virt_prcm_set's rate to the mpu_speed field of the current PRCM set.
55 unsigned long omap2_table_mpu_recalc(struct clk
*clk
)
57 return curr_prcm_set
->mpu_speed
;
61 * Look for a rate equal or less than the target rate given a configuration set.
63 * What's not entirely clear is "which" field represents the key field.
64 * Some might argue L3-DDR, others ARM, others IVA. This code is simple and
65 * just uses the ARM rates.
67 long omap2_round_to_table_rate(struct clk
*clk
, unsigned long rate
)
69 const struct prcm_config
*ptr
;
73 sys_ck_rate
= clk_get_rate(sclk
);
75 highest_rate
= -EINVAL
;
77 for (ptr
= rate_table
; ptr
->mpu_speed
; ptr
++) {
78 if (!(ptr
->flags
& cpu_mask
))
80 if (ptr
->xtal_speed
!= sys_ck_rate
)
83 highest_rate
= ptr
->mpu_speed
;
85 /* Can check only after xtal frequency check */
86 if (ptr
->mpu_speed
<= rate
)
92 /* Sets basic clocks based on the specified rate */
93 int omap2_select_table_rate(struct clk
*clk
, unsigned long rate
)
95 u32 cur_rate
, done_rate
, bypass
= 0, tmp
;
96 const struct prcm_config
*prcm
;
97 unsigned long found_speed
= 0;
101 sys_ck_rate
= clk_get_rate(sclk
);
103 for (prcm
= rate_table
; prcm
->mpu_speed
; prcm
++) {
104 if (!(prcm
->flags
& cpu_mask
))
107 if (prcm
->xtal_speed
!= sys_ck_rate
)
110 if (prcm
->mpu_speed
<= rate
) {
111 found_speed
= prcm
->mpu_speed
;
117 printk(KERN_INFO
"Could not set MPU rate to %luMHz\n",
122 curr_prcm_set
= prcm
;
123 cur_rate
= omap2xxx_clk_get_core_rate(dclk
);
125 if (prcm
->dpll_speed
== cur_rate
/ 2) {
126 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL
, 1);
127 } else if (prcm
->dpll_speed
== cur_rate
* 2) {
128 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2
, 1);
129 } else if (prcm
->dpll_speed
!= cur_rate
) {
130 local_irq_save(flags
);
132 if (prcm
->dpll_speed
== prcm
->xtal_speed
)
135 if ((prcm
->cm_clksel2_pll
& OMAP24XX_CORE_CLK_SRC_MASK
) ==
136 CORE_CLK_SRC_DPLL_X2
)
137 done_rate
= CORE_CLK_SRC_DPLL_X2
;
139 done_rate
= CORE_CLK_SRC_DPLL
;
142 cm_write_mod_reg(prcm
->cm_clksel_mpu
, MPU_MOD
, CM_CLKSEL
);
144 /* dsp + iva1 div(2420), iva2.1(2430) */
145 cm_write_mod_reg(prcm
->cm_clksel_dsp
,
146 OMAP24XX_DSP_MOD
, CM_CLKSEL
);
148 cm_write_mod_reg(prcm
->cm_clksel_gfx
, GFX_MOD
, CM_CLKSEL
);
150 /* Major subsystem dividers */
151 tmp
= cm_read_mod_reg(CORE_MOD
, CM_CLKSEL1
) & OMAP24XX_CLKSEL_DSS2_MASK
;
152 cm_write_mod_reg(prcm
->cm_clksel1_core
| tmp
, CORE_MOD
,
155 if (cpu_is_omap2430())
156 cm_write_mod_reg(prcm
->cm_clksel_mdm
,
157 OMAP2430_MDM_MOD
, CM_CLKSEL
);
159 /* x2 to enter omap2xxx_sdrc_init_params() */
160 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2
, 1);
162 omap2_set_prcm(prcm
->cm_clksel1_pll
, prcm
->base_sdrc_rfr
,
165 omap2xxx_sdrc_init_params(omap2xxx_sdrc_dll_is_unlocked());
166 omap2xxx_sdrc_reprogram(done_rate
, 0);
168 local_irq_restore(flags
);
174 #ifdef CONFIG_CPU_FREQ
176 * Walk PRCM rate table and fillout cpufreq freq_table
177 * XXX This should be replaced by an OPP layer in the near future
179 static struct cpufreq_frequency_table
*freq_table
;
181 void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table
**table
)
183 const struct prcm_config
*prcm
;
188 if (!cpu_is_omap24xx())
191 sys_ck_rate
= clk_get_rate(sclk
);
193 for (prcm
= rate_table
; prcm
->mpu_speed
; prcm
++) {
194 if (!(prcm
->flags
& cpu_mask
))
196 if (prcm
->xtal_speed
!= sys_ck_rate
)
199 /* don't put bypass rates in table */
200 if (prcm
->dpll_speed
== prcm
->xtal_speed
)
207 * XXX Ensure that we're doing what CPUFreq expects for this error
208 * case and the following one
211 pr_warning("%s: no matching entries in rate_table\n",
216 /* Include the CPUFREQ_TABLE_END terminator entry */
219 freq_table
= kzalloc(sizeof(struct cpufreq_frequency_table
) * tbl_sz
,
222 pr_err("%s: could not kzalloc frequency table\n", __func__
);
226 for (prcm
= rate_table
; prcm
->mpu_speed
; prcm
++) {
227 if (!(prcm
->flags
& cpu_mask
))
229 if (prcm
->xtal_speed
!= sys_ck_rate
)
232 /* don't put bypass rates in table */
233 if (prcm
->dpll_speed
== prcm
->xtal_speed
)
236 freq_table
[i
].index
= i
;
237 freq_table
[i
].frequency
= prcm
->mpu_speed
/ 1000;
241 freq_table
[i
].index
= i
;
242 freq_table
[i
].frequency
= CPUFREQ_TABLE_END
;
244 *table
= &freq_table
[0];
247 void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table
**table
)
249 if (!cpu_is_omap24xx())