2 * arch/arm/mach-dove/common.c
4 * Core functions for Marvell Dove 88AP510 System On Chip
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
11 #include <linux/kernel.h>
12 #include <linux/delay.h>
13 #include <linux/init.h>
14 #include <linux/platform_device.h>
15 #include <linux/pci.h>
16 #include <linux/serial_8250.h>
17 #include <linux/clk.h>
18 #include <linux/mbus.h>
19 #include <linux/mv643xx_eth.h>
20 #include <linux/mv643xx_i2c.h>
21 #include <linux/ata_platform.h>
22 #include <linux/spi/orion_spi.h>
23 #include <linux/gpio.h>
25 #include <asm/setup.h>
26 #include <asm/timex.h>
27 #include <asm/mach/map.h>
28 #include <asm/mach/time.h>
29 #include <asm/mach/pci.h>
30 #include <mach/dove.h>
31 #include <mach/bridge-regs.h>
32 #include <asm/mach/arch.h>
33 #include <linux/irq.h>
34 #include <plat/mv_xor.h>
35 #include <plat/ehci-orion.h>
36 #include <plat/time.h>
39 /*****************************************************************************
41 ****************************************************************************/
42 static struct map_desc dove_io_desc
[] __initdata
= {
44 .virtual = DOVE_SB_REGS_VIRT_BASE
,
45 .pfn
= __phys_to_pfn(DOVE_SB_REGS_PHYS_BASE
),
46 .length
= DOVE_SB_REGS_SIZE
,
49 .virtual = DOVE_NB_REGS_VIRT_BASE
,
50 .pfn
= __phys_to_pfn(DOVE_NB_REGS_PHYS_BASE
),
51 .length
= DOVE_NB_REGS_SIZE
,
54 .virtual = DOVE_PCIE0_IO_VIRT_BASE
,
55 .pfn
= __phys_to_pfn(DOVE_PCIE0_IO_PHYS_BASE
),
56 .length
= DOVE_PCIE0_IO_SIZE
,
59 .virtual = DOVE_PCIE1_IO_VIRT_BASE
,
60 .pfn
= __phys_to_pfn(DOVE_PCIE1_IO_PHYS_BASE
),
61 .length
= DOVE_PCIE1_IO_SIZE
,
66 void __init
dove_map_io(void)
68 iotable_init(dove_io_desc
, ARRAY_SIZE(dove_io_desc
));
71 /*****************************************************************************
73 ****************************************************************************/
74 static struct orion_ehci_data dove_ehci_data
= {
75 .dram
= &dove_mbus_dram_info
,
76 .phy_version
= EHCI_PHY_NA
,
79 static u64 ehci_dmamask
= DMA_BIT_MASK(32);
81 /*****************************************************************************
83 ****************************************************************************/
84 static struct resource dove_ehci0_resources
[] = {
86 .start
= DOVE_USB0_PHYS_BASE
,
87 .end
= DOVE_USB0_PHYS_BASE
+ SZ_4K
- 1,
88 .flags
= IORESOURCE_MEM
,
90 .start
= IRQ_DOVE_USB0
,
92 .flags
= IORESOURCE_IRQ
,
96 static struct platform_device dove_ehci0
= {
100 .dma_mask
= &ehci_dmamask
,
101 .coherent_dma_mask
= DMA_BIT_MASK(32),
102 .platform_data
= &dove_ehci_data
,
104 .resource
= dove_ehci0_resources
,
105 .num_resources
= ARRAY_SIZE(dove_ehci0_resources
),
108 void __init
dove_ehci0_init(void)
110 platform_device_register(&dove_ehci0
);
113 /*****************************************************************************
115 ****************************************************************************/
116 static struct resource dove_ehci1_resources
[] = {
118 .start
= DOVE_USB1_PHYS_BASE
,
119 .end
= DOVE_USB1_PHYS_BASE
+ SZ_4K
- 1,
120 .flags
= IORESOURCE_MEM
,
122 .start
= IRQ_DOVE_USB1
,
123 .end
= IRQ_DOVE_USB1
,
124 .flags
= IORESOURCE_IRQ
,
128 static struct platform_device dove_ehci1
= {
129 .name
= "orion-ehci",
132 .dma_mask
= &ehci_dmamask
,
133 .coherent_dma_mask
= DMA_BIT_MASK(32),
134 .platform_data
= &dove_ehci_data
,
136 .resource
= dove_ehci1_resources
,
137 .num_resources
= ARRAY_SIZE(dove_ehci1_resources
),
140 void __init
dove_ehci1_init(void)
142 platform_device_register(&dove_ehci1
);
145 /*****************************************************************************
147 ****************************************************************************/
148 struct mv643xx_eth_shared_platform_data dove_ge00_shared_data
= {
150 .dram
= &dove_mbus_dram_info
,
153 static struct resource dove_ge00_shared_resources
[] = {
156 .start
= DOVE_GE00_PHYS_BASE
+ 0x2000,
157 .end
= DOVE_GE00_PHYS_BASE
+ SZ_16K
- 1,
158 .flags
= IORESOURCE_MEM
,
162 static struct platform_device dove_ge00_shared
= {
163 .name
= MV643XX_ETH_SHARED_NAME
,
166 .platform_data
= &dove_ge00_shared_data
,
169 .resource
= dove_ge00_shared_resources
,
172 static struct resource dove_ge00_resources
[] = {
175 .start
= IRQ_DOVE_GE00_SUM
,
176 .end
= IRQ_DOVE_GE00_SUM
,
177 .flags
= IORESOURCE_IRQ
,
181 static struct platform_device dove_ge00
= {
182 .name
= MV643XX_ETH_NAME
,
185 .resource
= dove_ge00_resources
,
187 .coherent_dma_mask
= 0xffffffff,
191 void __init
dove_ge00_init(struct mv643xx_eth_platform_data
*eth_data
)
193 eth_data
->shared
= &dove_ge00_shared
;
194 dove_ge00
.dev
.platform_data
= eth_data
;
196 platform_device_register(&dove_ge00_shared
);
197 platform_device_register(&dove_ge00
);
200 /*****************************************************************************
202 ****************************************************************************/
203 static struct resource dove_rtc_resource
[] = {
205 .start
= DOVE_RTC_PHYS_BASE
,
206 .end
= DOVE_RTC_PHYS_BASE
+ 32 - 1,
207 .flags
= IORESOURCE_MEM
,
209 .start
= IRQ_DOVE_RTC
,
210 .flags
= IORESOURCE_IRQ
,
214 void __init
dove_rtc_init(void)
216 platform_device_register_simple("rtc-mv", -1, dove_rtc_resource
, 2);
219 /*****************************************************************************
221 ****************************************************************************/
222 static struct resource dove_sata_resources
[] = {
225 .start
= DOVE_SATA_PHYS_BASE
,
226 .end
= DOVE_SATA_PHYS_BASE
+ 0x5000 - 1,
227 .flags
= IORESOURCE_MEM
,
230 .start
= IRQ_DOVE_SATA
,
231 .end
= IRQ_DOVE_SATA
,
232 .flags
= IORESOURCE_IRQ
,
236 static struct platform_device dove_sata
= {
240 .coherent_dma_mask
= DMA_BIT_MASK(32),
242 .num_resources
= ARRAY_SIZE(dove_sata_resources
),
243 .resource
= dove_sata_resources
,
246 void __init
dove_sata_init(struct mv_sata_platform_data
*sata_data
)
248 sata_data
->dram
= &dove_mbus_dram_info
;
249 dove_sata
.dev
.platform_data
= sata_data
;
250 platform_device_register(&dove_sata
);
253 /*****************************************************************************
255 ****************************************************************************/
256 static struct plat_serial8250_port dove_uart0_data
[] = {
258 .mapbase
= DOVE_UART0_PHYS_BASE
,
259 .membase
= (char *)DOVE_UART0_VIRT_BASE
,
260 .irq
= IRQ_DOVE_UART_0
,
261 .flags
= UPF_SKIP_TEST
| UPF_BOOT_AUTOCONF
,
269 static struct resource dove_uart0_resources
[] = {
271 .start
= DOVE_UART0_PHYS_BASE
,
272 .end
= DOVE_UART0_PHYS_BASE
+ SZ_256
- 1,
273 .flags
= IORESOURCE_MEM
,
275 .start
= IRQ_DOVE_UART_0
,
276 .end
= IRQ_DOVE_UART_0
,
277 .flags
= IORESOURCE_IRQ
,
281 static struct platform_device dove_uart0
= {
282 .name
= "serial8250",
285 .platform_data
= dove_uart0_data
,
287 .resource
= dove_uart0_resources
,
288 .num_resources
= ARRAY_SIZE(dove_uart0_resources
),
291 void __init
dove_uart0_init(void)
293 platform_device_register(&dove_uart0
);
296 /*****************************************************************************
298 ****************************************************************************/
299 static struct plat_serial8250_port dove_uart1_data
[] = {
301 .mapbase
= DOVE_UART1_PHYS_BASE
,
302 .membase
= (char *)DOVE_UART1_VIRT_BASE
,
303 .irq
= IRQ_DOVE_UART_1
,
304 .flags
= UPF_SKIP_TEST
| UPF_BOOT_AUTOCONF
,
312 static struct resource dove_uart1_resources
[] = {
314 .start
= DOVE_UART1_PHYS_BASE
,
315 .end
= DOVE_UART1_PHYS_BASE
+ SZ_256
- 1,
316 .flags
= IORESOURCE_MEM
,
318 .start
= IRQ_DOVE_UART_1
,
319 .end
= IRQ_DOVE_UART_1
,
320 .flags
= IORESOURCE_IRQ
,
324 static struct platform_device dove_uart1
= {
325 .name
= "serial8250",
328 .platform_data
= dove_uart1_data
,
330 .resource
= dove_uart1_resources
,
331 .num_resources
= ARRAY_SIZE(dove_uart1_resources
),
334 void __init
dove_uart1_init(void)
336 platform_device_register(&dove_uart1
);
339 /*****************************************************************************
341 ****************************************************************************/
342 static struct plat_serial8250_port dove_uart2_data
[] = {
344 .mapbase
= DOVE_UART2_PHYS_BASE
,
345 .membase
= (char *)DOVE_UART2_VIRT_BASE
,
346 .irq
= IRQ_DOVE_UART_2
,
347 .flags
= UPF_SKIP_TEST
| UPF_BOOT_AUTOCONF
,
355 static struct resource dove_uart2_resources
[] = {
357 .start
= DOVE_UART2_PHYS_BASE
,
358 .end
= DOVE_UART2_PHYS_BASE
+ SZ_256
- 1,
359 .flags
= IORESOURCE_MEM
,
361 .start
= IRQ_DOVE_UART_2
,
362 .end
= IRQ_DOVE_UART_2
,
363 .flags
= IORESOURCE_IRQ
,
367 static struct platform_device dove_uart2
= {
368 .name
= "serial8250",
371 .platform_data
= dove_uart2_data
,
373 .resource
= dove_uart2_resources
,
374 .num_resources
= ARRAY_SIZE(dove_uart2_resources
),
377 void __init
dove_uart2_init(void)
379 platform_device_register(&dove_uart2
);
382 /*****************************************************************************
384 ****************************************************************************/
385 static struct plat_serial8250_port dove_uart3_data
[] = {
387 .mapbase
= DOVE_UART3_PHYS_BASE
,
388 .membase
= (char *)DOVE_UART3_VIRT_BASE
,
389 .irq
= IRQ_DOVE_UART_3
,
390 .flags
= UPF_SKIP_TEST
| UPF_BOOT_AUTOCONF
,
398 static struct resource dove_uart3_resources
[] = {
400 .start
= DOVE_UART3_PHYS_BASE
,
401 .end
= DOVE_UART3_PHYS_BASE
+ SZ_256
- 1,
402 .flags
= IORESOURCE_MEM
,
404 .start
= IRQ_DOVE_UART_3
,
405 .end
= IRQ_DOVE_UART_3
,
406 .flags
= IORESOURCE_IRQ
,
410 static struct platform_device dove_uart3
= {
411 .name
= "serial8250",
414 .platform_data
= dove_uart3_data
,
416 .resource
= dove_uart3_resources
,
417 .num_resources
= ARRAY_SIZE(dove_uart3_resources
),
420 void __init
dove_uart3_init(void)
422 platform_device_register(&dove_uart3
);
425 /*****************************************************************************
427 ****************************************************************************/
428 static struct orion_spi_info dove_spi0_data
= {
432 static struct resource dove_spi0_resources
[] = {
434 .start
= DOVE_SPI0_PHYS_BASE
,
435 .end
= DOVE_SPI0_PHYS_BASE
+ SZ_512
- 1,
436 .flags
= IORESOURCE_MEM
,
438 .start
= IRQ_DOVE_SPI0
,
439 .end
= IRQ_DOVE_SPI0
,
440 .flags
= IORESOURCE_IRQ
,
444 static struct platform_device dove_spi0
= {
447 .resource
= dove_spi0_resources
,
449 .platform_data
= &dove_spi0_data
,
451 .num_resources
= ARRAY_SIZE(dove_spi0_resources
),
454 void __init
dove_spi0_init(void)
456 platform_device_register(&dove_spi0
);
459 /*****************************************************************************
461 ****************************************************************************/
462 static struct orion_spi_info dove_spi1_data
= {
466 static struct resource dove_spi1_resources
[] = {
468 .start
= DOVE_SPI1_PHYS_BASE
,
469 .end
= DOVE_SPI1_PHYS_BASE
+ SZ_512
- 1,
470 .flags
= IORESOURCE_MEM
,
472 .start
= IRQ_DOVE_SPI1
,
473 .end
= IRQ_DOVE_SPI1
,
474 .flags
= IORESOURCE_IRQ
,
478 static struct platform_device dove_spi1
= {
481 .resource
= dove_spi1_resources
,
483 .platform_data
= &dove_spi1_data
,
485 .num_resources
= ARRAY_SIZE(dove_spi1_resources
),
488 void __init
dove_spi1_init(void)
490 platform_device_register(&dove_spi1
);
493 /*****************************************************************************
495 ****************************************************************************/
496 static struct mv64xxx_i2c_pdata dove_i2c_data
= {
497 .freq_m
= 10, /* assumes 166 MHz TCLK gets 94.3kHz */
499 .timeout
= 1000, /* Default timeout of 1 second */
502 static struct resource dove_i2c_resources
[] = {
505 .start
= DOVE_I2C_PHYS_BASE
,
506 .end
= DOVE_I2C_PHYS_BASE
+ 0x20 - 1,
507 .flags
= IORESOURCE_MEM
,
510 .start
= IRQ_DOVE_I2C
,
512 .flags
= IORESOURCE_IRQ
,
516 static struct platform_device dove_i2c
= {
517 .name
= MV64XXX_I2C_CTLR_NAME
,
519 .num_resources
= ARRAY_SIZE(dove_i2c_resources
),
520 .resource
= dove_i2c_resources
,
522 .platform_data
= &dove_i2c_data
,
526 void __init
dove_i2c_init(void)
528 platform_device_register(&dove_i2c
);
531 /*****************************************************************************
533 ****************************************************************************/
534 static int get_tclk(void)
536 /* use DOVE_RESET_SAMPLE_HI/LO to detect tclk */
540 static void dove_timer_init(void)
542 orion_time_init(IRQ_DOVE_BRIDGE
, get_tclk());
545 struct sys_timer dove_timer
= {
546 .init
= dove_timer_init
,
549 /*****************************************************************************
551 ****************************************************************************/
552 static struct mv_xor_platform_shared_data dove_xor_shared_data
= {
553 .dram
= &dove_mbus_dram_info
,
556 /*****************************************************************************
558 ****************************************************************************/
559 static u64 dove_xor0_dmamask
= DMA_BIT_MASK(32);
561 static struct resource dove_xor0_shared_resources
[] = {
564 .start
= DOVE_XOR0_PHYS_BASE
,
565 .end
= DOVE_XOR0_PHYS_BASE
+ 0xff,
566 .flags
= IORESOURCE_MEM
,
568 .name
= "xor 0 high",
569 .start
= DOVE_XOR0_HIGH_PHYS_BASE
,
570 .end
= DOVE_XOR0_HIGH_PHYS_BASE
+ 0xff,
571 .flags
= IORESOURCE_MEM
,
575 static struct platform_device dove_xor0_shared
= {
576 .name
= MV_XOR_SHARED_NAME
,
579 .platform_data
= &dove_xor_shared_data
,
581 .num_resources
= ARRAY_SIZE(dove_xor0_shared_resources
),
582 .resource
= dove_xor0_shared_resources
,
585 static struct resource dove_xor00_resources
[] = {
587 .start
= IRQ_DOVE_XOR_00
,
588 .end
= IRQ_DOVE_XOR_00
,
589 .flags
= IORESOURCE_IRQ
,
593 static struct mv_xor_platform_data dove_xor00_data
= {
594 .shared
= &dove_xor0_shared
,
596 .pool_size
= PAGE_SIZE
,
599 static struct platform_device dove_xor00_channel
= {
602 .num_resources
= ARRAY_SIZE(dove_xor00_resources
),
603 .resource
= dove_xor00_resources
,
605 .dma_mask
= &dove_xor0_dmamask
,
606 .coherent_dma_mask
= DMA_BIT_MASK(64),
607 .platform_data
= (void *)&dove_xor00_data
,
611 static struct resource dove_xor01_resources
[] = {
613 .start
= IRQ_DOVE_XOR_01
,
614 .end
= IRQ_DOVE_XOR_01
,
615 .flags
= IORESOURCE_IRQ
,
619 static struct mv_xor_platform_data dove_xor01_data
= {
620 .shared
= &dove_xor0_shared
,
622 .pool_size
= PAGE_SIZE
,
625 static struct platform_device dove_xor01_channel
= {
628 .num_resources
= ARRAY_SIZE(dove_xor01_resources
),
629 .resource
= dove_xor01_resources
,
631 .dma_mask
= &dove_xor0_dmamask
,
632 .coherent_dma_mask
= DMA_BIT_MASK(64),
633 .platform_data
= (void *)&dove_xor01_data
,
637 void __init
dove_xor0_init(void)
639 platform_device_register(&dove_xor0_shared
);
642 * two engines can't do memset simultaneously, this limitation
643 * satisfied by removing memset support from one of the engines.
645 dma_cap_set(DMA_MEMCPY
, dove_xor00_data
.cap_mask
);
646 dma_cap_set(DMA_XOR
, dove_xor00_data
.cap_mask
);
647 platform_device_register(&dove_xor00_channel
);
649 dma_cap_set(DMA_MEMCPY
, dove_xor01_data
.cap_mask
);
650 dma_cap_set(DMA_MEMSET
, dove_xor01_data
.cap_mask
);
651 dma_cap_set(DMA_XOR
, dove_xor01_data
.cap_mask
);
652 platform_device_register(&dove_xor01_channel
);
655 /*****************************************************************************
657 ****************************************************************************/
658 static u64 dove_xor1_dmamask
= DMA_BIT_MASK(32);
660 static struct resource dove_xor1_shared_resources
[] = {
663 .start
= DOVE_XOR1_PHYS_BASE
,
664 .end
= DOVE_XOR1_PHYS_BASE
+ 0xff,
665 .flags
= IORESOURCE_MEM
,
667 .name
= "xor 0 high",
668 .start
= DOVE_XOR1_HIGH_PHYS_BASE
,
669 .end
= DOVE_XOR1_HIGH_PHYS_BASE
+ 0xff,
670 .flags
= IORESOURCE_MEM
,
674 static struct platform_device dove_xor1_shared
= {
675 .name
= MV_XOR_SHARED_NAME
,
678 .platform_data
= &dove_xor_shared_data
,
680 .num_resources
= ARRAY_SIZE(dove_xor1_shared_resources
),
681 .resource
= dove_xor1_shared_resources
,
684 static struct resource dove_xor10_resources
[] = {
686 .start
= IRQ_DOVE_XOR_10
,
687 .end
= IRQ_DOVE_XOR_10
,
688 .flags
= IORESOURCE_IRQ
,
692 static struct mv_xor_platform_data dove_xor10_data
= {
693 .shared
= &dove_xor1_shared
,
695 .pool_size
= PAGE_SIZE
,
698 static struct platform_device dove_xor10_channel
= {
701 .num_resources
= ARRAY_SIZE(dove_xor10_resources
),
702 .resource
= dove_xor10_resources
,
704 .dma_mask
= &dove_xor1_dmamask
,
705 .coherent_dma_mask
= DMA_BIT_MASK(64),
706 .platform_data
= (void *)&dove_xor10_data
,
710 static struct resource dove_xor11_resources
[] = {
712 .start
= IRQ_DOVE_XOR_11
,
713 .end
= IRQ_DOVE_XOR_11
,
714 .flags
= IORESOURCE_IRQ
,
718 static struct mv_xor_platform_data dove_xor11_data
= {
719 .shared
= &dove_xor1_shared
,
721 .pool_size
= PAGE_SIZE
,
724 static struct platform_device dove_xor11_channel
= {
727 .num_resources
= ARRAY_SIZE(dove_xor11_resources
),
728 .resource
= dove_xor11_resources
,
730 .dma_mask
= &dove_xor1_dmamask
,
731 .coherent_dma_mask
= DMA_BIT_MASK(64),
732 .platform_data
= (void *)&dove_xor11_data
,
736 void __init
dove_xor1_init(void)
738 platform_device_register(&dove_xor1_shared
);
741 * two engines can't do memset simultaneously, this limitation
742 * satisfied by removing memset support from one of the engines.
744 dma_cap_set(DMA_MEMCPY
, dove_xor10_data
.cap_mask
);
745 dma_cap_set(DMA_XOR
, dove_xor10_data
.cap_mask
);
746 platform_device_register(&dove_xor10_channel
);
748 dma_cap_set(DMA_MEMCPY
, dove_xor11_data
.cap_mask
);
749 dma_cap_set(DMA_MEMSET
, dove_xor11_data
.cap_mask
);
750 dma_cap_set(DMA_XOR
, dove_xor11_data
.cap_mask
);
751 platform_device_register(&dove_xor11_channel
);
754 void __init
dove_init(void)
760 printk(KERN_INFO
"Dove 88AP510 SoC, ");
761 printk(KERN_INFO
"TCLK = %dMHz\n", (tclk
+ 499999) / 1000000);
763 dove_setup_cpu_mbus();
765 dove_ge00_shared_data
.t_clk
= tclk
;
766 dove_uart0_data
[0].uartclk
= tclk
;
767 dove_uart1_data
[0].uartclk
= tclk
;
768 dove_uart2_data
[0].uartclk
= tclk
;
769 dove_uart3_data
[0].uartclk
= tclk
;
770 dove_spi0_data
.tclk
= tclk
;
771 dove_spi1_data
.tclk
= tclk
;
773 /* internal devices that every board has */