include/linux/dma-mapping.h

   1 #ifndef _LINUX_DMA_MAPPING_H
   2 #define _LINUX_DMA_MAPPING_H
   3
   4 #include <linux/device.h>
   5 #include <linux/err.h>
   6 #include <linux/dma-attrs.h>
   7 #include <linux/scatterlist.h>
   8
   9 /* These definitions mirror those in pci.h, so they can be used
  10  * interchangeably with their PCI_ counterparts */
  11 enum dma_data_direction {
  12         DMA_BIDIRECTIONAL = 0,
  13         DMA_TO_DEVICE = 1,
  14         DMA_FROM_DEVICE = 2,
  15         DMA_NONE = 3,
  16 };
  17
  18 struct dma_map_ops {
  19         void* (*alloc_coherent)(struct device *dev, size_t size,
  20                                 dma_addr_t *dma_handle, gfp_t gfp);
  21         void (*free_coherent)(struct device *dev, size_t size,
  22                               void *vaddr, dma_addr_t dma_handle);
  23         dma_addr_t (*map_page)(struct device *dev, struct page *page,
  24                                unsigned long offset, size_t size,
  25                                enum dma_data_direction dir,
  26                                struct dma_attrs *attrs);
  27         void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
  28                            size_t size, enum dma_data_direction dir,
  29                            struct dma_attrs *attrs);
  30         int (*map_sg)(struct device *dev, struct scatterlist *sg,
  31                       int nents, enum dma_data_direction dir,
  32                       struct dma_attrs *attrs);
  33         void (*unmap_sg)(struct device *dev,
  34                          struct scatterlist *sg, int nents,
  35                          enum dma_data_direction dir,
  36                          struct dma_attrs *attrs);
  37         void (*sync_single_for_cpu)(struct device *dev,
  38                                     dma_addr_t dma_handle, size_t size,
  39                                     enum dma_data_direction dir);
  40         void (*sync_single_for_device)(struct device *dev,
  41                                        dma_addr_t dma_handle, size_t size,
  42                                        enum dma_data_direction dir);
  43         void (*sync_sg_for_cpu)(struct device *dev,
  44                                 struct scatterlist *sg, int nents,
  45                                 enum dma_data_direction dir);
  46         void (*sync_sg_for_device)(struct device *dev,
  47                                    struct scatterlist *sg, int nents,
  48                                    enum dma_data_direction dir);
  49         int (*mapping_error)(struct device *dev, dma_addr_t dma_addr);
  50         int (*dma_supported)(struct device *dev, u64 mask);
  51         int (*set_dma_mask)(struct device *dev, u64 mask);
  52         int is_phys;
  53 };
  54
  55 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
  56
  57 typedef u64 DMA_nnBIT_MASK __deprecated;
  58
  59 /*
  60  * NOTE: do not use the below macros in new code and do not add new definitions
  61  * here.
  62  *
  63  * Instead, just open-code DMA_BIT_MASK(n) within your driver
  64  */
  65 #define DMA_64BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(64)
  66 #define DMA_48BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(48)
  67 #define DMA_47BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(47)
  68 #define DMA_40BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(40)
  69 #define DMA_39BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(39)
  70 #define DMA_35BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(35)
  71 #define DMA_32BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(32)
  72 #define DMA_31BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(31)
  73 #define DMA_30BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(30)
  74 #define DMA_29BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(29)
  75 #define DMA_28BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(28)
  76 #define DMA_24BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(24)
  77
  78 #define DMA_MASK_NONE   0x0ULL
  79
  80 static inline int valid_dma_direction(int dma_direction)
  81 {
  82         return ((dma_direction == DMA_BIDIRECTIONAL) ||
  83                 (dma_direction == DMA_TO_DEVICE) ||
  84                 (dma_direction == DMA_FROM_DEVICE));
  85 }
  86
  87 static inline int is_device_dma_capable(struct device *dev)
  88 {
  89         return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
  90 }
  91
  92 #ifdef CONFIG_HAS_DMA
  93 #include <asm/dma-mapping.h>
  94 #else
  95 #include <asm-generic/dma-mapping-broken.h>
  96 #endif
  97
  98 static inline u64 dma_get_mask(struct device *dev)
  99 {
 100         if (dev && dev->dma_mask && *dev->dma_mask)
 101                 return *dev->dma_mask;
 102         return DMA_BIT_MASK(32);
 103 }
 104
 105 static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
 106 {
 107         if (!dma_supported(dev, mask))
 108                 return -EIO;
 109         dev->coherent_dma_mask = mask;
 110         return 0;
 111 }
 112
 113 extern u64 dma_get_required_mask(struct device *dev);
 114
 115 static inline unsigned int dma_get_max_seg_size(struct device *dev)
 116 {
 117         return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536;
 118 }
 119
 120 static inline unsigned int dma_set_max_seg_size(struct device *dev,
 121                                                 unsigned int size)
 122 {
 123         if (dev->dma_parms) {
 124                 dev->dma_parms->max_segment_size = size;
 125                 return 0;
 126         } else
 127                 return -EIO;
 128 }
 129
 130 static inline unsigned long dma_get_seg_boundary(struct device *dev)
 131 {
 132         return dev->dma_parms ?
 133                 dev->dma_parms->segment_boundary_mask : 0xffffffff;
 134 }
 135
 136 static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
 137 {
 138         if (dev->dma_parms) {
 139                 dev->dma_parms->segment_boundary_mask = mask;
 140                 return 0;
 141         } else
 142                 return -EIO;
 143 }
 144
 145 /* flags for the coherent memory api */
 146 #define DMA_MEMORY_MAP                  0x01
 147 #define DMA_MEMORY_IO                   0x02
 148 #define DMA_MEMORY_INCLUDES_CHILDREN    0x04
 149 #define DMA_MEMORY_EXCLUSIVE            0x08
 150
 151 #ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
 152 static inline int
 153 dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
 154                             dma_addr_t device_addr, size_t size, int flags)
 155 {
 156         return 0;
 157 }
 158
 159 static inline void
 160 dma_release_declared_memory(struct device *dev)
 161 {
 162 }
 163
 164 static inline void *
 165 dma_mark_declared_memory_occupied(struct device *dev,
 166                                   dma_addr_t device_addr, size_t size)
 167 {
 168         return ERR_PTR(-EBUSY);
 169 }
 170 #endif
 171
 172 /*
 173  * Managed DMA API
 174  */
 175 extern void *dmam_alloc_coherent(struct device *dev, size_t size,
 176                                  dma_addr_t *dma_handle, gfp_t gfp);
 177 extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
 178                                dma_addr_t dma_handle);
 179 extern void *dmam_alloc_noncoherent(struct device *dev, size_t size,
 180                                     dma_addr_t *dma_handle, gfp_t gfp);
 181 extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr,
 182                                   dma_addr_t dma_handle);
 183 #ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
 184 extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
 185                                         dma_addr_t device_addr, size_t size,
 186                                         int flags);
 187 extern void dmam_release_declared_memory(struct device *dev);
 188 #else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
 189 static inline int dmam_declare_coherent_memory(struct device *dev,
 190                                 dma_addr_t bus_addr, dma_addr_t device_addr,
 191                                 size_t size, gfp_t gfp)
 192 {
 193         return 0;
 194 }
 195
 196 static inline void dmam_release_declared_memory(struct device *dev)
 197 {
 198 }
 199 #endif /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
 200
 201 #ifndef CONFIG_HAVE_DMA_ATTRS
 202 struct dma_attrs;
 203
 204 #define dma_map_single_attrs(dev, cpu_addr, size, dir, attrs) \
 205         dma_map_single(dev, cpu_addr, size, dir)
 206
 207 #define dma_unmap_single_attrs(dev, dma_addr, size, dir, attrs) \
 208         dma_unmap_single(dev, dma_addr, size, dir)
 209
 210 #define dma_map_sg_attrs(dev, sgl, nents, dir, attrs) \
 211         dma_map_sg(dev, sgl, nents, dir)
 212
 213 #define dma_unmap_sg_attrs(dev, sgl, nents, dir, attrs) \
 214         dma_unmap_sg(dev, sgl, nents, dir)
 215
 216 #endif /* CONFIG_HAVE_DMA_ATTRS */
 217
 218 #ifdef CONFIG_NEED_DMA_MAP_STATE
 219 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)        dma_addr_t ADDR_NAME
 220 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME)          __u32 LEN_NAME
 221 #define dma_unmap_addr(PTR, ADDR_NAME)           ((PTR)->ADDR_NAME)
 222 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL)  (((PTR)->ADDR_NAME) = (VAL))
 223 #define dma_unmap_len(PTR, LEN_NAME)             ((PTR)->LEN_NAME)
 224 #define dma_unmap_len_set(PTR, LEN_NAME, VAL)    (((PTR)->LEN_NAME) = (VAL))
 225 #else
 226 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
 227 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
 228 #define dma_unmap_addr(PTR, ADDR_NAME)           (0)
 229 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL)  do { } while (0)
 230 #define dma_unmap_len(PTR, LEN_NAME)             (0)
 231 #define dma_unmap_len_set(PTR, LEN_NAME, VAL)    do { } while (0)
 232 #endif
 233
 234 #endif