| blob | f866e81f93687079c2068d1a0931d0803a7dfbd4 |
1 /*
2 * MPC8323E EMDS Device Tree Source
3 *
4 * Copyright 2006 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
12 / {
13 model = "MPC8323EMDS";
14 compatible = "MPC8323EMDS", "MPC832xMDS", "MPC83xxMDS";
15 #address-cells = <1>;
16 #size-cells = <1>;
18 cpus {
19 #address-cells = <1>;
20 #size-cells = <0>;
22 PowerPC,8323@0 {
23 device_type = "cpu";
24 reg = <0>;
25 d-cache-line-size = <20>; // 32 bytes
26 i-cache-line-size = <20>; // 32 bytes
27 d-cache-size = <4000>; // L1, 16K
28 i-cache-size = <4000>; // L1, 16K
29 timebase-frequency = <0>;
30 bus-frequency = <0>;
31 clock-frequency = <0>;
32 };
33 };
35 memory {
36 device_type = "memory";
37 reg = <00000000 08000000>;
38 };
40 bcsr@f8000000 {
41 device_type = "board-control";
42 reg = <f8000000 8000>;
43 };
45 soc8323@e0000000 {
46 #address-cells = <1>;
47 #size-cells = <1>;
48 device_type = "soc";
49 ranges = <0 e0000000 00100000>;
50 reg = <e0000000 00000200>;
51 bus-frequency = <7DE2900>;
53 wdt@200 {
54 device_type = "watchdog";
55 compatible = "mpc83xx_wdt";
56 reg = <200 100>;
57 };
59 i2c@3000 {
60 #address-cells = <1>;
61 #size-cells = <0>;
62 cell-index = <0>;
63 compatible = "fsl-i2c";
64 reg = <3000 100>;
65 interrupts = <e 8>;
66 interrupt-parent = < &ipic >;
67 dfsrr;
69 rtc@68 {
70 compatible = "dallas,ds1374";
71 reg = <68>;
72 };
73 };
75 serial@4500 {
76 device_type = "serial";
77 compatible = "ns16550";
78 reg = <4500 100>;
79 clock-frequency = <0>;
80 interrupts = <9 8>;
81 interrupt-parent = < &ipic >;
82 };
84 serial@4600 {
85 device_type = "serial";
86 compatible = "ns16550";
87 reg = <4600 100>;
88 clock-frequency = <0>;
89 interrupts = <a 8>;
90 interrupt-parent = < &ipic >;
91 };
93 crypto@30000 {
94 device_type = "crypto";
95 model = "SEC2";
96 compatible = "talitos";
97 reg = <30000 7000>;
98 interrupts = <b 8>;
99 interrupt-parent = < &ipic >;
100 /* Rev. 2.2 */
101 num-channels = <1>;
102 channel-fifo-len = <18>;
103 exec-units-mask = <0000004c>;
104 descriptor-types-mask = <0122003f>;
105 };
107 ipic: pic@700 {
108 interrupt-controller;
109 #address-cells = <0>;
110 #interrupt-cells = <2>;
111 reg = <700 100>;
112 device_type = "ipic";
113 };
115 par_io@1400 {
116 reg = <1400 100>;
117 device_type = "par_io";
118 num-ports = <7>;
120 pio3: ucc_pin@03 {
121 pio-map = <
122 /* port pin dir open_drain assignment has_irq */
123 3 4 3 0 2 0 /* MDIO */
124 3 5 1 0 2 0 /* MDC */
125 0 d 2 0 1 0 /* RX_CLK (CLK9) */
126 3 18 2 0 1 0 /* TX_CLK (CLK10) */
127 1 0 1 0 1 0 /* TxD0 */
128 1 1 1 0 1 0 /* TxD1 */
129 1 2 1 0 1 0 /* TxD2 */
130 1 3 1 0 1 0 /* TxD3 */
131 1 4 2 0 1 0 /* RxD0 */
132 1 5 2 0 1 0 /* RxD1 */
133 1 6 2 0 1 0 /* RxD2 */
134 1 7 2 0 1 0 /* RxD3 */
135 1 8 2 0 1 0 /* RX_ER */
136 1 9 1 0 1 0 /* TX_ER */
137 1 a 2 0 1 0 /* RX_DV */
138 1 b 2 0 1 0 /* COL */
139 1 c 1 0 1 0 /* TX_EN */
140 1 d 2 0 1 0>;/* CRS */
141 };
142 pio4: ucc_pin@04 {
143 pio-map = <
144 /* port pin dir open_drain assignment has_irq */
145 3 1f 2 0 1 0 /* RX_CLK (CLK7) */
146 3 6 2 0 1 0 /* TX_CLK (CLK8) */
147 1 12 1 0 1 0 /* TxD0 */
148 1 13 1 0 1 0 /* TxD1 */
149 1 14 1 0 1 0 /* TxD2 */
150 1 15 1 0 1 0 /* TxD3 */
151 1 16 2 0 1 0 /* RxD0 */
152 1 17 2 0 1 0 /* RxD1 */
153 1 18 2 0 1 0 /* RxD2 */
154 1 19 2 0 1 0 /* RxD3 */
155 1 1a 2 0 1 0 /* RX_ER */
156 1 1b 1 0 1 0 /* TX_ER */
157 1 1c 2 0 1 0 /* RX_DV */
158 1 1d 2 0 1 0 /* COL */
159 1 1e 1 0 1 0 /* TX_EN */
160 1 1f 2 0 1 0>;/* CRS */
161 };
162 };
163 };
165 qe@e0100000 {
166 #address-cells = <1>;
167 #size-cells = <1>;
168 device_type = "qe";
169 model = "QE";
170 ranges = <0 e0100000 00100000>;
171 reg = <e0100000 480>;
172 brg-frequency = <0>;
173 bus-frequency = <BCD3D80>;
175 muram@10000 {
176 device_type = "muram";
177 ranges = <0 00010000 00004000>;
179 data-only@0 {
180 reg = <0 4000>;
181 };
182 };
184 spi@4c0 {
185 device_type = "spi";
186 compatible = "fsl_spi";
187 reg = <4c0 40>;
188 interrupts = <2>;
189 interrupt-parent = < &qeic >;
190 mode = "cpu";
191 };
193 spi@500 {
194 device_type = "spi";
195 compatible = "fsl_spi";
196 reg = <500 40>;
197 interrupts = <1>;
198 interrupt-parent = < &qeic >;
199 mode = "cpu";
200 };
202 usb@6c0 {
203 device_type = "usb";
204 compatible = "qe_udc";
205 reg = <6c0 40 8B00 100>;
206 interrupts = <b>;
207 interrupt-parent = < &qeic >;
208 mode = "slave";
209 };
211 ucc@2200 {
212 device_type = "network";
213 compatible = "ucc_geth";
214 model = "UCC";
215 device-id = <3>;
216 reg = <2200 200>;
217 interrupts = <22>;
218 interrupt-parent = < &qeic >;
219 /*
220 * mac-address is deprecated and will be removed
221 * in 2.6.25. Only recent versions of
222 * U-Boot support local-mac-address, however.
223 */
224 mac-address = [ 00 00 00 00 00 00 ];
225 local-mac-address = [ 00 00 00 00 00 00 ];
226 rx-clock = <19>;
227 tx-clock = <1a>;
228 phy-handle = < &phy3 >;
229 pio-handle = < &pio3 >;
230 };
232 ucc@3200 {
233 device_type = "network";
234 compatible = "ucc_geth";
235 model = "UCC";
236 device-id = <4>;
237 reg = <3200 200>;
238 interrupts = <23>;
239 interrupt-parent = < &qeic >;
240 /*
241 * mac-address is deprecated and will be removed
242 * in 2.6.25. Only recent versions of
243 * U-Boot support local-mac-address, however.
244 */
245 mac-address = [ 00 00 00 00 00 00 ];
246 local-mac-address = [ 00 00 00 00 00 00 ];
247 rx-clock = <17>;
248 tx-clock = <18>;
249 phy-handle = < &phy4 >;
250 pio-handle = < &pio4 >;
251 };
253 mdio@2320 {
254 #address-cells = <1>;
255 #size-cells = <0>;
256 reg = <2320 18>;
257 device_type = "mdio";
258 compatible = "ucc_geth_phy";
260 phy3: ethernet-phy@03 {
261 interrupt-parent = < &ipic >;
262 interrupts = <11 8>;
263 reg = <3>;
264 device_type = "ethernet-phy";
265 };
266 phy4: ethernet-phy@04 {
267 interrupt-parent = < &ipic >;
268 interrupts = <12 8>;
269 reg = <4>;
270 device_type = "ethernet-phy";
271 };
272 };
274 qeic: qeic@80 {
275 interrupt-controller;
276 device_type = "qeic";
277 #address-cells = <0>;
278 #interrupt-cells = <1>;
279 reg = <80 80>;
280 big-endian;
281 interrupts = <20 8 21 8>; //high:32 low:33
282 interrupt-parent = < &ipic >;
283 };
284 };
286 pci@e0008500 {
287 interrupt-map-mask = <f800 0 0 7>;
288 interrupt-map = <
289 /* IDSEL 0x11 AD17 */
290 8800 0 0 1 &ipic 14 8
291 8800 0 0 2 &ipic 15 8
292 8800 0 0 3 &ipic 16 8
293 8800 0 0 4 &ipic 17 8
295 /* IDSEL 0x12 AD18 */
296 9000 0 0 1 &ipic 16 8
297 9000 0 0 2 &ipic 17 8
298 9000 0 0 3 &ipic 14 8
299 9000 0 0 4 &ipic 15 8
301 /* IDSEL 0x13 AD19 */
302 9800 0 0 1 &ipic 17 8
303 9800 0 0 2 &ipic 14 8
304 9800 0 0 3 &ipic 15 8
305 9800 0 0 4 &ipic 16 8
307 /* IDSEL 0x15 AD21*/
308 a800 0 0 1 &ipic 14 8
309 a800 0 0 2 &ipic 15 8
310 a800 0 0 3 &ipic 16 8
311 a800 0 0 4 &ipic 17 8
313 /* IDSEL 0x16 AD22*/
314 b000 0 0 1 &ipic 17 8
315 b000 0 0 2 &ipic 14 8
316 b000 0 0 3 &ipic 15 8
317 b000 0 0 4 &ipic 16 8
319 /* IDSEL 0x17 AD23*/
320 b800 0 0 1 &ipic 16 8
321 b800 0 0 2 &ipic 17 8
322 b800 0 0 3 &ipic 14 8
323 b800 0 0 4 &ipic 15 8
325 /* IDSEL 0x18 AD24*/
326 c000 0 0 1 &ipic 15 8
327 c000 0 0 2 &ipic 16 8
328 c000 0 0 3 &ipic 17 8
329 c000 0 0 4 &ipic 14 8>;
330 interrupt-parent = < &ipic >;
331 interrupts = <42 8>;
332 bus-range = <0 0>;
333 ranges = <02000000 0 90000000 90000000 0 10000000
334 42000000 0 80000000 80000000 0 10000000
335 01000000 0 00000000 d0000000 0 00100000>;
336 clock-frequency = <0>;
337 #interrupt-cells = <1>;
338 #size-cells = <2>;
339 #address-cells = <3>;
340 reg = <e0008500 100>;
341 compatible = "fsl,mpc8349-pci";
342 device_type = "pci";
343 };
344 };