2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/irq.h>
24 #include <linux/log2.h>
25 #include <linux/module.h>
26 #include <linux/moduleparam.h>
27 #include <linux/slab.h>
31 #define DRIVER_AUTHOR "Sarah Sharp"
32 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
34 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
35 static int link_quirk
;
36 module_param(link_quirk
, int, S_IRUGO
| S_IWUSR
);
37 MODULE_PARM_DESC(link_quirk
, "Don't clear the chain bit on a link TRB");
39 /* TODO: copied from ehci-hcd.c - can this be refactored? */
41 * handshake - spin reading hc until handshake completes or fails
42 * @ptr: address of hc register to be read
43 * @mask: bits to look at in result of read
44 * @done: value of those bits when handshake succeeds
45 * @usec: timeout in microseconds
47 * Returns negative errno, or zero on success
49 * Success happens when the "mask" bits have the specified value (hardware
50 * handshake done). There are two failure modes: "usec" have passed (major
51 * hardware flakeout), or the register reads as all-ones (hardware removed).
53 static int handshake(struct xhci_hcd
*xhci
, void __iomem
*ptr
,
54 u32 mask
, u32 done
, int usec
)
59 result
= xhci_readl(xhci
, ptr
);
60 if (result
== ~(u32
)0) /* card removed */
72 * Disable interrupts and begin the xHCI halting process.
74 void xhci_quiesce(struct xhci_hcd
*xhci
)
81 halted
= xhci_readl(xhci
, &xhci
->op_regs
->status
) & STS_HALT
;
85 cmd
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
87 xhci_writel(xhci
, cmd
, &xhci
->op_regs
->command
);
91 * Force HC into halt state.
93 * Disable any IRQs and clear the run/stop bit.
94 * HC will complete any current and actively pipelined transactions, and
95 * should halt within 16 microframes of the run/stop bit being cleared.
96 * Read HC Halted bit in the status register to see when the HC is finished.
97 * XXX: shouldn't we set HC_STATE_HALT here somewhere?
99 int xhci_halt(struct xhci_hcd
*xhci
)
101 xhci_dbg(xhci
, "// Halt the HC\n");
104 return handshake(xhci
, &xhci
->op_regs
->status
,
105 STS_HALT
, STS_HALT
, XHCI_MAX_HALT_USEC
);
109 * Reset a halted HC, and set the internal HC state to HC_STATE_HALT.
111 * This resets pipelines, timers, counters, state machines, etc.
112 * Transactions will be terminated immediately, and operational registers
113 * will be set to their defaults.
115 int xhci_reset(struct xhci_hcd
*xhci
)
120 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
121 if ((state
& STS_HALT
) == 0) {
122 xhci_warn(xhci
, "Host controller not halted, aborting reset.\n");
126 xhci_dbg(xhci
, "// Reset the HC\n");
127 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
128 command
|= CMD_RESET
;
129 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
130 /* XXX: Why does EHCI set this here? Shouldn't other code do this? */
131 xhci_to_hcd(xhci
)->state
= HC_STATE_HALT
;
133 return handshake(xhci
, &xhci
->op_regs
->command
, CMD_RESET
, 0, 250 * 1000);
138 /* Set up MSI-X table for entry 0 (may claim other entries later) */
139 static int xhci_setup_msix(struct xhci_hcd
*xhci
)
142 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
144 xhci
->msix_count
= 0;
145 /* XXX: did I do this right? ixgbe does kcalloc for more than one */
146 xhci
->msix_entries
= kmalloc(sizeof(struct msix_entry
), GFP_KERNEL
);
147 if (!xhci
->msix_entries
) {
148 xhci_err(xhci
, "Failed to allocate MSI-X entries\n");
151 xhci
->msix_entries
[0].entry
= 0;
153 ret
= pci_enable_msix(pdev
, xhci
->msix_entries
, xhci
->msix_count
);
155 xhci_err(xhci
, "Failed to enable MSI-X\n");
160 * Pass the xhci pointer value as the request_irq "cookie".
161 * If more irqs are added, this will need to be unique for each one.
163 ret
= request_irq(xhci
->msix_entries
[0].vector
, &xhci_irq
, 0,
164 "xHCI", xhci_to_hcd(xhci
));
166 xhci_err(xhci
, "Failed to allocate MSI-X interrupt\n");
169 xhci_dbg(xhci
, "Finished setting up MSI-X\n");
173 pci_disable_msix(pdev
);
175 kfree(xhci
->msix_entries
);
176 xhci
->msix_entries
= NULL
;
180 /* XXX: code duplication; can xhci_setup_msix call this? */
181 /* Free any IRQs and disable MSI-X */
182 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
184 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
185 if (!xhci
->msix_entries
)
188 free_irq(xhci
->msix_entries
[0].vector
, xhci
);
189 pci_disable_msix(pdev
);
190 kfree(xhci
->msix_entries
);
191 xhci
->msix_entries
= NULL
;
192 xhci_dbg(xhci
, "Finished cleaning up MSI-X\n");
197 * Initialize memory for HCD and xHC (one-time init).
199 * Program the PAGESIZE register, initialize the device context array, create
200 * device contexts (?), set up a command ring segment (or two?), create event
201 * ring (one for now).
203 int xhci_init(struct usb_hcd
*hcd
)
205 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
208 xhci_dbg(xhci
, "xhci_init\n");
209 spin_lock_init(&xhci
->lock
);
211 xhci_dbg(xhci
, "QUIRK: Not clearing Link TRB chain bits.\n");
212 xhci
->quirks
|= XHCI_LINK_TRB_QUIRK
;
214 xhci_dbg(xhci
, "xHCI doesn't need link TRB QUIRK\n");
216 retval
= xhci_mem_init(xhci
, GFP_KERNEL
);
217 xhci_dbg(xhci
, "Finished xhci_init\n");
223 * Called in interrupt context when there might be work
224 * queued on the event ring
226 * xhci->lock must be held by caller.
228 static void xhci_work(struct xhci_hcd
*xhci
)
234 * Clear the op reg interrupt status first,
235 * so we can receive interrupts from other MSI-X interrupters.
236 * Write 1 to clear the interrupt status.
238 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
240 xhci_writel(xhci
, temp
, &xhci
->op_regs
->status
);
241 /* FIXME when MSI-X is supported and there are multiple vectors */
242 /* Clear the MSI-X event interrupt status */
244 /* Acknowledge the interrupt */
245 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
247 xhci_writel(xhci
, temp
, &xhci
->ir_set
->irq_pending
);
248 /* Flush posted writes */
249 xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
251 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
252 xhci_dbg(xhci
, "xHCI dying, ignoring interrupt. "
253 "Shouldn't IRQs be disabled?\n");
255 /* FIXME this should be a delayed service routine
256 * that clears the EHB.
258 xhci_handle_event(xhci
);
260 /* Clear the event handler busy flag (RW1C); the event ring should be empty. */
261 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
262 xhci_write_64(xhci
, temp_64
| ERST_EHB
, &xhci
->ir_set
->erst_dequeue
);
263 /* Flush posted writes -- FIXME is this necessary? */
264 xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
267 /*-------------------------------------------------------------------------*/
270 * xHCI spec says we can get an interrupt, and if the HC has an error condition,
271 * we might get bad data out of the event ring. Section 4.10.2.7 has a list of
272 * indicators of an event TRB error, but we check the status *first* to be safe.
274 irqreturn_t
xhci_irq(struct usb_hcd
*hcd
)
276 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
280 spin_lock(&xhci
->lock
);
281 trb
= xhci
->event_ring
->dequeue
;
282 /* Check if the xHC generated the interrupt, or the irq is shared */
283 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
284 temp2
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
285 if (temp
== 0xffffffff && temp2
== 0xffffffff)
288 if (!(temp
& STS_EINT
) && !ER_IRQ_PENDING(temp2
)) {
289 spin_unlock(&xhci
->lock
);
292 xhci_dbg(xhci
, "op reg status = %08x\n", temp
);
293 xhci_dbg(xhci
, "ir set irq_pending = %08x\n", temp2
);
294 xhci_dbg(xhci
, "Event ring dequeue ptr:\n");
295 xhci_dbg(xhci
, "@%llx %08x %08x %08x %08x\n",
296 (unsigned long long)xhci_trb_virt_to_dma(xhci
->event_ring
->deq_seg
, trb
),
297 lower_32_bits(trb
->link
.segment_ptr
),
298 upper_32_bits(trb
->link
.segment_ptr
),
299 (unsigned int) trb
->link
.intr_target
,
300 (unsigned int) trb
->link
.control
);
302 if (temp
& STS_FATAL
) {
303 xhci_warn(xhci
, "WARNING: Host System Error\n");
306 xhci_to_hcd(xhci
)->state
= HC_STATE_HALT
;
307 spin_unlock(&xhci
->lock
);
312 spin_unlock(&xhci
->lock
);
317 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
318 void xhci_event_ring_work(unsigned long arg
)
323 struct xhci_hcd
*xhci
= (struct xhci_hcd
*) arg
;
326 xhci_dbg(xhci
, "Poll event ring: %lu\n", jiffies
);
328 spin_lock_irqsave(&xhci
->lock
, flags
);
329 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
330 xhci_dbg(xhci
, "op reg status = 0x%x\n", temp
);
331 if (temp
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
)) {
332 xhci_dbg(xhci
, "HW died, polling stopped.\n");
333 spin_unlock_irqrestore(&xhci
->lock
, flags
);
337 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
338 xhci_dbg(xhci
, "ir_set 0 pending = 0x%x\n", temp
);
339 xhci_dbg(xhci
, "No-op commands handled = %d\n", xhci
->noops_handled
);
340 xhci_dbg(xhci
, "HC error bitmask = 0x%x\n", xhci
->error_bitmask
);
341 xhci
->error_bitmask
= 0;
342 xhci_dbg(xhci
, "Event ring:\n");
343 xhci_debug_segment(xhci
, xhci
->event_ring
->deq_seg
);
344 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
345 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
346 temp_64
&= ~ERST_PTR_MASK
;
347 xhci_dbg(xhci
, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64
);
348 xhci_dbg(xhci
, "Command ring:\n");
349 xhci_debug_segment(xhci
, xhci
->cmd_ring
->deq_seg
);
350 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
351 xhci_dbg_cmd_ptrs(xhci
);
352 for (i
= 0; i
< MAX_HC_SLOTS
; ++i
) {
355 for (j
= 0; j
< 31; ++j
) {
356 xhci_dbg_ep_rings(xhci
, i
, j
, &xhci
->devs
[i
]->eps
[j
]);
360 if (xhci
->noops_submitted
!= NUM_TEST_NOOPS
)
361 if (xhci_setup_one_noop(xhci
))
362 xhci_ring_cmd_db(xhci
);
363 spin_unlock_irqrestore(&xhci
->lock
, flags
);
366 mod_timer(&xhci
->event_ring_timer
, jiffies
+ POLL_TIMEOUT
* HZ
);
368 xhci_dbg(xhci
, "Quit polling the event ring.\n");
373 * Start the HC after it was halted.
375 * This function is called by the USB core when the HC driver is added.
376 * Its opposite is xhci_stop().
378 * xhci_init() must be called once before this function can be called.
379 * Reset the HC, enable device slot contexts, program DCBAAP, and
380 * set command ring pointer and event ring pointer.
382 * Setup MSI-X vectors and enable interrupts.
384 int xhci_run(struct usb_hcd
*hcd
)
388 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
389 void (*doorbell
)(struct xhci_hcd
*) = NULL
;
391 hcd
->uses_new_polling
= 1;
394 xhci_dbg(xhci
, "xhci_run\n");
395 #if 0 /* FIXME: MSI not setup yet */
396 /* Do this at the very last minute */
397 ret
= xhci_setup_msix(xhci
);
403 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
404 init_timer(&xhci
->event_ring_timer
);
405 xhci
->event_ring_timer
.data
= (unsigned long) xhci
;
406 xhci
->event_ring_timer
.function
= xhci_event_ring_work
;
407 /* Poll the event ring */
408 xhci
->event_ring_timer
.expires
= jiffies
+ POLL_TIMEOUT
* HZ
;
410 xhci_dbg(xhci
, "Setting event ring polling timer\n");
411 add_timer(&xhci
->event_ring_timer
);
414 xhci_dbg(xhci
, "Command ring memory map follows:\n");
415 xhci_debug_ring(xhci
, xhci
->cmd_ring
);
416 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
417 xhci_dbg_cmd_ptrs(xhci
);
419 xhci_dbg(xhci
, "ERST memory map follows:\n");
420 xhci_dbg_erst(xhci
, &xhci
->erst
);
421 xhci_dbg(xhci
, "Event ring:\n");
422 xhci_debug_ring(xhci
, xhci
->event_ring
);
423 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
424 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
425 temp_64
&= ~ERST_PTR_MASK
;
426 xhci_dbg(xhci
, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64
);
428 xhci_dbg(xhci
, "// Set the interrupt modulation register\n");
429 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
430 temp
&= ~ER_IRQ_INTERVAL_MASK
;
432 xhci_writel(xhci
, temp
, &xhci
->ir_set
->irq_control
);
434 /* Set the HCD state before we enable the irqs */
435 hcd
->state
= HC_STATE_RUNNING
;
436 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
438 xhci_dbg(xhci
, "// Enable interrupts, cmd = 0x%x.\n",
440 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
442 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
443 xhci_dbg(xhci
, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
444 xhci
->ir_set
, (unsigned int) ER_IRQ_ENABLE(temp
));
445 xhci_writel(xhci
, ER_IRQ_ENABLE(temp
),
446 &xhci
->ir_set
->irq_pending
);
447 xhci_print_ir_set(xhci
, xhci
->ir_set
, 0);
449 if (NUM_TEST_NOOPS
> 0)
450 doorbell
= xhci_setup_one_noop(xhci
);
452 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
454 xhci_dbg(xhci
, "// Turn on HC, cmd = 0x%x.\n",
456 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
457 /* Flush PCI posted writes */
458 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
459 xhci_dbg(xhci
, "// @%p = 0x%x\n", &xhci
->op_regs
->command
, temp
);
463 xhci_dbg(xhci
, "Finished xhci_run\n");
470 * This function is called by the USB core when the HC driver is removed.
471 * Its opposite is xhci_run().
473 * Disable device contexts, disable IRQs, and quiesce the HC.
474 * Reset the HC, finish any completed transactions, and cleanup memory.
476 void xhci_stop(struct usb_hcd
*hcd
)
479 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
481 spin_lock_irq(&xhci
->lock
);
484 spin_unlock_irq(&xhci
->lock
);
486 #if 0 /* No MSI yet */
487 xhci_cleanup_msix(xhci
);
489 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
490 /* Tell the event ring poll function not to reschedule */
492 del_timer_sync(&xhci
->event_ring_timer
);
495 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
496 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
497 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
498 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
499 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
500 &xhci
->ir_set
->irq_pending
);
501 xhci_print_ir_set(xhci
, xhci
->ir_set
, 0);
503 xhci_dbg(xhci
, "cleaning up memory\n");
504 xhci_mem_cleanup(xhci
);
505 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
506 xhci_readl(xhci
, &xhci
->op_regs
->status
));
510 * Shutdown HC (not bus-specific)
512 * This is called when the machine is rebooting or halting. We assume that the
513 * machine will be powered off, and the HC's internal state will be reset.
514 * Don't bother to free memory.
516 void xhci_shutdown(struct usb_hcd
*hcd
)
518 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
520 spin_lock_irq(&xhci
->lock
);
522 spin_unlock_irq(&xhci
->lock
);
525 xhci_cleanup_msix(xhci
);
528 xhci_dbg(xhci
, "xhci_shutdown completed - status = %x\n",
529 xhci_readl(xhci
, &xhci
->op_regs
->status
));
532 /*-------------------------------------------------------------------------*/
535 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
536 * HCDs. Find the index for an endpoint given its descriptor. Use the return
537 * value to right shift 1 for the bitmask.
539 * Index = (epnum * 2) + direction - 1,
540 * where direction = 0 for OUT, 1 for IN.
541 * For control endpoints, the IN index is used (OUT index is unused), so
542 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
544 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor
*desc
)
547 if (usb_endpoint_xfer_control(desc
))
548 index
= (unsigned int) (usb_endpoint_num(desc
)*2);
550 index
= (unsigned int) (usb_endpoint_num(desc
)*2) +
551 (usb_endpoint_dir_in(desc
) ? 1 : 0) - 1;
555 /* Find the flag for this endpoint (for use in the control context). Use the
556 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
559 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor
*desc
)
561 return 1 << (xhci_get_endpoint_index(desc
) + 1);
564 /* Find the flag for this endpoint (for use in the control context). Use the
565 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
568 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index
)
570 return 1 << (ep_index
+ 1);
573 /* Compute the last valid endpoint context index. Basically, this is the
574 * endpoint index plus one. For slot contexts with more than valid endpoint,
575 * we find the most significant bit set in the added contexts flags.
576 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
577 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
579 unsigned int xhci_last_valid_endpoint(u32 added_ctxs
)
581 return fls(added_ctxs
) - 1;
584 /* Returns 1 if the arguments are OK;
585 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
587 int xhci_check_args(struct usb_hcd
*hcd
, struct usb_device
*udev
,
588 struct usb_host_endpoint
*ep
, int check_ep
, const char *func
) {
589 if (!hcd
|| (check_ep
&& !ep
) || !udev
) {
590 printk(KERN_DEBUG
"xHCI %s called with invalid args\n",
595 printk(KERN_DEBUG
"xHCI %s called for root hub\n",
599 if (!udev
->slot_id
) {
600 printk(KERN_DEBUG
"xHCI %s called with unaddressed device\n",
607 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
608 struct usb_device
*udev
, struct xhci_command
*command
,
609 bool ctx_change
, bool must_succeed
);
612 * Full speed devices may have a max packet size greater than 8 bytes, but the
613 * USB core doesn't know that until it reads the first 8 bytes of the
614 * descriptor. If the usb_device's max packet size changes after that point,
615 * we need to issue an evaluate context command and wait on it.
617 static int xhci_check_maxpacket(struct xhci_hcd
*xhci
, unsigned int slot_id
,
618 unsigned int ep_index
, struct urb
*urb
)
620 struct xhci_container_ctx
*in_ctx
;
621 struct xhci_container_ctx
*out_ctx
;
622 struct xhci_input_control_ctx
*ctrl_ctx
;
623 struct xhci_ep_ctx
*ep_ctx
;
625 int hw_max_packet_size
;
628 out_ctx
= xhci
->devs
[slot_id
]->out_ctx
;
629 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
630 hw_max_packet_size
= MAX_PACKET_DECODED(ep_ctx
->ep_info2
);
631 max_packet_size
= urb
->dev
->ep0
.desc
.wMaxPacketSize
;
632 if (hw_max_packet_size
!= max_packet_size
) {
633 xhci_dbg(xhci
, "Max Packet Size for ep 0 changed.\n");
634 xhci_dbg(xhci
, "Max packet size in usb_device = %d\n",
636 xhci_dbg(xhci
, "Max packet size in xHCI HW = %d\n",
638 xhci_dbg(xhci
, "Issuing evaluate context command.\n");
640 /* Set up the modified control endpoint 0 */
641 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
642 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
643 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
644 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
645 ep_ctx
->ep_info2
&= ~MAX_PACKET_MASK
;
646 ep_ctx
->ep_info2
|= MAX_PACKET(max_packet_size
);
648 /* Set up the input context flags for the command */
649 /* FIXME: This won't work if a non-default control endpoint
650 * changes max packet sizes.
652 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
653 ctrl_ctx
->add_flags
= EP0_FLAG
;
654 ctrl_ctx
->drop_flags
= 0;
656 xhci_dbg(xhci
, "Slot %d input context\n", slot_id
);
657 xhci_dbg_ctx(xhci
, in_ctx
, ep_index
);
658 xhci_dbg(xhci
, "Slot %d output context\n", slot_id
);
659 xhci_dbg_ctx(xhci
, out_ctx
, ep_index
);
661 ret
= xhci_configure_endpoint(xhci
, urb
->dev
, NULL
,
664 /* Clean up the input context for later use by bandwidth
667 ctrl_ctx
->add_flags
= SLOT_FLAG
;
673 * non-error returns are a promise to giveback() the urb later
674 * we drop ownership so next owner (or urb unlink) can get it
676 int xhci_urb_enqueue(struct usb_hcd
*hcd
, struct urb
*urb
, gfp_t mem_flags
)
678 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
681 unsigned int slot_id
, ep_index
;
684 if (!urb
|| xhci_check_args(hcd
, urb
->dev
, urb
->ep
, true, __func__
) <= 0)
687 slot_id
= urb
->dev
->slot_id
;
688 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
690 if (!xhci
->devs
|| !xhci
->devs
[slot_id
]) {
692 dev_warn(&urb
->dev
->dev
, "WARN: urb submitted for dev with no Slot ID\n");
696 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
)) {
698 xhci_dbg(xhci
, "urb submitted during PCI suspend\n");
702 if (usb_endpoint_xfer_control(&urb
->ep
->desc
)) {
703 /* Check to see if the max packet size for the default control
704 * endpoint changed during FS device enumeration
706 if (urb
->dev
->speed
== USB_SPEED_FULL
) {
707 ret
= xhci_check_maxpacket(xhci
, slot_id
,
713 /* We have a spinlock and interrupts disabled, so we must pass
714 * atomic context to this function, which may allocate memory.
716 spin_lock_irqsave(&xhci
->lock
, flags
);
717 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
719 ret
= xhci_queue_ctrl_tx(xhci
, GFP_ATOMIC
, urb
,
721 spin_unlock_irqrestore(&xhci
->lock
, flags
);
722 } else if (usb_endpoint_xfer_bulk(&urb
->ep
->desc
)) {
723 spin_lock_irqsave(&xhci
->lock
, flags
);
724 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
726 if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
727 EP_GETTING_STREAMS
) {
728 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
729 "is transitioning to using streams.\n");
731 } else if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
732 EP_GETTING_NO_STREAMS
) {
733 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
734 "is transitioning to "
735 "not having streams.\n");
738 ret
= xhci_queue_bulk_tx(xhci
, GFP_ATOMIC
, urb
,
741 spin_unlock_irqrestore(&xhci
->lock
, flags
);
742 } else if (usb_endpoint_xfer_int(&urb
->ep
->desc
)) {
743 spin_lock_irqsave(&xhci
->lock
, flags
);
744 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
746 ret
= xhci_queue_intr_tx(xhci
, GFP_ATOMIC
, urb
,
748 spin_unlock_irqrestore(&xhci
->lock
, flags
);
755 xhci_dbg(xhci
, "Ep 0x%x: URB %p submitted for "
756 "non-responsive xHCI host.\n",
757 urb
->ep
->desc
.bEndpointAddress
, urb
);
758 spin_unlock_irqrestore(&xhci
->lock
, flags
);
763 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
764 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
765 * should pick up where it left off in the TD, unless a Set Transfer Ring
766 * Dequeue Pointer is issued.
768 * The TRBs that make up the buffers for the canceled URB will be "removed" from
769 * the ring. Since the ring is a contiguous structure, they can't be physically
770 * removed. Instead, there are two options:
772 * 1) If the HC is in the middle of processing the URB to be canceled, we
773 * simply move the ring's dequeue pointer past those TRBs using the Set
774 * Transfer Ring Dequeue Pointer command. This will be the common case,
775 * when drivers timeout on the last submitted URB and attempt to cancel.
777 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
778 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
779 * HC will need to invalidate the any TRBs it has cached after the stop
780 * endpoint command, as noted in the xHCI 0.95 errata.
782 * 3) The TD may have completed by the time the Stop Endpoint Command
783 * completes, so software needs to handle that case too.
785 * This function should protect against the TD enqueueing code ringing the
786 * doorbell while this code is waiting for a Stop Endpoint command to complete.
787 * It also needs to account for multiple cancellations on happening at the same
788 * time for the same endpoint.
790 * Note that this function can be called in any context, or so says
791 * usb_hcd_unlink_urb()
793 int xhci_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
798 struct xhci_hcd
*xhci
;
800 unsigned int ep_index
;
801 struct xhci_ring
*ep_ring
;
802 struct xhci_virt_ep
*ep
;
804 xhci
= hcd_to_xhci(hcd
);
805 spin_lock_irqsave(&xhci
->lock
, flags
);
806 /* Make sure the URB hasn't completed or been unlinked already */
807 ret
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
808 if (ret
|| !urb
->hcpriv
)
810 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
811 if (temp
== 0xffffffff) {
812 xhci_dbg(xhci
, "HW died, freeing TD.\n");
813 td
= (struct xhci_td
*) urb
->hcpriv
;
815 usb_hcd_unlink_urb_from_ep(hcd
, urb
);
816 spin_unlock_irqrestore(&xhci
->lock
, flags
);
817 usb_hcd_giveback_urb(xhci_to_hcd(xhci
), urb
, -ESHUTDOWN
);
821 if (xhci
->xhc_state
& XHCI_STATE_DYING
) {
822 xhci_dbg(xhci
, "Ep 0x%x: URB %p to be canceled on "
823 "non-responsive xHCI host.\n",
824 urb
->ep
->desc
.bEndpointAddress
, urb
);
825 /* Let the stop endpoint command watchdog timer (which set this
826 * state) finish cleaning up the endpoint TD lists. We must
827 * have caught it in the middle of dropping a lock and giving
833 xhci_dbg(xhci
, "Cancel URB %p\n", urb
);
834 xhci_dbg(xhci
, "Event ring:\n");
835 xhci_debug_ring(xhci
, xhci
->event_ring
);
836 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
837 ep
= &xhci
->devs
[urb
->dev
->slot_id
]->eps
[ep_index
];
838 ep_ring
= xhci_urb_to_transfer_ring(xhci
, urb
);
844 xhci_dbg(xhci
, "Endpoint ring:\n");
845 xhci_debug_ring(xhci
, ep_ring
);
846 td
= (struct xhci_td
*) urb
->hcpriv
;
848 list_add_tail(&td
->cancelled_td_list
, &ep
->cancelled_td_list
);
849 /* Queue a stop endpoint command, but only if this is
850 * the first cancellation to be handled.
852 if (!(ep
->ep_state
& EP_HALT_PENDING
)) {
853 ep
->ep_state
|= EP_HALT_PENDING
;
854 ep
->stop_cmds_pending
++;
855 ep
->stop_cmd_timer
.expires
= jiffies
+
856 XHCI_STOP_EP_CMD_TIMEOUT
* HZ
;
857 add_timer(&ep
->stop_cmd_timer
);
858 xhci_queue_stop_endpoint(xhci
, urb
->dev
->slot_id
, ep_index
);
859 xhci_ring_cmd_db(xhci
);
862 spin_unlock_irqrestore(&xhci
->lock
, flags
);
866 /* Drop an endpoint from a new bandwidth configuration for this device.
867 * Only one call to this function is allowed per endpoint before
868 * check_bandwidth() or reset_bandwidth() must be called.
869 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
870 * add the endpoint to the schedule with possibly new parameters denoted by a
871 * different endpoint descriptor in usb_host_endpoint.
872 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
875 * The USB core will not allow URBs to be queued to an endpoint that is being
876 * disabled, so there's no need for mutual exclusion to protect
877 * the xhci->devs[slot_id] structure.
879 int xhci_drop_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
880 struct usb_host_endpoint
*ep
)
882 struct xhci_hcd
*xhci
;
883 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
884 struct xhci_input_control_ctx
*ctrl_ctx
;
885 struct xhci_slot_ctx
*slot_ctx
;
886 unsigned int last_ctx
;
887 unsigned int ep_index
;
888 struct xhci_ep_ctx
*ep_ctx
;
890 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
893 ret
= xhci_check_args(hcd
, udev
, ep
, 1, __func__
);
896 xhci
= hcd_to_xhci(hcd
);
897 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
899 drop_flag
= xhci_get_endpoint_flag(&ep
->desc
);
900 if (drop_flag
== SLOT_FLAG
|| drop_flag
== EP0_FLAG
) {
901 xhci_dbg(xhci
, "xHCI %s - can't drop slot or ep 0 %#x\n",
902 __func__
, drop_flag
);
906 if (!xhci
->devs
|| !xhci
->devs
[udev
->slot_id
]) {
907 xhci_warn(xhci
, "xHCI %s called with unaddressed device\n",
912 in_ctx
= xhci
->devs
[udev
->slot_id
]->in_ctx
;
913 out_ctx
= xhci
->devs
[udev
->slot_id
]->out_ctx
;
914 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
915 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
916 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
917 /* If the HC already knows the endpoint is disabled,
918 * or the HCD has noted it is disabled, ignore this request
920 if ((ep_ctx
->ep_info
& EP_STATE_MASK
) == EP_STATE_DISABLED
||
921 ctrl_ctx
->drop_flags
& xhci_get_endpoint_flag(&ep
->desc
)) {
922 xhci_warn(xhci
, "xHCI %s called with disabled ep %p\n",
927 ctrl_ctx
->drop_flags
|= drop_flag
;
928 new_drop_flags
= ctrl_ctx
->drop_flags
;
930 ctrl_ctx
->add_flags
&= ~drop_flag
;
931 new_add_flags
= ctrl_ctx
->add_flags
;
933 last_ctx
= xhci_last_valid_endpoint(ctrl_ctx
->add_flags
);
934 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
935 /* Update the last valid endpoint context, if we deleted the last one */
936 if ((slot_ctx
->dev_info
& LAST_CTX_MASK
) > LAST_CTX(last_ctx
)) {
937 slot_ctx
->dev_info
&= ~LAST_CTX_MASK
;
938 slot_ctx
->dev_info
|= LAST_CTX(last_ctx
);
940 new_slot_info
= slot_ctx
->dev_info
;
942 xhci_endpoint_zero(xhci
, xhci
->devs
[udev
->slot_id
], ep
);
944 xhci_dbg(xhci
, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
945 (unsigned int) ep
->desc
.bEndpointAddress
,
947 (unsigned int) new_drop_flags
,
948 (unsigned int) new_add_flags
,
949 (unsigned int) new_slot_info
);
953 /* Add an endpoint to a new possible bandwidth configuration for this device.
954 * Only one call to this function is allowed per endpoint before
955 * check_bandwidth() or reset_bandwidth() must be called.
956 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
957 * add the endpoint to the schedule with possibly new parameters denoted by a
958 * different endpoint descriptor in usb_host_endpoint.
959 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
962 * The USB core will not allow URBs to be queued to an endpoint until the
963 * configuration or alt setting is installed in the device, so there's no need
964 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
966 int xhci_add_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
967 struct usb_host_endpoint
*ep
)
969 struct xhci_hcd
*xhci
;
970 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
971 unsigned int ep_index
;
972 struct xhci_ep_ctx
*ep_ctx
;
973 struct xhci_slot_ctx
*slot_ctx
;
974 struct xhci_input_control_ctx
*ctrl_ctx
;
976 unsigned int last_ctx
;
977 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
980 ret
= xhci_check_args(hcd
, udev
, ep
, 1, __func__
);
982 /* So we won't queue a reset ep command for a root hub */
986 xhci
= hcd_to_xhci(hcd
);
988 added_ctxs
= xhci_get_endpoint_flag(&ep
->desc
);
989 last_ctx
= xhci_last_valid_endpoint(added_ctxs
);
990 if (added_ctxs
== SLOT_FLAG
|| added_ctxs
== EP0_FLAG
) {
991 /* FIXME when we have to issue an evaluate endpoint command to
992 * deal with ep0 max packet size changing once we get the
995 xhci_dbg(xhci
, "xHCI %s - can't add slot or ep 0 %#x\n",
996 __func__
, added_ctxs
);
1000 if (!xhci
->devs
|| !xhci
->devs
[udev
->slot_id
]) {
1001 xhci_warn(xhci
, "xHCI %s called with unaddressed device\n",
1006 in_ctx
= xhci
->devs
[udev
->slot_id
]->in_ctx
;
1007 out_ctx
= xhci
->devs
[udev
->slot_id
]->out_ctx
;
1008 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1009 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1010 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1011 /* If the HCD has already noted the endpoint is enabled,
1012 * ignore this request.
1014 if (ctrl_ctx
->add_flags
& xhci_get_endpoint_flag(&ep
->desc
)) {
1015 xhci_warn(xhci
, "xHCI %s called with enabled ep %p\n",
1021 * Configuration and alternate setting changes must be done in
1022 * process context, not interrupt context (or so documenation
1023 * for usb_set_interface() and usb_set_configuration() claim).
1025 if (xhci_endpoint_init(xhci
, xhci
->devs
[udev
->slot_id
],
1026 udev
, ep
, GFP_NOIO
) < 0) {
1027 dev_dbg(&udev
->dev
, "%s - could not initialize ep %#x\n",
1028 __func__
, ep
->desc
.bEndpointAddress
);
1032 ctrl_ctx
->add_flags
|= added_ctxs
;
1033 new_add_flags
= ctrl_ctx
->add_flags
;
1035 /* If xhci_endpoint_disable() was called for this endpoint, but the
1036 * xHC hasn't been notified yet through the check_bandwidth() call,
1037 * this re-adds a new state for the endpoint from the new endpoint
1038 * descriptors. We must drop and re-add this endpoint, so we leave the
1041 new_drop_flags
= ctrl_ctx
->drop_flags
;
1043 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1044 /* Update the last valid endpoint context, if we just added one past */
1045 if ((slot_ctx
->dev_info
& LAST_CTX_MASK
) < LAST_CTX(last_ctx
)) {
1046 slot_ctx
->dev_info
&= ~LAST_CTX_MASK
;
1047 slot_ctx
->dev_info
|= LAST_CTX(last_ctx
);
1049 new_slot_info
= slot_ctx
->dev_info
;
1051 /* Store the usb_device pointer for later use */
1054 xhci_dbg(xhci
, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1055 (unsigned int) ep
->desc
.bEndpointAddress
,
1057 (unsigned int) new_drop_flags
,
1058 (unsigned int) new_add_flags
,
1059 (unsigned int) new_slot_info
);
1063 static void xhci_zero_in_ctx(struct xhci_hcd
*xhci
, struct xhci_virt_device
*virt_dev
)
1065 struct xhci_input_control_ctx
*ctrl_ctx
;
1066 struct xhci_ep_ctx
*ep_ctx
;
1067 struct xhci_slot_ctx
*slot_ctx
;
1070 /* When a device's add flag and drop flag are zero, any subsequent
1071 * configure endpoint command will leave that endpoint's state
1072 * untouched. Make sure we don't leave any old state in the input
1073 * endpoint contexts.
1075 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
1076 ctrl_ctx
->drop_flags
= 0;
1077 ctrl_ctx
->add_flags
= 0;
1078 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
1079 slot_ctx
->dev_info
&= ~LAST_CTX_MASK
;
1080 /* Endpoint 0 is always valid */
1081 slot_ctx
->dev_info
|= LAST_CTX(1);
1082 for (i
= 1; i
< 31; ++i
) {
1083 ep_ctx
= xhci_get_ep_ctx(xhci
, virt_dev
->in_ctx
, i
);
1084 ep_ctx
->ep_info
= 0;
1085 ep_ctx
->ep_info2
= 0;
1087 ep_ctx
->tx_info
= 0;
1091 static int xhci_configure_endpoint_result(struct xhci_hcd
*xhci
,
1092 struct usb_device
*udev
, int *cmd_status
)
1096 switch (*cmd_status
) {
1098 dev_warn(&udev
->dev
, "Not enough host controller resources "
1099 "for new device state.\n");
1101 /* FIXME: can we allocate more resources for the HC? */
1104 dev_warn(&udev
->dev
, "Not enough bandwidth "
1105 "for new device state.\n");
1107 /* FIXME: can we go back to the old state? */
1110 /* the HCD set up something wrong */
1111 dev_warn(&udev
->dev
, "ERROR: Endpoint drop flag = 0, "
1113 "and endpoint is not disabled.\n");
1117 dev_dbg(&udev
->dev
, "Successful Endpoint Configure command\n");
1121 xhci_err(xhci
, "ERROR: unexpected command completion "
1122 "code 0x%x.\n", *cmd_status
);
1129 static int xhci_evaluate_context_result(struct xhci_hcd
*xhci
,
1130 struct usb_device
*udev
, int *cmd_status
)
1133 struct xhci_virt_device
*virt_dev
= xhci
->devs
[udev
->slot_id
];
1135 switch (*cmd_status
) {
1137 dev_warn(&udev
->dev
, "WARN: xHCI driver setup invalid evaluate "
1138 "context command.\n");
1142 dev_warn(&udev
->dev
, "WARN: slot not enabled for"
1143 "evaluate context command.\n");
1144 case COMP_CTX_STATE
:
1145 dev_warn(&udev
->dev
, "WARN: invalid context state for "
1146 "evaluate context command.\n");
1147 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 1);
1151 dev_dbg(&udev
->dev
, "Successful evaluate context command\n");
1155 xhci_err(xhci
, "ERROR: unexpected command completion "
1156 "code 0x%x.\n", *cmd_status
);
1163 /* Issue a configure endpoint command or evaluate context command
1164 * and wait for it to finish.
1166 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
1167 struct usb_device
*udev
,
1168 struct xhci_command
*command
,
1169 bool ctx_change
, bool must_succeed
)
1173 unsigned long flags
;
1174 struct xhci_container_ctx
*in_ctx
;
1175 struct completion
*cmd_completion
;
1177 struct xhci_virt_device
*virt_dev
;
1179 spin_lock_irqsave(&xhci
->lock
, flags
);
1180 virt_dev
= xhci
->devs
[udev
->slot_id
];
1182 in_ctx
= command
->in_ctx
;
1183 cmd_completion
= command
->completion
;
1184 cmd_status
= &command
->status
;
1185 command
->command_trb
= xhci
->cmd_ring
->enqueue
;
1186 list_add_tail(&command
->cmd_list
, &virt_dev
->cmd_list
);
1188 in_ctx
= virt_dev
->in_ctx
;
1189 cmd_completion
= &virt_dev
->cmd_completion
;
1190 cmd_status
= &virt_dev
->cmd_status
;
1192 init_completion(cmd_completion
);
1195 ret
= xhci_queue_configure_endpoint(xhci
, in_ctx
->dma
,
1196 udev
->slot_id
, must_succeed
);
1198 ret
= xhci_queue_evaluate_context(xhci
, in_ctx
->dma
,
1202 list_del(&command
->cmd_list
);
1203 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1204 xhci_dbg(xhci
, "FIXME allocate a new ring segment\n");
1207 xhci_ring_cmd_db(xhci
);
1208 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1210 /* Wait for the configure endpoint command to complete */
1211 timeleft
= wait_for_completion_interruptible_timeout(
1213 USB_CTRL_SET_TIMEOUT
);
1214 if (timeleft
<= 0) {
1215 xhci_warn(xhci
, "%s while waiting for %s command\n",
1216 timeleft
== 0 ? "Timeout" : "Signal",
1218 "configure endpoint" :
1219 "evaluate context");
1220 /* FIXME cancel the configure endpoint command */
1225 return xhci_configure_endpoint_result(xhci
, udev
, cmd_status
);
1226 return xhci_evaluate_context_result(xhci
, udev
, cmd_status
);
1229 /* Called after one or more calls to xhci_add_endpoint() or
1230 * xhci_drop_endpoint(). If this call fails, the USB core is expected
1231 * to call xhci_reset_bandwidth().
1233 * Since we are in the middle of changing either configuration or
1234 * installing a new alt setting, the USB core won't allow URBs to be
1235 * enqueued for any endpoint on the old config or interface. Nothing
1236 * else should be touching the xhci->devs[slot_id] structure, so we
1237 * don't need to take the xhci->lock for manipulating that.
1239 int xhci_check_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
1243 struct xhci_hcd
*xhci
;
1244 struct xhci_virt_device
*virt_dev
;
1245 struct xhci_input_control_ctx
*ctrl_ctx
;
1246 struct xhci_slot_ctx
*slot_ctx
;
1248 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, __func__
);
1251 xhci
= hcd_to_xhci(hcd
);
1253 if (!udev
->slot_id
|| !xhci
->devs
|| !xhci
->devs
[udev
->slot_id
]) {
1254 xhci_warn(xhci
, "xHCI %s called with unaddressed device\n",
1258 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
1259 virt_dev
= xhci
->devs
[udev
->slot_id
];
1261 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
1262 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
1263 ctrl_ctx
->add_flags
|= SLOT_FLAG
;
1264 ctrl_ctx
->add_flags
&= ~EP0_FLAG
;
1265 ctrl_ctx
->drop_flags
&= ~SLOT_FLAG
;
1266 ctrl_ctx
->drop_flags
&= ~EP0_FLAG
;
1267 xhci_dbg(xhci
, "New Input Control Context:\n");
1268 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
1269 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
,
1270 LAST_CTX_TO_EP_NUM(slot_ctx
->dev_info
));
1272 ret
= xhci_configure_endpoint(xhci
, udev
, NULL
,
1275 /* Callee should call reset_bandwidth() */
1279 xhci_dbg(xhci
, "Output context after successful config ep cmd:\n");
1280 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
,
1281 LAST_CTX_TO_EP_NUM(slot_ctx
->dev_info
));
1283 xhci_zero_in_ctx(xhci
, virt_dev
);
1284 /* Install new rings and free or cache any old rings */
1285 for (i
= 1; i
< 31; ++i
) {
1286 if (!virt_dev
->eps
[i
].new_ring
)
1288 /* Only cache or free the old ring if it exists.
1289 * It may not if this is the first add of an endpoint.
1291 if (virt_dev
->eps
[i
].ring
) {
1292 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
1294 virt_dev
->eps
[i
].ring
= virt_dev
->eps
[i
].new_ring
;
1295 virt_dev
->eps
[i
].new_ring
= NULL
;
1301 void xhci_reset_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
1303 struct xhci_hcd
*xhci
;
1304 struct xhci_virt_device
*virt_dev
;
1307 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, __func__
);
1310 xhci
= hcd_to_xhci(hcd
);
1312 if (!xhci
->devs
|| !xhci
->devs
[udev
->slot_id
]) {
1313 xhci_warn(xhci
, "xHCI %s called with unaddressed device\n",
1317 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
1318 virt_dev
= xhci
->devs
[udev
->slot_id
];
1319 /* Free any rings allocated for added endpoints */
1320 for (i
= 0; i
< 31; ++i
) {
1321 if (virt_dev
->eps
[i
].new_ring
) {
1322 xhci_ring_free(xhci
, virt_dev
->eps
[i
].new_ring
);
1323 virt_dev
->eps
[i
].new_ring
= NULL
;
1326 xhci_zero_in_ctx(xhci
, virt_dev
);
1329 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd
*xhci
,
1330 struct xhci_container_ctx
*in_ctx
,
1331 struct xhci_container_ctx
*out_ctx
,
1332 u32 add_flags
, u32 drop_flags
)
1334 struct xhci_input_control_ctx
*ctrl_ctx
;
1335 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1336 ctrl_ctx
->add_flags
= add_flags
;
1337 ctrl_ctx
->drop_flags
= drop_flags
;
1338 xhci_slot_copy(xhci
, in_ctx
, out_ctx
);
1339 ctrl_ctx
->add_flags
|= SLOT_FLAG
;
1341 xhci_dbg(xhci
, "Input Context:\n");
1342 xhci_dbg_ctx(xhci
, in_ctx
, xhci_last_valid_endpoint(add_flags
));
1345 void xhci_setup_input_ctx_for_quirk(struct xhci_hcd
*xhci
,
1346 unsigned int slot_id
, unsigned int ep_index
,
1347 struct xhci_dequeue_state
*deq_state
)
1349 struct xhci_container_ctx
*in_ctx
;
1350 struct xhci_ep_ctx
*ep_ctx
;
1354 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
1355 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
1356 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
1357 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
1358 addr
= xhci_trb_virt_to_dma(deq_state
->new_deq_seg
,
1359 deq_state
->new_deq_ptr
);
1361 xhci_warn(xhci
, "WARN Cannot submit config ep after "
1362 "reset ep command\n");
1363 xhci_warn(xhci
, "WARN deq seg = %p, deq ptr = %p\n",
1364 deq_state
->new_deq_seg
,
1365 deq_state
->new_deq_ptr
);
1368 ep_ctx
->deq
= addr
| deq_state
->new_cycle_state
;
1370 added_ctxs
= xhci_get_endpoint_flag_from_index(ep_index
);
1371 xhci_setup_input_ctx_for_config_ep(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
1372 xhci
->devs
[slot_id
]->out_ctx
, added_ctxs
, added_ctxs
);
1375 void xhci_cleanup_stalled_ring(struct xhci_hcd
*xhci
,
1376 struct usb_device
*udev
, unsigned int ep_index
)
1378 struct xhci_dequeue_state deq_state
;
1379 struct xhci_virt_ep
*ep
;
1381 xhci_dbg(xhci
, "Cleaning up stalled endpoint ring\n");
1382 ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
1383 /* We need to move the HW's dequeue pointer past this TD,
1384 * or it will attempt to resend it on the next doorbell ring.
1386 xhci_find_new_dequeue_state(xhci
, udev
->slot_id
,
1387 ep_index
, ep
->stopped_stream
, ep
->stopped_td
,
1390 /* HW with the reset endpoint quirk will use the saved dequeue state to
1391 * issue a configure endpoint command later.
1393 if (!(xhci
->quirks
& XHCI_RESET_EP_QUIRK
)) {
1394 xhci_dbg(xhci
, "Queueing new dequeue state\n");
1395 xhci_queue_new_dequeue_state(xhci
, udev
->slot_id
,
1396 ep_index
, ep
->stopped_stream
, &deq_state
);
1398 /* Better hope no one uses the input context between now and the
1399 * reset endpoint completion!
1400 * XXX: No idea how this hardware will react when stream rings
1403 xhci_dbg(xhci
, "Setting up input context for "
1404 "configure endpoint command\n");
1405 xhci_setup_input_ctx_for_quirk(xhci
, udev
->slot_id
,
1406 ep_index
, &deq_state
);
1410 /* Deal with stalled endpoints. The core should have sent the control message
1411 * to clear the halt condition. However, we need to make the xHCI hardware
1412 * reset its sequence number, since a device will expect a sequence number of
1413 * zero after the halt condition is cleared.
1414 * Context: in_interrupt
1416 void xhci_endpoint_reset(struct usb_hcd
*hcd
,
1417 struct usb_host_endpoint
*ep
)
1419 struct xhci_hcd
*xhci
;
1420 struct usb_device
*udev
;
1421 unsigned int ep_index
;
1422 unsigned long flags
;
1424 struct xhci_virt_ep
*virt_ep
;
1426 xhci
= hcd_to_xhci(hcd
);
1427 udev
= (struct usb_device
*) ep
->hcpriv
;
1428 /* Called with a root hub endpoint (or an endpoint that wasn't added
1429 * with xhci_add_endpoint()
1433 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1434 virt_ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
1435 if (!virt_ep
->stopped_td
) {
1436 xhci_dbg(xhci
, "Endpoint 0x%x not halted, refusing to reset.\n",
1437 ep
->desc
.bEndpointAddress
);
1440 if (usb_endpoint_xfer_control(&ep
->desc
)) {
1441 xhci_dbg(xhci
, "Control endpoint stall already handled.\n");
1445 xhci_dbg(xhci
, "Queueing reset endpoint command\n");
1446 spin_lock_irqsave(&xhci
->lock
, flags
);
1447 ret
= xhci_queue_reset_ep(xhci
, udev
->slot_id
, ep_index
);
1449 * Can't change the ring dequeue pointer until it's transitioned to the
1450 * stopped state, which is only upon a successful reset endpoint
1451 * command. Better hope that last command worked!
1454 xhci_cleanup_stalled_ring(xhci
, udev
, ep_index
);
1455 kfree(virt_ep
->stopped_td
);
1456 xhci_ring_cmd_db(xhci
);
1458 virt_ep
->stopped_td
= NULL
;
1459 virt_ep
->stopped_trb
= NULL
;
1460 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1463 xhci_warn(xhci
, "FIXME allocate a new ring segment\n");
1466 static int xhci_check_streams_endpoint(struct xhci_hcd
*xhci
,
1467 struct usb_device
*udev
, struct usb_host_endpoint
*ep
,
1468 unsigned int slot_id
)
1471 unsigned int ep_index
;
1472 unsigned int ep_state
;
1476 ret
= xhci_check_args(xhci_to_hcd(xhci
), udev
, ep
, 1, __func__
);
1479 if (!ep
->ss_ep_comp
) {
1480 xhci_warn(xhci
, "WARN: No SuperSpeed Endpoint Companion"
1481 " descriptor for ep 0x%x\n",
1482 ep
->desc
.bEndpointAddress
);
1485 if (ep
->ss_ep_comp
->desc
.bmAttributes
== 0) {
1486 xhci_warn(xhci
, "WARN: SuperSpeed Endpoint Companion"
1487 " descriptor for ep 0x%x does not support streams\n",
1488 ep
->desc
.bEndpointAddress
);
1492 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1493 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
1494 if (ep_state
& EP_HAS_STREAMS
||
1495 ep_state
& EP_GETTING_STREAMS
) {
1496 xhci_warn(xhci
, "WARN: SuperSpeed bulk endpoint 0x%x "
1497 "already has streams set up.\n",
1498 ep
->desc
.bEndpointAddress
);
1499 xhci_warn(xhci
, "Send email to xHCI maintainer and ask for "
1500 "dynamic stream context array reallocation.\n");
1503 if (!list_empty(&xhci
->devs
[slot_id
]->eps
[ep_index
].ring
->td_list
)) {
1504 xhci_warn(xhci
, "Cannot setup streams for SuperSpeed bulk "
1505 "endpoint 0x%x; URBs are pending.\n",
1506 ep
->desc
.bEndpointAddress
);
1512 static void xhci_calculate_streams_entries(struct xhci_hcd
*xhci
,
1513 unsigned int *num_streams
, unsigned int *num_stream_ctxs
)
1515 unsigned int max_streams
;
1517 /* The stream context array size must be a power of two */
1518 *num_stream_ctxs
= roundup_pow_of_two(*num_streams
);
1520 * Find out how many primary stream array entries the host controller
1521 * supports. Later we may use secondary stream arrays (similar to 2nd
1522 * level page entries), but that's an optional feature for xHCI host
1523 * controllers. xHCs must support at least 4 stream IDs.
1525 max_streams
= HCC_MAX_PSA(xhci
->hcc_params
);
1526 if (*num_stream_ctxs
> max_streams
) {
1527 xhci_dbg(xhci
, "xHCI HW only supports %u stream ctx entries.\n",
1529 *num_stream_ctxs
= max_streams
;
1530 *num_streams
= max_streams
;
1534 /* Returns an error code if one of the endpoint already has streams.
1535 * This does not change any data structures, it only checks and gathers
1538 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd
*xhci
,
1539 struct usb_device
*udev
,
1540 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
1541 unsigned int *num_streams
, u32
*changed_ep_bitmask
)
1543 struct usb_host_ss_ep_comp
*ss_ep_comp
;
1544 unsigned int max_streams
;
1545 unsigned int endpoint_flag
;
1549 for (i
= 0; i
< num_eps
; i
++) {
1550 ret
= xhci_check_streams_endpoint(xhci
, udev
,
1551 eps
[i
], udev
->slot_id
);
1555 ss_ep_comp
= eps
[i
]->ss_ep_comp
;
1556 max_streams
= USB_SS_MAX_STREAMS(ss_ep_comp
->desc
.bmAttributes
);
1557 if (max_streams
< (*num_streams
- 1)) {
1558 xhci_dbg(xhci
, "Ep 0x%x only supports %u stream IDs.\n",
1559 eps
[i
]->desc
.bEndpointAddress
,
1561 *num_streams
= max_streams
+1;
1564 endpoint_flag
= xhci_get_endpoint_flag(&eps
[i
]->desc
);
1565 if (*changed_ep_bitmask
& endpoint_flag
)
1567 *changed_ep_bitmask
|= endpoint_flag
;
1572 static u32
xhci_calculate_no_streams_bitmask(struct xhci_hcd
*xhci
,
1573 struct usb_device
*udev
,
1574 struct usb_host_endpoint
**eps
, unsigned int num_eps
)
1576 u32 changed_ep_bitmask
= 0;
1577 unsigned int slot_id
;
1578 unsigned int ep_index
;
1579 unsigned int ep_state
;
1582 slot_id
= udev
->slot_id
;
1583 if (!xhci
->devs
[slot_id
])
1586 for (i
= 0; i
< num_eps
; i
++) {
1587 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
1588 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
1589 /* Are streams already being freed for the endpoint? */
1590 if (ep_state
& EP_GETTING_NO_STREAMS
) {
1591 xhci_warn(xhci
, "WARN Can't disable streams for "
1593 "streams are being disabled already.",
1594 eps
[i
]->desc
.bEndpointAddress
);
1597 /* Are there actually any streams to free? */
1598 if (!(ep_state
& EP_HAS_STREAMS
) &&
1599 !(ep_state
& EP_GETTING_STREAMS
)) {
1600 xhci_warn(xhci
, "WARN Can't disable streams for "
1602 "streams are already disabled!",
1603 eps
[i
]->desc
.bEndpointAddress
);
1604 xhci_warn(xhci
, "WARN xhci_free_streams() called "
1605 "with non-streams endpoint\n");
1608 changed_ep_bitmask
|= xhci_get_endpoint_flag(&eps
[i
]->desc
);
1610 return changed_ep_bitmask
;
1614 * The USB device drivers use this function (though the HCD interface in USB
1615 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
1616 * coordinate mass storage command queueing across multiple endpoints (basically
1617 * a stream ID == a task ID).
1619 * Setting up streams involves allocating the same size stream context array
1620 * for each endpoint and issuing a configure endpoint command for all endpoints.
1622 * Don't allow the call to succeed if one endpoint only supports one stream
1623 * (which means it doesn't support streams at all).
1625 * Drivers may get less stream IDs than they asked for, if the host controller
1626 * hardware or endpoints claim they can't support the number of requested
1629 int xhci_alloc_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1630 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
1631 unsigned int num_streams
, gfp_t mem_flags
)
1634 struct xhci_hcd
*xhci
;
1635 struct xhci_virt_device
*vdev
;
1636 struct xhci_command
*config_cmd
;
1637 unsigned int ep_index
;
1638 unsigned int num_stream_ctxs
;
1639 unsigned long flags
;
1640 u32 changed_ep_bitmask
= 0;
1645 /* Add one to the number of streams requested to account for
1646 * stream 0 that is reserved for xHCI usage.
1649 xhci
= hcd_to_xhci(hcd
);
1650 xhci_dbg(xhci
, "Driver wants %u stream IDs (including stream 0).\n",
1653 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
1655 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
1659 /* Check to make sure all endpoints are not already configured for
1660 * streams. While we're at it, find the maximum number of streams that
1661 * all the endpoints will support and check for duplicate endpoints.
1663 spin_lock_irqsave(&xhci
->lock
, flags
);
1664 ret
= xhci_calculate_streams_and_bitmask(xhci
, udev
, eps
,
1665 num_eps
, &num_streams
, &changed_ep_bitmask
);
1667 xhci_free_command(xhci
, config_cmd
);
1668 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1671 if (num_streams
<= 1) {
1672 xhci_warn(xhci
, "WARN: endpoints can't handle "
1673 "more than one stream.\n");
1674 xhci_free_command(xhci
, config_cmd
);
1675 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1678 vdev
= xhci
->devs
[udev
->slot_id
];
1679 /* Mark each endpoint as being in transistion, so
1680 * xhci_urb_enqueue() will reject all URBs.
1682 for (i
= 0; i
< num_eps
; i
++) {
1683 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
1684 vdev
->eps
[ep_index
].ep_state
|= EP_GETTING_STREAMS
;
1686 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1688 /* Setup internal data structures and allocate HW data structures for
1689 * streams (but don't install the HW structures in the input context
1690 * until we're sure all memory allocation succeeded).
1692 xhci_calculate_streams_entries(xhci
, &num_streams
, &num_stream_ctxs
);
1693 xhci_dbg(xhci
, "Need %u stream ctx entries for %u stream IDs.\n",
1694 num_stream_ctxs
, num_streams
);
1696 for (i
= 0; i
< num_eps
; i
++) {
1697 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
1698 vdev
->eps
[ep_index
].stream_info
= xhci_alloc_stream_info(xhci
,
1700 num_streams
, mem_flags
);
1701 if (!vdev
->eps
[ep_index
].stream_info
)
1703 /* Set maxPstreams in endpoint context and update deq ptr to
1704 * point to stream context array. FIXME
1708 /* Set up the input context for a configure endpoint command. */
1709 for (i
= 0; i
< num_eps
; i
++) {
1710 struct xhci_ep_ctx
*ep_ctx
;
1712 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
1713 ep_ctx
= xhci_get_ep_ctx(xhci
, config_cmd
->in_ctx
, ep_index
);
1715 xhci_endpoint_copy(xhci
, config_cmd
->in_ctx
,
1716 vdev
->out_ctx
, ep_index
);
1717 xhci_setup_streams_ep_input_ctx(xhci
, ep_ctx
,
1718 vdev
->eps
[ep_index
].stream_info
);
1720 /* Tell the HW to drop its old copy of the endpoint context info
1721 * and add the updated copy from the input context.
1723 xhci_setup_input_ctx_for_config_ep(xhci
, config_cmd
->in_ctx
,
1724 vdev
->out_ctx
, changed_ep_bitmask
, changed_ep_bitmask
);
1726 /* Issue and wait for the configure endpoint command */
1727 ret
= xhci_configure_endpoint(xhci
, udev
, config_cmd
,
1730 /* xHC rejected the configure endpoint command for some reason, so we
1731 * leave the old ring intact and free our internal streams data
1737 spin_lock_irqsave(&xhci
->lock
, flags
);
1738 for (i
= 0; i
< num_eps
; i
++) {
1739 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
1740 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
1741 xhci_dbg(xhci
, "Slot %u ep ctx %u now has streams.\n",
1742 udev
->slot_id
, ep_index
);
1743 vdev
->eps
[ep_index
].ep_state
|= EP_HAS_STREAMS
;
1745 xhci_free_command(xhci
, config_cmd
);
1746 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1748 /* Subtract 1 for stream 0, which drivers can't use */
1749 return num_streams
- 1;
1752 /* If it didn't work, free the streams! */
1753 for (i
= 0; i
< num_eps
; i
++) {
1754 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
1755 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
1756 /* FIXME Unset maxPstreams in endpoint context and
1757 * update deq ptr to point to normal string ring.
1759 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
1760 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
1761 xhci_endpoint_zero(xhci
, vdev
, eps
[i
]);
1763 xhci_free_command(xhci
, config_cmd
);
1767 /* Transition the endpoint from using streams to being a "normal" endpoint
1770 * Modify the endpoint context state, submit a configure endpoint command,
1771 * and free all endpoint rings for streams if that completes successfully.
1773 int xhci_free_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1774 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
1778 struct xhci_hcd
*xhci
;
1779 struct xhci_virt_device
*vdev
;
1780 struct xhci_command
*command
;
1781 unsigned int ep_index
;
1782 unsigned long flags
;
1783 u32 changed_ep_bitmask
;
1785 xhci
= hcd_to_xhci(hcd
);
1786 vdev
= xhci
->devs
[udev
->slot_id
];
1788 /* Set up a configure endpoint command to remove the streams rings */
1789 spin_lock_irqsave(&xhci
->lock
, flags
);
1790 changed_ep_bitmask
= xhci_calculate_no_streams_bitmask(xhci
,
1791 udev
, eps
, num_eps
);
1792 if (changed_ep_bitmask
== 0) {
1793 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1797 /* Use the xhci_command structure from the first endpoint. We may have
1798 * allocated too many, but the driver may call xhci_free_streams() for
1799 * each endpoint it grouped into one call to xhci_alloc_streams().
1801 ep_index
= xhci_get_endpoint_index(&eps
[0]->desc
);
1802 command
= vdev
->eps
[ep_index
].stream_info
->free_streams_command
;
1803 for (i
= 0; i
< num_eps
; i
++) {
1804 struct xhci_ep_ctx
*ep_ctx
;
1806 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
1807 ep_ctx
= xhci_get_ep_ctx(xhci
, command
->in_ctx
, ep_index
);
1808 xhci
->devs
[udev
->slot_id
]->eps
[ep_index
].ep_state
|=
1809 EP_GETTING_NO_STREAMS
;
1811 xhci_endpoint_copy(xhci
, command
->in_ctx
,
1812 vdev
->out_ctx
, ep_index
);
1813 xhci_setup_no_streams_ep_input_ctx(xhci
, ep_ctx
,
1814 &vdev
->eps
[ep_index
]);
1816 xhci_setup_input_ctx_for_config_ep(xhci
, command
->in_ctx
,
1817 vdev
->out_ctx
, changed_ep_bitmask
, changed_ep_bitmask
);
1818 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1820 /* Issue and wait for the configure endpoint command,
1821 * which must succeed.
1823 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
1826 /* xHC rejected the configure endpoint command for some reason, so we
1827 * leave the streams rings intact.
1832 spin_lock_irqsave(&xhci
->lock
, flags
);
1833 for (i
= 0; i
< num_eps
; i
++) {
1834 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
1835 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
1836 /* FIXME Unset maxPstreams in endpoint context and
1837 * update deq ptr to point to normal string ring.
1839 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_NO_STREAMS
;
1840 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
1842 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1848 * This submits a Reset Device Command, which will set the device state to 0,
1849 * set the device address to 0, and disable all the endpoints except the default
1850 * control endpoint. The USB core should come back and call
1851 * xhci_address_device(), and then re-set up the configuration. If this is
1852 * called because of a usb_reset_and_verify_device(), then the old alternate
1853 * settings will be re-installed through the normal bandwidth allocation
1856 * Wait for the Reset Device command to finish. Remove all structures
1857 * associated with the endpoints that were disabled. Clear the input device
1858 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
1860 int xhci_reset_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
1863 unsigned long flags
;
1864 struct xhci_hcd
*xhci
;
1865 unsigned int slot_id
;
1866 struct xhci_virt_device
*virt_dev
;
1867 struct xhci_command
*reset_device_cmd
;
1869 int last_freed_endpoint
;
1871 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, __func__
);
1874 xhci
= hcd_to_xhci(hcd
);
1875 slot_id
= udev
->slot_id
;
1876 virt_dev
= xhci
->devs
[slot_id
];
1878 xhci_dbg(xhci
, "%s called with invalid slot ID %u\n",
1883 xhci_dbg(xhci
, "Resetting device with slot ID %u\n", slot_id
);
1884 /* Allocate the command structure that holds the struct completion.
1885 * Assume we're in process context, since the normal device reset
1886 * process has to wait for the device anyway. Storage devices are
1887 * reset as part of error handling, so use GFP_NOIO instead of
1890 reset_device_cmd
= xhci_alloc_command(xhci
, false, true, GFP_NOIO
);
1891 if (!reset_device_cmd
) {
1892 xhci_dbg(xhci
, "Couldn't allocate command structure.\n");
1896 /* Attempt to submit the Reset Device command to the command ring */
1897 spin_lock_irqsave(&xhci
->lock
, flags
);
1898 reset_device_cmd
->command_trb
= xhci
->cmd_ring
->enqueue
;
1899 list_add_tail(&reset_device_cmd
->cmd_list
, &virt_dev
->cmd_list
);
1900 ret
= xhci_queue_reset_device(xhci
, slot_id
);
1902 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
1903 list_del(&reset_device_cmd
->cmd_list
);
1904 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1905 goto command_cleanup
;
1907 xhci_ring_cmd_db(xhci
);
1908 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1910 /* Wait for the Reset Device command to finish */
1911 timeleft
= wait_for_completion_interruptible_timeout(
1912 reset_device_cmd
->completion
,
1913 USB_CTRL_SET_TIMEOUT
);
1914 if (timeleft
<= 0) {
1915 xhci_warn(xhci
, "%s while waiting for reset device command\n",
1916 timeleft
== 0 ? "Timeout" : "Signal");
1917 spin_lock_irqsave(&xhci
->lock
, flags
);
1918 /* The timeout might have raced with the event ring handler, so
1919 * only delete from the list if the item isn't poisoned.
1921 if (reset_device_cmd
->cmd_list
.next
!= LIST_POISON1
)
1922 list_del(&reset_device_cmd
->cmd_list
);
1923 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1925 goto command_cleanup
;
1928 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
1929 * unless we tried to reset a slot ID that wasn't enabled,
1930 * or the device wasn't in the addressed or configured state.
1932 ret
= reset_device_cmd
->status
;
1934 case COMP_EBADSLT
: /* 0.95 completion code for bad slot ID */
1935 case COMP_CTX_STATE
: /* 0.96 completion code for same thing */
1936 xhci_info(xhci
, "Can't reset device (slot ID %u) in %s state\n",
1938 xhci_get_slot_state(xhci
, virt_dev
->out_ctx
));
1939 xhci_info(xhci
, "Not freeing device rings.\n");
1940 /* Don't treat this as an error. May change my mind later. */
1942 goto command_cleanup
;
1944 xhci_dbg(xhci
, "Successful reset device command.\n");
1947 if (xhci_is_vendor_info_code(xhci
, ret
))
1949 xhci_warn(xhci
, "Unknown completion code %u for "
1950 "reset device command.\n", ret
);
1952 goto command_cleanup
;
1955 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
1956 last_freed_endpoint
= 1;
1957 for (i
= 1; i
< 31; ++i
) {
1958 if (!virt_dev
->eps
[i
].ring
)
1960 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
1961 last_freed_endpoint
= i
;
1963 xhci_dbg(xhci
, "Output context after successful reset device cmd:\n");
1964 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, last_freed_endpoint
);
1968 xhci_free_command(xhci
, reset_device_cmd
);
1973 * At this point, the struct usb_device is about to go away, the device has
1974 * disconnected, and all traffic has been stopped and the endpoints have been
1975 * disabled. Free any HC data structures associated with that device.
1977 void xhci_free_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
1979 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
1980 struct xhci_virt_device
*virt_dev
;
1981 unsigned long flags
;
1985 if (udev
->slot_id
== 0)
1987 virt_dev
= xhci
->devs
[udev
->slot_id
];
1991 /* Stop any wayward timer functions (which may grab the lock) */
1992 for (i
= 0; i
< 31; ++i
) {
1993 virt_dev
->eps
[i
].ep_state
&= ~EP_HALT_PENDING
;
1994 del_timer_sync(&virt_dev
->eps
[i
].stop_cmd_timer
);
1997 spin_lock_irqsave(&xhci
->lock
, flags
);
1998 /* Don't disable the slot if the host controller is dead. */
1999 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
2000 if (state
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
)) {
2001 xhci_free_virt_device(xhci
, udev
->slot_id
);
2002 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2006 if (xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
)) {
2007 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2008 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
2011 xhci_ring_cmd_db(xhci
);
2012 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2014 * Event command completion handler will free any data structures
2015 * associated with the slot. XXX Can free sleep?
2020 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
2021 * timed out, or allocating memory failed. Returns 1 on success.
2023 int xhci_alloc_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2025 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
2026 unsigned long flags
;
2030 spin_lock_irqsave(&xhci
->lock
, flags
);
2031 ret
= xhci_queue_slot_control(xhci
, TRB_ENABLE_SLOT
, 0);
2033 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2034 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
2037 xhci_ring_cmd_db(xhci
);
2038 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2040 /* XXX: how much time for xHC slot assignment? */
2041 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
2042 USB_CTRL_SET_TIMEOUT
);
2043 if (timeleft
<= 0) {
2044 xhci_warn(xhci
, "%s while waiting for a slot\n",
2045 timeleft
== 0 ? "Timeout" : "Signal");
2046 /* FIXME cancel the enable slot request */
2050 if (!xhci
->slot_id
) {
2051 xhci_err(xhci
, "Error while assigning device slot ID\n");
2054 /* xhci_alloc_virt_device() does not touch rings; no need to lock */
2055 if (!xhci_alloc_virt_device(xhci
, xhci
->slot_id
, udev
, GFP_KERNEL
)) {
2056 /* Disable slot, if we can do it without mem alloc */
2057 xhci_warn(xhci
, "Could not allocate xHCI USB device data structures\n");
2058 spin_lock_irqsave(&xhci
->lock
, flags
);
2059 if (!xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
))
2060 xhci_ring_cmd_db(xhci
);
2061 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2064 udev
->slot_id
= xhci
->slot_id
;
2065 /* Is this a LS or FS device under a HS hub? */
2066 /* Hub or peripherial? */
2071 * Issue an Address Device command (which will issue a SetAddress request to
2073 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
2074 * we should only issue and wait on one address command at the same time.
2076 * We add one to the device address issued by the hardware because the USB core
2077 * uses address 1 for the root hubs (even though they're not really devices).
2079 int xhci_address_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2081 unsigned long flags
;
2083 struct xhci_virt_device
*virt_dev
;
2085 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
2086 struct xhci_slot_ctx
*slot_ctx
;
2087 struct xhci_input_control_ctx
*ctrl_ctx
;
2090 if (!udev
->slot_id
) {
2091 xhci_dbg(xhci
, "Bad Slot ID %d\n", udev
->slot_id
);
2095 virt_dev
= xhci
->devs
[udev
->slot_id
];
2097 /* If this is a Set Address to an unconfigured device, setup ep 0 */
2099 xhci_setup_addressable_virt_dev(xhci
, udev
);
2100 /* Otherwise, assume the core has the device configured how it wants */
2101 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
2102 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
2104 spin_lock_irqsave(&xhci
->lock
, flags
);
2105 ret
= xhci_queue_address_device(xhci
, virt_dev
->in_ctx
->dma
,
2108 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2109 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
2112 xhci_ring_cmd_db(xhci
);
2113 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2115 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
2116 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
2117 USB_CTRL_SET_TIMEOUT
);
2118 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
2119 * the SetAddress() "recovery interval" required by USB and aborting the
2120 * command on a timeout.
2122 if (timeleft
<= 0) {
2123 xhci_warn(xhci
, "%s while waiting for a slot\n",
2124 timeleft
== 0 ? "Timeout" : "Signal");
2125 /* FIXME cancel the address device command */
2129 switch (virt_dev
->cmd_status
) {
2130 case COMP_CTX_STATE
:
2132 xhci_err(xhci
, "Setup ERROR: address device command for slot %d.\n",
2137 dev_warn(&udev
->dev
, "Device not responding to set address.\n");
2141 xhci_dbg(xhci
, "Successful Address Device command\n");
2144 xhci_err(xhci
, "ERROR: unexpected command completion "
2145 "code 0x%x.\n", virt_dev
->cmd_status
);
2146 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
2147 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
2154 temp_64
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
2155 xhci_dbg(xhci
, "Op regs DCBAA ptr = %#016llx\n", temp_64
);
2156 xhci_dbg(xhci
, "Slot ID %d dcbaa entry @%p = %#016llx\n",
2158 &xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
],
2159 (unsigned long long)
2160 xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
]);
2161 xhci_dbg(xhci
, "Output Context DMA address = %#08llx\n",
2162 (unsigned long long)virt_dev
->out_ctx
->dma
);
2163 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
2164 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
2165 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
2166 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
2168 * USB core uses address 1 for the roothubs, so we add one to the
2169 * address given back to us by the HC.
2171 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
2172 udev
->devnum
= (slot_ctx
->dev_state
& DEV_ADDR_MASK
) + 1;
2173 /* Zero the input context control for later use */
2174 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
2175 ctrl_ctx
->add_flags
= 0;
2176 ctrl_ctx
->drop_flags
= 0;
2178 xhci_dbg(xhci
, "Device address = %d\n", udev
->devnum
);
2179 /* XXX Meh, not sure if anyone else but choose_address uses this. */
2180 set_bit(udev
->devnum
, udev
->bus
->devmap
.devicemap
);
2185 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
2186 * internal data structures for the device.
2188 int xhci_update_hub_device(struct usb_hcd
*hcd
, struct usb_device
*hdev
,
2189 struct usb_tt
*tt
, gfp_t mem_flags
)
2191 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
2192 struct xhci_virt_device
*vdev
;
2193 struct xhci_command
*config_cmd
;
2194 struct xhci_input_control_ctx
*ctrl_ctx
;
2195 struct xhci_slot_ctx
*slot_ctx
;
2196 unsigned long flags
;
2197 unsigned think_time
;
2200 /* Ignore root hubs */
2204 vdev
= xhci
->devs
[hdev
->slot_id
];
2206 xhci_warn(xhci
, "Cannot update hub desc for unknown device.\n");
2209 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
2211 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
2215 spin_lock_irqsave(&xhci
->lock
, flags
);
2216 xhci_slot_copy(xhci
, config_cmd
->in_ctx
, vdev
->out_ctx
);
2217 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, config_cmd
->in_ctx
);
2218 ctrl_ctx
->add_flags
|= SLOT_FLAG
;
2219 slot_ctx
= xhci_get_slot_ctx(xhci
, config_cmd
->in_ctx
);
2220 slot_ctx
->dev_info
|= DEV_HUB
;
2222 slot_ctx
->dev_info
|= DEV_MTT
;
2223 if (xhci
->hci_version
> 0x95) {
2224 xhci_dbg(xhci
, "xHCI version %x needs hub "
2225 "TT think time and number of ports\n",
2226 (unsigned int) xhci
->hci_version
);
2227 slot_ctx
->dev_info2
|= XHCI_MAX_PORTS(hdev
->maxchild
);
2228 /* Set TT think time - convert from ns to FS bit times.
2229 * 0 = 8 FS bit times, 1 = 16 FS bit times,
2230 * 2 = 24 FS bit times, 3 = 32 FS bit times.
2232 think_time
= tt
->think_time
;
2233 if (think_time
!= 0)
2234 think_time
= (think_time
/ 666) - 1;
2235 slot_ctx
->tt_info
|= TT_THINK_TIME(think_time
);
2237 xhci_dbg(xhci
, "xHCI version %x doesn't need hub "
2238 "TT think time or number of ports\n",
2239 (unsigned int) xhci
->hci_version
);
2241 slot_ctx
->dev_state
= 0;
2242 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2244 xhci_dbg(xhci
, "Set up %s for hub device.\n",
2245 (xhci
->hci_version
> 0x95) ?
2246 "configure endpoint" : "evaluate context");
2247 xhci_dbg(xhci
, "Slot %u Input Context:\n", hdev
->slot_id
);
2248 xhci_dbg_ctx(xhci
, config_cmd
->in_ctx
, 0);
2250 /* Issue and wait for the configure endpoint or
2251 * evaluate context command.
2253 if (xhci
->hci_version
> 0x95)
2254 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
2257 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
2260 xhci_dbg(xhci
, "Slot %u Output Context:\n", hdev
->slot_id
);
2261 xhci_dbg_ctx(xhci
, vdev
->out_ctx
, 0);
2263 xhci_free_command(xhci
, config_cmd
);
2267 int xhci_get_frame(struct usb_hcd
*hcd
)
2269 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
2270 /* EHCI mods by the periodic size. Why? */
2271 return xhci_readl(xhci
, &xhci
->run_regs
->microframe_index
) >> 3;
2274 MODULE_DESCRIPTION(DRIVER_DESC
);
2275 MODULE_AUTHOR(DRIVER_AUTHOR
);
2276 MODULE_LICENSE("GPL");
2278 static int __init
xhci_hcd_init(void)
2283 retval
= xhci_register_pci();
2286 printk(KERN_DEBUG
"Problem registering PCI driver.");
2291 * Check the compiler generated sizes of structures that must be laid
2292 * out in specific ways for hardware access.
2294 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array
) != 256*32/8);
2295 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx
) != 8*32/8);
2296 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx
) != 8*32/8);
2297 /* xhci_device_control has eight fields, and also
2298 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
2300 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx
) != 4*32/8);
2301 BUILD_BUG_ON(sizeof(union xhci_trb
) != 4*32/8);
2302 BUILD_BUG_ON(sizeof(struct xhci_erst_entry
) != 4*32/8);
2303 BUILD_BUG_ON(sizeof(struct xhci_cap_regs
) != 7*32/8);
2304 BUILD_BUG_ON(sizeof(struct xhci_intr_reg
) != 8*32/8);
2305 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
2306 BUILD_BUG_ON(sizeof(struct xhci_run_regs
) != (8+8*128)*32/8);
2307 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array
) != 256*32/8);
2310 module_init(xhci_hcd_init
);
2312 static void __exit
xhci_hcd_cleanup(void)
2315 xhci_unregister_pci();
2318 module_exit(xhci_hcd_cleanup
);