Davinci: DM365: Add platform device for McBSP
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / arm / mach-davinci / include / mach / asp.h
blobfef12b919c694429499b04e83c326d79b2e2ce39
1 /*
2 * <mach/asp.h> - DaVinci Audio Serial Port support
3 */
4 #ifndef __ASM_ARCH_DAVINCI_ASP_H
5 #define __ASM_ARCH_DAVINCI_ASP_H
7 #include <mach/irqs.h>
8 #include <mach/edma.h>
10 /* Bases of dm644x and dm355 register banks */
11 #define DAVINCI_ASP0_BASE 0x01E02000
12 #define DAVINCI_ASP1_BASE 0x01E04000
14 /* Bases of dm365 register banks */
15 #define DAVINCI_DM365_ASP0_BASE 0x01D02000
17 /* Bases of dm646x register banks */
18 #define DAVINCI_DM646X_MCASP0_REG_BASE 0x01D01000
19 #define DAVINCI_DM646X_MCASP1_REG_BASE 0x01D01800
21 /* Bases of da850/da830 McASP0 register banks */
22 #define DAVINCI_DA8XX_MCASP0_REG_BASE 0x01D00000
24 /* Bases of da830 McASP1 register banks */
25 #define DAVINCI_DA830_MCASP1_REG_BASE 0x01D04000
27 /* EDMA channels of dm644x and dm355 */
28 #define DAVINCI_DMA_ASP0_TX 2
29 #define DAVINCI_DMA_ASP0_RX 3
30 #define DAVINCI_DMA_ASP1_TX 8
31 #define DAVINCI_DMA_ASP1_RX 9
33 /* EDMA channels of dm646x */
34 #define DAVINCI_DM646X_DMA_MCASP0_AXEVT0 6
35 #define DAVINCI_DM646X_DMA_MCASP0_AREVT0 9
36 #define DAVINCI_DM646X_DMA_MCASP1_AXEVT1 12
38 /* EDMA channels of da850/da830 McASP0 */
39 #define DAVINCI_DA8XX_DMA_MCASP0_AREVT 0
40 #define DAVINCI_DA8XX_DMA_MCASP0_AXEVT 1
42 /* EDMA channels of da830 McASP1 */
43 #define DAVINCI_DA830_DMA_MCASP1_AREVT 2
44 #define DAVINCI_DA830_DMA_MCASP1_AXEVT 3
46 /* Interrupts */
47 #define DAVINCI_ASP0_RX_INT IRQ_MBRINT
48 #define DAVINCI_ASP0_TX_INT IRQ_MBXINT
49 #define DAVINCI_ASP1_RX_INT IRQ_MBRINT
50 #define DAVINCI_ASP1_TX_INT IRQ_MBXINT
52 struct snd_platform_data {
53 u32 tx_dma_offset;
54 u32 rx_dma_offset;
55 enum dma_event_q eventq_no; /* event queue number */
56 unsigned int codec_fmt;
58 /* McASP specific fields */
59 int tdm_slots;
60 u8 op_mode;
61 u8 num_serializer;
62 u8 *serial_dir;
63 u8 version;
64 u8 txnumevt;
65 u8 rxnumevt;
68 enum {
69 MCASP_VERSION_1 = 0, /* DM646x */
70 MCASP_VERSION_2, /* DA8xx/OMAPL1x */
73 #define INACTIVE_MODE 0
74 #define TX_MODE 1
75 #define RX_MODE 2
77 #define DAVINCI_MCASP_IIS_MODE 0
78 #define DAVINCI_MCASP_DIT_MODE 1
80 #endif /* __ASM_ARCH_DAVINCI_ASP_H */