2 * irq.h: in kernel interrupt controller related definitions
3 * Copyright (c) 2007, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
18 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
27 typedef void irq_request_func(void *opaque
, int level
);
29 struct kvm_kpic_state
{
30 u8 last_irr
; /* edge detection */
31 u8 irr
; /* interrupt request register */
32 u8 imr
; /* interrupt mask register */
33 u8 isr
; /* interrupt service register */
34 u8 priority_add
; /* highest irq priority */
41 u8 rotate_on_auto_eoi
;
42 u8 special_fully_nested_mode
;
43 u8 init4
; /* true if 4 byte init */
44 u8 elcr
; /* PIIX edge/trigger selection */
46 struct kvm_pic
*pics_state
;
50 struct kvm_kpic_state pics
[2]; /* 0 is master pic, 1 is slave pic */
51 irq_request_func
*irq_request
;
52 void *irq_request_opaque
;
53 int output
; /* intr from master PIC */
54 struct kvm_io_device dev
;
57 struct kvm_pic
*kvm_create_pic(struct kvm
*kvm
);
58 void kvm_pic_set_irq(void *opaque
, int irq
, int level
);
59 int kvm_pic_read_irq(struct kvm_pic
*s
);
60 int kvm_cpu_get_interrupt(struct kvm_vcpu
*v
);
61 int kvm_cpu_has_interrupt(struct kvm_vcpu
*v
);
62 void kvm_pic_update_irq(struct kvm_pic
*s
);
64 #define IOAPIC_NUM_PINS KVM_IOAPIC_NUM_PINS
65 #define IOAPIC_VERSION_ID 0x11 /* IOAPIC version */
66 #define IOAPIC_EDGE_TRIG 0
67 #define IOAPIC_LEVEL_TRIG 1
69 #define IOAPIC_DEFAULT_BASE_ADDRESS 0xfec00000
70 #define IOAPIC_MEM_LENGTH 0x100
72 /* Direct registers. */
73 #define IOAPIC_REG_SELECT 0x00
74 #define IOAPIC_REG_WINDOW 0x10
75 #define IOAPIC_REG_EOI 0x40 /* IA64 IOSAPIC only */
77 /* Indirect registers. */
78 #define IOAPIC_REG_APIC_ID 0x00 /* x86 IOAPIC only */
79 #define IOAPIC_REG_VERSION 0x01
80 #define IOAPIC_REG_ARB_ID 0x02 /* x86 IOAPIC only */
88 union ioapic_redir_entry
{
103 } redirtbl
[IOAPIC_NUM_PINS
];
104 struct kvm_io_device dev
;
109 unsigned long base_address
;
110 struct kvm_io_device dev
;
113 s64 period
; /* unit: ns */
118 struct kvm_vcpu
*vcpu
;
119 struct page
*regs_page
;
127 printk(KERN_EMERG "assertion failed %s: %d: %s\n", \
128 __FILE__, __LINE__, #x); \
133 #define ASSERT(x) do { } while (0)
136 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
);
137 int kvm_apic_has_interrupt(struct kvm_vcpu
*vcpu
);
138 int kvm_apic_accept_pic_intr(struct kvm_vcpu
*vcpu
);
139 int kvm_get_apic_interrupt(struct kvm_vcpu
*vcpu
);
140 int kvm_create_lapic(struct kvm_vcpu
*vcpu
);
141 void kvm_lapic_reset(struct kvm_vcpu
*vcpu
);
142 void kvm_free_apic(struct kvm_lapic
*apic
);
143 u64
kvm_lapic_get_cr8(struct kvm_vcpu
*vcpu
);
144 void kvm_lapic_set_tpr(struct kvm_vcpu
*vcpu
, unsigned long cr8
);
145 void kvm_lapic_set_base(struct kvm_vcpu
*vcpu
, u64 value
);
146 struct kvm_lapic
*kvm_apic_round_robin(struct kvm
*kvm
, u8 vector
,
147 unsigned long bitmap
);
148 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
);
149 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
);
150 int kvm_apic_match_physical_addr(struct kvm_lapic
*apic
, u16 dest
);
151 void kvm_ioapic_update_eoi(struct kvm
*kvm
, int vector
);
152 int kvm_apic_match_logical_addr(struct kvm_lapic
*apic
, u8 mda
);
153 int kvm_apic_set_irq(struct kvm_lapic
*apic
, u8 vec
, u8 trig
);
154 void kvm_apic_post_state_restore(struct kvm_vcpu
*vcpu
);
155 int kvm_ioapic_init(struct kvm
*kvm
);
156 void kvm_ioapic_set_irq(struct kvm_ioapic
*ioapic
, int irq
, int level
);
157 int kvm_lapic_enabled(struct kvm_vcpu
*vcpu
);
158 int kvm_lapic_find_highest_irr(struct kvm_vcpu
*vcpu
);
159 void kvm_apic_timer_intr_post(struct kvm_vcpu
*vcpu
, int vec
);
160 void kvm_timer_intr_post(struct kvm_vcpu
*vcpu
, int vec
);
161 void kvm_inject_pending_timer_irqs(struct kvm_vcpu
*vcpu
);
162 void kvm_inject_apic_timer_irqs(struct kvm_vcpu
*vcpu
);
163 void kvm_migrate_apic_timer(struct kvm_vcpu
*vcpu
);