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[SCSI] mpt2sas: Fix for little endian
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / scsi / mpt2sas / mpt2sas_base.c
blob6f786349679f251364b9a53401daa0c9602d26b0
1 /*
2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
4 *
5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
6 * Copyright (C) 2007-2009 LSI Corporation
7 * (mailto:DL-MPTFusionLinux@lsi.com)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * NO WARRANTY
20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
24 * solely responsible for determining the appropriateness of using and
25 * distributing the Program and assumes all risks associated with its
26 * exercise of rights under this Agreement, including but not limited to
27 * the risks and costs of program errors, damage to or loss of data,
28 * programs or equipment, and unavailability or interruption of operations.
29
30 * DISCLAIMER OF LIABILITY
31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
38
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
42 * USA.
43 */
44
45 #include <linux/version.h>
46 #include <linux/kernel.h>
47 #include <linux/module.h>
48 #include <linux/errno.h>
49 #include <linux/init.h>
50 #include <linux/slab.h>
51 #include <linux/types.h>
52 #include <linux/pci.h>
53 #include <linux/kdev_t.h>
54 #include <linux/blkdev.h>
55 #include <linux/delay.h>
56 #include <linux/interrupt.h>
57 #include <linux/dma-mapping.h>
58 #include <linux/sort.h>
59 #include <linux/io.h>
60 #include <linux/time.h>
61
62 #include "mpt2sas_base.h"
63
64 static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
65
66 #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
67 #define MPT2SAS_MAX_REQUEST_QUEUE 600 /* maximum controller queue depth */
68
69 static int max_queue_depth = -1;
70 module_param(max_queue_depth, int, 0);
71 MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
72
73 static int max_sgl_entries = -1;
74 module_param(max_sgl_entries, int, 0);
75 MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
76
77 static int msix_disable = -1;
78 module_param(msix_disable, int, 0);
79 MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
80
81 /* diag_buffer_enable is bitwise
82 * bit 0 set = TRACE
83 * bit 1 set = SNAPSHOT
84 * bit 2 set = EXTENDED
85 *
86 * Either bit can be set, or both
87 */
88 static int diag_buffer_enable;
89 module_param(diag_buffer_enable, int, 0);
90 MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers "
91 "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)");
92
93 int mpt2sas_fwfault_debug;
94 MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
95 "and halt firmware - (default=0)");
96
97 /**
98 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
99 *
100 */
101 static int
102 _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
103 {
104 int ret = param_set_int(val, kp);
105 struct MPT2SAS_ADAPTER *ioc;
106
107 if (ret)
108 return ret;
109
110 printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
111 list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
112 ioc->fwfault_debug = mpt2sas_fwfault_debug;
113 return 0;
114 }
115 module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
116 param_get_int, &mpt2sas_fwfault_debug, 0644);
117
118 /**
119 * _base_fault_reset_work - workq handling ioc fault conditions
120 * @work: input argument, used to derive ioc
121 * Context: sleep.
122 *
123 * Return nothing.
124 */
125 static void
126 _base_fault_reset_work(struct work_struct *work)
127 {
128 struct MPT2SAS_ADAPTER *ioc =
129 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
130 unsigned long flags;
131 u32 doorbell;
132 int rc;
133
134 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
135 if (ioc->shost_recovery)
136 goto rearm_timer;
137 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
138
139 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
140 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
141 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
142 FORCE_BIG_HAMMER);
143 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
144 __func__, (rc == 0) ? "success" : "failed");
145 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
146 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
147 mpt2sas_base_fault_info(ioc, doorbell &
148 MPI2_DOORBELL_DATA_MASK);
149 }
150
151 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
152 rearm_timer:
153 if (ioc->fault_reset_work_q)
154 queue_delayed_work(ioc->fault_reset_work_q,
155 &ioc->fault_reset_work,
156 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
157 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
158 }
159
160 /**
161 * mpt2sas_base_start_watchdog - start the fault_reset_work_q
162 * @ioc: per adapter object
163 * Context: sleep.
164 *
165 * Return nothing.
166 */
167 void
168 mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
169 {
170 unsigned long flags;
171
172 if (ioc->fault_reset_work_q)
173 return;
174
175 /* initialize fault polling */
176 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
177 snprintf(ioc->fault_reset_work_q_name,
178 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
179 ioc->fault_reset_work_q =
180 create_singlethread_workqueue(ioc->fault_reset_work_q_name);
181 if (!ioc->fault_reset_work_q) {
182 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
183 ioc->name, __func__, __LINE__);
184 return;
185 }
186 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
187 if (ioc->fault_reset_work_q)
188 queue_delayed_work(ioc->fault_reset_work_q,
189 &ioc->fault_reset_work,
190 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
191 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
192 }
193
194 /**
195 * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
196 * @ioc: per adapter object
197 * Context: sleep.
198 *
199 * Return nothing.
200 */
201 void
202 mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
203 {
204 unsigned long flags;
205 struct workqueue_struct *wq;
206
207 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
208 wq = ioc->fault_reset_work_q;
209 ioc->fault_reset_work_q = NULL;
210 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
211 if (wq) {
212 if (!cancel_delayed_work(&ioc->fault_reset_work))
213 flush_workqueue(wq);
214 destroy_workqueue(wq);
215 }
216 }
217
218 /**
219 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
220 * @ioc: per adapter object
221 * @fault_code: fault code
222 *
223 * Return nothing.
224 */
225 void
226 mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
227 {
228 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
229 ioc->name, fault_code);
230 }
231
232 /**
233 * mpt2sas_halt_firmware - halt's mpt controller firmware
234 * @ioc: per adapter object
235 *
236 * For debugging timeout related issues. Writing 0xCOFFEE00
237 * to the doorbell register will halt controller firmware. With
238 * the purpose to stop both driver and firmware, the enduser can
239 * obtain a ring buffer from controller UART.
240 */
241 void
242 mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
243 {
244 u32 doorbell;
245
246 if (!ioc->fwfault_debug)
247 return;
248
249 dump_stack();
250
251 doorbell = readl(&ioc->chip->Doorbell);
252 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
253 mpt2sas_base_fault_info(ioc , doorbell);
254 else {
255 writel(0xC0FFEE00, &ioc->chip->Doorbell);
256 printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
257 "timeout\n", ioc->name);
258 }
259
260 panic("panic in %s\n", __func__);
261 }
262
263 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
264 /**
265 * _base_sas_ioc_info - verbose translation of the ioc status
266 * @ioc: per adapter object
267 * @mpi_reply: reply mf payload returned from firmware
268 * @request_hdr: request mf
269 *
270 * Return nothing.
271 */
272 static void
273 _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
274 MPI2RequestHeader_t *request_hdr)
275 {
276 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
277 MPI2_IOCSTATUS_MASK;
278 char *desc = NULL;
279 u16 frame_sz;
280 char *func_str = NULL;
281
282 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
283 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
284 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
285 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
286 return;
287
288 if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
289 return;
290
291 switch (ioc_status) {
292
293 /****************************************************************************
294 * Common IOCStatus values for all replies
295 ****************************************************************************/
296
297 case MPI2_IOCSTATUS_INVALID_FUNCTION:
298 desc = "invalid function";
299 break;
300 case MPI2_IOCSTATUS_BUSY:
301 desc = "busy";
302 break;
303 case MPI2_IOCSTATUS_INVALID_SGL:
304 desc = "invalid sgl";
305 break;
306 case MPI2_IOCSTATUS_INTERNAL_ERROR:
307 desc = "internal error";
308 break;
309 case MPI2_IOCSTATUS_INVALID_VPID:
310 desc = "invalid vpid";
311 break;
312 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
313 desc = "insufficient resources";
314 break;
315 case MPI2_IOCSTATUS_INVALID_FIELD:
316 desc = "invalid field";
317 break;
318 case MPI2_IOCSTATUS_INVALID_STATE:
319 desc = "invalid state";
320 break;
321 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
322 desc = "op state not supported";
323 break;
324
325 /****************************************************************************
326 * Config IOCStatus values
327 ****************************************************************************/
328
329 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
330 desc = "config invalid action";
331 break;
332 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
333 desc = "config invalid type";
334 break;
335 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
336 desc = "config invalid page";
337 break;
338 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
339 desc = "config invalid data";
340 break;
341 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
342 desc = "config no defaults";
343 break;
344 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
345 desc = "config cant commit";
346 break;
347
348 /****************************************************************************
349 * SCSI IO Reply
350 ****************************************************************************/
351
352 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
353 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
354 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
355 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
356 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
357 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
358 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
359 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
360 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
361 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
362 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
363 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
364 break;
365
366 /****************************************************************************
367 * For use by SCSI Initiator and SCSI Target end-to-end data protection
368 ****************************************************************************/
369
370 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
371 desc = "eedp guard error";
372 break;
373 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
374 desc = "eedp ref tag error";
375 break;
376 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
377 desc = "eedp app tag error";
378 break;
379
380 /****************************************************************************
381 * SCSI Target values
382 ****************************************************************************/
383
384 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
385 desc = "target invalid io index";
386 break;
387 case MPI2_IOCSTATUS_TARGET_ABORTED:
388 desc = "target aborted";
389 break;
390 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
391 desc = "target no conn retryable";
392 break;
393 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
394 desc = "target no connection";
395 break;
396 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
397 desc = "target xfer count mismatch";
398 break;
399 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
400 desc = "target data offset error";
401 break;
402 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
403 desc = "target too much write data";
404 break;
405 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
406 desc = "target iu too short";
407 break;
408 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
409 desc = "target ack nak timeout";
410 break;
411 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
412 desc = "target nak received";
413 break;
414
415 /****************************************************************************
416 * Serial Attached SCSI values
417 ****************************************************************************/
418
419 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
420 desc = "smp request failed";
421 break;
422 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
423 desc = "smp data overrun";
424 break;
425
426 /****************************************************************************
427 * Diagnostic Buffer Post / Diagnostic Release values
428 ****************************************************************************/
429
430 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
431 desc = "diagnostic released";
432 break;
433 default:
434 break;
435 }
436
437 if (!desc)
438 return;
439
440 switch (request_hdr->Function) {
441 case MPI2_FUNCTION_CONFIG:
442 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
443 func_str = "config_page";
444 break;
445 case MPI2_FUNCTION_SCSI_TASK_MGMT:
446 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
447 func_str = "task_mgmt";
448 break;
449 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
450 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
451 func_str = "sas_iounit_ctl";
452 break;
453 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
454 frame_sz = sizeof(Mpi2SepRequest_t);
455 func_str = "enclosure";
456 break;
457 case MPI2_FUNCTION_IOC_INIT:
458 frame_sz = sizeof(Mpi2IOCInitRequest_t);
459 func_str = "ioc_init";
460 break;
461 case MPI2_FUNCTION_PORT_ENABLE:
462 frame_sz = sizeof(Mpi2PortEnableRequest_t);
463 func_str = "port_enable";
464 break;
465 case MPI2_FUNCTION_SMP_PASSTHROUGH:
466 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
467 func_str = "smp_passthru";
468 break;
469 default:
470 frame_sz = 32;
471 func_str = "unknown";
472 break;
473 }
474
475 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
476 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
477
478 _debug_dump_mf(request_hdr, frame_sz/4);
479 }
480
481 /**
482 * _base_display_event_data - verbose translation of firmware asyn events
483 * @ioc: per adapter object
484 * @mpi_reply: reply mf payload returned from firmware
485 *
486 * Return nothing.
487 */
488 static void
489 _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
490 Mpi2EventNotificationReply_t *mpi_reply)
491 {
492 char *desc = NULL;
493 u16 event;
494
495 if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
496 return;
497
498 event = le16_to_cpu(mpi_reply->Event);
499
500 switch (event) {
501 case MPI2_EVENT_LOG_DATA:
502 desc = "Log Data";
503 break;
504 case MPI2_EVENT_STATE_CHANGE:
505 desc = "Status Change";
506 break;
507 case MPI2_EVENT_HARD_RESET_RECEIVED:
508 desc = "Hard Reset Received";
509 break;
510 case MPI2_EVENT_EVENT_CHANGE:
511 desc = "Event Change";
512 break;
513 case MPI2_EVENT_TASK_SET_FULL:
514 desc = "Task Set Full";
515 break;
516 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
517 desc = "Device Status Change";
518 break;
519 case MPI2_EVENT_IR_OPERATION_STATUS:
520 desc = "IR Operation Status";
521 break;
522 case MPI2_EVENT_SAS_DISCOVERY:
523 {
524 Mpi2EventDataSasDiscovery_t *event_data =
525 (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
526 printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
527 (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
528 "start" : "stop");
529 if (event_data->DiscoveryStatus)
530 printk("discovery_status(0x%08x)",
531 le32_to_cpu(event_data->DiscoveryStatus));
532 printk("\n");
533 return;
534 }
535 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
536 desc = "SAS Broadcast Primitive";
537 break;
538 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
539 desc = "SAS Init Device Status Change";
540 break;
541 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
542 desc = "SAS Init Table Overflow";
543 break;
544 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
545 desc = "SAS Topology Change List";
546 break;
547 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
548 desc = "SAS Enclosure Device Status Change";
549 break;
550 case MPI2_EVENT_IR_VOLUME:
551 desc = "IR Volume";
552 break;
553 case MPI2_EVENT_IR_PHYSICAL_DISK:
554 desc = "IR Physical Disk";
555 break;
556 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
557 desc = "IR Configuration Change List";
558 break;
559 case MPI2_EVENT_LOG_ENTRY_ADDED:
560 desc = "Log Entry Added";
561 break;
562 }
563
564 if (!desc)
565 return;
566
567 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
568 }
569 #endif
570
571 /**
572 * _base_sas_log_info - verbose translation of firmware log info
573 * @ioc: per adapter object
574 * @log_info: log info
575 *
576 * Return nothing.
577 */
578 static void
579 _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
580 {
581 union loginfo_type {
582 u32 loginfo;
583 struct {
584 u32 subcode:16;
585 u32 code:8;
586 u32 originator:4;
587 u32 bus_type:4;
588 } dw;
589 };
590 union loginfo_type sas_loginfo;
591 char *originator_str = NULL;
592
593 sas_loginfo.loginfo = log_info;
594 if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
595 return;
596
597 /* each nexus loss loginfo */
598 if (log_info == 0x31170000)
599 return;
600
601 /* eat the loginfos associated with task aborts */
602 if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
603 0x31140000 || log_info == 0x31130000))
604 return;
605
606 switch (sas_loginfo.dw.originator) {
607 case 0:
608 originator_str = "IOP";
609 break;
610 case 1:
611 originator_str = "PL";
612 break;
613 case 2:
614 originator_str = "IR";
615 break;
616 }
617
618 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
619 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
620 originator_str, sas_loginfo.dw.code,
621 sas_loginfo.dw.subcode);
622 }
623
624 /**
625 * _base_display_reply_info -
626 * @ioc: per adapter object
627 * @smid: system request message index
628 * @msix_index: MSIX table index supplied by the OS
629 * @reply: reply message frame(lower 32bit addr)
630 *
631 * Return nothing.
632 */
633 static void
634 _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
635 u32 reply)
636 {
637 MPI2DefaultReply_t *mpi_reply;
638 u16 ioc_status;
639
640 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
641 ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
642 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
643 if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
644 (ioc->logging_level & MPT_DEBUG_REPLY)) {
645 _base_sas_ioc_info(ioc , mpi_reply,
646 mpt2sas_base_get_msg_frame(ioc, smid));
647 }
648 #endif
649 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
650 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
651 }
652
653 /**
654 * mpt2sas_base_done - base internal command completion routine
655 * @ioc: per adapter object
656 * @smid: system request message index
657 * @msix_index: MSIX table index supplied by the OS
658 * @reply: reply message frame(lower 32bit addr)
659 *
660 * Return 1 meaning mf should be freed from _base_interrupt
661 * 0 means the mf is freed from this function.
662 */
663 u8
664 mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
665 u32 reply)
666 {
667 MPI2DefaultReply_t *mpi_reply;
668
669 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
670 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
671 return 1;
672
673 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
674 return 1;
675
676 ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
677 if (mpi_reply) {
678 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
679 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
680 }
681 ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
682 complete(&ioc->base_cmds.done);
683 return 1;
684 }
685
686 /**
687 * _base_async_event - main callback handler for firmware asyn events
688 * @ioc: per adapter object
689 * @msix_index: MSIX table index supplied by the OS
690 * @reply: reply message frame(lower 32bit addr)
691 *
692 * Return 1 meaning mf should be freed from _base_interrupt
693 * 0 means the mf is freed from this function.
694 */
695 static u8
696 _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
697 {
698 Mpi2EventNotificationReply_t *mpi_reply;
699 Mpi2EventAckRequest_t *ack_request;
700 u16 smid;
701
702 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
703 if (!mpi_reply)
704 return 1;
705 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
706 return 1;
707 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
708 _base_display_event_data(ioc, mpi_reply);
709 #endif
710 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
711 goto out;
712 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
713 if (!smid) {
714 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
715 ioc->name, __func__);
716 goto out;
717 }
718
719 ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
720 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
721 ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
722 ack_request->Event = mpi_reply->Event;
723 ack_request->EventContext = mpi_reply->EventContext;
724 ack_request->VF_ID = 0; /* TODO */
725 ack_request->VP_ID = 0;
726 mpt2sas_base_put_smid_default(ioc, smid);
727
728 out:
729
730 /* scsih callback handler */
731 mpt2sas_scsih_event_callback(ioc, msix_index, reply);
732
733 /* ctl callback handler */
734 mpt2sas_ctl_event_callback(ioc, msix_index, reply);
735
736 return 1;
737 }
738
739 /**
740 * _base_get_cb_idx - obtain the callback index
741 * @ioc: per adapter object
742 * @smid: system request message index
743 *
744 * Return callback index.
745 */
746 static u8
747 _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
748 {
749 int i;
750 u8 cb_idx = 0xFF;
751
752 if (smid >= ioc->hi_priority_smid) {
753 if (smid < ioc->internal_smid) {
754 i = smid - ioc->hi_priority_smid;
755 cb_idx = ioc->hpr_lookup[i].cb_idx;
756 } else {
757 i = smid - ioc->internal_smid;
758 cb_idx = ioc->internal_lookup[i].cb_idx;
759 }
760 } else {
761 i = smid - 1;
762 cb_idx = ioc->scsi_lookup[i].cb_idx;
763 }
764 return cb_idx;
765 }
766
767 /**
768 * _base_mask_interrupts - disable interrupts
769 * @ioc: per adapter object
770 *
771 * Disabling ResetIRQ, Reply and Doorbell Interrupts
772 *
773 * Return nothing.
774 */
775 static void
776 _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
777 {
778 u32 him_register;
779
780 ioc->mask_interrupts = 1;
781 him_register = readl(&ioc->chip->HostInterruptMask);
782 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
783 writel(him_register, &ioc->chip->HostInterruptMask);
784 readl(&ioc->chip->HostInterruptMask);
785 }
786
787 /**
788 * _base_unmask_interrupts - enable interrupts
789 * @ioc: per adapter object
790 *
791 * Enabling only Reply Interrupts
792 *
793 * Return nothing.
794 */
795 static void
796 _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
797 {
798 u32 him_register;
799
800 him_register = readl(&ioc->chip->HostInterruptMask);
801 him_register &= ~MPI2_HIM_RIM;
802 writel(him_register, &ioc->chip->HostInterruptMask);
803 ioc->mask_interrupts = 0;
804 }
805
806 union reply_descriptor {
807 u64 word;
808 struct {
809 u32 low;
810 u32 high;
811 } u;
812 };
813
814 /**
815 * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
816 * @irq: irq number (not used)
817 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
818 * @r: pt_regs pointer (not used)
819 *
820 * Return IRQ_HANDLE if processed, else IRQ_NONE.
821 */
822 static irqreturn_t
823 _base_interrupt(int irq, void *bus_id)
824 {
825 union reply_descriptor rd;
826 u32 completed_cmds;
827 u8 request_desript_type;
828 u16 smid;
829 u8 cb_idx;
830 u32 reply;
831 u8 msix_index;
832 struct MPT2SAS_ADAPTER *ioc = bus_id;
833 Mpi2ReplyDescriptorsUnion_t *rpf;
834 u8 rc;
835
836 if (ioc->mask_interrupts)
837 return IRQ_NONE;
838
839 rpf = &ioc->reply_post_free[ioc->reply_post_host_index];
840 request_desript_type = rpf->Default.ReplyFlags
841 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
842 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
843 return IRQ_NONE;
844
845 completed_cmds = 0;
846 do {
847 rd.word = rpf->Words;
848 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
849 goto out;
850 reply = 0;
851 cb_idx = 0xFF;
852 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
853 msix_index = rpf->Default.MSIxIndex;
854 if (request_desript_type ==
855 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
856 reply = le32_to_cpu
857 (rpf->AddressReply.ReplyFrameAddress);
858 } else if (request_desript_type ==
859 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
860 goto next;
861 else if (request_desript_type ==
862 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
863 goto next;
864 if (smid)
865 cb_idx = _base_get_cb_idx(ioc, smid);
866 if (smid && cb_idx != 0xFF) {
867 rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
868 reply);
869 if (reply)
870 _base_display_reply_info(ioc, smid, msix_index,
871 reply);
872 if (rc)
873 mpt2sas_base_free_smid(ioc, smid);
874 }
875 if (!smid)
876 _base_async_event(ioc, msix_index, reply);
877
878 /* reply free queue handling */
879 if (reply) {
880 ioc->reply_free_host_index =
881 (ioc->reply_free_host_index ==
882 (ioc->reply_free_queue_depth - 1)) ?
883 0 : ioc->reply_free_host_index + 1;
884 ioc->reply_free[ioc->reply_free_host_index] =
885 cpu_to_le32(reply);
886 wmb();
887 writel(ioc->reply_free_host_index,
888 &ioc->chip->ReplyFreeHostIndex);
889 }
890
891 next:
892
893 rpf->Words = ULLONG_MAX;
894 ioc->reply_post_host_index = (ioc->reply_post_host_index ==
895 (ioc->reply_post_queue_depth - 1)) ? 0 :
896 ioc->reply_post_host_index + 1;
897 request_desript_type =
898 ioc->reply_post_free[ioc->reply_post_host_index].Default.
899 ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
900 completed_cmds++;
901 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
902 goto out;
903 if (!ioc->reply_post_host_index)
904 rpf = ioc->reply_post_free;
905 else
906 rpf++;
907 } while (1);
908
909 out:
910
911 if (!completed_cmds)
912 return IRQ_NONE;
913
914 wmb();
915 writel(ioc->reply_post_host_index, &ioc->chip->ReplyPostHostIndex);
916 return IRQ_HANDLED;
917 }
918
919 /**
920 * mpt2sas_base_release_callback_handler - clear interupt callback handler
921 * @cb_idx: callback index
922 *
923 * Return nothing.
924 */
925 void
926 mpt2sas_base_release_callback_handler(u8 cb_idx)
927 {
928 mpt_callbacks[cb_idx] = NULL;
929 }
930
931 /**
932 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
933 * @cb_func: callback function
934 *
935 * Returns cb_func.
936 */
937 u8
938 mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
939 {
940 u8 cb_idx;
941
942 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
943 if (mpt_callbacks[cb_idx] == NULL)
944 break;
945
946 mpt_callbacks[cb_idx] = cb_func;
947 return cb_idx;
948 }
949
950 /**
951 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
952 *
953 * Return nothing.
954 */
955 void
956 mpt2sas_base_initialize_callback_handler(void)
957 {
958 u8 cb_idx;
959
960 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
961 mpt2sas_base_release_callback_handler(cb_idx);
962 }
963
964 /**
965 * mpt2sas_base_build_zero_len_sge - build zero length sg entry
966 * @ioc: per adapter object
967 * @paddr: virtual address for SGE
968 *
969 * Create a zero length scatter gather entry to insure the IOCs hardware has
970 * something to use if the target device goes brain dead and tries
971 * to send data even when none is asked for.
972 *
973 * Return nothing.
974 */
975 void
976 mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
977 {
978 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
979 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
980 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
981 MPI2_SGE_FLAGS_SHIFT);
982 ioc->base_add_sg_single(paddr, flags_length, -1);
983 }
984
985 /**
986 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
987 * @paddr: virtual address for SGE
988 * @flags_length: SGE flags and data transfer length
989 * @dma_addr: Physical address
990 *
991 * Return nothing.
992 */
993 static void
994 _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
995 {
996 Mpi2SGESimple32_t *sgel = paddr;
997
998 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
999 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1000 sgel->FlagsLength = cpu_to_le32(flags_length);
1001 sgel->Address = cpu_to_le32(dma_addr);
1002 }
1003
1004
1005 /**
1006 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
1007 * @paddr: virtual address for SGE
1008 * @flags_length: SGE flags and data transfer length
1009 * @dma_addr: Physical address
1010 *
1011 * Return nothing.
1012 */
1013 static void
1014 _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1015 {
1016 Mpi2SGESimple64_t *sgel = paddr;
1017
1018 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
1019 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1020 sgel->FlagsLength = cpu_to_le32(flags_length);
1021 sgel->Address = cpu_to_le64(dma_addr);
1022 }
1023
1024 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
1025
1026 /**
1027 * _base_config_dma_addressing - set dma addressing
1028 * @ioc: per adapter object
1029 * @pdev: PCI device struct
1030 *
1031 * Returns 0 for success, non-zero for failure.
1032 */
1033 static int
1034 _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
1035 {
1036 struct sysinfo s;
1037 char *desc = NULL;
1038
1039 if (sizeof(dma_addr_t) > 4) {
1040 const uint64_t required_mask =
1041 dma_get_required_mask(&pdev->dev);
1042 if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
1043 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
1044 DMA_BIT_MASK(64))) {
1045 ioc->base_add_sg_single = &_base_add_sg_single_64;
1046 ioc->sge_size = sizeof(Mpi2SGESimple64_t);
1047 desc = "64";
1048 goto out;
1049 }
1050 }
1051
1052 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1053 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1054 ioc->base_add_sg_single = &_base_add_sg_single_32;
1055 ioc->sge_size = sizeof(Mpi2SGESimple32_t);
1056 desc = "32";
1057 } else
1058 return -ENODEV;
1059
1060 out:
1061 si_meminfo(&s);
1062 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
1063 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
1064
1065 return 0;
1066 }
1067
1068 /**
1069 * _base_save_msix_table - backup msix vector table
1070 * @ioc: per adapter object
1071 *
1072 * This address an errata where diag reset clears out the table
1073 */
1074 static void
1075 _base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
1076 {
1077 int i;
1078
1079 if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
1080 return;
1081
1082 for (i = 0; i < ioc->msix_vector_count; i++)
1083 ioc->msix_table_backup[i] = ioc->msix_table[i];
1084 }
1085
1086 /**
1087 * _base_restore_msix_table - this restores the msix vector table
1088 * @ioc: per adapter object
1089 *
1090 */
1091 static void
1092 _base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
1093 {
1094 int i;
1095
1096 if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
1097 return;
1098
1099 for (i = 0; i < ioc->msix_vector_count; i++)
1100 ioc->msix_table[i] = ioc->msix_table_backup[i];
1101 }
1102
1103 /**
1104 * _base_check_enable_msix - checks MSIX capabable.
1105 * @ioc: per adapter object
1106 *
1107 * Check to see if card is capable of MSIX, and set number
1108 * of avaliable msix vectors
1109 */
1110 static int
1111 _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1112 {
1113 int base;
1114 u16 message_control;
1115 u32 msix_table_offset;
1116
1117 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
1118 if (!base) {
1119 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
1120 "supported\n", ioc->name));
1121 return -EINVAL;
1122 }
1123
1124 /* get msix vector count */
1125 pci_read_config_word(ioc->pdev, base + 2, &message_control);
1126 ioc->msix_vector_count = (message_control & 0x3FF) + 1;
1127
1128 /* get msix table */
1129 pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
1130 msix_table_offset &= 0xFFFFFFF8;
1131 ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
1132
1133 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
1134 "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
1135 ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
1136 return 0;
1137 }
1138
1139 /**
1140 * _base_disable_msix - disables msix
1141 * @ioc: per adapter object
1142 *
1143 */
1144 static void
1145 _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
1146 {
1147 if (ioc->msix_enable) {
1148 pci_disable_msix(ioc->pdev);
1149 kfree(ioc->msix_table_backup);
1150 ioc->msix_table_backup = NULL;
1151 ioc->msix_enable = 0;
1152 }
1153 }
1154
1155 /**
1156 * _base_enable_msix - enables msix, failback to io_apic
1157 * @ioc: per adapter object
1158 *
1159 */
1160 static int
1161 _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1162 {
1163 struct msix_entry entries;
1164 int r;
1165 u8 try_msix = 0;
1166
1167 if (msix_disable == -1 || msix_disable == 0)
1168 try_msix = 1;
1169
1170 if (!try_msix)
1171 goto try_ioapic;
1172
1173 if (_base_check_enable_msix(ioc) != 0)
1174 goto try_ioapic;
1175
1176 ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
1177 sizeof(u32), GFP_KERNEL);
1178 if (!ioc->msix_table_backup) {
1179 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
1180 "msix_table_backup failed!!!\n", ioc->name));
1181 goto try_ioapic;
1182 }
1183
1184 memset(&entries, 0, sizeof(struct msix_entry));
1185 r = pci_enable_msix(ioc->pdev, &entries, 1);
1186 if (r) {
1187 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
1188 "failed (r=%d) !!!\n", ioc->name, r));
1189 goto try_ioapic;
1190 }
1191
1192 r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
1193 ioc->name, ioc);
1194 if (r) {
1195 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
1196 "interrupt %d !!!\n", ioc->name, entries.vector));
1197 pci_disable_msix(ioc->pdev);
1198 goto try_ioapic;
1199 }
1200
1201 ioc->pci_irq = entries.vector;
1202 ioc->msix_enable = 1;
1203 return 0;
1204
1205 /* failback to io_apic interrupt routing */
1206 try_ioapic:
1207
1208 r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
1209 ioc->name, ioc);
1210 if (r) {
1211 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
1212 ioc->name, ioc->pdev->irq);
1213 r = -EBUSY;
1214 goto out_fail;
1215 }
1216
1217 ioc->pci_irq = ioc->pdev->irq;
1218 return 0;
1219
1220 out_fail:
1221 return r;
1222 }
1223
1224 /**
1225 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
1226 * @ioc: per adapter object
1227 *
1228 * Returns 0 for success, non-zero for failure.
1229 */
1230 int
1231 mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
1232 {
1233 struct pci_dev *pdev = ioc->pdev;
1234 u32 memap_sz;
1235 u32 pio_sz;
1236 int i, r = 0;
1237 u64 pio_chip = 0;
1238 u64 chip_phys = 0;
1239
1240 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n",
1241 ioc->name, __func__));
1242
1243 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1244 if (pci_enable_device_mem(pdev)) {
1245 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
1246 "failed\n", ioc->name);
1247 return -ENODEV;
1248 }
1249
1250
1251 if (pci_request_selected_regions(pdev, ioc->bars,
1252 MPT2SAS_DRIVER_NAME)) {
1253 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
1254 "failed\n", ioc->name);
1255 r = -ENODEV;
1256 goto out_fail;
1257 }
1258
1259 pci_set_master(pdev);
1260
1261 if (_base_config_dma_addressing(ioc, pdev) != 0) {
1262 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
1263 ioc->name, pci_name(pdev));
1264 r = -ENODEV;
1265 goto out_fail;
1266 }
1267
1268 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
1269 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1270 if (pio_sz)
1271 continue;
1272 pio_chip = (u64)pci_resource_start(pdev, i);
1273 pio_sz = pci_resource_len(pdev, i);
1274 } else {
1275 if (memap_sz)
1276 continue;
1277 /* verify memory resource is valid before using */
1278 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
1279 ioc->chip_phys = pci_resource_start(pdev, i);
1280 chip_phys = (u64)ioc->chip_phys;
1281 memap_sz = pci_resource_len(pdev, i);
1282 ioc->chip = ioremap(ioc->chip_phys, memap_sz);
1283 if (ioc->chip == NULL) {
1284 printk(MPT2SAS_ERR_FMT "unable to map "
1285 "adapter memory!\n", ioc->name);
1286 r = -EINVAL;
1287 goto out_fail;
1288 }
1289 }
1290 }
1291 }
1292
1293 _base_mask_interrupts(ioc);
1294 r = _base_enable_msix(ioc);
1295 if (r)
1296 goto out_fail;
1297
1298 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
1299 ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
1300 "IO-APIC enabled"), ioc->pci_irq);
1301 printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
1302 ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
1303 printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
1304 ioc->name, (unsigned long long)pio_chip, pio_sz);
1305
1306 return 0;
1307
1308 out_fail:
1309 if (ioc->chip_phys)
1310 iounmap(ioc->chip);
1311 ioc->chip_phys = 0;
1312 ioc->pci_irq = -1;
1313 pci_release_selected_regions(ioc->pdev, ioc->bars);
1314 pci_disable_device(pdev);
1315 return r;
1316 }
1317
1318 /**
1319 * mpt2sas_base_get_msg_frame - obtain request mf pointer
1320 * @ioc: per adapter object
1321 * @smid: system request message index(smid zero is invalid)
1322 *
1323 * Returns virt pointer to message frame.
1324 */
1325 void *
1326 mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1327 {
1328 return (void *)(ioc->request + (smid * ioc->request_sz));
1329 }
1330
1331 /**
1332 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
1333 * @ioc: per adapter object
1334 * @smid: system request message index
1335 *
1336 * Returns virt pointer to sense buffer.
1337 */
1338 void *
1339 mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1340 {
1341 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1342 }
1343
1344 /**
1345 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
1346 * @ioc: per adapter object
1347 * @smid: system request message index
1348 *
1349 * Returns phys pointer to the low 32bit address of the sense buffer.
1350 */
1351 __le32
1352 mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1353 {
1354 return cpu_to_le32(ioc->sense_dma +
1355 ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1356 }
1357
1358 /**
1359 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
1360 * @ioc: per adapter object
1361 * @phys_addr: lower 32 physical addr of the reply
1362 *
1363 * Converts 32bit lower physical addr into a virt address.
1364 */
1365 void *
1366 mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
1367 {
1368 if (!phys_addr)
1369 return NULL;
1370 return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
1371 }
1372
1373 /**
1374 * mpt2sas_base_get_smid - obtain a free smid from internal queue
1375 * @ioc: per adapter object
1376 * @cb_idx: callback index
1377 *
1378 * Returns smid (zero is invalid)
1379 */
1380 u16
1381 mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1382 {
1383 unsigned long flags;
1384 struct request_tracker *request;
1385 u16 smid;
1386
1387 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1388 if (list_empty(&ioc->internal_free_list)) {
1389 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1390 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1391 ioc->name, __func__);
1392 return 0;
1393 }
1394
1395 request = list_entry(ioc->internal_free_list.next,
1396 struct request_tracker, tracker_list);
1397 request->cb_idx = cb_idx;
1398 smid = request->smid;
1399 list_del(&request->tracker_list);
1400 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1401 return smid;
1402 }
1403
1404 /**
1405 * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
1406 * @ioc: per adapter object
1407 * @cb_idx: callback index
1408 * @scmd: pointer to scsi command object
1409 *
1410 * Returns smid (zero is invalid)
1411 */
1412 u16
1413 mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
1414 struct scsi_cmnd *scmd)
1415 {
1416 unsigned long flags;
1417 struct request_tracker *request;
1418 u16 smid;
1419
1420 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1421 if (list_empty(&ioc->free_list)) {
1422 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1423 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1424 ioc->name, __func__);
1425 return 0;
1426 }
1427
1428 request = list_entry(ioc->free_list.next,
1429 struct request_tracker, tracker_list);
1430 request->scmd = scmd;
1431 request->cb_idx = cb_idx;
1432 smid = request->smid;
1433 list_del(&request->tracker_list);
1434 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1435 return smid;
1436 }
1437
1438 /**
1439 * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
1440 * @ioc: per adapter object
1441 * @cb_idx: callback index
1442 *
1443 * Returns smid (zero is invalid)
1444 */
1445 u16
1446 mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1447 {
1448 unsigned long flags;
1449 struct request_tracker *request;
1450 u16 smid;
1451
1452 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1453 if (list_empty(&ioc->hpr_free_list)) {
1454 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1455 return 0;
1456 }
1457
1458 request = list_entry(ioc->hpr_free_list.next,
1459 struct request_tracker, tracker_list);
1460 request->cb_idx = cb_idx;
1461 smid = request->smid;
1462 list_del(&request->tracker_list);
1463 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1464 return smid;
1465 }
1466
1467
1468 /**
1469 * mpt2sas_base_free_smid - put smid back on free_list
1470 * @ioc: per adapter object
1471 * @smid: system request message index
1472 *
1473 * Return nothing.
1474 */
1475 void
1476 mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1477 {
1478 unsigned long flags;
1479 int i;
1480
1481 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1482 if (smid >= ioc->hi_priority_smid) {
1483 if (smid < ioc->internal_smid) {
1484 /* hi-priority */
1485 i = smid - ioc->hi_priority_smid;
1486 ioc->hpr_lookup[i].cb_idx = 0xFF;
1487 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
1488 &ioc->hpr_free_list);
1489 } else {
1490 /* internal queue */
1491 i = smid - ioc->internal_smid;
1492 ioc->internal_lookup[i].cb_idx = 0xFF;
1493 list_add_tail(&ioc->internal_lookup[i].tracker_list,
1494 &ioc->internal_free_list);
1495 }
1496 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1497 return;
1498 }
1499
1500 /* scsiio queue */
1501 i = smid - 1;
1502 ioc->scsi_lookup[i].cb_idx = 0xFF;
1503 ioc->scsi_lookup[i].scmd = NULL;
1504 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
1505 &ioc->free_list);
1506 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1507
1508 /*
1509 * See _wait_for_commands_to_complete() call with regards to this code.
1510 */
1511 if (ioc->shost_recovery && ioc->pending_io_count) {
1512 if (ioc->pending_io_count == 1)
1513 wake_up(&ioc->reset_wq);
1514 ioc->pending_io_count--;
1515 }
1516 }
1517
1518 /**
1519 * _base_writeq - 64 bit write to MMIO
1520 * @ioc: per adapter object
1521 * @b: data payload
1522 * @addr: address in MMIO space
1523 * @writeq_lock: spin lock
1524 *
1525 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
1526 * care of 32 bit environment where its not quarenteed to send the entire word
1527 * in one transfer.
1528 */
1529 #ifndef writeq
1530 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1531 spinlock_t *writeq_lock)
1532 {
1533 unsigned long flags;
1534 __u64 data_out = cpu_to_le64(b);
1535
1536 spin_lock_irqsave(writeq_lock, flags);
1537 writel((u32)(data_out), addr);
1538 writel((u32)(data_out >> 32), (addr + 4));
1539 spin_unlock_irqrestore(writeq_lock, flags);
1540 }
1541 #else
1542 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1543 spinlock_t *writeq_lock)
1544 {
1545 writeq(cpu_to_le64(b), addr);
1546 }
1547 #endif
1548
1549 /**
1550 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
1551 * @ioc: per adapter object
1552 * @smid: system request message index
1553 * @handle: device handle
1554 *
1555 * Return nothing.
1556 */
1557 void
1558 mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
1559 {
1560 Mpi2RequestDescriptorUnion_t descriptor;
1561 u64 *request = (u64 *)&descriptor;
1562
1563
1564 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
1565 descriptor.SCSIIO.MSIxIndex = 0; /* TODO */
1566 descriptor.SCSIIO.SMID = cpu_to_le16(smid);
1567 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
1568 descriptor.SCSIIO.LMID = 0;
1569 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1570 &ioc->scsi_lookup_lock);
1571 }
1572
1573
1574 /**
1575 * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware
1576 * @ioc: per adapter object
1577 * @smid: system request message index
1578 *
1579 * Return nothing.
1580 */
1581 void
1582 mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1583 {
1584 Mpi2RequestDescriptorUnion_t descriptor;
1585 u64 *request = (u64 *)&descriptor;
1586
1587 descriptor.HighPriority.RequestFlags =
1588 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
1589 descriptor.HighPriority.MSIxIndex = 0; /* TODO */
1590 descriptor.HighPriority.SMID = cpu_to_le16(smid);
1591 descriptor.HighPriority.LMID = 0;
1592 descriptor.HighPriority.Reserved1 = 0;
1593 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1594 &ioc->scsi_lookup_lock);
1595 }
1596
1597 /**
1598 * mpt2sas_base_put_smid_default - Default, primarily used for config pages
1599 * @ioc: per adapter object
1600 * @smid: system request message index
1601 *
1602 * Return nothing.
1603 */
1604 void
1605 mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1606 {
1607 Mpi2RequestDescriptorUnion_t descriptor;
1608 u64 *request = (u64 *)&descriptor;
1609
1610 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
1611 descriptor.Default.MSIxIndex = 0; /* TODO */
1612 descriptor.Default.SMID = cpu_to_le16(smid);
1613 descriptor.Default.LMID = 0;
1614 descriptor.Default.DescriptorTypeDependent = 0;
1615 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1616 &ioc->scsi_lookup_lock);
1617 }
1618
1619 /**
1620 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
1621 * @ioc: per adapter object
1622 * @smid: system request message index
1623 * @io_index: value used to track the IO
1624 *
1625 * Return nothing.
1626 */
1627 void
1628 mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
1629 u16 io_index)
1630 {
1631 Mpi2RequestDescriptorUnion_t descriptor;
1632 u64 *request = (u64 *)&descriptor;
1633
1634 descriptor.SCSITarget.RequestFlags =
1635 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
1636 descriptor.SCSITarget.MSIxIndex = 0; /* TODO */
1637 descriptor.SCSITarget.SMID = cpu_to_le16(smid);
1638 descriptor.SCSITarget.LMID = 0;
1639 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
1640 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1641 &ioc->scsi_lookup_lock);
1642 }
1643
1644 /**
1645 * _base_display_dell_branding - Disply branding string
1646 * @ioc: per adapter object
1647 *
1648 * Return nothing.
1649 */
1650 static void
1651 _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
1652 {
1653 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
1654
1655 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
1656 return;
1657
1658 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
1659 switch (ioc->pdev->subsystem_device) {
1660 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
1661 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
1662 MPT2SAS_DELL_BRANDING_SIZE - 1);
1663 break;
1664 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
1665 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
1666 MPT2SAS_DELL_BRANDING_SIZE - 1);
1667 break;
1668 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
1669 strncpy(dell_branding,
1670 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
1671 MPT2SAS_DELL_BRANDING_SIZE - 1);
1672 break;
1673 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
1674 strncpy(dell_branding,
1675 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
1676 MPT2SAS_DELL_BRANDING_SIZE - 1);
1677 break;
1678 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
1679 strncpy(dell_branding,
1680 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
1681 MPT2SAS_DELL_BRANDING_SIZE - 1);
1682 break;
1683 case MPT2SAS_DELL_PERC_H200_SSDID:
1684 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
1685 MPT2SAS_DELL_BRANDING_SIZE - 1);
1686 break;
1687 case MPT2SAS_DELL_6GBPS_SAS_SSDID:
1688 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
1689 MPT2SAS_DELL_BRANDING_SIZE - 1);
1690 break;
1691 default:
1692 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
1693 break;
1694 }
1695
1696 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
1697 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
1698 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
1699 ioc->pdev->subsystem_device);
1700 }
1701
1702 /**
1703 * _base_display_ioc_capabilities - Disply IOC's capabilities.
1704 * @ioc: per adapter object
1705 *
1706 * Return nothing.
1707 */
1708 static void
1709 _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
1710 {
1711 int i = 0;
1712 char desc[16];
1713 u8 revision;
1714 u32 iounit_pg1_flags;
1715
1716 pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
1717 strncpy(desc, ioc->manu_pg0.ChipName, 16);
1718 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
1719 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
1720 ioc->name, desc,
1721 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
1722 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
1723 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
1724 ioc->facts.FWVersion.Word & 0x000000FF,
1725 revision,
1726 (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24,
1727 (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16,
1728 (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8,
1729 ioc->bios_pg3.BiosVersion & 0x000000FF);
1730
1731 _base_display_dell_branding(ioc);
1732
1733 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
1734
1735 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
1736 printk("Initiator");
1737 i++;
1738 }
1739
1740 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
1741 printk("%sTarget", i ? "," : "");
1742 i++;
1743 }
1744
1745 i = 0;
1746 printk("), ");
1747 printk("Capabilities=(");
1748
1749 if (ioc->facts.IOCCapabilities &
1750 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
1751 printk("Raid");
1752 i++;
1753 }
1754
1755 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
1756 printk("%sTLR", i ? "," : "");
1757 i++;
1758 }
1759
1760 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
1761 printk("%sMulticast", i ? "," : "");
1762 i++;
1763 }
1764
1765 if (ioc->facts.IOCCapabilities &
1766 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
1767 printk("%sBIDI Target", i ? "," : "");
1768 i++;
1769 }
1770
1771 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
1772 printk("%sEEDP", i ? "," : "");
1773 i++;
1774 }
1775
1776 if (ioc->facts.IOCCapabilities &
1777 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
1778 printk("%sSnapshot Buffer", i ? "," : "");
1779 i++;
1780 }
1781
1782 if (ioc->facts.IOCCapabilities &
1783 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
1784 printk("%sDiag Trace Buffer", i ? "," : "");
1785 i++;
1786 }
1787
1788 if (ioc->facts.IOCCapabilities &
1789 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
1790 printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
1791 i++;
1792 }
1793
1794 if (ioc->facts.IOCCapabilities &
1795 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
1796 printk("%sTask Set Full", i ? "," : "");
1797 i++;
1798 }
1799
1800 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
1801 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
1802 printk("%sNCQ", i ? "," : "");
1803 i++;
1804 }
1805
1806 printk(")\n");
1807 }
1808
1809 /**
1810 * _base_static_config_pages - static start of day config pages
1811 * @ioc: per adapter object
1812 *
1813 * Return nothing.
1814 */
1815 static void
1816 _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
1817 {
1818 Mpi2ConfigReply_t mpi_reply;
1819 u32 iounit_pg1_flags;
1820
1821 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
1822 if (ioc->ir_firmware)
1823 mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
1824 &ioc->manu_pg10);
1825 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
1826 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
1827 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
1828 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
1829 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
1830 _base_display_ioc_capabilities(ioc);
1831
1832 /*
1833 * Enable task_set_full handling in iounit_pg1 when the
1834 * facts capabilities indicate that its supported.
1835 */
1836 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
1837 if ((ioc->facts.IOCCapabilities &
1838 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
1839 iounit_pg1_flags &=
1840 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
1841 else
1842 iounit_pg1_flags |=
1843 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
1844 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
1845 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
1846 }
1847
1848 /**
1849 * _base_release_memory_pools - release memory
1850 * @ioc: per adapter object
1851 *
1852 * Free memory allocated from _base_allocate_memory_pools.
1853 *
1854 * Return nothing.
1855 */
1856 static void
1857 _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
1858 {
1859 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
1860 __func__));
1861
1862 if (ioc->request) {
1863 pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
1864 ioc->request, ioc->request_dma);
1865 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
1866 ": free\n", ioc->name, ioc->request));
1867 ioc->request = NULL;
1868 }
1869
1870 if (ioc->sense) {
1871 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
1872 if (ioc->sense_dma_pool)
1873 pci_pool_destroy(ioc->sense_dma_pool);
1874 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
1875 ": free\n", ioc->name, ioc->sense));
1876 ioc->sense = NULL;
1877 }
1878
1879 if (ioc->reply) {
1880 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
1881 if (ioc->reply_dma_pool)
1882 pci_pool_destroy(ioc->reply_dma_pool);
1883 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
1884 ": free\n", ioc->name, ioc->reply));
1885 ioc->reply = NULL;
1886 }
1887
1888 if (ioc->reply_free) {
1889 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
1890 ioc->reply_free_dma);
1891 if (ioc->reply_free_dma_pool)
1892 pci_pool_destroy(ioc->reply_free_dma_pool);
1893 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
1894 "(0x%p): free\n", ioc->name, ioc->reply_free));
1895 ioc->reply_free = NULL;
1896 }
1897
1898 if (ioc->reply_post_free) {
1899 pci_pool_free(ioc->reply_post_free_dma_pool,
1900 ioc->reply_post_free, ioc->reply_post_free_dma);
1901 if (ioc->reply_post_free_dma_pool)
1902 pci_pool_destroy(ioc->reply_post_free_dma_pool);
1903 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
1904 "reply_post_free_pool(0x%p): free\n", ioc->name,
1905 ioc->reply_post_free));
1906 ioc->reply_post_free = NULL;
1907 }
1908
1909 if (ioc->config_page) {
1910 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
1911 "config_page(0x%p): free\n", ioc->name,
1912 ioc->config_page));
1913 pci_free_consistent(ioc->pdev, ioc->config_page_sz,
1914 ioc->config_page, ioc->config_page_dma);
1915 }
1916
1917 free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
1918 kfree(ioc->hpr_lookup);
1919 kfree(ioc->internal_lookup);
1920 }
1921
1922
1923 /**
1924 * _base_allocate_memory_pools - allocate start of day memory pools
1925 * @ioc: per adapter object
1926 * @sleep_flag: CAN_SLEEP or NO_SLEEP
1927 *
1928 * Returns 0 success, anything else error
1929 */
1930 static int
1931 _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
1932 {
1933 Mpi2IOCFactsReply_t *facts;
1934 u32 queue_size, queue_diff;
1935 u16 max_sge_elements;
1936 u16 num_of_reply_frames;
1937 u16 chains_needed_per_io;
1938 u32 sz, total_sz;
1939 u32 retry_sz;
1940 u16 max_request_credit;
1941
1942 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
1943 __func__));
1944
1945 retry_sz = 0;
1946 facts = &ioc->facts;
1947
1948 /* command line tunables for max sgl entries */
1949 if (max_sgl_entries != -1) {
1950 ioc->shost->sg_tablesize = (max_sgl_entries <
1951 MPT2SAS_SG_DEPTH) ? max_sgl_entries :
1952 MPT2SAS_SG_DEPTH;
1953 } else {
1954 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
1955 }
1956
1957 /* command line tunables for max controller queue depth */
1958 if (max_queue_depth != -1) {
1959 max_request_credit = (max_queue_depth < facts->RequestCredit)
1960 ? max_queue_depth : facts->RequestCredit;
1961 } else {
1962 max_request_credit = (facts->RequestCredit >
1963 MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE :
1964 facts->RequestCredit;
1965 }
1966
1967 ioc->hba_queue_depth = max_request_credit;
1968 ioc->hi_priority_depth = facts->HighPriorityCredit;
1969 ioc->internal_depth = ioc->hi_priority_depth + 5;
1970
1971 /* request frame size */
1972 ioc->request_sz = facts->IOCRequestFrameSize * 4;
1973
1974 /* reply frame size */
1975 ioc->reply_sz = facts->ReplyFrameSize * 4;
1976
1977 retry_allocation:
1978 total_sz = 0;
1979 /* calculate number of sg elements left over in the 1st frame */
1980 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
1981 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
1982 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
1983
1984 /* now do the same for a chain buffer */
1985 max_sge_elements = ioc->request_sz - ioc->sge_size;
1986 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
1987
1988 ioc->chain_offset_value_for_main_message =
1989 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
1990 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
1991
1992 /*
1993 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
1994 */
1995 chains_needed_per_io = ((ioc->shost->sg_tablesize -
1996 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
1997 + 1;
1998 if (chains_needed_per_io > facts->MaxChainDepth) {
1999 chains_needed_per_io = facts->MaxChainDepth;
2000 ioc->shost->sg_tablesize = min_t(u16,
2001 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
2002 * chains_needed_per_io), ioc->shost->sg_tablesize);
2003 }
2004 ioc->chains_needed_per_io = chains_needed_per_io;
2005
2006 /* reply free queue sizing - taking into account for events */
2007 num_of_reply_frames = ioc->hba_queue_depth + 32;
2008
2009 /* number of replies frames can't be a multiple of 16 */
2010 /* decrease number of reply frames by 1 */
2011 if (!(num_of_reply_frames % 16))
2012 num_of_reply_frames--;
2013
2014 /* calculate number of reply free queue entries
2015 * (must be multiple of 16)
2016 */
2017
2018 /* (we know reply_free_queue_depth is not a multiple of 16) */
2019 queue_size = num_of_reply_frames;
2020 queue_size += 16 - (queue_size % 16);
2021 ioc->reply_free_queue_depth = queue_size;
2022
2023 /* reply descriptor post queue sizing */
2024 /* this size should be the number of request frames + number of reply
2025 * frames
2026 */
2027
2028 queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1;
2029 /* round up to 16 byte boundary */
2030 if (queue_size % 16)
2031 queue_size += 16 - (queue_size % 16);
2032
2033 /* check against IOC maximum reply post queue depth */
2034 if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
2035 queue_diff = queue_size -
2036 facts->MaxReplyDescriptorPostQueueDepth;
2037
2038 /* round queue_diff up to multiple of 16 */
2039 if (queue_diff % 16)
2040 queue_diff += 16 - (queue_diff % 16);
2041
2042 /* adjust hba_queue_depth, reply_free_queue_depth,
2043 * and queue_size
2044 */
2045 ioc->hba_queue_depth -= queue_diff;
2046 ioc->reply_free_queue_depth -= queue_diff;
2047 queue_size -= queue_diff;
2048 }
2049 ioc->reply_post_queue_depth = queue_size;
2050
2051 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
2052 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
2053 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
2054 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
2055 ioc->chains_needed_per_io));
2056
2057 ioc->scsiio_depth = ioc->hba_queue_depth -
2058 ioc->hi_priority_depth - ioc->internal_depth;
2059
2060 /* set the scsi host can_queue depth
2061 * with some internal commands that could be outstanding
2062 */
2063 ioc->shost->can_queue = ioc->scsiio_depth - (2);
2064 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
2065 "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
2066
2067 /* contiguous pool for request and chains, 16 byte align, one extra "
2068 * "frame for smid=0
2069 */
2070 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
2071 sz = ((ioc->scsiio_depth + 1 + ioc->chain_depth) * ioc->request_sz);
2072
2073 /* hi-priority queue */
2074 sz += (ioc->hi_priority_depth * ioc->request_sz);
2075
2076 /* internal queue */
2077 sz += (ioc->internal_depth * ioc->request_sz);
2078
2079 ioc->request_dma_sz = sz;
2080 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
2081 if (!ioc->request) {
2082 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2083 "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2084 "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
2085 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2086 if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
2087 goto out;
2088 retry_sz += 64;
2089 ioc->hba_queue_depth = max_request_credit - retry_sz;
2090 goto retry_allocation;
2091 }
2092
2093 if (retry_sz)
2094 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2095 "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2096 "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
2097 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2098
2099
2100 /* hi-priority queue */
2101 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
2102 ioc->request_sz);
2103 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
2104 ioc->request_sz);
2105
2106 /* internal queue */
2107 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
2108 ioc->request_sz);
2109 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
2110 ioc->request_sz);
2111
2112 ioc->chain = ioc->internal + (ioc->internal_depth *
2113 ioc->request_sz);
2114 ioc->chain_dma = ioc->internal_dma + (ioc->internal_depth *
2115 ioc->request_sz);
2116
2117 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
2118 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
2119 ioc->request, ioc->hba_queue_depth, ioc->request_sz,
2120 (ioc->hba_queue_depth * ioc->request_sz)/1024));
2121 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth"
2122 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain,
2123 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
2124 ioc->request_sz))/1024));
2125 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
2126 ioc->name, (unsigned long long) ioc->request_dma));
2127 total_sz += sz;
2128
2129 sz = ioc->scsiio_depth * sizeof(struct request_tracker);
2130 ioc->scsi_lookup_pages = get_order(sz);
2131 ioc->scsi_lookup = (struct request_tracker *)__get_free_pages(
2132 GFP_KERNEL, ioc->scsi_lookup_pages);
2133 if (!ioc->scsi_lookup) {
2134 printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
2135 "sz(%d)\n", ioc->name, (int)sz);
2136 goto out;
2137 }
2138
2139 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
2140 "depth(%d)\n", ioc->name, ioc->request,
2141 ioc->scsiio_depth));
2142
2143 /* initialize hi-priority queue smid's */
2144 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
2145 sizeof(struct request_tracker), GFP_KERNEL);
2146 if (!ioc->hpr_lookup) {
2147 printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
2148 ioc->name);
2149 goto out;
2150 }
2151 ioc->hi_priority_smid = ioc->scsiio_depth + 1;
2152 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
2153 "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
2154 ioc->hi_priority_depth, ioc->hi_priority_smid));
2155
2156 /* initialize internal queue smid's */
2157 ioc->internal_lookup = kcalloc(ioc->internal_depth,
2158 sizeof(struct request_tracker), GFP_KERNEL);
2159 if (!ioc->internal_lookup) {
2160 printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
2161 ioc->name);
2162 goto out;
2163 }
2164 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
2165 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
2166 "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
2167 ioc->internal_depth, ioc->internal_smid));
2168
2169 /* sense buffers, 4 byte align */
2170 sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
2171 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
2172 0);
2173 if (!ioc->sense_dma_pool) {
2174 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
2175 ioc->name);
2176 goto out;
2177 }
2178 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
2179 &ioc->sense_dma);
2180 if (!ioc->sense) {
2181 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
2182 ioc->name);
2183 goto out;
2184 }
2185 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
2186 "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
2187 "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
2188 SCSI_SENSE_BUFFERSIZE, sz/1024));
2189 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
2190 ioc->name, (unsigned long long)ioc->sense_dma));
2191 total_sz += sz;
2192
2193 /* reply pool, 4 byte align */
2194 sz = ioc->reply_free_queue_depth * ioc->reply_sz;
2195 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
2196 0);
2197 if (!ioc->reply_dma_pool) {
2198 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
2199 ioc->name);
2200 goto out;
2201 }
2202 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
2203 &ioc->reply_dma);
2204 if (!ioc->reply) {
2205 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
2206 ioc->name);
2207 goto out;
2208 }
2209 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
2210 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
2211 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
2212 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
2213 ioc->name, (unsigned long long)ioc->reply_dma));
2214 total_sz += sz;
2215
2216 /* reply free queue, 16 byte align */
2217 sz = ioc->reply_free_queue_depth * 4;
2218 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
2219 ioc->pdev, sz, 16, 0);
2220 if (!ioc->reply_free_dma_pool) {
2221 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
2222 "failed\n", ioc->name);
2223 goto out;
2224 }
2225 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
2226 &ioc->reply_free_dma);
2227 if (!ioc->reply_free) {
2228 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
2229 "failed\n", ioc->name);
2230 goto out;
2231 }
2232 memset(ioc->reply_free, 0, sz);
2233 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
2234 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
2235 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
2236 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
2237 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
2238 total_sz += sz;
2239
2240 /* reply post queue, 16 byte align */
2241 sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
2242 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
2243 ioc->pdev, sz, 16, 0);
2244 if (!ioc->reply_post_free_dma_pool) {
2245 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
2246 "failed\n", ioc->name);
2247 goto out;
2248 }
2249 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
2250 GFP_KERNEL, &ioc->reply_post_free_dma);
2251 if (!ioc->reply_post_free) {
2252 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
2253 "failed\n", ioc->name);
2254 goto out;
2255 }
2256 memset(ioc->reply_post_free, 0, sz);
2257 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
2258 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
2259 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
2260 sz/1024));
2261 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
2262 "(0x%llx)\n", ioc->name, (unsigned long long)
2263 ioc->reply_post_free_dma));
2264 total_sz += sz;
2265
2266 ioc->config_page_sz = 512;
2267 ioc->config_page = pci_alloc_consistent(ioc->pdev,
2268 ioc->config_page_sz, &ioc->config_page_dma);
2269 if (!ioc->config_page) {
2270 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
2271 "failed\n", ioc->name);
2272 goto out;
2273 }
2274 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
2275 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
2276 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
2277 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
2278 total_sz += ioc->config_page_sz;
2279
2280 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
2281 ioc->name, total_sz/1024);
2282 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
2283 "Max Controller Queue Depth(%d)\n",
2284 ioc->name, ioc->shost->can_queue, facts->RequestCredit);
2285 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
2286 ioc->name, ioc->shost->sg_tablesize);
2287 return 0;
2288
2289 out:
2290 _base_release_memory_pools(ioc);
2291 return -ENOMEM;
2292 }
2293
2294
2295 /**
2296 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
2297 * @ioc: Pointer to MPT_ADAPTER structure
2298 * @cooked: Request raw or cooked IOC state
2299 *
2300 * Returns all IOC Doorbell register bits if cooked==0, else just the
2301 * Doorbell bits in MPI_IOC_STATE_MASK.
2302 */
2303 u32
2304 mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
2305 {
2306 u32 s, sc;
2307
2308 s = readl(&ioc->chip->Doorbell);
2309 sc = s & MPI2_IOC_STATE_MASK;
2310 return cooked ? sc : s;
2311 }
2312
2313 /**
2314 * _base_wait_on_iocstate - waiting on a particular ioc state
2315 * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
2316 * @timeout: timeout in second
2317 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2318 *
2319 * Returns 0 for success, non-zero for failure.
2320 */
2321 static int
2322 _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
2323 int sleep_flag)
2324 {
2325 u32 count, cntdn;
2326 u32 current_state;
2327
2328 count = 0;
2329 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2330 do {
2331 current_state = mpt2sas_base_get_iocstate(ioc, 1);
2332 if (current_state == ioc_state)
2333 return 0;
2334 if (count && current_state == MPI2_IOC_STATE_FAULT)
2335 break;
2336 if (sleep_flag == CAN_SLEEP)
2337 msleep(1);
2338 else
2339 udelay(500);
2340 count++;
2341 } while (--cntdn);
2342
2343 return current_state;
2344 }
2345
2346 /**
2347 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
2348 * a write to the doorbell)
2349 * @ioc: per adapter object
2350 * @timeout: timeout in second
2351 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2352 *
2353 * Returns 0 for success, non-zero for failure.
2354 *
2355 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
2356 */
2357 static int
2358 _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
2359 int sleep_flag)
2360 {
2361 u32 cntdn, count;
2362 u32 int_status;
2363
2364 count = 0;
2365 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2366 do {
2367 int_status = readl(&ioc->chip->HostInterruptStatus);
2368 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2369 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
2370 "successfull count(%d), timeout(%d)\n", ioc->name,
2371 __func__, count, timeout));
2372 return 0;
2373 }
2374 if (sleep_flag == CAN_SLEEP)
2375 msleep(1);
2376 else
2377 udelay(500);
2378 count++;
2379 } while (--cntdn);
2380
2381 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2382 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2383 return -EFAULT;
2384 }
2385
2386 /**
2387 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
2388 * @ioc: per adapter object
2389 * @timeout: timeout in second
2390 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2391 *
2392 * Returns 0 for success, non-zero for failure.
2393 *
2394 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
2395 * doorbell.
2396 */
2397 static int
2398 _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
2399 int sleep_flag)
2400 {
2401 u32 cntdn, count;
2402 u32 int_status;
2403 u32 doorbell;
2404
2405 count = 0;
2406 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2407 do {
2408 int_status = readl(&ioc->chip->HostInterruptStatus);
2409 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
2410 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
2411 "successfull count(%d), timeout(%d)\n", ioc->name,
2412 __func__, count, timeout));
2413 return 0;
2414 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2415 doorbell = readl(&ioc->chip->Doorbell);
2416 if ((doorbell & MPI2_IOC_STATE_MASK) ==
2417 MPI2_IOC_STATE_FAULT) {
2418 mpt2sas_base_fault_info(ioc , doorbell);
2419 return -EFAULT;
2420 }
2421 } else if (int_status == 0xFFFFFFFF)
2422 goto out;
2423
2424 if (sleep_flag == CAN_SLEEP)
2425 msleep(1);
2426 else
2427 udelay(500);
2428 count++;
2429 } while (--cntdn);
2430
2431 out:
2432 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2433 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2434 return -EFAULT;
2435 }
2436
2437 /**
2438 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
2439 * @ioc: per adapter object
2440 * @timeout: timeout in second
2441 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2442 *
2443 * Returns 0 for success, non-zero for failure.
2444 *
2445 */
2446 static int
2447 _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
2448 int sleep_flag)
2449 {
2450 u32 cntdn, count;
2451 u32 doorbell_reg;
2452
2453 count = 0;
2454 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2455 do {
2456 doorbell_reg = readl(&ioc->chip->Doorbell);
2457 if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
2458 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
2459 "successfull count(%d), timeout(%d)\n", ioc->name,
2460 __func__, count, timeout));
2461 return 0;
2462 }
2463 if (sleep_flag == CAN_SLEEP)
2464 msleep(1);
2465 else
2466 udelay(500);
2467 count++;
2468 } while (--cntdn);
2469
2470 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2471 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
2472 return -EFAULT;
2473 }
2474
2475 /**
2476 * _base_send_ioc_reset - send doorbell reset
2477 * @ioc: per adapter object
2478 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
2479 * @timeout: timeout in second
2480 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2481 *
2482 * Returns 0 for success, non-zero for failure.
2483 */
2484 static int
2485 _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
2486 int sleep_flag)
2487 {
2488 u32 ioc_state;
2489 int r = 0;
2490
2491 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
2492 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
2493 ioc->name, __func__);
2494 return -EFAULT;
2495 }
2496
2497 if (!(ioc->facts.IOCCapabilities &
2498 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
2499 return -EFAULT;
2500
2501 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
2502
2503 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
2504 &ioc->chip->Doorbell);
2505 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
2506 r = -EFAULT;
2507 goto out;
2508 }
2509 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
2510 timeout, sleep_flag);
2511 if (ioc_state) {
2512 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
2513 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
2514 r = -EFAULT;
2515 goto out;
2516 }
2517 out:
2518 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
2519 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
2520 return r;
2521 }
2522
2523 /**
2524 * _base_handshake_req_reply_wait - send request thru doorbell interface
2525 * @ioc: per adapter object
2526 * @request_bytes: request length
2527 * @request: pointer having request payload
2528 * @reply_bytes: reply length
2529 * @reply: pointer to reply payload
2530 * @timeout: timeout in second
2531 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2532 *
2533 * Returns 0 for success, non-zero for failure.
2534 */
2535 static int
2536 _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
2537 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
2538 {
2539 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
2540 int i;
2541 u8 failed;
2542 u16 dummy;
2543 u32 *mfp;
2544
2545 /* make sure doorbell is not in use */
2546 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
2547 printk(MPT2SAS_ERR_FMT "doorbell is in use "
2548 " (line=%d)\n", ioc->name, __LINE__);
2549 return -EFAULT;
2550 }
2551
2552 /* clear pending doorbell interrupts from previous state changes */
2553 if (readl(&ioc->chip->HostInterruptStatus) &
2554 MPI2_HIS_IOC2SYS_DB_STATUS)
2555 writel(0, &ioc->chip->HostInterruptStatus);
2556
2557 /* send message to ioc */
2558 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
2559 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
2560 &ioc->chip->Doorbell);
2561
2562 if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
2563 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2564 "int failed (line=%d)\n", ioc->name, __LINE__);
2565 return -EFAULT;
2566 }
2567 writel(0, &ioc->chip->HostInterruptStatus);
2568
2569 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
2570 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2571 "ack failed (line=%d)\n", ioc->name, __LINE__);
2572 return -EFAULT;
2573 }
2574
2575 /* send message 32-bits at a time */
2576 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
2577 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
2578 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
2579 failed = 1;
2580 }
2581
2582 if (failed) {
2583 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2584 "sending request failed (line=%d)\n", ioc->name, __LINE__);
2585 return -EFAULT;
2586 }
2587
2588 /* now wait for the reply */
2589 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
2590 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2591 "int failed (line=%d)\n", ioc->name, __LINE__);
2592 return -EFAULT;
2593 }
2594
2595 /* read the first two 16-bits, it gives the total length of the reply */
2596 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2597 & MPI2_DOORBELL_DATA_MASK);
2598 writel(0, &ioc->chip->HostInterruptStatus);
2599 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
2600 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2601 "int failed (line=%d)\n", ioc->name, __LINE__);
2602 return -EFAULT;
2603 }
2604 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2605 & MPI2_DOORBELL_DATA_MASK);
2606 writel(0, &ioc->chip->HostInterruptStatus);
2607
2608 for (i = 2; i < default_reply->MsgLength * 2; i++) {
2609 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
2610 printk(MPT2SAS_ERR_FMT "doorbell "
2611 "handshake int failed (line=%d)\n", ioc->name,
2612 __LINE__);
2613 return -EFAULT;
2614 }
2615 if (i >= reply_bytes/2) /* overflow case */
2616 dummy = readl(&ioc->chip->Doorbell);
2617 else
2618 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2619 & MPI2_DOORBELL_DATA_MASK);
2620 writel(0, &ioc->chip->HostInterruptStatus);
2621 }
2622
2623 _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
2624 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
2625 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
2626 " (line=%d)\n", ioc->name, __LINE__));
2627 }
2628 writel(0, &ioc->chip->HostInterruptStatus);
2629
2630 if (ioc->logging_level & MPT_DEBUG_INIT) {
2631 mfp = (u32 *)reply;
2632 printk(KERN_DEBUG "\toffset:data\n");
2633 for (i = 0; i < reply_bytes/4; i++)
2634 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
2635 le32_to_cpu(mfp[i]));
2636 }
2637 return 0;
2638 }
2639
2640 /**
2641 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
2642 * @ioc: per adapter object
2643 * @mpi_reply: the reply payload from FW
2644 * @mpi_request: the request payload sent to FW
2645 *
2646 * The SAS IO Unit Control Request message allows the host to perform low-level
2647 * operations, such as resets on the PHYs of the IO Unit, also allows the host
2648 * to obtain the IOC assigned device handles for a device if it has other
2649 * identifying information about the device, in addition allows the host to
2650 * remove IOC resources associated with the device.
2651 *
2652 * Returns 0 for success, non-zero for failure.
2653 */
2654 int
2655 mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
2656 Mpi2SasIoUnitControlReply_t *mpi_reply,
2657 Mpi2SasIoUnitControlRequest_t *mpi_request)
2658 {
2659 u16 smid;
2660 u32 ioc_state;
2661 unsigned long timeleft;
2662 u8 issue_reset;
2663 int rc;
2664 void *request;
2665 u16 wait_state_count;
2666
2667 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2668 __func__));
2669
2670 mutex_lock(&ioc->base_cmds.mutex);
2671
2672 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
2673 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
2674 ioc->name, __func__);
2675 rc = -EAGAIN;
2676 goto out;
2677 }
2678
2679 wait_state_count = 0;
2680 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2681 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
2682 if (wait_state_count++ == 10) {
2683 printk(MPT2SAS_ERR_FMT
2684 "%s: failed due to ioc not operational\n",
2685 ioc->name, __func__);
2686 rc = -EFAULT;
2687 goto out;
2688 }
2689 ssleep(1);
2690 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2691 printk(MPT2SAS_INFO_FMT "%s: waiting for "
2692 "operational state(count=%d)\n", ioc->name,
2693 __func__, wait_state_count);
2694 }
2695
2696 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
2697 if (!smid) {
2698 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2699 ioc->name, __func__);
2700 rc = -EAGAIN;
2701 goto out;
2702 }
2703
2704 rc = 0;
2705 ioc->base_cmds.status = MPT2_CMD_PENDING;
2706 request = mpt2sas_base_get_msg_frame(ioc, smid);
2707 ioc->base_cmds.smid = smid;
2708 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
2709 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
2710 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
2711 ioc->ioc_link_reset_in_progress = 1;
2712 mpt2sas_base_put_smid_default(ioc, smid);
2713 init_completion(&ioc->base_cmds.done);
2714 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
2715 msecs_to_jiffies(10000));
2716 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
2717 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
2718 ioc->ioc_link_reset_in_progress)
2719 ioc->ioc_link_reset_in_progress = 0;
2720 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
2721 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
2722 ioc->name, __func__);
2723 _debug_dump_mf(mpi_request,
2724 sizeof(Mpi2SasIoUnitControlRequest_t)/4);
2725 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
2726 issue_reset = 1;
2727 goto issue_host_reset;
2728 }
2729 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
2730 memcpy(mpi_reply, ioc->base_cmds.reply,
2731 sizeof(Mpi2SasIoUnitControlReply_t));
2732 else
2733 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
2734 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2735 goto out;
2736
2737 issue_host_reset:
2738 if (issue_reset)
2739 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
2740 FORCE_BIG_HAMMER);
2741 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2742 rc = -EFAULT;
2743 out:
2744 mutex_unlock(&ioc->base_cmds.mutex);
2745 return rc;
2746 }
2747
2748
2749 /**
2750 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
2751 * @ioc: per adapter object
2752 * @mpi_reply: the reply payload from FW
2753 * @mpi_request: the request payload sent to FW
2754 *
2755 * The SCSI Enclosure Processor request message causes the IOC to
2756 * communicate with SES devices to control LED status signals.
2757 *
2758 * Returns 0 for success, non-zero for failure.
2759 */
2760 int
2761 mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
2762 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
2763 {
2764 u16 smid;
2765 u32 ioc_state;
2766 unsigned long timeleft;
2767 u8 issue_reset;
2768 int rc;
2769 void *request;
2770 u16 wait_state_count;
2771
2772 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2773 __func__));
2774
2775 mutex_lock(&ioc->base_cmds.mutex);
2776
2777 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
2778 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
2779 ioc->name, __func__);
2780 rc = -EAGAIN;
2781 goto out;
2782 }
2783
2784 wait_state_count = 0;
2785 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2786 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
2787 if (wait_state_count++ == 10) {
2788 printk(MPT2SAS_ERR_FMT
2789 "%s: failed due to ioc not operational\n",
2790 ioc->name, __func__);
2791 rc = -EFAULT;
2792 goto out;
2793 }
2794 ssleep(1);
2795 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2796 printk(MPT2SAS_INFO_FMT "%s: waiting for "
2797 "operational state(count=%d)\n", ioc->name,
2798 __func__, wait_state_count);
2799 }
2800
2801 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
2802 if (!smid) {
2803 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2804 ioc->name, __func__);
2805 rc = -EAGAIN;
2806 goto out;
2807 }
2808
2809 rc = 0;
2810 ioc->base_cmds.status = MPT2_CMD_PENDING;
2811 request = mpt2sas_base_get_msg_frame(ioc, smid);
2812 ioc->base_cmds.smid = smid;
2813 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
2814 mpt2sas_base_put_smid_default(ioc, smid);
2815 init_completion(&ioc->base_cmds.done);
2816 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
2817 msecs_to_jiffies(10000));
2818 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
2819 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
2820 ioc->name, __func__);
2821 _debug_dump_mf(mpi_request,
2822 sizeof(Mpi2SepRequest_t)/4);
2823 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
2824 issue_reset = 1;
2825 goto issue_host_reset;
2826 }
2827 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
2828 memcpy(mpi_reply, ioc->base_cmds.reply,
2829 sizeof(Mpi2SepReply_t));
2830 else
2831 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
2832 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2833 goto out;
2834
2835 issue_host_reset:
2836 if (issue_reset)
2837 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
2838 FORCE_BIG_HAMMER);
2839 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2840 rc = -EFAULT;
2841 out:
2842 mutex_unlock(&ioc->base_cmds.mutex);
2843 return rc;
2844 }
2845
2846 /**
2847 * _base_get_port_facts - obtain port facts reply and save in ioc
2848 * @ioc: per adapter object
2849 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2850 *
2851 * Returns 0 for success, non-zero for failure.
2852 */
2853 static int
2854 _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
2855 {
2856 Mpi2PortFactsRequest_t mpi_request;
2857 Mpi2PortFactsReply_t mpi_reply, *pfacts;
2858 int mpi_reply_sz, mpi_request_sz, r;
2859
2860 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2861 __func__));
2862
2863 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
2864 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
2865 memset(&mpi_request, 0, mpi_request_sz);
2866 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
2867 mpi_request.PortNumber = port;
2868 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
2869 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
2870
2871 if (r != 0) {
2872 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
2873 ioc->name, __func__, r);
2874 return r;
2875 }
2876
2877 pfacts = &ioc->pfacts[port];
2878 memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
2879 pfacts->PortNumber = mpi_reply.PortNumber;
2880 pfacts->VP_ID = mpi_reply.VP_ID;
2881 pfacts->VF_ID = mpi_reply.VF_ID;
2882 pfacts->MaxPostedCmdBuffers =
2883 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
2884
2885 return 0;
2886 }
2887
2888 /**
2889 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
2890 * @ioc: per adapter object
2891 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2892 *
2893 * Returns 0 for success, non-zero for failure.
2894 */
2895 static int
2896 _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2897 {
2898 Mpi2IOCFactsRequest_t mpi_request;
2899 Mpi2IOCFactsReply_t mpi_reply, *facts;
2900 int mpi_reply_sz, mpi_request_sz, r;
2901
2902 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2903 __func__));
2904
2905 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
2906 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
2907 memset(&mpi_request, 0, mpi_request_sz);
2908 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
2909 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
2910 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
2911
2912 if (r != 0) {
2913 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
2914 ioc->name, __func__, r);
2915 return r;
2916 }
2917
2918 facts = &ioc->facts;
2919 memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
2920 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
2921 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
2922 facts->VP_ID = mpi_reply.VP_ID;
2923 facts->VF_ID = mpi_reply.VF_ID;
2924 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
2925 facts->MaxChainDepth = mpi_reply.MaxChainDepth;
2926 facts->WhoInit = mpi_reply.WhoInit;
2927 facts->NumberOfPorts = mpi_reply.NumberOfPorts;
2928 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
2929 facts->MaxReplyDescriptorPostQueueDepth =
2930 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
2931 facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
2932 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
2933 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
2934 ioc->ir_firmware = 1;
2935 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
2936 facts->IOCRequestFrameSize =
2937 le16_to_cpu(mpi_reply.IOCRequestFrameSize);
2938 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
2939 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
2940 ioc->shost->max_id = -1;
2941 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
2942 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
2943 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
2944 facts->HighPriorityCredit =
2945 le16_to_cpu(mpi_reply.HighPriorityCredit);
2946 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
2947 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
2948
2949 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
2950 "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
2951 facts->MaxChainDepth));
2952 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
2953 "reply frame size(%d)\n", ioc->name,
2954 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
2955 return 0;
2956 }
2957
2958 /**
2959 * _base_send_ioc_init - send ioc_init to firmware
2960 * @ioc: per adapter object
2961 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2962 *
2963 * Returns 0 for success, non-zero for failure.
2964 */
2965 static int
2966 _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2967 {
2968 Mpi2IOCInitRequest_t mpi_request;
2969 Mpi2IOCInitReply_t mpi_reply;
2970 int r;
2971 struct timeval current_time;
2972 u16 ioc_status;
2973
2974 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2975 __func__));
2976
2977 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
2978 mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
2979 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
2980 mpi_request.VF_ID = 0; /* TODO */
2981 mpi_request.VP_ID = 0;
2982 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
2983 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
2984
2985 /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was
2986 * removed and made reserved. For those with older firmware will need
2987 * this fix. It was decided that the Reply and Request frame sizes are
2988 * the same.
2989 */
2990 if ((ioc->facts.HeaderVersion >> 8) < 0xA) {
2991 mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);
2992 /* mpi_request.SystemReplyFrameSize =
2993 * cpu_to_le16(ioc->reply_sz);
2994 */
2995 }
2996
2997 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
2998 mpi_request.ReplyDescriptorPostQueueDepth =
2999 cpu_to_le16(ioc->reply_post_queue_depth);
3000 mpi_request.ReplyFreeQueueDepth =
3001 cpu_to_le16(ioc->reply_free_queue_depth);
3002
3003 #if BITS_PER_LONG > 32
3004 mpi_request.SenseBufferAddressHigh =
3005 cpu_to_le32(ioc->sense_dma >> 32);
3006 mpi_request.SystemReplyAddressHigh =
3007 cpu_to_le32(ioc->reply_dma >> 32);
3008 mpi_request.SystemRequestFrameBaseAddress =
3009 cpu_to_le64(ioc->request_dma);
3010 mpi_request.ReplyFreeQueueAddress =
3011 cpu_to_le64(ioc->reply_free_dma);
3012 mpi_request.ReplyDescriptorPostQueueAddress =
3013 cpu_to_le64(ioc->reply_post_free_dma);
3014 #else
3015 mpi_request.SystemRequestFrameBaseAddress =
3016 cpu_to_le32(ioc->request_dma);
3017 mpi_request.ReplyFreeQueueAddress =
3018 cpu_to_le32(ioc->reply_free_dma);
3019 mpi_request.ReplyDescriptorPostQueueAddress =
3020 cpu_to_le32(ioc->reply_post_free_dma);
3021 #endif
3022
3023 /* This time stamp specifies number of milliseconds
3024 * since epoch ~ midnight January 1, 1970.
3025 */
3026 do_gettimeofday(&current_time);
3027 mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
3028 (current_time.tv_usec / 1000));
3029
3030 if (ioc->logging_level & MPT_DEBUG_INIT) {
3031 u32 *mfp;
3032 int i;
3033
3034 mfp = (u32 *)&mpi_request;
3035 printk(KERN_DEBUG "\toffset:data\n");
3036 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
3037 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
3038 le32_to_cpu(mfp[i]));
3039 }
3040
3041 r = _base_handshake_req_reply_wait(ioc,
3042 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
3043 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
3044 sleep_flag);
3045
3046 if (r != 0) {
3047 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3048 ioc->name, __func__, r);
3049 return r;
3050 }
3051
3052 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
3053 if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
3054 mpi_reply.IOCLogInfo) {
3055 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
3056 r = -EIO;
3057 }
3058
3059 return 0;
3060 }
3061
3062 /**
3063 * _base_send_port_enable - send port_enable(discovery stuff) to firmware
3064 * @ioc: per adapter object
3065 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3066 *
3067 * Returns 0 for success, non-zero for failure.
3068 */
3069 static int
3070 _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3071 {
3072 Mpi2PortEnableRequest_t *mpi_request;
3073 u32 ioc_state;
3074 unsigned long timeleft;
3075 int r = 0;
3076 u16 smid;
3077
3078 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
3079
3080 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3081 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3082 ioc->name, __func__);
3083 return -EAGAIN;
3084 }
3085
3086 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3087 if (!smid) {
3088 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3089 ioc->name, __func__);
3090 return -EAGAIN;
3091 }
3092
3093 ioc->base_cmds.status = MPT2_CMD_PENDING;
3094 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3095 ioc->base_cmds.smid = smid;
3096 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
3097 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
3098 mpi_request->VF_ID = 0; /* TODO */
3099 mpi_request->VP_ID = 0;
3100
3101 mpt2sas_base_put_smid_default(ioc, smid);
3102 init_completion(&ioc->base_cmds.done);
3103 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3104 300*HZ);
3105 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3106 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3107 ioc->name, __func__);
3108 _debug_dump_mf(mpi_request,
3109 sizeof(Mpi2PortEnableRequest_t)/4);
3110 if (ioc->base_cmds.status & MPT2_CMD_RESET)
3111 r = -EFAULT;
3112 else
3113 r = -ETIME;
3114 goto out;
3115 } else
3116 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
3117 ioc->name, __func__));
3118
3119 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
3120 60, sleep_flag);
3121 if (ioc_state) {
3122 printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
3123 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3124 r = -EFAULT;
3125 }
3126 out:
3127 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3128 printk(MPT2SAS_INFO_FMT "port enable: %s\n",
3129 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
3130 return r;
3131 }
3132
3133 /**
3134 * _base_unmask_events - turn on notification for this event
3135 * @ioc: per adapter object
3136 * @event: firmware event
3137 *
3138 * The mask is stored in ioc->event_masks.
3139 */
3140 static void
3141 _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
3142 {
3143 u32 desired_event;
3144
3145 if (event >= 128)
3146 return;
3147
3148 desired_event = (1 << (event % 32));
3149
3150 if (event < 32)
3151 ioc->event_masks[0] &= ~desired_event;
3152 else if (event < 64)
3153 ioc->event_masks[1] &= ~desired_event;
3154 else if (event < 96)
3155 ioc->event_masks[2] &= ~desired_event;
3156 else if (event < 128)
3157 ioc->event_masks[3] &= ~desired_event;
3158 }
3159
3160 /**
3161 * _base_event_notification - send event notification
3162 * @ioc: per adapter object
3163 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3164 *
3165 * Returns 0 for success, non-zero for failure.
3166 */
3167 static int
3168 _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3169 {
3170 Mpi2EventNotificationRequest_t *mpi_request;
3171 unsigned long timeleft;
3172 u16 smid;
3173 int r = 0;
3174 int i;
3175
3176 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3177 __func__));
3178
3179 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3180 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3181 ioc->name, __func__);
3182 return -EAGAIN;
3183 }
3184
3185 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3186 if (!smid) {
3187 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3188 ioc->name, __func__);
3189 return -EAGAIN;
3190 }
3191 ioc->base_cmds.status = MPT2_CMD_PENDING;
3192 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3193 ioc->base_cmds.smid = smid;
3194 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
3195 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
3196 mpi_request->VF_ID = 0; /* TODO */
3197 mpi_request->VP_ID = 0;
3198 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
3199 mpi_request->EventMasks[i] =
3200 cpu_to_le32(ioc->event_masks[i]);
3201 mpt2sas_base_put_smid_default(ioc, smid);
3202 init_completion(&ioc->base_cmds.done);
3203 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
3204 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3205 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3206 ioc->name, __func__);
3207 _debug_dump_mf(mpi_request,
3208 sizeof(Mpi2EventNotificationRequest_t)/4);
3209 if (ioc->base_cmds.status & MPT2_CMD_RESET)
3210 r = -EFAULT;
3211 else
3212 r = -ETIME;
3213 } else
3214 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
3215 ioc->name, __func__));
3216 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3217 return r;
3218 }
3219
3220 /**
3221 * mpt2sas_base_validate_event_type - validating event types
3222 * @ioc: per adapter object
3223 * @event: firmware event
3224 *
3225 * This will turn on firmware event notification when application
3226 * ask for that event. We don't mask events that are already enabled.
3227 */
3228 void
3229 mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
3230 {
3231 int i, j;
3232 u32 event_mask, desired_event;
3233 u8 send_update_to_fw;
3234
3235 for (i = 0, send_update_to_fw = 0; i <
3236 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
3237 event_mask = ~event_type[i];
3238 desired_event = 1;
3239 for (j = 0; j < 32; j++) {
3240 if (!(event_mask & desired_event) &&
3241 (ioc->event_masks[i] & desired_event)) {
3242 ioc->event_masks[i] &= ~desired_event;
3243 send_update_to_fw = 1;
3244 }
3245 desired_event = (desired_event << 1);
3246 }
3247 }
3248
3249 if (!send_update_to_fw)
3250 return;
3251
3252 mutex_lock(&ioc->base_cmds.mutex);
3253 _base_event_notification(ioc, CAN_SLEEP);
3254 mutex_unlock(&ioc->base_cmds.mutex);
3255 }
3256
3257 /**
3258 * _base_diag_reset - the "big hammer" start of day reset
3259 * @ioc: per adapter object
3260 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3261 *
3262 * Returns 0 for success, non-zero for failure.
3263 */
3264 static int
3265 _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3266 {
3267 u32 host_diagnostic;
3268 u32 ioc_state;
3269 u32 count;
3270 u32 hcb_size;
3271
3272 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
3273
3274 _base_save_msix_table(ioc);
3275
3276 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n",
3277 ioc->name));
3278
3279 count = 0;
3280 do {
3281 /* Write magic sequence to WriteSequence register
3282 * Loop until in diagnostic mode
3283 */
3284 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic "
3285 "sequence\n", ioc->name));
3286 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3287 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
3288 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
3289 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
3290 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
3291 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
3292 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
3293
3294 /* wait 100 msec */
3295 if (sleep_flag == CAN_SLEEP)
3296 msleep(100);
3297 else
3298 mdelay(100);
3299
3300 if (count++ > 20)
3301 goto out;
3302
3303 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3304 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic "
3305 "sequence: count(%d), host_diagnostic(0x%08x)\n",
3306 ioc->name, count, host_diagnostic));
3307
3308 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
3309
3310 hcb_size = readl(&ioc->chip->HCBSize);
3311
3312 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n",
3313 ioc->name));
3314 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
3315 &ioc->chip->HostDiagnostic);
3316
3317 /* don't access any registers for 50 milliseconds */
3318 msleep(50);
3319
3320 /* 300 second max wait */
3321 for (count = 0; count < 3000000 ; count++) {
3322
3323 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3324
3325 if (host_diagnostic == 0xFFFFFFFF)
3326 goto out;
3327 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
3328 break;
3329
3330 /* wait 100 msec */
3331 if (sleep_flag == CAN_SLEEP)
3332 msleep(1);
3333 else
3334 mdelay(1);
3335 }
3336
3337 if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
3338
3339 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter "
3340 "assuming the HCB Address points to good F/W\n",
3341 ioc->name));
3342 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
3343 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
3344 writel(host_diagnostic, &ioc->chip->HostDiagnostic);
3345
3346 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT
3347 "re-enable the HCDW\n", ioc->name));
3348 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
3349 &ioc->chip->HCBSize);
3350 }
3351
3352 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n",
3353 ioc->name));
3354 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
3355 &ioc->chip->HostDiagnostic);
3356
3357 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the "
3358 "diagnostic register\n", ioc->name));
3359 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3360
3361 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the "
3362 "READY state\n", ioc->name));
3363 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
3364 sleep_flag);
3365 if (ioc_state) {
3366 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
3367 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3368 goto out;
3369 }
3370
3371 _base_restore_msix_table(ioc);
3372 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
3373 return 0;
3374
3375 out:
3376 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
3377 return -EFAULT;
3378 }
3379
3380 /**
3381 * _base_make_ioc_ready - put controller in READY state
3382 * @ioc: per adapter object
3383 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3384 * @type: FORCE_BIG_HAMMER or SOFT_RESET
3385 *
3386 * Returns 0 for success, non-zero for failure.
3387 */
3388 static int
3389 _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
3390 enum reset_type type)
3391 {
3392 u32 ioc_state;
3393
3394 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3395 __func__));
3396
3397 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
3398 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n",
3399 ioc->name, __func__, ioc_state));
3400
3401 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
3402 return 0;
3403
3404 if (ioc_state & MPI2_DOORBELL_USED) {
3405 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell "
3406 "active!\n", ioc->name));
3407 goto issue_diag_reset;
3408 }
3409
3410 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
3411 mpt2sas_base_fault_info(ioc, ioc_state &
3412 MPI2_DOORBELL_DATA_MASK);
3413 goto issue_diag_reset;
3414 }
3415
3416 if (type == FORCE_BIG_HAMMER)
3417 goto issue_diag_reset;
3418
3419 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
3420 if (!(_base_send_ioc_reset(ioc,
3421 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP)))
3422 return 0;
3423
3424 issue_diag_reset:
3425 return _base_diag_reset(ioc, CAN_SLEEP);
3426 }
3427
3428 /**
3429 * _base_make_ioc_operational - put controller in OPERATIONAL state
3430 * @ioc: per adapter object
3431 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3432 *
3433 * Returns 0 for success, non-zero for failure.
3434 */
3435 static int
3436 _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3437 {
3438 int r, i;
3439 unsigned long flags;
3440 u32 reply_address;
3441 u16 smid;
3442 struct _tr_list *delayed_tr, *delayed_tr_next;
3443
3444 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3445 __func__));
3446
3447 /* clean the delayed target reset list */
3448 list_for_each_entry_safe(delayed_tr, delayed_tr_next,
3449 &ioc->delayed_tr_list, list) {
3450 list_del(&delayed_tr->list);
3451 kfree(delayed_tr);
3452 }
3453
3454 /* initialize the scsi lookup free list */
3455 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
3456 INIT_LIST_HEAD(&ioc->free_list);
3457 smid = 1;
3458 for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
3459 ioc->scsi_lookup[i].cb_idx = 0xFF;
3460 ioc->scsi_lookup[i].smid = smid;
3461 ioc->scsi_lookup[i].scmd = NULL;
3462 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
3463 &ioc->free_list);
3464 }
3465
3466 /* hi-priority queue */
3467 INIT_LIST_HEAD(&ioc->hpr_free_list);
3468 smid = ioc->hi_priority_smid;
3469 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
3470 ioc->hpr_lookup[i].cb_idx = 0xFF;
3471 ioc->hpr_lookup[i].smid = smid;
3472 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
3473 &ioc->hpr_free_list);
3474 }
3475
3476 /* internal queue */
3477 INIT_LIST_HEAD(&ioc->internal_free_list);
3478 smid = ioc->internal_smid;
3479 for (i = 0; i < ioc->internal_depth; i++, smid++) {
3480 ioc->internal_lookup[i].cb_idx = 0xFF;
3481 ioc->internal_lookup[i].smid = smid;
3482 list_add_tail(&ioc->internal_lookup[i].tracker_list,
3483 &ioc->internal_free_list);
3484 }
3485 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
3486
3487 /* initialize Reply Free Queue */
3488 for (i = 0, reply_address = (u32)ioc->reply_dma ;
3489 i < ioc->reply_free_queue_depth ; i++, reply_address +=
3490 ioc->reply_sz)
3491 ioc->reply_free[i] = cpu_to_le32(reply_address);
3492
3493 /* initialize Reply Post Free Queue */
3494 for (i = 0; i < ioc->reply_post_queue_depth; i++)
3495 ioc->reply_post_free[i].Words = ULLONG_MAX;
3496
3497 r = _base_send_ioc_init(ioc, sleep_flag);
3498 if (r)
3499 return r;
3500
3501 /* initialize the index's */
3502 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
3503 ioc->reply_post_host_index = 0;
3504 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
3505 writel(0, &ioc->chip->ReplyPostHostIndex);
3506
3507 _base_unmask_interrupts(ioc);
3508 r = _base_event_notification(ioc, sleep_flag);
3509 if (r)
3510 return r;
3511
3512 if (sleep_flag == CAN_SLEEP)
3513 _base_static_config_pages(ioc);
3514
3515 r = _base_send_port_enable(ioc, sleep_flag);
3516 if (r)
3517 return r;
3518
3519 return r;
3520 }
3521
3522 /**
3523 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
3524 * @ioc: per adapter object
3525 *
3526 * Return nothing.
3527 */
3528 void
3529 mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
3530 {
3531 struct pci_dev *pdev = ioc->pdev;
3532
3533 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3534 __func__));
3535
3536 _base_mask_interrupts(ioc);
3537 ioc->shost_recovery = 1;
3538 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
3539 ioc->shost_recovery = 0;
3540 if (ioc->pci_irq) {
3541 synchronize_irq(pdev->irq);
3542 free_irq(ioc->pci_irq, ioc);
3543 }
3544 _base_disable_msix(ioc);
3545 if (ioc->chip_phys)
3546 iounmap(ioc->chip);
3547 ioc->pci_irq = -1;
3548 ioc->chip_phys = 0;
3549 pci_release_selected_regions(ioc->pdev, ioc->bars);
3550 pci_disable_device(pdev);
3551 return;
3552 }
3553
3554 /**
3555 * mpt2sas_base_attach - attach controller instance
3556 * @ioc: per adapter object
3557 *
3558 * Returns 0 for success, non-zero for failure.
3559 */
3560 int
3561 mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
3562 {
3563 int r, i;
3564
3565 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3566 __func__));
3567
3568 r = mpt2sas_base_map_resources(ioc);
3569 if (r)
3570 return r;
3571
3572 pci_set_drvdata(ioc->pdev, ioc->shost);
3573 r = _base_get_ioc_facts(ioc, CAN_SLEEP);
3574 if (r)
3575 goto out_free_resources;
3576
3577 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
3578 if (r)
3579 goto out_free_resources;
3580
3581 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
3582 sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
3583 if (!ioc->pfacts)
3584 goto out_free_resources;
3585
3586 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
3587 r = _base_get_port_facts(ioc, i, CAN_SLEEP);
3588 if (r)
3589 goto out_free_resources;
3590 }
3591
3592 r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
3593 if (r)
3594 goto out_free_resources;
3595
3596 init_waitqueue_head(&ioc->reset_wq);
3597
3598 ioc->fwfault_debug = mpt2sas_fwfault_debug;
3599
3600 /* base internal command bits */
3601 mutex_init(&ioc->base_cmds.mutex);
3602 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3603 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3604
3605 /* transport internal command bits */
3606 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3607 ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
3608 mutex_init(&ioc->transport_cmds.mutex);
3609
3610 /* scsih internal command bits */
3611 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3612 ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
3613 mutex_init(&ioc->scsih_cmds.mutex);
3614
3615 /* task management internal command bits */
3616 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3617 ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
3618 mutex_init(&ioc->tm_cmds.mutex);
3619
3620 /* config page internal command bits */
3621 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3622 ioc->config_cmds.status = MPT2_CMD_NOT_USED;
3623 mutex_init(&ioc->config_cmds.mutex);
3624
3625 /* ctl module internal command bits */
3626 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3627 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
3628 mutex_init(&ioc->ctl_cmds.mutex);
3629
3630 init_completion(&ioc->shost_recovery_done);
3631
3632 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
3633 ioc->event_masks[i] = -1;
3634
3635 /* here we enable the events we care about */
3636 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
3637 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
3638 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
3639 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
3640 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
3641 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
3642 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
3643 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
3644 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
3645 _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL);
3646 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
3647 r = _base_make_ioc_operational(ioc, CAN_SLEEP);
3648 if (r)
3649 goto out_free_resources;
3650
3651 mpt2sas_base_start_watchdog(ioc);
3652 if (diag_buffer_enable != 0)
3653 mpt2sas_enable_diag_buffer(ioc, diag_buffer_enable);
3654 return 0;
3655
3656 out_free_resources:
3657
3658 ioc->remove_host = 1;
3659 mpt2sas_base_free_resources(ioc);
3660 _base_release_memory_pools(ioc);
3661 pci_set_drvdata(ioc->pdev, NULL);
3662 kfree(ioc->tm_cmds.reply);
3663 kfree(ioc->transport_cmds.reply);
3664 kfree(ioc->scsih_cmds.reply);
3665 kfree(ioc->config_cmds.reply);
3666 kfree(ioc->base_cmds.reply);
3667 kfree(ioc->ctl_cmds.reply);
3668 kfree(ioc->pfacts);
3669 ioc->ctl_cmds.reply = NULL;
3670 ioc->base_cmds.reply = NULL;
3671 ioc->tm_cmds.reply = NULL;
3672 ioc->scsih_cmds.reply = NULL;
3673 ioc->transport_cmds.reply = NULL;
3674 ioc->config_cmds.reply = NULL;
3675 ioc->pfacts = NULL;
3676 return r;
3677 }
3678
3679
3680 /**
3681 * mpt2sas_base_detach - remove controller instance
3682 * @ioc: per adapter object
3683 *
3684 * Return nothing.
3685 */
3686 void
3687 mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
3688 {
3689
3690 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3691 __func__));
3692
3693 mpt2sas_base_stop_watchdog(ioc);
3694 mpt2sas_base_free_resources(ioc);
3695 _base_release_memory_pools(ioc);
3696 pci_set_drvdata(ioc->pdev, NULL);
3697 kfree(ioc->pfacts);
3698 kfree(ioc->ctl_cmds.reply);
3699 kfree(ioc->base_cmds.reply);
3700 kfree(ioc->tm_cmds.reply);
3701 kfree(ioc->transport_cmds.reply);
3702 kfree(ioc->scsih_cmds.reply);
3703 kfree(ioc->config_cmds.reply);
3704 }
3705
3706 /**
3707 * _base_reset_handler - reset callback handler (for base)
3708 * @ioc: per adapter object
3709 * @reset_phase: phase
3710 *
3711 * The handler for doing any required cleanup or initialization.
3712 *
3713 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
3714 * MPT2_IOC_DONE_RESET
3715 *
3716 * Return nothing.
3717 */
3718 static void
3719 _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
3720 {
3721 switch (reset_phase) {
3722 case MPT2_IOC_PRE_RESET:
3723 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
3724 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
3725 break;
3726 case MPT2_IOC_AFTER_RESET:
3727 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
3728 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
3729 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
3730 ioc->transport_cmds.status |= MPT2_CMD_RESET;
3731 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
3732 complete(&ioc->transport_cmds.done);
3733 }
3734 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3735 ioc->base_cmds.status |= MPT2_CMD_RESET;
3736 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
3737 complete(&ioc->base_cmds.done);
3738 }
3739 if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
3740 ioc->config_cmds.status |= MPT2_CMD_RESET;
3741 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
3742 ioc->config_cmds.smid = USHORT_MAX;
3743 complete(&ioc->config_cmds.done);
3744 }
3745 break;
3746 case MPT2_IOC_DONE_RESET:
3747 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
3748 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
3749 break;
3750 }
3751 mpt2sas_scsih_reset_handler(ioc, reset_phase);
3752 mpt2sas_ctl_reset_handler(ioc, reset_phase);
3753 }
3754
3755 /**
3756 * _wait_for_commands_to_complete - reset controller
3757 * @ioc: Pointer to MPT_ADAPTER structure
3758 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3759 *
3760 * This function waiting(3s) for all pending commands to complete
3761 * prior to putting controller in reset.
3762 */
3763 static void
3764 _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3765 {
3766 u32 ioc_state;
3767 unsigned long flags;
3768 u16 i;
3769
3770 ioc->pending_io_count = 0;
3771 if (sleep_flag != CAN_SLEEP)
3772 return;
3773
3774 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
3775 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
3776 return;
3777
3778 /* pending command count */
3779 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
3780 for (i = 0; i < ioc->scsiio_depth; i++)
3781 if (ioc->scsi_lookup[i].cb_idx != 0xFF)
3782 ioc->pending_io_count++;
3783 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
3784
3785 if (!ioc->pending_io_count)
3786 return;
3787
3788 /* wait for pending commands to complete */
3789 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ);
3790 }
3791
3792 /**
3793 * mpt2sas_base_hard_reset_handler - reset controller
3794 * @ioc: Pointer to MPT_ADAPTER structure
3795 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3796 * @type: FORCE_BIG_HAMMER or SOFT_RESET
3797 *
3798 * Returns 0 for success, non-zero for failure.
3799 */
3800 int
3801 mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
3802 enum reset_type type)
3803 {
3804 int r;
3805 unsigned long flags;
3806
3807 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name,
3808 __func__));
3809
3810 if (mpt2sas_fwfault_debug)
3811 mpt2sas_halt_firmware(ioc);
3812
3813 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
3814 if (ioc->shost_recovery) {
3815 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
3816 printk(MPT2SAS_ERR_FMT "%s: busy\n",
3817 ioc->name, __func__);
3818 return -EBUSY;
3819 }
3820 ioc->shost_recovery = 1;
3821 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
3822
3823 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
3824 _wait_for_commands_to_complete(ioc, sleep_flag);
3825 _base_mask_interrupts(ioc);
3826 r = _base_make_ioc_ready(ioc, sleep_flag, type);
3827 if (r)
3828 goto out;
3829 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
3830 r = _base_make_ioc_operational(ioc, sleep_flag);
3831 if (!r)
3832 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
3833 out:
3834 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n",
3835 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
3836
3837 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
3838 ioc->shost_recovery = 0;
3839 complete(&ioc->shost_recovery_done);
3840 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
3841
3842 return r;
3843 }
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree