2 * Common Flash Interface support:
3 * AMD & Fujitsu Standard Vendor Command Set (ID 0x0002)
5 * Copyright (C) 2000 Crossnet Co. <info@crossnet.co.jp>
6 * Copyright (C) 2004 Arcom Control Systems Ltd <linux@arcom.com>
7 * Copyright (C) 2005 MontaVista Software Inc. <source@mvista.com>
9 * 2_by_8 routines added by Simon Munton
11 * 4_by_16 work by Carolyn J. Smith
13 * XIP support hooks by Vitaly Wool (based on code for Intel flash
16 * 25/09/2008 Christopher Moore: TopBottom fixup for many Macronix with CFI V1.0
18 * Occasionally maintained by Thayne Harbaugh tharbaugh at lnxi dot com
23 #include <linux/module.h>
24 #include <linux/types.h>
25 #include <linux/kernel.h>
26 #include <linux/sched.h>
27 #include <linux/init.h>
29 #include <asm/byteorder.h>
31 #include <linux/errno.h>
32 #include <linux/slab.h>
33 #include <linux/delay.h>
34 #include <linux/interrupt.h>
35 #include <linux/reboot.h>
36 #include <linux/mtd/map.h>
37 #include <linux/mtd/mtd.h>
38 #include <linux/mtd/cfi.h>
39 #include <linux/mtd/xip.h>
41 #define AMD_BOOTLOC_BUG
42 #define FORCE_WORD_WRITE 0
44 #define MAX_WORD_RETRIES 3
46 #define SST49LF004B 0x0060
47 #define SST49LF040B 0x0050
48 #define SST49LF008A 0x005a
49 #define AT49BV6416 0x00d6
51 static int cfi_amdstd_read (struct mtd_info
*, loff_t
, size_t, size_t *, u_char
*);
52 static int cfi_amdstd_write_words(struct mtd_info
*, loff_t
, size_t, size_t *, const u_char
*);
53 static int cfi_amdstd_write_buffers(struct mtd_info
*, loff_t
, size_t, size_t *, const u_char
*);
54 static int cfi_amdstd_erase_chip(struct mtd_info
*, struct erase_info
*);
55 static int cfi_amdstd_erase_varsize(struct mtd_info
*, struct erase_info
*);
56 static void cfi_amdstd_sync (struct mtd_info
*);
57 static int cfi_amdstd_suspend (struct mtd_info
*);
58 static void cfi_amdstd_resume (struct mtd_info
*);
59 static int cfi_amdstd_reboot(struct notifier_block
*, unsigned long, void *);
60 static int cfi_amdstd_secsi_read (struct mtd_info
*, loff_t
, size_t, size_t *, u_char
*);
62 static void cfi_amdstd_destroy(struct mtd_info
*);
64 struct mtd_info
*cfi_cmdset_0002(struct map_info
*, int);
65 static struct mtd_info
*cfi_amdstd_setup (struct mtd_info
*);
67 static int get_chip(struct map_info
*map
, struct flchip
*chip
, unsigned long adr
, int mode
);
68 static void put_chip(struct map_info
*map
, struct flchip
*chip
, unsigned long adr
);
71 static int cfi_atmel_lock(struct mtd_info
*mtd
, loff_t ofs
, uint64_t len
);
72 static int cfi_atmel_unlock(struct mtd_info
*mtd
, loff_t ofs
, uint64_t len
);
74 static struct mtd_chip_driver cfi_amdstd_chipdrv
= {
75 .probe
= NULL
, /* Not usable directly */
76 .destroy
= cfi_amdstd_destroy
,
77 .name
= "cfi_cmdset_0002",
82 /* #define DEBUG_CFI_FEATURES */
85 #ifdef DEBUG_CFI_FEATURES
86 static void cfi_tell_features(struct cfi_pri_amdstd
*extp
)
88 const char* erase_suspend
[3] = {
89 "Not supported", "Read only", "Read/write"
91 const char* top_bottom
[6] = {
92 "No WP", "8x8KiB sectors at top & bottom, no WP",
93 "Bottom boot", "Top boot",
94 "Uniform, Bottom WP", "Uniform, Top WP"
97 printk(" Silicon revision: %d\n", extp
->SiliconRevision
>> 1);
98 printk(" Address sensitive unlock: %s\n",
99 (extp
->SiliconRevision
& 1) ? "Not required" : "Required");
101 if (extp
->EraseSuspend
< ARRAY_SIZE(erase_suspend
))
102 printk(" Erase Suspend: %s\n", erase_suspend
[extp
->EraseSuspend
]);
104 printk(" Erase Suspend: Unknown value %d\n", extp
->EraseSuspend
);
106 if (extp
->BlkProt
== 0)
107 printk(" Block protection: Not supported\n");
109 printk(" Block protection: %d sectors per group\n", extp
->BlkProt
);
112 printk(" Temporary block unprotect: %s\n",
113 extp
->TmpBlkUnprotect
? "Supported" : "Not supported");
114 printk(" Block protect/unprotect scheme: %d\n", extp
->BlkProtUnprot
);
115 printk(" Number of simultaneous operations: %d\n", extp
->SimultaneousOps
);
116 printk(" Burst mode: %s\n",
117 extp
->BurstMode
? "Supported" : "Not supported");
118 if (extp
->PageMode
== 0)
119 printk(" Page mode: Not supported\n");
121 printk(" Page mode: %d word page\n", extp
->PageMode
<< 2);
123 printk(" Vpp Supply Minimum Program/Erase Voltage: %d.%d V\n",
124 extp
->VppMin
>> 4, extp
->VppMin
& 0xf);
125 printk(" Vpp Supply Maximum Program/Erase Voltage: %d.%d V\n",
126 extp
->VppMax
>> 4, extp
->VppMax
& 0xf);
128 if (extp
->TopBottom
< ARRAY_SIZE(top_bottom
))
129 printk(" Top/Bottom Boot Block: %s\n", top_bottom
[extp
->TopBottom
]);
131 printk(" Top/Bottom Boot Block: Unknown value %d\n", extp
->TopBottom
);
135 #ifdef AMD_BOOTLOC_BUG
136 /* Wheee. Bring me the head of someone at AMD. */
137 static void fixup_amd_bootblock(struct mtd_info
*mtd
)
139 struct map_info
*map
= mtd
->priv
;
140 struct cfi_private
*cfi
= map
->fldrv_priv
;
141 struct cfi_pri_amdstd
*extp
= cfi
->cmdset_priv
;
142 __u8 major
= extp
->MajorVersion
;
143 __u8 minor
= extp
->MinorVersion
;
145 if (((major
<< 8) | minor
) < 0x3131) {
146 /* CFI version 1.0 => don't trust bootloc */
148 DEBUG(MTD_DEBUG_LEVEL1
,
149 "%s: JEDEC Vendor ID is 0x%02X Device ID is 0x%02X\n",
150 map
->name
, cfi
->mfr
, cfi
->id
);
152 /* AFAICS all 29LV400 with a bottom boot block have a device ID
153 * of 0x22BA in 16-bit mode and 0xBA in 8-bit mode.
154 * These were badly detected as they have the 0x80 bit set
155 * so treat them as a special case.
157 if (((cfi
->id
== 0xBA) || (cfi
->id
== 0x22BA)) &&
159 /* Macronix added CFI to their 2nd generation
160 * MX29LV400C B/T but AFAICS no other 29LV400 (AMD,
161 * Fujitsu, Spansion, EON, ESI and older Macronix)
164 * Therefore also check the manufacturer.
165 * This reduces the risk of false detection due to
166 * the 8-bit device ID.
168 (cfi
->mfr
== CFI_MFR_MACRONIX
)) {
169 DEBUG(MTD_DEBUG_LEVEL1
,
170 "%s: Macronix MX29LV400C with bottom boot block"
171 " detected\n", map
->name
);
172 extp
->TopBottom
= 2; /* bottom boot */
174 if (cfi
->id
& 0x80) {
175 printk(KERN_WARNING
"%s: JEDEC Device ID is 0x%02X. Assuming broken CFI table.\n", map
->name
, cfi
->id
);
176 extp
->TopBottom
= 3; /* top boot */
178 extp
->TopBottom
= 2; /* bottom boot */
181 DEBUG(MTD_DEBUG_LEVEL1
,
182 "%s: AMD CFI PRI V%c.%c has no boot block field;"
183 " deduced %s from Device ID\n", map
->name
, major
, minor
,
184 extp
->TopBottom
== 2 ? "bottom" : "top");
189 static void fixup_use_write_buffers(struct mtd_info
*mtd
)
191 struct map_info
*map
= mtd
->priv
;
192 struct cfi_private
*cfi
= map
->fldrv_priv
;
193 if (cfi
->cfiq
->BufWriteTimeoutTyp
) {
194 DEBUG(MTD_DEBUG_LEVEL1
, "Using buffer write method\n" );
195 mtd
->write
= cfi_amdstd_write_buffers
;
199 /* Atmel chips don't use the same PRI format as AMD chips */
200 static void fixup_convert_atmel_pri(struct mtd_info
*mtd
)
202 struct map_info
*map
= mtd
->priv
;
203 struct cfi_private
*cfi
= map
->fldrv_priv
;
204 struct cfi_pri_amdstd
*extp
= cfi
->cmdset_priv
;
205 struct cfi_pri_atmel atmel_pri
;
207 memcpy(&atmel_pri
, extp
, sizeof(atmel_pri
));
208 memset((char *)extp
+ 5, 0, sizeof(*extp
) - 5);
210 if (atmel_pri
.Features
& 0x02)
211 extp
->EraseSuspend
= 2;
213 /* Some chips got it backwards... */
214 if (cfi
->id
== AT49BV6416
) {
215 if (atmel_pri
.BottomBoot
)
220 if (atmel_pri
.BottomBoot
)
226 /* burst write mode not supported */
227 cfi
->cfiq
->BufWriteTimeoutTyp
= 0;
228 cfi
->cfiq
->BufWriteTimeoutMax
= 0;
231 static void fixup_use_secsi(struct mtd_info
*mtd
)
233 /* Setup for chips with a secsi area */
234 mtd
->read_user_prot_reg
= cfi_amdstd_secsi_read
;
235 mtd
->read_fact_prot_reg
= cfi_amdstd_secsi_read
;
238 static void fixup_use_erase_chip(struct mtd_info
*mtd
)
240 struct map_info
*map
= mtd
->priv
;
241 struct cfi_private
*cfi
= map
->fldrv_priv
;
242 if ((cfi
->cfiq
->NumEraseRegions
== 1) &&
243 ((cfi
->cfiq
->EraseRegionInfo
[0] & 0xffff) == 0)) {
244 mtd
->erase
= cfi_amdstd_erase_chip
;
250 * Some Atmel chips (e.g. the AT49BV6416) power-up with all sectors
253 static void fixup_use_atmel_lock(struct mtd_info
*mtd
)
255 mtd
->lock
= cfi_atmel_lock
;
256 mtd
->unlock
= cfi_atmel_unlock
;
257 mtd
->flags
|= MTD_POWERUP_LOCK
;
260 static void fixup_old_sst_eraseregion(struct mtd_info
*mtd
)
262 struct map_info
*map
= mtd
->priv
;
263 struct cfi_private
*cfi
= map
->fldrv_priv
;
266 * These flashes report two seperate eraseblock regions based on the
267 * sector_erase-size and block_erase-size, although they both operate on the
268 * same memory. This is not allowed according to CFI, so we just pick the
271 cfi
->cfiq
->NumEraseRegions
= 1;
274 static void fixup_sst39vf(struct mtd_info
*mtd
)
276 struct map_info
*map
= mtd
->priv
;
277 struct cfi_private
*cfi
= map
->fldrv_priv
;
279 fixup_old_sst_eraseregion(mtd
);
281 cfi
->addr_unlock1
= 0x5555;
282 cfi
->addr_unlock2
= 0x2AAA;
285 static void fixup_sst39vf_rev_b(struct mtd_info
*mtd
)
287 struct map_info
*map
= mtd
->priv
;
288 struct cfi_private
*cfi
= map
->fldrv_priv
;
290 fixup_old_sst_eraseregion(mtd
);
292 cfi
->addr_unlock1
= 0x555;
293 cfi
->addr_unlock2
= 0x2AA;
295 cfi
->sector_erase_cmd
= CMD(0x50);
298 static void fixup_sst38vf640x_sectorsize(struct mtd_info
*mtd
)
300 struct map_info
*map
= mtd
->priv
;
301 struct cfi_private
*cfi
= map
->fldrv_priv
;
303 fixup_sst39vf_rev_b(mtd
);
306 * CFI reports 1024 sectors (0x03ff+1) of 64KBytes (0x0100*256) where
307 * it should report a size of 8KBytes (0x0020*256).
309 cfi
->cfiq
->EraseRegionInfo
[0] = 0x002003ff;
310 pr_warning("%s: Bad 38VF640x CFI data; adjusting sector size from 64 to 8KiB\n", mtd
->name
);
313 static void fixup_s29gl064n_sectors(struct mtd_info
*mtd
)
315 struct map_info
*map
= mtd
->priv
;
316 struct cfi_private
*cfi
= map
->fldrv_priv
;
318 if ((cfi
->cfiq
->EraseRegionInfo
[0] & 0xffff) == 0x003f) {
319 cfi
->cfiq
->EraseRegionInfo
[0] |= 0x0040;
320 pr_warning("%s: Bad S29GL064N CFI data, adjust from 64 to 128 sectors\n", mtd
->name
);
324 static void fixup_s29gl032n_sectors(struct mtd_info
*mtd
)
326 struct map_info
*map
= mtd
->priv
;
327 struct cfi_private
*cfi
= map
->fldrv_priv
;
329 if ((cfi
->cfiq
->EraseRegionInfo
[1] & 0xffff) == 0x007e) {
330 cfi
->cfiq
->EraseRegionInfo
[1] &= ~0x0040;
331 pr_warning("%s: Bad S29GL032N CFI data, adjust from 127 to 63 sectors\n", mtd
->name
);
335 /* Used to fix CFI-Tables of chips without Extended Query Tables */
336 static struct cfi_fixup cfi_nopri_fixup_table
[] = {
337 { CFI_MFR_SST
, 0x234a, fixup_sst39vf
}, /* SST39VF1602 */
338 { CFI_MFR_SST
, 0x234b, fixup_sst39vf
}, /* SST39VF1601 */
339 { CFI_MFR_SST
, 0x235a, fixup_sst39vf
}, /* SST39VF3202 */
340 { CFI_MFR_SST
, 0x235b, fixup_sst39vf
}, /* SST39VF3201 */
341 { CFI_MFR_SST
, 0x235c, fixup_sst39vf_rev_b
}, /* SST39VF3202B */
342 { CFI_MFR_SST
, 0x235d, fixup_sst39vf_rev_b
}, /* SST39VF3201B */
343 { CFI_MFR_SST
, 0x236c, fixup_sst39vf_rev_b
}, /* SST39VF6402B */
344 { CFI_MFR_SST
, 0x236d, fixup_sst39vf_rev_b
}, /* SST39VF6401B */
348 static struct cfi_fixup cfi_fixup_table
[] = {
349 { CFI_MFR_ATMEL
, CFI_ID_ANY
, fixup_convert_atmel_pri
},
350 #ifdef AMD_BOOTLOC_BUG
351 { CFI_MFR_AMD
, CFI_ID_ANY
, fixup_amd_bootblock
},
352 { CFI_MFR_MACRONIX
, CFI_ID_ANY
, fixup_amd_bootblock
},
354 { CFI_MFR_AMD
, 0x0050, fixup_use_secsi
},
355 { CFI_MFR_AMD
, 0x0053, fixup_use_secsi
},
356 { CFI_MFR_AMD
, 0x0055, fixup_use_secsi
},
357 { CFI_MFR_AMD
, 0x0056, fixup_use_secsi
},
358 { CFI_MFR_AMD
, 0x005C, fixup_use_secsi
},
359 { CFI_MFR_AMD
, 0x005F, fixup_use_secsi
},
360 { CFI_MFR_AMD
, 0x0c01, fixup_s29gl064n_sectors
},
361 { CFI_MFR_AMD
, 0x1301, fixup_s29gl064n_sectors
},
362 { CFI_MFR_AMD
, 0x1a00, fixup_s29gl032n_sectors
},
363 { CFI_MFR_AMD
, 0x1a01, fixup_s29gl032n_sectors
},
364 { CFI_MFR_SST
, 0x536a, fixup_sst38vf640x_sectorsize
}, /* SST38VF6402 */
365 { CFI_MFR_SST
, 0x536b, fixup_sst38vf640x_sectorsize
}, /* SST38VF6401 */
366 { CFI_MFR_SST
, 0x536c, fixup_sst38vf640x_sectorsize
}, /* SST38VF6404 */
367 { CFI_MFR_SST
, 0x536d, fixup_sst38vf640x_sectorsize
}, /* SST38VF6403 */
368 #if !FORCE_WORD_WRITE
369 { CFI_MFR_ANY
, CFI_ID_ANY
, fixup_use_write_buffers
},
373 static struct cfi_fixup jedec_fixup_table
[] = {
374 { CFI_MFR_SST
, SST49LF004B
, fixup_use_fwh_lock
},
375 { CFI_MFR_SST
, SST49LF040B
, fixup_use_fwh_lock
},
376 { CFI_MFR_SST
, SST49LF008A
, fixup_use_fwh_lock
},
380 static struct cfi_fixup fixup_table
[] = {
381 /* The CFI vendor ids and the JEDEC vendor IDs appear
382 * to be common. It is like the devices id's are as
383 * well. This table is to pick all cases where
384 * we know that is the case.
386 { CFI_MFR_ANY
, CFI_ID_ANY
, fixup_use_erase_chip
},
387 { CFI_MFR_ATMEL
, AT49BV6416
, fixup_use_atmel_lock
},
392 static void cfi_fixup_major_minor(struct cfi_private
*cfi
,
393 struct cfi_pri_amdstd
*extp
)
395 if (cfi
->mfr
== CFI_MFR_SAMSUNG
) {
396 if ((extp
->MajorVersion
== '0' && extp
->MinorVersion
== '0') ||
397 (extp
->MajorVersion
== '3' && extp
->MinorVersion
== '3')) {
399 * Samsung K8P2815UQB and K8D6x16UxM chips
400 * report major=0 / minor=0.
401 * K8D3x16UxC chips report major=3 / minor=3.
403 printk(KERN_NOTICE
" Fixing Samsung's Amd/Fujitsu"
404 " Extended Query version to 1.%c\n",
406 extp
->MajorVersion
= '1';
411 * SST 38VF640x chips report major=0xFF / minor=0xFF.
413 if (cfi
->mfr
== CFI_MFR_SST
&& (cfi
->id
>> 4) == 0x0536) {
414 extp
->MajorVersion
= '1';
415 extp
->MinorVersion
= '0';
419 struct mtd_info
*cfi_cmdset_0002(struct map_info
*map
, int primary
)
421 struct cfi_private
*cfi
= map
->fldrv_priv
;
422 struct mtd_info
*mtd
;
425 mtd
= kzalloc(sizeof(*mtd
), GFP_KERNEL
);
427 printk(KERN_WARNING
"Failed to allocate memory for MTD device\n");
431 mtd
->type
= MTD_NORFLASH
;
433 /* Fill in the default mtd operations */
434 mtd
->erase
= cfi_amdstd_erase_varsize
;
435 mtd
->write
= cfi_amdstd_write_words
;
436 mtd
->read
= cfi_amdstd_read
;
437 mtd
->sync
= cfi_amdstd_sync
;
438 mtd
->suspend
= cfi_amdstd_suspend
;
439 mtd
->resume
= cfi_amdstd_resume
;
440 mtd
->flags
= MTD_CAP_NORFLASH
;
441 mtd
->name
= map
->name
;
444 mtd
->reboot_notifier
.notifier_call
= cfi_amdstd_reboot
;
446 if (cfi
->cfi_mode
==CFI_MODE_CFI
){
447 unsigned char bootloc
;
448 __u16 adr
= primary
?cfi
->cfiq
->P_ADR
:cfi
->cfiq
->A_ADR
;
449 struct cfi_pri_amdstd
*extp
;
451 extp
= (struct cfi_pri_amdstd
*)cfi_read_pri(map
, adr
, sizeof(*extp
), "Amd/Fujitsu");
454 * It's a real CFI chip, not one for which the probe
455 * routine faked a CFI structure.
457 cfi_fixup_major_minor(cfi
, extp
);
460 * Valid primary extension versions are: 1.0, 1.1, 1.2, 1.3, 1.4
461 * see: http://cs.ozerki.net/zap/pub/axim-x5/docs/cfi_r20.pdf, page 19
462 * http://www.spansion.com/Support/AppNotes/cfi_100_20011201.pdf
463 * http://www.spansion.com/Support/Datasheets/s29ws-p_00_a12_e.pdf
465 if (extp
->MajorVersion
!= '1' ||
466 (extp
->MajorVersion
== '1' && (extp
->MinorVersion
< '0' || extp
->MinorVersion
> '4'))) {
467 printk(KERN_ERR
" Unknown Amd/Fujitsu Extended Query "
468 "version %c.%c (%#02x/%#02x).\n",
469 extp
->MajorVersion
, extp
->MinorVersion
,
470 extp
->MajorVersion
, extp
->MinorVersion
);
476 printk(KERN_INFO
" Amd/Fujitsu Extended Query version %c.%c.\n",
477 extp
->MajorVersion
, extp
->MinorVersion
);
479 /* Install our own private info structure */
480 cfi
->cmdset_priv
= extp
;
482 /* Apply cfi device specific fixups */
483 cfi_fixup(mtd
, cfi_fixup_table
);
485 #ifdef DEBUG_CFI_FEATURES
486 /* Tell the user about it in lots of lovely detail */
487 cfi_tell_features(extp
);
490 bootloc
= extp
->TopBottom
;
491 if ((bootloc
< 2) || (bootloc
> 5)) {
492 printk(KERN_WARNING
"%s: CFI contains unrecognised boot "
493 "bank location (%d). Assuming bottom.\n",
498 if (bootloc
== 3 && cfi
->cfiq
->NumEraseRegions
> 1) {
499 printk(KERN_WARNING
"%s: Swapping erase regions for top-boot CFI table.\n", map
->name
);
501 for (i
=0; i
<cfi
->cfiq
->NumEraseRegions
/ 2; i
++) {
502 int j
= (cfi
->cfiq
->NumEraseRegions
-1)-i
;
505 swap
= cfi
->cfiq
->EraseRegionInfo
[i
];
506 cfi
->cfiq
->EraseRegionInfo
[i
] = cfi
->cfiq
->EraseRegionInfo
[j
];
507 cfi
->cfiq
->EraseRegionInfo
[j
] = swap
;
510 /* Set the default CFI lock/unlock addresses */
511 cfi
->addr_unlock1
= 0x555;
512 cfi
->addr_unlock2
= 0x2aa;
514 cfi_fixup(mtd
, cfi_nopri_fixup_table
);
516 if (!cfi
->addr_unlock1
|| !cfi
->addr_unlock2
) {
522 else if (cfi
->cfi_mode
== CFI_MODE_JEDEC
) {
523 /* Apply jedec specific fixups */
524 cfi_fixup(mtd
, jedec_fixup_table
);
526 /* Apply generic fixups */
527 cfi_fixup(mtd
, fixup_table
);
529 for (i
=0; i
< cfi
->numchips
; i
++) {
530 cfi
->chips
[i
].word_write_time
= 1<<cfi
->cfiq
->WordWriteTimeoutTyp
;
531 cfi
->chips
[i
].buffer_write_time
= 1<<cfi
->cfiq
->BufWriteTimeoutTyp
;
532 cfi
->chips
[i
].erase_time
= 1<<cfi
->cfiq
->BlockEraseTimeoutTyp
;
533 cfi
->chips
[i
].ref_point_counter
= 0;
534 init_waitqueue_head(&(cfi
->chips
[i
].wq
));
537 map
->fldrv
= &cfi_amdstd_chipdrv
;
539 return cfi_amdstd_setup(mtd
);
541 struct mtd_info
*cfi_cmdset_0006(struct map_info
*map
, int primary
) __attribute__((alias("cfi_cmdset_0002")));
542 struct mtd_info
*cfi_cmdset_0701(struct map_info
*map
, int primary
) __attribute__((alias("cfi_cmdset_0002")));
543 EXPORT_SYMBOL_GPL(cfi_cmdset_0002
);
544 EXPORT_SYMBOL_GPL(cfi_cmdset_0006
);
545 EXPORT_SYMBOL_GPL(cfi_cmdset_0701
);
547 static struct mtd_info
*cfi_amdstd_setup(struct mtd_info
*mtd
)
549 struct map_info
*map
= mtd
->priv
;
550 struct cfi_private
*cfi
= map
->fldrv_priv
;
551 unsigned long devsize
= (1<<cfi
->cfiq
->DevSize
) * cfi
->interleave
;
552 unsigned long offset
= 0;
555 printk(KERN_NOTICE
"number of %s chips: %d\n",
556 (cfi
->cfi_mode
== CFI_MODE_CFI
)?"CFI":"JEDEC",cfi
->numchips
);
557 /* Select the correct geometry setup */
558 mtd
->size
= devsize
* cfi
->numchips
;
560 mtd
->numeraseregions
= cfi
->cfiq
->NumEraseRegions
* cfi
->numchips
;
561 mtd
->eraseregions
= kmalloc(sizeof(struct mtd_erase_region_info
)
562 * mtd
->numeraseregions
, GFP_KERNEL
);
563 if (!mtd
->eraseregions
) {
564 printk(KERN_WARNING
"Failed to allocate memory for MTD erase region info\n");
568 for (i
=0; i
<cfi
->cfiq
->NumEraseRegions
; i
++) {
569 unsigned long ernum
, ersize
;
570 ersize
= ((cfi
->cfiq
->EraseRegionInfo
[i
] >> 8) & ~0xff) * cfi
->interleave
;
571 ernum
= (cfi
->cfiq
->EraseRegionInfo
[i
] & 0xffff) + 1;
573 if (mtd
->erasesize
< ersize
) {
574 mtd
->erasesize
= ersize
;
576 for (j
=0; j
<cfi
->numchips
; j
++) {
577 mtd
->eraseregions
[(j
*cfi
->cfiq
->NumEraseRegions
)+i
].offset
= (j
*devsize
)+offset
;
578 mtd
->eraseregions
[(j
*cfi
->cfiq
->NumEraseRegions
)+i
].erasesize
= ersize
;
579 mtd
->eraseregions
[(j
*cfi
->cfiq
->NumEraseRegions
)+i
].numblocks
= ernum
;
581 offset
+= (ersize
* ernum
);
583 if (offset
!= devsize
) {
585 printk(KERN_WARNING
"Sum of regions (%lx) != total size of set of interleaved chips (%lx)\n", offset
, devsize
);
589 __module_get(THIS_MODULE
);
590 register_reboot_notifier(&mtd
->reboot_notifier
);
594 kfree(mtd
->eraseregions
);
596 kfree(cfi
->cmdset_priv
);
602 * Return true if the chip is ready.
604 * Ready is one of: read mode, query mode, erase-suspend-read mode (in any
605 * non-suspended sector) and is indicated by no toggle bits toggling.
607 * Note that anything more complicated than checking if no bits are toggling
608 * (including checking DQ5 for an error status) is tricky to get working
609 * correctly and is therefore not done (particulary with interleaved chips
610 * as each chip must be checked independantly of the others).
612 static int __xipram
chip_ready(struct map_info
*map
, unsigned long addr
)
616 d
= map_read(map
, addr
);
617 t
= map_read(map
, addr
);
619 return map_word_equal(map
, d
, t
);
623 * Return true if the chip is ready and has the correct value.
625 * Ready is one of: read mode, query mode, erase-suspend-read mode (in any
626 * non-suspended sector) and it is indicated by no bits toggling.
628 * Error are indicated by toggling bits or bits held with the wrong value,
629 * or with bits toggling.
631 * Note that anything more complicated than checking if no bits are toggling
632 * (including checking DQ5 for an error status) is tricky to get working
633 * correctly and is therefore not done (particulary with interleaved chips
634 * as each chip must be checked independantly of the others).
637 static int __xipram
chip_good(struct map_info
*map
, unsigned long addr
, map_word expected
)
641 oldd
= map_read(map
, addr
);
642 curd
= map_read(map
, addr
);
644 return map_word_equal(map
, oldd
, curd
) &&
645 map_word_equal(map
, curd
, expected
);
648 static int get_chip(struct map_info
*map
, struct flchip
*chip
, unsigned long adr
, int mode
)
650 DECLARE_WAITQUEUE(wait
, current
);
651 struct cfi_private
*cfi
= map
->fldrv_priv
;
653 struct cfi_pri_amdstd
*cfip
= (struct cfi_pri_amdstd
*)cfi
->cmdset_priv
;
656 timeo
= jiffies
+ HZ
;
658 switch (chip
->state
) {
662 if (chip_ready(map
, adr
))
665 if (time_after(jiffies
, timeo
)) {
666 printk(KERN_ERR
"Waiting for chip to be ready timed out.\n");
669 mutex_unlock(&chip
->mutex
);
671 mutex_lock(&chip
->mutex
);
672 /* Someone else might have been playing with it. */
682 if (!cfip
|| !(cfip
->EraseSuspend
& (0x1|0x2)) ||
683 !(mode
== FL_READY
|| mode
== FL_POINT
||
684 (mode
== FL_WRITING
&& (cfip
->EraseSuspend
& 0x2))))
687 /* We could check to see if we're trying to access the sector
688 * that is currently being erased. However, no user will try
689 * anything like that so we just wait for the timeout. */
692 /* It's harmless to issue the Erase-Suspend and Erase-Resume
693 * commands when the erase algorithm isn't in progress. */
694 map_write(map
, CMD(0xB0), chip
->in_progress_block_addr
);
695 chip
->oldstate
= FL_ERASING
;
696 chip
->state
= FL_ERASE_SUSPENDING
;
697 chip
->erase_suspended
= 1;
699 if (chip_ready(map
, adr
))
702 if (time_after(jiffies
, timeo
)) {
703 /* Should have suspended the erase by now.
704 * Send an Erase-Resume command as either
705 * there was an error (so leave the erase
706 * routine to recover from it) or we trying to
707 * use the erase-in-progress sector. */
708 map_write(map
, cfi
->sector_erase_cmd
, chip
->in_progress_block_addr
);
709 chip
->state
= FL_ERASING
;
710 chip
->oldstate
= FL_READY
;
711 printk(KERN_ERR
"MTD %s(): chip not ready after erase suspend\n", __func__
);
715 mutex_unlock(&chip
->mutex
);
717 mutex_lock(&chip
->mutex
);
718 /* Nobody will touch it while it's in state FL_ERASE_SUSPENDING.
719 So we can just loop here. */
721 chip
->state
= FL_READY
;
724 case FL_XIP_WHILE_ERASING
:
725 if (mode
!= FL_READY
&& mode
!= FL_POINT
&&
726 (!cfip
|| !(cfip
->EraseSuspend
&2)))
728 chip
->oldstate
= chip
->state
;
729 chip
->state
= FL_READY
;
733 /* The machine is rebooting */
737 /* Only if there's no operation suspended... */
738 if (mode
== FL_READY
&& chip
->oldstate
== FL_READY
)
743 set_current_state(TASK_UNINTERRUPTIBLE
);
744 add_wait_queue(&chip
->wq
, &wait
);
745 mutex_unlock(&chip
->mutex
);
747 remove_wait_queue(&chip
->wq
, &wait
);
748 mutex_lock(&chip
->mutex
);
754 static void put_chip(struct map_info
*map
, struct flchip
*chip
, unsigned long adr
)
756 struct cfi_private
*cfi
= map
->fldrv_priv
;
758 switch(chip
->oldstate
) {
760 chip
->state
= chip
->oldstate
;
761 map_write(map
, cfi
->sector_erase_cmd
, chip
->in_progress_block_addr
);
762 chip
->oldstate
= FL_READY
;
763 chip
->state
= FL_ERASING
;
766 case FL_XIP_WHILE_ERASING
:
767 chip
->state
= chip
->oldstate
;
768 chip
->oldstate
= FL_READY
;
773 /* We should really make set_vpp() count, rather than doing this */
777 printk(KERN_ERR
"MTD: put_chip() called with oldstate %d!!\n", chip
->oldstate
);
782 #ifdef CONFIG_MTD_XIP
785 * No interrupt what so ever can be serviced while the flash isn't in array
786 * mode. This is ensured by the xip_disable() and xip_enable() functions
787 * enclosing any code path where the flash is known not to be in array mode.
788 * And within a XIP disabled code path, only functions marked with __xipram
789 * may be called and nothing else (it's a good thing to inspect generated
790 * assembly to make sure inline functions were actually inlined and that gcc
791 * didn't emit calls to its own support functions). Also configuring MTD CFI
792 * support to a single buswidth and a single interleave is also recommended.
795 static void xip_disable(struct map_info
*map
, struct flchip
*chip
,
798 /* TODO: chips with no XIP use should ignore and return */
799 (void) map_read(map
, adr
); /* ensure mmu mapping is up to date */
803 static void __xipram
xip_enable(struct map_info
*map
, struct flchip
*chip
,
806 struct cfi_private
*cfi
= map
->fldrv_priv
;
808 if (chip
->state
!= FL_POINT
&& chip
->state
!= FL_READY
) {
809 map_write(map
, CMD(0xf0), adr
);
810 chip
->state
= FL_READY
;
812 (void) map_read(map
, adr
);
818 * When a delay is required for the flash operation to complete, the
819 * xip_udelay() function is polling for both the given timeout and pending
820 * (but still masked) hardware interrupts. Whenever there is an interrupt
821 * pending then the flash erase operation is suspended, array mode restored
822 * and interrupts unmasked. Task scheduling might also happen at that
823 * point. The CPU eventually returns from the interrupt or the call to
824 * schedule() and the suspended flash operation is resumed for the remaining
825 * of the delay period.
827 * Warning: this function _will_ fool interrupt latency tracing tools.
830 static void __xipram
xip_udelay(struct map_info
*map
, struct flchip
*chip
,
831 unsigned long adr
, int usec
)
833 struct cfi_private
*cfi
= map
->fldrv_priv
;
834 struct cfi_pri_amdstd
*extp
= cfi
->cmdset_priv
;
835 map_word status
, OK
= CMD(0x80);
836 unsigned long suspended
, start
= xip_currtime();
841 if (xip_irqpending() && extp
&&
842 ((chip
->state
== FL_ERASING
&& (extp
->EraseSuspend
& 2))) &&
843 (cfi_interleave_is_1(cfi
) || chip
->oldstate
== FL_READY
)) {
845 * Let's suspend the erase operation when supported.
846 * Note that we currently don't try to suspend
847 * interleaved chips if there is already another
848 * operation suspended (imagine what happens
849 * when one chip was already done with the current
850 * operation while another chip suspended it, then
851 * we resume the whole thing at once). Yes, it
854 map_write(map
, CMD(0xb0), adr
);
855 usec
-= xip_elapsed_since(start
);
856 suspended
= xip_currtime();
858 if (xip_elapsed_since(suspended
) > 100000) {
860 * The chip doesn't want to suspend
861 * after waiting for 100 msecs.
862 * This is a critical error but there
863 * is not much we can do here.
867 status
= map_read(map
, adr
);
868 } while (!map_word_andequal(map
, status
, OK
, OK
));
870 /* Suspend succeeded */
871 oldstate
= chip
->state
;
872 if (!map_word_bitsset(map
, status
, CMD(0x40)))
874 chip
->state
= FL_XIP_WHILE_ERASING
;
875 chip
->erase_suspended
= 1;
876 map_write(map
, CMD(0xf0), adr
);
877 (void) map_read(map
, adr
);
880 mutex_unlock(&chip
->mutex
);
885 * We're back. However someone else might have
886 * decided to go write to the chip if we are in
887 * a suspended erase state. If so let's wait
890 mutex_lock(&chip
->mutex
);
891 while (chip
->state
!= FL_XIP_WHILE_ERASING
) {
892 DECLARE_WAITQUEUE(wait
, current
);
893 set_current_state(TASK_UNINTERRUPTIBLE
);
894 add_wait_queue(&chip
->wq
, &wait
);
895 mutex_unlock(&chip
->mutex
);
897 remove_wait_queue(&chip
->wq
, &wait
);
898 mutex_lock(&chip
->mutex
);
900 /* Disallow XIP again */
903 /* Resume the write or erase operation */
904 map_write(map
, cfi
->sector_erase_cmd
, adr
);
905 chip
->state
= oldstate
;
906 start
= xip_currtime();
907 } else if (usec
>= 1000000/HZ
) {
909 * Try to save on CPU power when waiting delay
910 * is at least a system timer tick period.
911 * No need to be extremely accurate here.
915 status
= map_read(map
, adr
);
916 } while (!map_word_andequal(map
, status
, OK
, OK
)
917 && xip_elapsed_since(start
) < usec
);
920 #define UDELAY(map, chip, adr, usec) xip_udelay(map, chip, adr, usec)
923 * The INVALIDATE_CACHED_RANGE() macro is normally used in parallel while
924 * the flash is actively programming or erasing since we have to poll for
925 * the operation to complete anyway. We can't do that in a generic way with
926 * a XIP setup so do it before the actual flash operation in this case
927 * and stub it out from INVALIDATE_CACHE_UDELAY.
929 #define XIP_INVAL_CACHED_RANGE(map, from, size) \
930 INVALIDATE_CACHED_RANGE(map, from, size)
932 #define INVALIDATE_CACHE_UDELAY(map, chip, adr, len, usec) \
933 UDELAY(map, chip, adr, usec)
938 * Activating this XIP support changes the way the code works a bit. For
939 * example the code to suspend the current process when concurrent access
940 * happens is never executed because xip_udelay() will always return with the
941 * same chip state as it was entered with. This is why there is no care for
942 * the presence of add_wait_queue() or schedule() calls from within a couple
943 * xip_disable()'d areas of code, like in do_erase_oneblock for example.
944 * The queueing and scheduling are always happening within xip_udelay().
946 * Similarly, get_chip() and put_chip() just happen to always be executed
947 * with chip->state set to FL_READY (or FL_XIP_WHILE_*) where flash state
948 * is in array mode, therefore never executing many cases therein and not
949 * causing any problem with XIP.
954 #define xip_disable(map, chip, adr)
955 #define xip_enable(map, chip, adr)
956 #define XIP_INVAL_CACHED_RANGE(x...)
958 #define UDELAY(map, chip, adr, usec) \
960 mutex_unlock(&chip->mutex); \
962 mutex_lock(&chip->mutex); \
965 #define INVALIDATE_CACHE_UDELAY(map, chip, adr, len, usec) \
967 mutex_unlock(&chip->mutex); \
968 INVALIDATE_CACHED_RANGE(map, adr, len); \
970 mutex_lock(&chip->mutex); \
975 static inline int do_read_onechip(struct map_info
*map
, struct flchip
*chip
, loff_t adr
, size_t len
, u_char
*buf
)
977 unsigned long cmd_addr
;
978 struct cfi_private
*cfi
= map
->fldrv_priv
;
983 /* Ensure cmd read/writes are aligned. */
984 cmd_addr
= adr
& ~(map_bankwidth(map
)-1);
986 mutex_lock(&chip
->mutex
);
987 ret
= get_chip(map
, chip
, cmd_addr
, FL_READY
);
989 mutex_unlock(&chip
->mutex
);
993 if (chip
->state
!= FL_POINT
&& chip
->state
!= FL_READY
) {
994 map_write(map
, CMD(0xf0), cmd_addr
);
995 chip
->state
= FL_READY
;
998 map_copy_from(map
, buf
, adr
, len
);
1000 put_chip(map
, chip
, cmd_addr
);
1002 mutex_unlock(&chip
->mutex
);
1007 static int cfi_amdstd_read (struct mtd_info
*mtd
, loff_t from
, size_t len
, size_t *retlen
, u_char
*buf
)
1009 struct map_info
*map
= mtd
->priv
;
1010 struct cfi_private
*cfi
= map
->fldrv_priv
;
1015 /* ofs: offset within the first chip that the first read should start */
1017 chipnum
= (from
>> cfi
->chipshift
);
1018 ofs
= from
- (chipnum
<< cfi
->chipshift
);
1024 unsigned long thislen
;
1026 if (chipnum
>= cfi
->numchips
)
1029 if ((len
+ ofs
-1) >> cfi
->chipshift
)
1030 thislen
= (1<<cfi
->chipshift
) - ofs
;
1034 ret
= do_read_onechip(map
, &cfi
->chips
[chipnum
], ofs
, thislen
, buf
);
1049 static inline int do_read_secsi_onechip(struct map_info
*map
, struct flchip
*chip
, loff_t adr
, size_t len
, u_char
*buf
)
1051 DECLARE_WAITQUEUE(wait
, current
);
1052 unsigned long timeo
= jiffies
+ HZ
;
1053 struct cfi_private
*cfi
= map
->fldrv_priv
;
1056 mutex_lock(&chip
->mutex
);
1058 if (chip
->state
!= FL_READY
){
1059 set_current_state(TASK_UNINTERRUPTIBLE
);
1060 add_wait_queue(&chip
->wq
, &wait
);
1062 mutex_unlock(&chip
->mutex
);
1065 remove_wait_queue(&chip
->wq
, &wait
);
1066 timeo
= jiffies
+ HZ
;
1073 chip
->state
= FL_READY
;
1075 cfi_send_gen_cmd(0xAA, cfi
->addr_unlock1
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1076 cfi_send_gen_cmd(0x55, cfi
->addr_unlock2
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1077 cfi_send_gen_cmd(0x88, cfi
->addr_unlock1
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1079 map_copy_from(map
, buf
, adr
, len
);
1081 cfi_send_gen_cmd(0xAA, cfi
->addr_unlock1
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1082 cfi_send_gen_cmd(0x55, cfi
->addr_unlock2
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1083 cfi_send_gen_cmd(0x90, cfi
->addr_unlock1
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1084 cfi_send_gen_cmd(0x00, cfi
->addr_unlock1
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1087 mutex_unlock(&chip
->mutex
);
1092 static int cfi_amdstd_secsi_read (struct mtd_info
*mtd
, loff_t from
, size_t len
, size_t *retlen
, u_char
*buf
)
1094 struct map_info
*map
= mtd
->priv
;
1095 struct cfi_private
*cfi
= map
->fldrv_priv
;
1101 /* ofs: offset within the first chip that the first read should start */
1103 /* 8 secsi bytes per chip */
1111 unsigned long thislen
;
1113 if (chipnum
>= cfi
->numchips
)
1116 if ((len
+ ofs
-1) >> 3)
1117 thislen
= (1<<3) - ofs
;
1121 ret
= do_read_secsi_onechip(map
, &cfi
->chips
[chipnum
], ofs
, thislen
, buf
);
1136 static int __xipram
do_write_oneword(struct map_info
*map
, struct flchip
*chip
, unsigned long adr
, map_word datum
)
1138 struct cfi_private
*cfi
= map
->fldrv_priv
;
1139 unsigned long timeo
= jiffies
+ HZ
;
1141 * We use a 1ms + 1 jiffies generic timeout for writes (most devices
1142 * have a max write time of a few hundreds usec). However, we should
1143 * use the maximum timeout value given by the chip at probe time
1144 * instead. Unfortunately, struct flchip does have a field for
1145 * maximum timeout, only for typical which can be far too short
1146 * depending of the conditions. The ' + 1' is to avoid having a
1147 * timeout of 0 jiffies if HZ is smaller than 1000.
1149 unsigned long uWriteTimeout
= ( HZ
/ 1000 ) + 1;
1156 mutex_lock(&chip
->mutex
);
1157 ret
= get_chip(map
, chip
, adr
, FL_WRITING
);
1159 mutex_unlock(&chip
->mutex
);
1163 DEBUG( MTD_DEBUG_LEVEL3
, "MTD %s(): WRITE 0x%.8lx(0x%.8lx)\n",
1164 __func__
, adr
, datum
.x
[0] );
1167 * Check for a NOP for the case when the datum to write is already
1168 * present - it saves time and works around buggy chips that corrupt
1169 * data at other locations when 0xff is written to a location that
1170 * already contains 0xff.
1172 oldd
= map_read(map
, adr
);
1173 if (map_word_equal(map
, oldd
, datum
)) {
1174 DEBUG( MTD_DEBUG_LEVEL3
, "MTD %s(): NOP\n",
1179 XIP_INVAL_CACHED_RANGE(map
, adr
, map_bankwidth(map
));
1181 xip_disable(map
, chip
, adr
);
1183 cfi_send_gen_cmd(0xAA, cfi
->addr_unlock1
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1184 cfi_send_gen_cmd(0x55, cfi
->addr_unlock2
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1185 cfi_send_gen_cmd(0xA0, cfi
->addr_unlock1
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1186 map_write(map
, datum
, adr
);
1187 chip
->state
= FL_WRITING
;
1189 INVALIDATE_CACHE_UDELAY(map
, chip
,
1190 adr
, map_bankwidth(map
),
1191 chip
->word_write_time
);
1193 /* See comment above for timeout value. */
1194 timeo
= jiffies
+ uWriteTimeout
;
1196 if (chip
->state
!= FL_WRITING
) {
1197 /* Someone's suspended the write. Sleep */
1198 DECLARE_WAITQUEUE(wait
, current
);
1200 set_current_state(TASK_UNINTERRUPTIBLE
);
1201 add_wait_queue(&chip
->wq
, &wait
);
1202 mutex_unlock(&chip
->mutex
);
1204 remove_wait_queue(&chip
->wq
, &wait
);
1205 timeo
= jiffies
+ (HZ
/ 2); /* FIXME */
1206 mutex_lock(&chip
->mutex
);
1210 if (time_after(jiffies
, timeo
) && !chip_ready(map
, adr
)){
1211 xip_enable(map
, chip
, adr
);
1212 printk(KERN_WARNING
"MTD %s(): software timeout\n", __func__
);
1213 xip_disable(map
, chip
, adr
);
1217 if (chip_ready(map
, adr
))
1220 /* Latency issues. Drop the lock, wait a while and retry */
1221 UDELAY(map
, chip
, adr
, 1);
1223 /* Did we succeed? */
1224 if (!chip_good(map
, adr
, datum
)) {
1225 /* reset on all failures. */
1226 map_write( map
, CMD(0xF0), chip
->start
);
1227 /* FIXME - should have reset delay before continuing */
1229 if (++retry_cnt
<= MAX_WORD_RETRIES
)
1234 xip_enable(map
, chip
, adr
);
1236 chip
->state
= FL_READY
;
1237 put_chip(map
, chip
, adr
);
1238 mutex_unlock(&chip
->mutex
);
1244 static int cfi_amdstd_write_words(struct mtd_info
*mtd
, loff_t to
, size_t len
,
1245 size_t *retlen
, const u_char
*buf
)
1247 struct map_info
*map
= mtd
->priv
;
1248 struct cfi_private
*cfi
= map
->fldrv_priv
;
1251 unsigned long ofs
, chipstart
;
1252 DECLARE_WAITQUEUE(wait
, current
);
1258 chipnum
= to
>> cfi
->chipshift
;
1259 ofs
= to
- (chipnum
<< cfi
->chipshift
);
1260 chipstart
= cfi
->chips
[chipnum
].start
;
1262 /* If it's not bus-aligned, do the first byte write */
1263 if (ofs
& (map_bankwidth(map
)-1)) {
1264 unsigned long bus_ofs
= ofs
& ~(map_bankwidth(map
)-1);
1265 int i
= ofs
- bus_ofs
;
1270 mutex_lock(&cfi
->chips
[chipnum
].mutex
);
1272 if (cfi
->chips
[chipnum
].state
!= FL_READY
) {
1273 set_current_state(TASK_UNINTERRUPTIBLE
);
1274 add_wait_queue(&cfi
->chips
[chipnum
].wq
, &wait
);
1276 mutex_unlock(&cfi
->chips
[chipnum
].mutex
);
1279 remove_wait_queue(&cfi
->chips
[chipnum
].wq
, &wait
);
1283 /* Load 'tmp_buf' with old contents of flash */
1284 tmp_buf
= map_read(map
, bus_ofs
+chipstart
);
1286 mutex_unlock(&cfi
->chips
[chipnum
].mutex
);
1288 /* Number of bytes to copy from buffer */
1289 n
= min_t(int, len
, map_bankwidth(map
)-i
);
1291 tmp_buf
= map_word_load_partial(map
, tmp_buf
, buf
, i
, n
);
1293 ret
= do_write_oneword(map
, &cfi
->chips
[chipnum
],
1303 if (ofs
>> cfi
->chipshift
) {
1306 if (chipnum
== cfi
->numchips
)
1311 /* We are now aligned, write as much as possible */
1312 while(len
>= map_bankwidth(map
)) {
1315 datum
= map_word_load(map
, buf
);
1317 ret
= do_write_oneword(map
, &cfi
->chips
[chipnum
],
1322 ofs
+= map_bankwidth(map
);
1323 buf
+= map_bankwidth(map
);
1324 (*retlen
) += map_bankwidth(map
);
1325 len
-= map_bankwidth(map
);
1327 if (ofs
>> cfi
->chipshift
) {
1330 if (chipnum
== cfi
->numchips
)
1332 chipstart
= cfi
->chips
[chipnum
].start
;
1336 /* Write the trailing bytes if any */
1337 if (len
& (map_bankwidth(map
)-1)) {
1341 mutex_lock(&cfi
->chips
[chipnum
].mutex
);
1343 if (cfi
->chips
[chipnum
].state
!= FL_READY
) {
1344 set_current_state(TASK_UNINTERRUPTIBLE
);
1345 add_wait_queue(&cfi
->chips
[chipnum
].wq
, &wait
);
1347 mutex_unlock(&cfi
->chips
[chipnum
].mutex
);
1350 remove_wait_queue(&cfi
->chips
[chipnum
].wq
, &wait
);
1354 tmp_buf
= map_read(map
, ofs
+ chipstart
);
1356 mutex_unlock(&cfi
->chips
[chipnum
].mutex
);
1358 tmp_buf
= map_word_load_partial(map
, tmp_buf
, buf
, 0, len
);
1360 ret
= do_write_oneword(map
, &cfi
->chips
[chipnum
],
1373 * FIXME: interleaved mode not tested, and probably not supported!
1375 static int __xipram
do_write_buffer(struct map_info
*map
, struct flchip
*chip
,
1376 unsigned long adr
, const u_char
*buf
,
1379 struct cfi_private
*cfi
= map
->fldrv_priv
;
1380 unsigned long timeo
= jiffies
+ HZ
;
1381 /* see comments in do_write_oneword() regarding uWriteTimeo. */
1382 unsigned long uWriteTimeout
= ( HZ
/ 1000 ) + 1;
1384 unsigned long cmd_adr
;
1391 mutex_lock(&chip
->mutex
);
1392 ret
= get_chip(map
, chip
, adr
, FL_WRITING
);
1394 mutex_unlock(&chip
->mutex
);
1398 datum
= map_word_load(map
, buf
);
1400 DEBUG( MTD_DEBUG_LEVEL3
, "MTD %s(): WRITE 0x%.8lx(0x%.8lx)\n",
1401 __func__
, adr
, datum
.x
[0] );
1403 XIP_INVAL_CACHED_RANGE(map
, adr
, len
);
1405 xip_disable(map
, chip
, cmd_adr
);
1407 cfi_send_gen_cmd(0xAA, cfi
->addr_unlock1
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1408 cfi_send_gen_cmd(0x55, cfi
->addr_unlock2
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1410 /* Write Buffer Load */
1411 map_write(map
, CMD(0x25), cmd_adr
);
1413 chip
->state
= FL_WRITING_TO_BUFFER
;
1415 /* Write length of data to come */
1416 words
= len
/ map_bankwidth(map
);
1417 map_write(map
, CMD(words
- 1), cmd_adr
);
1420 while(z
< words
* map_bankwidth(map
)) {
1421 datum
= map_word_load(map
, buf
);
1422 map_write(map
, datum
, adr
+ z
);
1424 z
+= map_bankwidth(map
);
1425 buf
+= map_bankwidth(map
);
1427 z
-= map_bankwidth(map
);
1431 /* Write Buffer Program Confirm: GO GO GO */
1432 map_write(map
, CMD(0x29), cmd_adr
);
1433 chip
->state
= FL_WRITING
;
1435 INVALIDATE_CACHE_UDELAY(map
, chip
,
1436 adr
, map_bankwidth(map
),
1437 chip
->word_write_time
);
1439 timeo
= jiffies
+ uWriteTimeout
;
1442 if (chip
->state
!= FL_WRITING
) {
1443 /* Someone's suspended the write. Sleep */
1444 DECLARE_WAITQUEUE(wait
, current
);
1446 set_current_state(TASK_UNINTERRUPTIBLE
);
1447 add_wait_queue(&chip
->wq
, &wait
);
1448 mutex_unlock(&chip
->mutex
);
1450 remove_wait_queue(&chip
->wq
, &wait
);
1451 timeo
= jiffies
+ (HZ
/ 2); /* FIXME */
1452 mutex_lock(&chip
->mutex
);
1456 if (time_after(jiffies
, timeo
) && !chip_ready(map
, adr
))
1459 if (chip_ready(map
, adr
)) {
1460 xip_enable(map
, chip
, adr
);
1464 /* Latency issues. Drop the lock, wait a while and retry */
1465 UDELAY(map
, chip
, adr
, 1);
1468 /* reset on all failures. */
1469 map_write( map
, CMD(0xF0), chip
->start
);
1470 xip_enable(map
, chip
, adr
);
1471 /* FIXME - should have reset delay before continuing */
1473 printk(KERN_WARNING
"MTD %s(): software timeout\n",
1478 chip
->state
= FL_READY
;
1479 put_chip(map
, chip
, adr
);
1480 mutex_unlock(&chip
->mutex
);
1486 static int cfi_amdstd_write_buffers(struct mtd_info
*mtd
, loff_t to
, size_t len
,
1487 size_t *retlen
, const u_char
*buf
)
1489 struct map_info
*map
= mtd
->priv
;
1490 struct cfi_private
*cfi
= map
->fldrv_priv
;
1491 int wbufsize
= cfi_interleave(cfi
) << cfi
->cfiq
->MaxBufWriteSize
;
1500 chipnum
= to
>> cfi
->chipshift
;
1501 ofs
= to
- (chipnum
<< cfi
->chipshift
);
1503 /* If it's not bus-aligned, do the first word write */
1504 if (ofs
& (map_bankwidth(map
)-1)) {
1505 size_t local_len
= (-ofs
)&(map_bankwidth(map
)-1);
1506 if (local_len
> len
)
1508 ret
= cfi_amdstd_write_words(mtd
, ofs
+ (chipnum
<<cfi
->chipshift
),
1509 local_len
, retlen
, buf
);
1516 if (ofs
>> cfi
->chipshift
) {
1519 if (chipnum
== cfi
->numchips
)
1524 /* Write buffer is worth it only if more than one word to write... */
1525 while (len
>= map_bankwidth(map
) * 2) {
1526 /* We must not cross write block boundaries */
1527 int size
= wbufsize
- (ofs
& (wbufsize
-1));
1531 if (size
% map_bankwidth(map
))
1532 size
-= size
% map_bankwidth(map
);
1534 ret
= do_write_buffer(map
, &cfi
->chips
[chipnum
],
1544 if (ofs
>> cfi
->chipshift
) {
1547 if (chipnum
== cfi
->numchips
)
1553 size_t retlen_dregs
= 0;
1555 ret
= cfi_amdstd_write_words(mtd
, ofs
+ (chipnum
<<cfi
->chipshift
),
1556 len
, &retlen_dregs
, buf
);
1558 *retlen
+= retlen_dregs
;
1567 * Handle devices with one erase region, that only implement
1568 * the chip erase command.
1570 static int __xipram
do_erase_chip(struct map_info
*map
, struct flchip
*chip
)
1572 struct cfi_private
*cfi
= map
->fldrv_priv
;
1573 unsigned long timeo
= jiffies
+ HZ
;
1574 unsigned long int adr
;
1575 DECLARE_WAITQUEUE(wait
, current
);
1578 adr
= cfi
->addr_unlock1
;
1580 mutex_lock(&chip
->mutex
);
1581 ret
= get_chip(map
, chip
, adr
, FL_WRITING
);
1583 mutex_unlock(&chip
->mutex
);
1587 DEBUG( MTD_DEBUG_LEVEL3
, "MTD %s(): ERASE 0x%.8lx\n",
1588 __func__
, chip
->start
);
1590 XIP_INVAL_CACHED_RANGE(map
, adr
, map
->size
);
1592 xip_disable(map
, chip
, adr
);
1594 cfi_send_gen_cmd(0xAA, cfi
->addr_unlock1
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1595 cfi_send_gen_cmd(0x55, cfi
->addr_unlock2
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1596 cfi_send_gen_cmd(0x80, cfi
->addr_unlock1
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1597 cfi_send_gen_cmd(0xAA, cfi
->addr_unlock1
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1598 cfi_send_gen_cmd(0x55, cfi
->addr_unlock2
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1599 cfi_send_gen_cmd(0x10, cfi
->addr_unlock1
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1601 chip
->state
= FL_ERASING
;
1602 chip
->erase_suspended
= 0;
1603 chip
->in_progress_block_addr
= adr
;
1605 INVALIDATE_CACHE_UDELAY(map
, chip
,
1607 chip
->erase_time
*500);
1609 timeo
= jiffies
+ (HZ
*20);
1612 if (chip
->state
!= FL_ERASING
) {
1613 /* Someone's suspended the erase. Sleep */
1614 set_current_state(TASK_UNINTERRUPTIBLE
);
1615 add_wait_queue(&chip
->wq
, &wait
);
1616 mutex_unlock(&chip
->mutex
);
1618 remove_wait_queue(&chip
->wq
, &wait
);
1619 mutex_lock(&chip
->mutex
);
1622 if (chip
->erase_suspended
) {
1623 /* This erase was suspended and resumed.
1624 Adjust the timeout */
1625 timeo
= jiffies
+ (HZ
*20); /* FIXME */
1626 chip
->erase_suspended
= 0;
1629 if (chip_ready(map
, adr
))
1632 if (time_after(jiffies
, timeo
)) {
1633 printk(KERN_WARNING
"MTD %s(): software timeout\n",
1638 /* Latency issues. Drop the lock, wait a while and retry */
1639 UDELAY(map
, chip
, adr
, 1000000/HZ
);
1641 /* Did we succeed? */
1642 if (!chip_good(map
, adr
, map_word_ff(map
))) {
1643 /* reset on all failures. */
1644 map_write( map
, CMD(0xF0), chip
->start
);
1645 /* FIXME - should have reset delay before continuing */
1650 chip
->state
= FL_READY
;
1651 xip_enable(map
, chip
, adr
);
1652 put_chip(map
, chip
, adr
);
1653 mutex_unlock(&chip
->mutex
);
1659 static int __xipram
do_erase_oneblock(struct map_info
*map
, struct flchip
*chip
, unsigned long adr
, int len
, void *thunk
)
1661 struct cfi_private
*cfi
= map
->fldrv_priv
;
1662 unsigned long timeo
= jiffies
+ HZ
;
1663 DECLARE_WAITQUEUE(wait
, current
);
1668 mutex_lock(&chip
->mutex
);
1669 ret
= get_chip(map
, chip
, adr
, FL_ERASING
);
1671 mutex_unlock(&chip
->mutex
);
1675 DEBUG( MTD_DEBUG_LEVEL3
, "MTD %s(): ERASE 0x%.8lx\n",
1678 XIP_INVAL_CACHED_RANGE(map
, adr
, len
);
1680 xip_disable(map
, chip
, adr
);
1682 cfi_send_gen_cmd(0xAA, cfi
->addr_unlock1
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1683 cfi_send_gen_cmd(0x55, cfi
->addr_unlock2
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1684 cfi_send_gen_cmd(0x80, cfi
->addr_unlock1
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1685 cfi_send_gen_cmd(0xAA, cfi
->addr_unlock1
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1686 cfi_send_gen_cmd(0x55, cfi
->addr_unlock2
, chip
->start
, map
, cfi
, cfi
->device_type
, NULL
);
1687 map_write(map
, cfi
->sector_erase_cmd
, adr
);
1689 chip
->state
= FL_ERASING
;
1690 chip
->erase_suspended
= 0;
1691 chip
->in_progress_block_addr
= adr
;
1693 INVALIDATE_CACHE_UDELAY(map
, chip
,
1695 chip
->erase_time
*500);
1697 timeo
= jiffies
+ (HZ
*20);
1700 if (chip
->state
!= FL_ERASING
) {
1701 /* Someone's suspended the erase. Sleep */
1702 set_current_state(TASK_UNINTERRUPTIBLE
);
1703 add_wait_queue(&chip
->wq
, &wait
);
1704 mutex_unlock(&chip
->mutex
);
1706 remove_wait_queue(&chip
->wq
, &wait
);
1707 mutex_lock(&chip
->mutex
);
1710 if (chip
->erase_suspended
) {
1711 /* This erase was suspended and resumed.
1712 Adjust the timeout */
1713 timeo
= jiffies
+ (HZ
*20); /* FIXME */
1714 chip
->erase_suspended
= 0;
1717 if (chip_ready(map
, adr
)) {
1718 xip_enable(map
, chip
, adr
);
1722 if (time_after(jiffies
, timeo
)) {
1723 xip_enable(map
, chip
, adr
);
1724 printk(KERN_WARNING
"MTD %s(): software timeout\n",
1729 /* Latency issues. Drop the lock, wait a while and retry */
1730 UDELAY(map
, chip
, adr
, 1000000/HZ
);
1732 /* Did we succeed? */
1733 if (!chip_good(map
, adr
, map_word_ff(map
))) {
1734 /* reset on all failures. */
1735 map_write( map
, CMD(0xF0), chip
->start
);
1736 /* FIXME - should have reset delay before continuing */
1741 chip
->state
= FL_READY
;
1742 put_chip(map
, chip
, adr
);
1743 mutex_unlock(&chip
->mutex
);
1748 static int cfi_amdstd_erase_varsize(struct mtd_info
*mtd
, struct erase_info
*instr
)
1750 unsigned long ofs
, len
;
1756 ret
= cfi_varsize_frob(mtd
, do_erase_oneblock
, ofs
, len
, NULL
);
1760 instr
->state
= MTD_ERASE_DONE
;
1761 mtd_erase_callback(instr
);
1767 static int cfi_amdstd_erase_chip(struct mtd_info
*mtd
, struct erase_info
*instr
)
1769 struct map_info
*map
= mtd
->priv
;
1770 struct cfi_private
*cfi
= map
->fldrv_priv
;
1773 if (instr
->addr
!= 0)
1776 if (instr
->len
!= mtd
->size
)
1779 ret
= do_erase_chip(map
, &cfi
->chips
[0]);
1783 instr
->state
= MTD_ERASE_DONE
;
1784 mtd_erase_callback(instr
);
1789 static int do_atmel_lock(struct map_info
*map
, struct flchip
*chip
,
1790 unsigned long adr
, int len
, void *thunk
)
1792 struct cfi_private
*cfi
= map
->fldrv_priv
;
1795 mutex_lock(&chip
->mutex
);
1796 ret
= get_chip(map
, chip
, adr
+ chip
->start
, FL_LOCKING
);
1799 chip
->state
= FL_LOCKING
;
1801 DEBUG(MTD_DEBUG_LEVEL3
, "MTD %s(): LOCK 0x%08lx len %d\n",
1802 __func__
, adr
, len
);
1804 cfi_send_gen_cmd(0xAA, cfi
->addr_unlock1
, chip
->start
, map
, cfi
,
1805 cfi
->device_type
, NULL
);
1806 cfi_send_gen_cmd(0x55, cfi
->addr_unlock2
, chip
->start
, map
, cfi
,
1807 cfi
->device_type
, NULL
);
1808 cfi_send_gen_cmd(0x80, cfi
->addr_unlock1
, chip
->start
, map
, cfi
,
1809 cfi
->device_type
, NULL
);
1810 cfi_send_gen_cmd(0xAA, cfi
->addr_unlock1
, chip
->start
, map
, cfi
,
1811 cfi
->device_type
, NULL
);
1812 cfi_send_gen_cmd(0x55, cfi
->addr_unlock2
, chip
->start
, map
, cfi
,
1813 cfi
->device_type
, NULL
);
1814 map_write(map
, CMD(0x40), chip
->start
+ adr
);
1816 chip
->state
= FL_READY
;
1817 put_chip(map
, chip
, adr
+ chip
->start
);
1821 mutex_unlock(&chip
->mutex
);
1825 static int do_atmel_unlock(struct map_info
*map
, struct flchip
*chip
,
1826 unsigned long adr
, int len
, void *thunk
)
1828 struct cfi_private
*cfi
= map
->fldrv_priv
;
1831 mutex_lock(&chip
->mutex
);
1832 ret
= get_chip(map
, chip
, adr
+ chip
->start
, FL_UNLOCKING
);
1835 chip
->state
= FL_UNLOCKING
;
1837 DEBUG(MTD_DEBUG_LEVEL3
, "MTD %s(): LOCK 0x%08lx len %d\n",
1838 __func__
, adr
, len
);
1840 cfi_send_gen_cmd(0xAA, cfi
->addr_unlock1
, chip
->start
, map
, cfi
,
1841 cfi
->device_type
, NULL
);
1842 map_write(map
, CMD(0x70), adr
);
1844 chip
->state
= FL_READY
;
1845 put_chip(map
, chip
, adr
+ chip
->start
);
1849 mutex_unlock(&chip
->mutex
);
1853 static int cfi_atmel_lock(struct mtd_info
*mtd
, loff_t ofs
, uint64_t len
)
1855 return cfi_varsize_frob(mtd
, do_atmel_lock
, ofs
, len
, NULL
);
1858 static int cfi_atmel_unlock(struct mtd_info
*mtd
, loff_t ofs
, uint64_t len
)
1860 return cfi_varsize_frob(mtd
, do_atmel_unlock
, ofs
, len
, NULL
);
1864 static void cfi_amdstd_sync (struct mtd_info
*mtd
)
1866 struct map_info
*map
= mtd
->priv
;
1867 struct cfi_private
*cfi
= map
->fldrv_priv
;
1869 struct flchip
*chip
;
1871 DECLARE_WAITQUEUE(wait
, current
);
1873 for (i
=0; !ret
&& i
<cfi
->numchips
; i
++) {
1874 chip
= &cfi
->chips
[i
];
1877 mutex_lock(&chip
->mutex
);
1879 switch(chip
->state
) {
1883 case FL_JEDEC_QUERY
:
1884 chip
->oldstate
= chip
->state
;
1885 chip
->state
= FL_SYNCING
;
1886 /* No need to wake_up() on this state change -
1887 * as the whole point is that nobody can do anything
1888 * with the chip now anyway.
1891 mutex_unlock(&chip
->mutex
);
1895 /* Not an idle state */
1896 set_current_state(TASK_UNINTERRUPTIBLE
);
1897 add_wait_queue(&chip
->wq
, &wait
);
1899 mutex_unlock(&chip
->mutex
);
1903 remove_wait_queue(&chip
->wq
, &wait
);
1909 /* Unlock the chips again */
1911 for (i
--; i
>=0; i
--) {
1912 chip
= &cfi
->chips
[i
];
1914 mutex_lock(&chip
->mutex
);
1916 if (chip
->state
== FL_SYNCING
) {
1917 chip
->state
= chip
->oldstate
;
1920 mutex_unlock(&chip
->mutex
);
1925 static int cfi_amdstd_suspend(struct mtd_info
*mtd
)
1927 struct map_info
*map
= mtd
->priv
;
1928 struct cfi_private
*cfi
= map
->fldrv_priv
;
1930 struct flchip
*chip
;
1933 for (i
=0; !ret
&& i
<cfi
->numchips
; i
++) {
1934 chip
= &cfi
->chips
[i
];
1936 mutex_lock(&chip
->mutex
);
1938 switch(chip
->state
) {
1942 case FL_JEDEC_QUERY
:
1943 chip
->oldstate
= chip
->state
;
1944 chip
->state
= FL_PM_SUSPENDED
;
1945 /* No need to wake_up() on this state change -
1946 * as the whole point is that nobody can do anything
1947 * with the chip now anyway.
1949 case FL_PM_SUSPENDED
:
1956 mutex_unlock(&chip
->mutex
);
1959 /* Unlock the chips again */
1962 for (i
--; i
>=0; i
--) {
1963 chip
= &cfi
->chips
[i
];
1965 mutex_lock(&chip
->mutex
);
1967 if (chip
->state
== FL_PM_SUSPENDED
) {
1968 chip
->state
= chip
->oldstate
;
1971 mutex_unlock(&chip
->mutex
);
1979 static void cfi_amdstd_resume(struct mtd_info
*mtd
)
1981 struct map_info
*map
= mtd
->priv
;
1982 struct cfi_private
*cfi
= map
->fldrv_priv
;
1984 struct flchip
*chip
;
1986 for (i
=0; i
<cfi
->numchips
; i
++) {
1988 chip
= &cfi
->chips
[i
];
1990 mutex_lock(&chip
->mutex
);
1992 if (chip
->state
== FL_PM_SUSPENDED
) {
1993 chip
->state
= FL_READY
;
1994 map_write(map
, CMD(0xF0), chip
->start
);
1998 printk(KERN_ERR
"Argh. Chip not in PM_SUSPENDED state upon resume()\n");
2000 mutex_unlock(&chip
->mutex
);
2006 * Ensure that the flash device is put back into read array mode before
2007 * unloading the driver or rebooting. On some systems, rebooting while
2008 * the flash is in query/program/erase mode will prevent the CPU from
2009 * fetching the bootloader code, requiring a hard reset or power cycle.
2011 static int cfi_amdstd_reset(struct mtd_info
*mtd
)
2013 struct map_info
*map
= mtd
->priv
;
2014 struct cfi_private
*cfi
= map
->fldrv_priv
;
2016 struct flchip
*chip
;
2018 for (i
= 0; i
< cfi
->numchips
; i
++) {
2020 chip
= &cfi
->chips
[i
];
2022 mutex_lock(&chip
->mutex
);
2024 ret
= get_chip(map
, chip
, chip
->start
, FL_SHUTDOWN
);
2026 map_write(map
, CMD(0xF0), chip
->start
);
2027 chip
->state
= FL_SHUTDOWN
;
2028 put_chip(map
, chip
, chip
->start
);
2031 mutex_unlock(&chip
->mutex
);
2038 static int cfi_amdstd_reboot(struct notifier_block
*nb
, unsigned long val
,
2041 struct mtd_info
*mtd
;
2043 mtd
= container_of(nb
, struct mtd_info
, reboot_notifier
);
2044 cfi_amdstd_reset(mtd
);
2049 static void cfi_amdstd_destroy(struct mtd_info
*mtd
)
2051 struct map_info
*map
= mtd
->priv
;
2052 struct cfi_private
*cfi
= map
->fldrv_priv
;
2054 cfi_amdstd_reset(mtd
);
2055 unregister_reboot_notifier(&mtd
->reboot_notifier
);
2056 kfree(cfi
->cmdset_priv
);
2059 kfree(mtd
->eraseregions
);
2062 MODULE_LICENSE("GPL");
2063 MODULE_AUTHOR("Crossnet Co. <info@crossnet.co.jp> et al.");
2064 MODULE_DESCRIPTION("MTD chip driver for AMD/Fujitsu flash chips");
2065 MODULE_ALIAS("cfi_cmdset_0006");
2066 MODULE_ALIAS("cfi_cmdset_0701");