drivers/usb/host/ohci-hcd.c

   1 /*
   2  * OHCI HCD (Host Controller Driver) for USB.
   3  *
   4  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   5  * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
   6  *
   7  * [ Initialisation is based on Linus'  ]
   8  * [ uhci code and gregs ohci fragments ]
   9  * [ (C) Copyright 1999 Linus Torvalds  ]
  10  * [ (C) Copyright 1999 Gregory P. Smith]
  11  *
  12  *
  13  * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
  14  * interfaces (though some non-x86 Intel chips use it).  It supports
  15  * smarter hardware than UHCI.  A download link for the spec available
  16  * through the http://www.usb.org website.
  17  *
  18  * This file is licenced under the GPL.
  19  */
  20
  21 #include <linux/module.h>
  22 #include <linux/moduleparam.h>
  23 #include <linux/pci.h>
  24 #include <linux/kernel.h>
  25 #include <linux/delay.h>
  26 #include <linux/ioport.h>
  27 #include <linux/sched.h>
  28 #include <linux/slab.h>
  29 #include <linux/errno.h>
  30 #include <linux/init.h>
  31 #include <linux/timer.h>
  32 #include <linux/list.h>
  33 #include <linux/usb.h>
  34 #include <linux/usb/otg.h>
  35 #include <linux/dma-mapping.h>
  36 #include <linux/dmapool.h>
  37 #include <linux/reboot.h>
  38 #include <linux/workqueue.h>
  39 #include <linux/debugfs.h>
  40
  41 #include <asm/io.h>
  42 #include <asm/irq.h>
  43 #include <asm/system.h>
  44 #include <asm/unaligned.h>
  45 #include <asm/byteorder.h>
  46
  47 #include "../core/hcd.h"
  48
  49 #define DRIVER_VERSION "2006 August 04"
  50 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
  51 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
  52
  53 /*-------------------------------------------------------------------------*/
  54
  55 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
  56
  57 /* For initializing controller (mask in an HCFS mode too) */
  58 #define OHCI_CONTROL_INIT       OHCI_CTRL_CBSR
  59 #define OHCI_INTR_INIT \
  60                 (OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
  61                 | OHCI_INTR_RD | OHCI_INTR_WDH)
  62
  63 #ifdef __hppa__
  64 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
  65 #define IR_DISABLE
  66 #endif
  67
  68 #ifdef CONFIG_ARCH_OMAP
  69 /* OMAP doesn't support IR (no SMM; not needed) */
  70 #define IR_DISABLE
  71 #endif
  72
  73 /*-------------------------------------------------------------------------*/
  74
  75 static const char       hcd_name [] = "ohci_hcd";
  76
  77 #define STATECHANGE_DELAY       msecs_to_jiffies(300)
  78
  79 #include "ohci.h"
  80
  81 static void ohci_dump (struct ohci_hcd *ohci, int verbose);
  82 static int ohci_init (struct ohci_hcd *ohci);
  83 static void ohci_stop (struct usb_hcd *hcd);
  84
  85 #if defined(CONFIG_PM) || defined(CONFIG_PCI)
  86 static int ohci_restart (struct ohci_hcd *ohci);
  87 #endif
  88
  89 #ifdef CONFIG_PCI
  90 static void quirk_amd_pll(int state);
  91 static void amd_iso_dev_put(void);
  92 static void sb800_prefetch(struct ohci_hcd *ohci, int on);
  93 #else
  94 static inline void quirk_amd_pll(int state)
  95 {
  96         return;
  97 }
  98 static inline void amd_iso_dev_put(void)
  99 {
 100         return;
 101 }
 102 static inline void sb800_prefetch(struct ohci_hcd *ohci, int on)
 103 {
 104         return;
 105 }
 106 #endif
 107
 108
 109 #include "ohci-hub.c"
 110 #include "ohci-dbg.c"
 111 #include "ohci-mem.c"
 112 #include "ohci-q.c"
 113
 114
 115 /*
 116  * On architectures with edge-triggered interrupts we must never return
 117  * IRQ_NONE.
 118  */
 119 #if defined(CONFIG_SA1111)  /* ... or other edge-triggered systems */
 120 #define IRQ_NOTMINE     IRQ_HANDLED
 121 #else
 122 #define IRQ_NOTMINE     IRQ_NONE
 123 #endif
 124
 125
 126 /* Some boards misreport power switching/overcurrent */
 127 static int distrust_firmware = 1;
 128 module_param (distrust_firmware, bool, 0);
 129 MODULE_PARM_DESC (distrust_firmware,
 130         "true to distrust firmware power/overcurrent setup");
 131
 132 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
 133 static int no_handshake = 0;
 134 module_param (no_handshake, bool, 0);
 135 MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
 136
 137 /*-------------------------------------------------------------------------*/
 138
 139 /*
 140  * queue up an urb for anything except the root hub
 141  */
 142 static int ohci_urb_enqueue (
 143         struct usb_hcd  *hcd,
 144         struct urb      *urb,
 145         gfp_t           mem_flags
 146 ) {
 147         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 148         struct ed       *ed;
 149         urb_priv_t      *urb_priv;
 150         unsigned int    pipe = urb->pipe;
 151         int             i, size = 0;
 152         unsigned long   flags;
 153         int             retval = 0;
 154
 155 #ifdef OHCI_VERBOSE_DEBUG
 156         urb_print(urb, "SUB", usb_pipein(pipe), -EINPROGRESS);
 157 #endif
 158
 159         /* every endpoint has a ed, locate and maybe (re)initialize it */
 160         if (! (ed = ed_get (ohci, urb->ep, urb->dev, pipe, urb->interval)))
 161                 return -ENOMEM;
 162
 163         /* for the private part of the URB we need the number of TDs (size) */
 164         switch (ed->type) {
 165                 case PIPE_CONTROL:
 166                         /* td_submit_urb() doesn't yet handle these */
 167                         if (urb->transfer_buffer_length > 4096)
 168                                 return -EMSGSIZE;
 169
 170                         /* 1 TD for setup, 1 for ACK, plus ... */
 171                         size = 2;
 172                         /* FALLTHROUGH */
 173                 // case PIPE_INTERRUPT:
 174                 // case PIPE_BULK:
 175                 default:
 176                         /* one TD for every 4096 Bytes (can be upto 8K) */
 177                         size += urb->transfer_buffer_length / 4096;
 178                         /* ... and for any remaining bytes ... */
 179                         if ((urb->transfer_buffer_length % 4096) != 0)
 180                                 size++;
 181                         /* ... and maybe a zero length packet to wrap it up */
 182                         if (size == 0)
 183                                 size++;
 184                         else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
 185                                 && (urb->transfer_buffer_length
 186                                         % usb_maxpacket (urb->dev, pipe,
 187                                                 usb_pipeout (pipe))) == 0)
 188                                 size++;
 189                         break;
 190                 case PIPE_ISOCHRONOUS: /* number of packets from URB */
 191                         size = urb->number_of_packets;
 192                         break;
 193         }
 194
 195         /* allocate the private part of the URB */
 196         urb_priv = kzalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
 197                         mem_flags);
 198         if (!urb_priv)
 199                 return -ENOMEM;
 200         INIT_LIST_HEAD (&urb_priv->pending);
 201         urb_priv->length = size;
 202         urb_priv->ed = ed;
 203
 204         /* allocate the TDs (deferring hash chain updates) */
 205         for (i = 0; i < size; i++) {
 206                 urb_priv->td [i] = td_alloc (ohci, mem_flags);
 207                 if (!urb_priv->td [i]) {
 208                         urb_priv->length = i;
 209                         urb_free_priv (ohci, urb_priv);
 210                         return -ENOMEM;
 211                 }
 212         }
 213
 214         spin_lock_irqsave (&ohci->lock, flags);
 215
 216         /* don't submit to a dead HC */
 217         if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
 218                 retval = -ENODEV;
 219                 goto fail;
 220         }
 221         if (!HC_IS_RUNNING(hcd->state)) {
 222                 retval = -ENODEV;
 223                 goto fail;
 224         }
 225         retval = usb_hcd_link_urb_to_ep(hcd, urb);
 226         if (retval)
 227                 goto fail;
 228
 229         /* schedule the ed if needed */
 230         if (ed->state == ED_IDLE) {
 231                 retval = ed_schedule (ohci, ed);
 232                 if (retval < 0) {
 233                         usb_hcd_unlink_urb_from_ep(hcd, urb);
 234                         goto fail;
 235                 }
 236                 if (ed->type == PIPE_ISOCHRONOUS) {
 237                         u16     frame = ohci_frame_no(ohci);
 238
 239                         /* delay a few frames before the first TD */
 240                         frame += max_t (u16, 8, ed->interval);
 241                         frame &= ~(ed->interval - 1);
 242                         frame |= ed->branch;
 243                         urb->start_frame = frame;
 244
 245                         /* yes, only URB_ISO_ASAP is supported, and
 246                          * urb->start_frame is never used as input.
 247                          */
 248                 }
 249         } else if (ed->type == PIPE_ISOCHRONOUS)
 250                 urb->start_frame = ed->last_iso + ed->interval;
 251
 252         /* fill the TDs and link them to the ed; and
 253          * enable that part of the schedule, if needed
 254          * and update count of queued periodic urbs
 255          */
 256         urb->hcpriv = urb_priv;
 257         td_submit_urb (ohci, urb);
 258
 259 fail:
 260         if (retval)
 261                 urb_free_priv (ohci, urb_priv);
 262         spin_unlock_irqrestore (&ohci->lock, flags);
 263         return retval;
 264 }
 265
 266 /*
 267  * decouple the URB from the HC queues (TDs, urb_priv).
 268  * reporting is always done
 269  * asynchronously, and we might be dealing with an urb that's
 270  * partially transferred, or an ED with other urbs being unlinked.
 271  */
 272 static int ohci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 273 {
 274         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 275         unsigned long           flags;
 276         int                     rc;
 277
 278 #ifdef OHCI_VERBOSE_DEBUG
 279         urb_print(urb, "UNLINK", 1, status);
 280 #endif
 281
 282         spin_lock_irqsave (&ohci->lock, flags);
 283         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 284         if (rc) {
 285                 ;       /* Do nothing */
 286         } else if (HC_IS_RUNNING(hcd->state)) {
 287                 urb_priv_t  *urb_priv;
 288
 289                 /* Unless an IRQ completed the unlink while it was being
 290                  * handed to us, flag it for unlink and giveback, and force
 291                  * some upcoming INTR_SF to call finish_unlinks()
 292                  */
 293                 urb_priv = urb->hcpriv;
 294                 if (urb_priv) {
 295                         if (urb_priv->ed->state == ED_OPER)
 296                                 start_ed_unlink (ohci, urb_priv->ed);
 297                 }
 298         } else {
 299                 /*
 300                  * with HC dead, we won't respect hc queue pointers
 301                  * any more ... just clean up every urb's memory.
 302                  */
 303                 if (urb->hcpriv)
 304                         finish_urb(ohci, urb, status);
 305         }
 306         spin_unlock_irqrestore (&ohci->lock, flags);
 307         return rc;
 308 }
 309
 310 /*-------------------------------------------------------------------------*/
 311
 312 /* frees config/altsetting state for endpoints,
 313  * including ED memory, dummy TD, and bulk/intr data toggle
 314  */
 315
 316 static void
 317 ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 318 {
 319         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 320         unsigned long           flags;
 321         struct ed               *ed = ep->hcpriv;
 322         unsigned                limit = 1000;
 323
 324         /* ASSERT:  any requests/urbs are being unlinked */
 325         /* ASSERT:  nobody can be submitting urbs for this any more */
 326
 327         if (!ed)
 328                 return;
 329
 330 rescan:
 331         spin_lock_irqsave (&ohci->lock, flags);
 332
 333         if (!HC_IS_RUNNING (hcd->state)) {
 334 sanitize:
 335                 ed->state = ED_IDLE;
 336                 if (quirk_zfmicro(ohci) && ed->type == PIPE_INTERRUPT)
 337                         ohci->eds_scheduled--;
 338                 finish_unlinks (ohci, 0);
 339         }
 340
 341         switch (ed->state) {
 342         case ED_UNLINK:         /* wait for hw to finish? */
 343                 /* major IRQ delivery trouble loses INTR_SF too... */
 344                 if (limit-- == 0) {
 345                         ohci_warn(ohci, "ED unlink timeout\n");
 346                         if (quirk_zfmicro(ohci)) {
 347                                 ohci_warn(ohci, "Attempting ZF TD recovery\n");
 348                                 ohci->ed_to_check = ed;
 349                                 ohci->zf_delay = 2;
 350                         }
 351                         goto sanitize;
 352                 }
 353                 spin_unlock_irqrestore (&ohci->lock, flags);
 354                 schedule_timeout_uninterruptible(1);
 355                 goto rescan;
 356         case ED_IDLE:           /* fully unlinked */
 357                 if (list_empty (&ed->td_list)) {
 358                         td_free (ohci, ed->dummy);
 359                         ed_free (ohci, ed);
 360                         break;
 361                 }
 362                 /* else FALL THROUGH */
 363         default:
 364                 /* caller was supposed to have unlinked any requests;
 365                  * that's not our job.  can't recover; must leak ed.
 366                  */
 367                 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
 368                         ed, ep->desc.bEndpointAddress, ed->state,
 369                         list_empty (&ed->td_list) ? "" : " (has tds)");
 370                 td_free (ohci, ed->dummy);
 371                 break;
 372         }
 373         ep->hcpriv = NULL;
 374         spin_unlock_irqrestore (&ohci->lock, flags);
 375         return;
 376 }
 377
 378 static int ohci_get_frame (struct usb_hcd *hcd)
 379 {
 380         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 381
 382         return ohci_frame_no(ohci);
 383 }
 384
 385 static void ohci_usb_reset (struct ohci_hcd *ohci)
 386 {
 387         ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
 388         ohci->hc_control &= OHCI_CTRL_RWC;
 389         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 390 }
 391
 392 /* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
 393  * other cases where the next software may expect clean state from the
 394  * "firmware".  this is bus-neutral, unlike shutdown() methods.
 395  */
 396 static void
 397 ohci_shutdown (struct usb_hcd *hcd)
 398 {
 399         struct ohci_hcd *ohci;
 400
 401         ohci = hcd_to_ohci (hcd);
 402         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 403         ohci_usb_reset (ohci);
 404         /* flush the writes */
 405         (void) ohci_readl (ohci, &ohci->regs->control);
 406 }
 407
 408 static int check_ed(struct ohci_hcd *ohci, struct ed *ed)
 409 {
 410         return (hc32_to_cpu(ohci, ed->hwINFO) & ED_IN) != 0
 411                 && (hc32_to_cpu(ohci, ed->hwHeadP) & TD_MASK)
 412                         == (hc32_to_cpu(ohci, ed->hwTailP) & TD_MASK)
 413                 && !list_empty(&ed->td_list);
 414 }
 415
 416 /* ZF Micro watchdog timer callback. The ZF Micro chipset sometimes completes
 417  * an interrupt TD but neglects to add it to the donelist.  On systems with
 418  * this chipset, we need to periodically check the state of the queues to look
 419  * for such "lost" TDs.
 420  */
 421 static void unlink_watchdog_func(unsigned long _ohci)
 422 {
 423         unsigned long   flags;
 424         unsigned        max;
 425         unsigned        seen_count = 0;
 426         unsigned        i;
 427         struct ed       **seen = NULL;
 428         struct ohci_hcd *ohci = (struct ohci_hcd *) _ohci;
 429
 430         spin_lock_irqsave(&ohci->lock, flags);
 431         max = ohci->eds_scheduled;
 432         if (!max)
 433                 goto done;
 434
 435         if (ohci->ed_to_check)
 436                 goto out;
 437
 438         seen = kcalloc(max, sizeof *seen, GFP_ATOMIC);
 439         if (!seen)
 440                 goto out;
 441
 442         for (i = 0; i < NUM_INTS; i++) {
 443                 struct ed       *ed = ohci->periodic[i];
 444
 445                 while (ed) {
 446                         unsigned        temp;
 447
 448                         /* scan this branch of the periodic schedule tree */
 449                         for (temp = 0; temp < seen_count; temp++) {
 450                                 if (seen[temp] == ed) {
 451                                         /* we've checked it and what's after */
 452                                         ed = NULL;
 453                                         break;
 454                                 }
 455                         }
 456                         if (!ed)
 457                                 break;
 458                         seen[seen_count++] = ed;
 459                         if (!check_ed(ohci, ed)) {
 460                                 ed = ed->ed_next;
 461                                 continue;
 462                         }
 463
 464                         /* HC's TD list is empty, but HCD sees at least one
 465                          * TD that's not been sent through the donelist.
 466                          */
 467                         ohci->ed_to_check = ed;
 468                         ohci->zf_delay = 2;
 469
 470                         /* The HC may wait until the next frame to report the
 471                          * TD as done through the donelist and INTR_WDH.  (We
 472                          * just *assume* it's not a multi-TD interrupt URB;
 473                          * those could defer the IRQ more than one frame, using
 474                          * DI...)  Check again after the next INTR_SF.
 475                          */
 476                         ohci_writel(ohci, OHCI_INTR_SF,
 477                                         &ohci->regs->intrstatus);
 478                         ohci_writel(ohci, OHCI_INTR_SF,
 479                                         &ohci->regs->intrenable);
 480
 481                         /* flush those writes */
 482                         (void) ohci_readl(ohci, &ohci->regs->control);
 483
 484                         goto out;
 485                 }
 486         }
 487 out:
 488         kfree(seen);
 489         if (ohci->eds_scheduled)
 490                 mod_timer(&ohci->unlink_watchdog, round_jiffies(jiffies + HZ));
 491 done:
 492         spin_unlock_irqrestore(&ohci->lock, flags);
 493 }
 494
 495 /*-------------------------------------------------------------------------*
 496  * HC functions
 497  *-------------------------------------------------------------------------*/
 498
 499 /* init memory, and kick BIOS/SMM off */
 500
 501 static int ohci_init (struct ohci_hcd *ohci)
 502 {
 503         int ret;
 504         struct usb_hcd *hcd = ohci_to_hcd(ohci);
 505
 506         if (distrust_firmware)
 507                 ohci->flags |= OHCI_QUIRK_HUB_POWER;
 508
 509         disable (ohci);
 510         ohci->regs = hcd->regs;
 511
 512         /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
 513          * was never needed for most non-PCI systems ... remove the code?
 514          */
 515
 516 #ifndef IR_DISABLE
 517         /* SMM owns the HC?  not for long! */
 518         if (!no_handshake && ohci_readl (ohci,
 519                                         &ohci->regs->control) & OHCI_CTRL_IR) {
 520                 u32 temp;
 521
 522                 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
 523
 524                 /* this timeout is arbitrary.  we make it long, so systems
 525                  * depending on usb keyboards may be usable even if the
 526                  * BIOS/SMM code seems pretty broken.
 527                  */
 528                 temp = 500;     /* arbitrary: five seconds */
 529
 530                 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
 531                 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
 532                 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
 533                         msleep (10);
 534                         if (--temp == 0) {
 535                                 ohci_err (ohci, "USB HC takeover failed!"
 536                                         "  (BIOS/SMM bug)\n");
 537                                 return -EBUSY;
 538                         }
 539                 }
 540                 ohci_usb_reset (ohci);
 541         }
 542 #endif
 543
 544         /* Disable HC interrupts */
 545         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 546
 547         /* flush the writes, and save key bits like RWC */
 548         if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
 549                 ohci->hc_control |= OHCI_CTRL_RWC;
 550
 551         /* Read the number of ports unless overridden */
 552         if (ohci->num_ports == 0)
 553                 ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
 554
 555         if (ohci->hcca)
 556                 return 0;
 557
 558         ohci->hcca = dma_alloc_coherent (hcd->self.controller,
 559                         sizeof *ohci->hcca, &ohci->hcca_dma, 0);
 560         if (!ohci->hcca)
 561                 return -ENOMEM;
 562
 563         if ((ret = ohci_mem_init (ohci)) < 0)
 564                 ohci_stop (hcd);
 565         else {
 566                 create_debug_files (ohci);
 567         }
 568
 569         return ret;
 570 }
 571
 572 /*-------------------------------------------------------------------------*/
 573
 574 /* Start an OHCI controller, set the BUS operational
 575  * resets USB and controller
 576  * enable interrupts
 577  */
 578 static int ohci_run (struct ohci_hcd *ohci)
 579 {
 580         u32                     mask, temp;
 581         int                     first = ohci->fminterval == 0;
 582         struct usb_hcd          *hcd = ohci_to_hcd(ohci);
 583
 584         disable (ohci);
 585
 586         /* boot firmware should have set this up (5.1.1.3.1) */
 587         if (first) {
 588
 589                 temp = ohci_readl (ohci, &ohci->regs->fminterval);
 590                 ohci->fminterval = temp & 0x3fff;
 591                 if (ohci->fminterval != FI)
 592                         ohci_dbg (ohci, "fminterval delta %d\n",
 593                                 ohci->fminterval - FI);
 594                 ohci->fminterval |= FSMP (ohci->fminterval) << 16;
 595                 /* also: power/overcurrent flags in roothub.a */
 596         }
 597
 598         /* Reset USB nearly "by the book".  RemoteWakeupConnected was
 599          * saved if boot firmware (BIOS/SMM/...) told us it's connected,
 600          * or if bus glue did the same (e.g. for PCI add-in cards with
 601          * PCI PM support).
 602          */
 603         if ((ohci->hc_control & OHCI_CTRL_RWC) != 0
 604                         && !device_may_wakeup(hcd->self.controller))
 605                 device_init_wakeup(hcd->self.controller, 1);
 606
 607         switch (ohci->hc_control & OHCI_CTRL_HCFS) {
 608         case OHCI_USB_OPER:
 609                 temp = 0;
 610                 break;
 611         case OHCI_USB_SUSPEND:
 612         case OHCI_USB_RESUME:
 613                 ohci->hc_control &= OHCI_CTRL_RWC;
 614                 ohci->hc_control |= OHCI_USB_RESUME;
 615                 temp = 10 /* msec wait */;
 616                 break;
 617         // case OHCI_USB_RESET:
 618         default:
 619                 ohci->hc_control &= OHCI_CTRL_RWC;
 620                 ohci->hc_control |= OHCI_USB_RESET;
 621                 temp = 50 /* msec wait */;
 622                 break;
 623         }
 624         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 625         // flush the writes
 626         (void) ohci_readl (ohci, &ohci->regs->control);
 627         msleep(temp);
 628
 629         memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
 630
 631         /* 2msec timelimit here means no irqs/preempt */
 632         spin_lock_irq (&ohci->lock);
 633
 634 retry:
 635         /* HC Reset requires max 10 us delay */
 636         ohci_writel (ohci, OHCI_HCR,  &ohci->regs->cmdstatus);
 637         temp = 30;      /* ... allow extra time */
 638         while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
 639                 if (--temp == 0) {
 640                         spin_unlock_irq (&ohci->lock);
 641                         ohci_err (ohci, "USB HC reset timed out!\n");
 642                         return -1;
 643                 }
 644                 udelay (1);
 645         }
 646
 647         /* now we're in the SUSPEND state ... must go OPERATIONAL
 648          * within 2msec else HC enters RESUME
 649          *
 650          * ... but some hardware won't init fmInterval "by the book"
 651          * (SiS, OPTi ...), so reset again instead.  SiS doesn't need
 652          * this if we write fmInterval after we're OPERATIONAL.
 653          * Unclear about ALi, ServerWorks, and others ... this could
 654          * easily be a longstanding bug in chip init on Linux.
 655          */
 656         if (ohci->flags & OHCI_QUIRK_INITRESET) {
 657                 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 658                 // flush those writes
 659                 (void) ohci_readl (ohci, &ohci->regs->control);
 660         }
 661
 662         /* Tell the controller where the control and bulk lists are
 663          * The lists are empty now. */
 664         ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
 665         ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
 666
 667         /* a reset clears this */
 668         ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
 669
 670         periodic_reinit (ohci);
 671
 672         /* some OHCI implementations are finicky about how they init.
 673          * bogus values here mean not even enumeration could work.
 674          */
 675         if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
 676                         || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
 677                 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
 678                         ohci->flags |= OHCI_QUIRK_INITRESET;
 679                         ohci_dbg (ohci, "enabling initreset quirk\n");
 680                         goto retry;
 681                 }
 682                 spin_unlock_irq (&ohci->lock);
 683                 ohci_err (ohci, "init err (%08x %04x)\n",
 684                         ohci_readl (ohci, &ohci->regs->fminterval),
 685                         ohci_readl (ohci, &ohci->regs->periodicstart));
 686                 return -EOVERFLOW;
 687         }
 688
 689         /* use rhsc irqs after khubd is fully initialized */
 690         hcd->poll_rh = 1;
 691         hcd->uses_new_polling = 1;
 692
 693         /* start controller operations */
 694         ohci->hc_control &= OHCI_CTRL_RWC;
 695         ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
 696         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 697         hcd->state = HC_STATE_RUNNING;
 698
 699         /* wake on ConnectStatusChange, matching external hubs */
 700         ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
 701
 702         /* Choose the interrupts we care about now, others later on demand */
 703         mask = OHCI_INTR_INIT;
 704         ohci_writel (ohci, ~0, &ohci->regs->intrstatus);
 705         ohci_writel (ohci, mask, &ohci->regs->intrenable);
 706
 707         /* handle root hub init quirks ... */
 708         temp = roothub_a (ohci);
 709         temp &= ~(RH_A_PSM | RH_A_OCPM);
 710         if (ohci->flags & OHCI_QUIRK_SUPERIO) {
 711                 /* NSC 87560 and maybe others */
 712                 temp |= RH_A_NOCP;
 713                 temp &= ~(RH_A_POTPGT | RH_A_NPS);
 714                 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
 715         } else if ((ohci->flags & OHCI_QUIRK_AMD756) ||
 716                         (ohci->flags & OHCI_QUIRK_HUB_POWER)) {
 717                 /* hub power always on; required for AMD-756 and some
 718                  * Mac platforms.  ganged overcurrent reporting, if any.
 719                  */
 720                 temp |= RH_A_NPS;
 721                 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
 722         }
 723         ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
 724         ohci_writel (ohci, (temp & RH_A_NPS) ? 0 : RH_B_PPCM,
 725                                                 &ohci->regs->roothub.b);
 726         // flush those writes
 727         (void) ohci_readl (ohci, &ohci->regs->control);
 728
 729         ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 730         spin_unlock_irq (&ohci->lock);
 731
 732         // POTPGT delay is bits 24-31, in 2 ms units.
 733         mdelay ((temp >> 23) & 0x1fe);
 734         hcd->state = HC_STATE_RUNNING;
 735
 736         if (quirk_zfmicro(ohci)) {
 737                 /* Create timer to watch for bad queue state on ZF Micro */
 738                 setup_timer(&ohci->unlink_watchdog, unlink_watchdog_func,
 739                                 (unsigned long) ohci);
 740
 741                 ohci->eds_scheduled = 0;
 742                 ohci->ed_to_check = NULL;
 743         }
 744
 745         ohci_dump (ohci, 1);
 746
 747         return 0;
 748 }
 749
 750 /*-------------------------------------------------------------------------*/
 751
 752 /* an interrupt happens */
 753
 754 static irqreturn_t ohci_irq (struct usb_hcd *hcd)
 755 {
 756         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 757         struct ohci_regs __iomem *regs = ohci->regs;
 758         int                     ints;
 759
 760         /* Read interrupt status (and flush pending writes).  We ignore the
 761          * optimization of checking the LSB of hcca->done_head; it doesn't
 762          * work on all systems (edge triggering for OHCI can be a factor).
 763          */
 764         ints = ohci_readl(ohci, &regs->intrstatus);
 765
 766         /* Check for an all 1's result which is a typical consequence
 767          * of dead, unclocked, or unplugged (CardBus...) devices
 768          */
 769         if (ints == ~(u32)0) {
 770                 disable (ohci);
 771                 ohci_dbg (ohci, "device removed!\n");
 772                 return IRQ_HANDLED;
 773         }
 774
 775         /* We only care about interrupts that are enabled */
 776         ints &= ohci_readl(ohci, &regs->intrenable);
 777
 778         /* interrupt for some other device? */
 779         if (ints == 0)
 780                 return IRQ_NOTMINE;
 781
 782         if (ints & OHCI_INTR_UE) {
 783                 // e.g. due to PCI Master/Target Abort
 784                 if (quirk_nec(ohci)) {
 785                         /* Workaround for a silicon bug in some NEC chips used
 786                          * in Apple's PowerBooks. Adapted from Darwin code.
 787                          */
 788                         ohci_err (ohci, "OHCI Unrecoverable Error, scheduling NEC chip restart\n");
 789
 790                         ohci_writel (ohci, OHCI_INTR_UE, &regs->intrdisable);
 791
 792                         schedule_work (&ohci->nec_work);
 793                 } else {
 794                         disable (ohci);
 795                         ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
 796                 }
 797
 798                 ohci_dump (ohci, 1);
 799                 ohci_usb_reset (ohci);
 800         }
 801
 802         if (ints & OHCI_INTR_RHSC) {
 803                 ohci_vdbg(ohci, "rhsc\n");
 804                 ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 805                 ohci_writel(ohci, OHCI_INTR_RD | OHCI_INTR_RHSC,
 806                                 &regs->intrstatus);
 807
 808                 /* NOTE: Vendors didn't always make the same implementation
 809                  * choices for RHSC.  Many followed the spec; RHSC triggers
 810                  * on an edge, like setting and maybe clearing a port status
 811                  * change bit.  With others it's level-triggered, active
 812                  * until khubd clears all the port status change bits.  We'll
 813                  * always disable it here and rely on polling until khubd
 814                  * re-enables it.
 815                  */
 816                 ohci_writel(ohci, OHCI_INTR_RHSC, &regs->intrdisable);
 817                 usb_hcd_poll_rh_status(hcd);
 818         }
 819
 820         /* For connect and disconnect events, we expect the controller
 821          * to turn on RHSC along with RD.  But for remote wakeup events
 822          * this might not happen.
 823          */
 824         else if (ints & OHCI_INTR_RD) {
 825                 ohci_vdbg(ohci, "resume detect\n");
 826                 ohci_writel(ohci, OHCI_INTR_RD, &regs->intrstatus);
 827                 hcd->poll_rh = 1;
 828                 if (ohci->autostop) {
 829                         spin_lock (&ohci->lock);
 830                         ohci_rh_resume (ohci);
 831                         spin_unlock (&ohci->lock);
 832                 } else
 833                         usb_hcd_resume_root_hub(hcd);
 834         }
 835
 836         if (ints & OHCI_INTR_WDH) {
 837                 spin_lock (&ohci->lock);
 838                 dl_done_list (ohci);
 839                 spin_unlock (&ohci->lock);
 840         }
 841
 842         if (quirk_zfmicro(ohci) && (ints & OHCI_INTR_SF)) {
 843                 spin_lock(&ohci->lock);
 844                 if (ohci->ed_to_check) {
 845                         struct ed *ed = ohci->ed_to_check;
 846
 847                         if (check_ed(ohci, ed)) {
 848                                 /* HC thinks the TD list is empty; HCD knows
 849                                  * at least one TD is outstanding
 850                                  */
 851                                 if (--ohci->zf_delay == 0) {
 852                                         struct td *td = list_entry(
 853                                                 ed->td_list.next,
 854                                                 struct td, td_list);
 855                                         ohci_warn(ohci,
 856                                                   "Reclaiming orphan TD %p\n",
 857                                                   td);
 858                                         takeback_td(ohci, td);
 859                                         ohci->ed_to_check = NULL;
 860                                 }
 861                         } else
 862                                 ohci->ed_to_check = NULL;
 863                 }
 864                 spin_unlock(&ohci->lock);
 865         }
 866
 867         /* could track INTR_SO to reduce available PCI/... bandwidth */
 868
 869         /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
 870          * when there's still unlinking to be done (next frame).
 871          */
 872         spin_lock (&ohci->lock);
 873         if (ohci->ed_rm_list)
 874                 finish_unlinks (ohci, ohci_frame_no(ohci));
 875         if ((ints & OHCI_INTR_SF) != 0
 876                         && !ohci->ed_rm_list
 877                         && !ohci->ed_to_check
 878                         && HC_IS_RUNNING(hcd->state))
 879                 ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
 880         spin_unlock (&ohci->lock);
 881
 882         if (HC_IS_RUNNING(hcd->state)) {
 883                 ohci_writel (ohci, ints, &regs->intrstatus);
 884                 ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
 885                 // flush those writes
 886                 (void) ohci_readl (ohci, &ohci->regs->control);
 887         }
 888
 889         return IRQ_HANDLED;
 890 }
 891
 892 /*-------------------------------------------------------------------------*/
 893
 894 static void ohci_stop (struct usb_hcd *hcd)
 895 {
 896         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 897
 898         ohci_dump (ohci, 1);
 899
 900         flush_scheduled_work();
 901
 902         ohci_usb_reset (ohci);
 903         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 904         free_irq(hcd->irq, hcd);
 905         hcd->irq = -1;
 906
 907         if (quirk_zfmicro(ohci))
 908                 del_timer(&ohci->unlink_watchdog);
 909         if (quirk_amdiso(ohci))
 910                 amd_iso_dev_put();
 911
 912         remove_debug_files (ohci);
 913         ohci_mem_cleanup (ohci);
 914         if (ohci->hcca) {
 915                 dma_free_coherent (hcd->self.controller,
 916                                 sizeof *ohci->hcca,
 917                                 ohci->hcca, ohci->hcca_dma);
 918                 ohci->hcca = NULL;
 919                 ohci->hcca_dma = 0;
 920         }
 921 }
 922
 923 /*-------------------------------------------------------------------------*/
 924
 925 #if defined(CONFIG_PM) || defined(CONFIG_PCI)
 926
 927 /* must not be called from interrupt context */
 928 static int ohci_restart (struct ohci_hcd *ohci)
 929 {
 930         int temp;
 931         int i;
 932         struct urb_priv *priv;
 933
 934         spin_lock_irq(&ohci->lock);
 935         disable (ohci);
 936
 937         /* Recycle any "live" eds/tds (and urbs). */
 938         if (!list_empty (&ohci->pending))
 939                 ohci_dbg(ohci, "abort schedule...\n");
 940         list_for_each_entry (priv, &ohci->pending, pending) {
 941                 struct urb      *urb = priv->td[0]->urb;
 942                 struct ed       *ed = priv->ed;
 943
 944                 switch (ed->state) {
 945                 case ED_OPER:
 946                         ed->state = ED_UNLINK;
 947                         ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
 948                         ed_deschedule (ohci, ed);
 949
 950                         ed->ed_next = ohci->ed_rm_list;
 951                         ed->ed_prev = NULL;
 952                         ohci->ed_rm_list = ed;
 953                         /* FALLTHROUGH */
 954                 case ED_UNLINK:
 955                         break;
 956                 default:
 957                         ohci_dbg(ohci, "bogus ed %p state %d\n",
 958                                         ed, ed->state);
 959                 }
 960
 961                 if (!urb->unlinked)
 962                         urb->unlinked = -ESHUTDOWN;
 963         }
 964         finish_unlinks (ohci, 0);
 965         spin_unlock_irq(&ohci->lock);
 966
 967         /* paranoia, in case that didn't work: */
 968
 969         /* empty the interrupt branches */
 970         for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
 971         for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
 972
 973         /* no EDs to remove */
 974         ohci->ed_rm_list = NULL;
 975
 976         /* empty control and bulk lists */
 977         ohci->ed_controltail = NULL;
 978         ohci->ed_bulktail    = NULL;
 979
 980         if ((temp = ohci_run (ohci)) < 0) {
 981                 ohci_err (ohci, "can't restart, %d\n", temp);
 982                 return temp;
 983         }
 984         ohci_dbg(ohci, "restart complete\n");
 985         return 0;
 986 }
 987
 988 #endif
 989
 990 /*-------------------------------------------------------------------------*/
 991
 992 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
 993
 994 MODULE_AUTHOR (DRIVER_AUTHOR);
 995 MODULE_DESCRIPTION (DRIVER_INFO);
 996 MODULE_LICENSE ("GPL");
 997
 998 #ifdef CONFIG_PCI
 999 #include "ohci-pci.c"
1000 #define PCI_DRIVER              ohci_pci_driver
1001 #endif
1002
1003 #if defined(CONFIG_ARCH_SA1100) && defined(CONFIG_SA1111)
1004 #include "ohci-sa1111.c"
1005 #define SA1111_DRIVER           ohci_hcd_sa1111_driver
1006 #endif
1007
1008 #ifdef CONFIG_ARCH_S3C2410
1009 #include "ohci-s3c2410.c"
1010 #define PLATFORM_DRIVER         ohci_hcd_s3c2410_driver
1011 #endif
1012
1013 #ifdef CONFIG_ARCH_OMAP
1014 #include "ohci-omap.c"
1015 #define PLATFORM_DRIVER         ohci_hcd_omap_driver
1016 #endif
1017
1018 #ifdef CONFIG_ARCH_LH7A404
1019 #include "ohci-lh7a404.c"
1020 #define PLATFORM_DRIVER         ohci_hcd_lh7a404_driver
1021 #endif
1022
1023 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
1024 #include "ohci-pxa27x.c"
1025 #define PLATFORM_DRIVER         ohci_hcd_pxa27x_driver
1026 #endif
1027
1028 #ifdef CONFIG_ARCH_EP93XX
1029 #include "ohci-ep93xx.c"
1030 #define PLATFORM_DRIVER         ohci_hcd_ep93xx_driver
1031 #endif
1032
1033 #ifdef CONFIG_SOC_AU1X00
1034 #include "ohci-au1xxx.c"
1035 #define PLATFORM_DRIVER         ohci_hcd_au1xxx_driver
1036 #endif
1037
1038 #ifdef CONFIG_PNX8550
1039 #include "ohci-pnx8550.c"
1040 #define PLATFORM_DRIVER         ohci_hcd_pnx8550_driver
1041 #endif
1042
1043 #ifdef CONFIG_USB_OHCI_HCD_PPC_SOC
1044 #include "ohci-ppc-soc.c"
1045 #define PLATFORM_DRIVER         ohci_hcd_ppc_soc_driver
1046 #endif
1047
1048 #ifdef CONFIG_ARCH_AT91
1049 #include "ohci-at91.c"
1050 #define PLATFORM_DRIVER         ohci_hcd_at91_driver
1051 #endif
1052
1053 #ifdef CONFIG_ARCH_PNX4008
1054 #include "ohci-pnx4008.c"
1055 #define PLATFORM_DRIVER         usb_hcd_pnx4008_driver
1056 #endif
1057
1058 #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
1059     defined(CONFIG_CPU_SUBTYPE_SH7721) || \
1060     defined(CONFIG_CPU_SUBTYPE_SH7763)
1061 #include "ohci-sh.c"
1062 #define PLATFORM_DRIVER         ohci_hcd_sh_driver
1063 #endif
1064
1065
1066 #ifdef CONFIG_USB_OHCI_HCD_PPC_OF
1067 #include "ohci-ppc-of.c"
1068 #define OF_PLATFORM_DRIVER      ohci_hcd_ppc_of_driver
1069 #endif
1070
1071 #ifdef CONFIG_PPC_PS3
1072 #include "ohci-ps3.c"
1073 #define PS3_SYSTEM_BUS_DRIVER   ps3_ohci_driver
1074 #endif
1075
1076 #ifdef CONFIG_USB_OHCI_HCD_SSB
1077 #include "ohci-ssb.c"
1078 #define SSB_OHCI_DRIVER         ssb_ohci_driver
1079 #endif
1080
1081 #ifdef CONFIG_MFD_SM501
1082 #include "ohci-sm501.c"
1083 #define SM501_OHCI_DRIVER       ohci_hcd_sm501_driver
1084 #endif
1085
1086 #if     !defined(PCI_DRIVER) &&         \
1087         !defined(PLATFORM_DRIVER) &&    \
1088         !defined(OF_PLATFORM_DRIVER) && \
1089         !defined(SA1111_DRIVER) &&      \
1090         !defined(PS3_SYSTEM_BUS_DRIVER) && \
1091         !defined(SM501_OHCI_DRIVER) && \
1092         !defined(SSB_OHCI_DRIVER)
1093 #error "missing bus glue for ohci-hcd"
1094 #endif
1095
1096 static int __init ohci_hcd_mod_init(void)
1097 {
1098         int retval = 0;
1099
1100         if (usb_disabled())
1101                 return -ENODEV;
1102
1103         printk (KERN_DEBUG "%s: " DRIVER_INFO "\n", hcd_name);
1104         pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
1105                 sizeof (struct ed), sizeof (struct td));
1106         set_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1107
1108 #ifdef DEBUG
1109         ohci_debug_root = debugfs_create_dir("ohci", NULL);
1110         if (!ohci_debug_root) {
1111                 retval = -ENOENT;
1112                 goto error_debug;
1113         }
1114 #endif
1115
1116 #ifdef PS3_SYSTEM_BUS_DRIVER
1117         retval = ps3_ohci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1118         if (retval < 0)
1119                 goto error_ps3;
1120 #endif
1121
1122 #ifdef PLATFORM_DRIVER
1123         retval = platform_driver_register(&PLATFORM_DRIVER);
1124         if (retval < 0)
1125                 goto error_platform;
1126 #endif
1127
1128 #ifdef OF_PLATFORM_DRIVER
1129         retval = of_register_platform_driver(&OF_PLATFORM_DRIVER);
1130         if (retval < 0)
1131                 goto error_of_platform;
1132 #endif
1133
1134 #ifdef SA1111_DRIVER
1135         retval = sa1111_driver_register(&SA1111_DRIVER);
1136         if (retval < 0)
1137                 goto error_sa1111;
1138 #endif
1139
1140 #ifdef PCI_DRIVER
1141         retval = pci_register_driver(&PCI_DRIVER);
1142         if (retval < 0)
1143                 goto error_pci;
1144 #endif
1145
1146 #ifdef SSB_OHCI_DRIVER
1147         retval = ssb_driver_register(&SSB_OHCI_DRIVER);
1148         if (retval)
1149                 goto error_ssb;
1150 #endif
1151
1152 #ifdef SM501_OHCI_DRIVER
1153         retval = platform_driver_register(&SM501_OHCI_DRIVER);
1154         if (retval < 0)
1155                 goto error_sm501;
1156 #endif
1157
1158         return retval;
1159
1160         /* Error path */
1161 #ifdef SM501_OHCI_DRIVER
1162  error_sm501:
1163 #endif
1164 #ifdef SSB_OHCI_DRIVER
1165  error_ssb:
1166 #endif
1167 #ifdef PCI_DRIVER
1168         pci_unregister_driver(&PCI_DRIVER);
1169  error_pci:
1170 #endif
1171 #ifdef SA1111_DRIVER
1172         sa1111_driver_unregister(&SA1111_DRIVER);
1173  error_sa1111:
1174 #endif
1175 #ifdef OF_PLATFORM_DRIVER
1176         of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1177  error_of_platform:
1178 #endif
1179 #ifdef PLATFORM_DRIVER
1180         platform_driver_unregister(&PLATFORM_DRIVER);
1181  error_platform:
1182 #endif
1183 #ifdef PS3_SYSTEM_BUS_DRIVER
1184         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1185  error_ps3:
1186 #endif
1187 #ifdef DEBUG
1188         debugfs_remove(ohci_debug_root);
1189         ohci_debug_root = NULL;
1190  error_debug:
1191 #endif
1192
1193         clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1194         return retval;
1195 }
1196 module_init(ohci_hcd_mod_init);
1197
1198 static void __exit ohci_hcd_mod_exit(void)
1199 {
1200 #ifdef SM501_OHCI_DRIVER
1201         platform_driver_unregister(&SM501_OHCI_DRIVER);
1202 #endif
1203 #ifdef SSB_OHCI_DRIVER
1204         ssb_driver_unregister(&SSB_OHCI_DRIVER);
1205 #endif
1206 #ifdef PCI_DRIVER
1207         pci_unregister_driver(&PCI_DRIVER);
1208 #endif
1209 #ifdef SA1111_DRIVER
1210         sa1111_driver_unregister(&SA1111_DRIVER);
1211 #endif
1212 #ifdef OF_PLATFORM_DRIVER
1213         of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1214 #endif
1215 #ifdef PLATFORM_DRIVER
1216         platform_driver_unregister(&PLATFORM_DRIVER);
1217 #endif
1218 #ifdef PS3_SYSTEM_BUS_DRIVER
1219         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1220 #endif
1221 #ifdef DEBUG
1222         debugfs_remove(ohci_debug_root);
1223 #endif
1224         clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1225 }
1226 module_exit(ohci_hcd_mod_exit);
1227